Chameleon

Chameleon Svn Source Tree

Root/branches/ErmaC/Modules/i386/modules/AMDGraphicsEnabler/ati.c

1/*
2 * ATI Graphics Card Enabler, part of the Chameleon Boot Loader Project
3 *
4 * Copyright 2010 by Islam M. Ahmed Zaid. All rights reserved.
5 *
6 */
7
8#include "libsa.h"
9#include "saio_internal.h"
10#include "bootstruct.h"
11#include "pci.h"
12#include "platform.h"
13#include "device_inject.h"
14#include "ati_reg.h"
15
16#define OFFSET_TO_GET_ATOMBIOS_STRINGS_START 0x6e
17
18#define kUseAtiROM"UseAtiROM"
19#define kAtiConfig"AtiConfig"
20#define kAtiPorts"AtiPorts"
21#define kATYbinimage"ATYbinimage"
22
23#define Reg32(reg)(*(volatile uint32_t *)(card->mmio + reg))
24#define RegRead32(reg)(Reg32(reg))
25#define RegWrite32(reg, value)(Reg32(reg) = value)
26
27typedef enum {
28kNul,
29kStr,
30kPtr,
31kCst
32} type_t;
33
34typedef enum {
35CHIP_FAMILY_UNKNOW,
36/* IGP */
37CHIP_FAMILY_RS600,
38CHIP_FAMILY_RS690,
39CHIP_FAMILY_RS740,
40CHIP_FAMILY_RS780,
41CHIP_FAMILY_RS880,
42/* R600 */
43CHIP_FAMILY_R600,
44CHIP_FAMILY_RV610,
45CHIP_FAMILY_RV620,
46CHIP_FAMILY_RV630,
47CHIP_FAMILY_RV635,
48CHIP_FAMILY_RV670,
49/* R700 */
50CHIP_FAMILY_RV710,
51CHIP_FAMILY_RV730,
52CHIP_FAMILY_RV740,
53CHIP_FAMILY_RV772,
54CHIP_FAMILY_RV770,
55CHIP_FAMILY_RV790,
56/* Evergreen */
57CHIP_FAMILY_CEDAR,
58CHIP_FAMILY_CYPRESS,
59CHIP_FAMILY_HEMLOCK,
60CHIP_FAMILY_JUNIPER,
61CHIP_FAMILY_REDWOOD,
62CHIP_FAMILY_BROADWAY,
63/* Northern Islands */
64CHIP_FAMILY_ANTILLES,
65CHIP_FAMILY_BARTS,
66CHIP_FAMILY_CAICOS,
67CHIP_FAMILY_CAYMAN,
68CHIP_FAMILY_TURKS,
69/* Southern Islands */
70//CHIP_FAMILY_TAITI
71//CHIP_FAMILY_THAMES
72//CHIP_FAMILY_LOMBOK
73//CHIP_FAMILY_NEW_ZEALAND
74CHIP_FAMILY_LAST
75} chip_family_t;
76
77static const char *chip_family_name[] = {
78"UNKNOW",
79/* IGP */
80"RS600",
81"RS690",
82"RS740",
83"RS780",
84"RS880",
85/* R600 */
86"R600",
87"RV610",
88"RV620",
89"RV630",
90"RV635",
91"RV670",
92/* R700 */
93"RV710",
94"RV730",
95"RV740",
96"RV772",
97"RV770",
98"RV790",
99/* Evergreen */
100"Cedar",
101"Cypress",
102"Hemlock",
103"Juniper",
104"Redwood",
105"Broadway",
106/* Northern Islands */
107"Antilles",
108"Barts",
109"Caicos",
110"Cayman",
111"Turks",
112/* Southern Islands */
113//"Tahiti"
114//"Thames"
115//"Lombok"
116//"New_Zealand"
117""
118};
119
120typedef struct {
121const char*name;
122uint8_tports;
123} card_config_t;
124
125static card_config_t card_configs[] = {
126{NULL,0},
127{"Alopias",2},
128{"Alouatta",4},
129{"Baboon",3},
130{"Cardinal",2},
131{"Caretta",1},
132{"Colobus",2},
133{"Douc",2},
134{"Eulemur",3},
135{"Flicker",3},
136{"Galago",2},
137{"Gliff",3},
138{"Hoolock",3},
139{"Hypoprion",2},
140{"Iago",2},
141{"Kakapo",3},
142{"Kipunji",4},
143{"Lamna",2},
144{"Langur",3},
145{"Megalodon",3},
146{"Motmot",2},
147{"Nomascus",5},
148{"Orangutan",2},
149{"Peregrine",2},
150{"Quail",3},
151{"Raven",3},
152{"Shrike",3},
153{"Sphyrna",1},
154{"Triakis",2},
155{"Uakari",4},
156{"Vervet",4},
157{"Zonalis",6},
158{"Pithecia",3},
159{"Bulrushes",6},
160{"Cattail",4},
161{"Hydrilla",5},
162{"Duckweed",4},
163{"Fanwort",4},
164{"Elodea",5},
165{"Kudzu",2},
166{"Gibba",5},
167{"Lotus",3},
168{"Ipomoea",3},
169{"Mangabey",2},
170{"Muskgrass",4},
171{"Juncus",4}
172};
173
174typedef enum {
175kNull,
176kAlopias,
177kAlouatta,
178kBaboon,
179kCardinal,
180kCaretta,
181kColobus,
182kDouc,
183kEulemur,
184kFlicker,
185kGalago,
186kGliff,
187kHoolock,
188kHypoprion,
189kIago,
190kKakapo,
191kKipunji,
192kLamna,
193kLangur,
194kMegalodon,
195kMotmot,
196kNomascus,
197kOrangutan,
198kPeregrine,
199kQuail,
200kRaven,
201kShrike,
202kSphyrna,
203kTriakis,
204kUakari,
205kVervet,
206kZonalis,
207kPithecia,
208kBulrushes,
209kCattail,
210kHydrilla,
211kDuckweed,
212kFanwort,
213kElodea,
214kKudzu,
215kGibba,
216kLotus,
217kIpomoea,
218kMangabey,
219kMuskgrass,
220kJuncus,
221kCfgEnd
222} config_name_t;
223
224typedef struct {
225uint16_tdevice_id;
226uint32_tsubsys_id;
227chip_family_tchip_family;
228const char*model_name;
229config_name_tcfg_name;
230uint8_tmax_ports;
231} radeon_card_info_t;
232
233static radeon_card_info_t radeon_cards[] = {
234
235// Earlier cards are not supported
236//
237// Layout is device_id, subsys_id (subsystem id plus vendor id), chip_family_name, display name, frame buffer
238// Cards are grouped by device id and vendor id then sorted by subsystem id to make it easier to add new cards
239//
240{ 0x9400,0x25521002, CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull, 0 },
241{ 0x9400,0x30001002, CHIP_FAMILY_R600,"ATI Radeon HD 2900 PRO",kNull, 0 },
242
243{ 0x9440,0x0851174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 }, // ErmaC
244{ 0x9440,0x114A174B, CHIP_FAMILY_RV770,"Sapphire Radeon HD4870 Vapor-X",kCardinal, 0 }, // ErmaC
245{ 0x9440,0x24401682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
246{ 0x9440,0x24411682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
247{ 0x9440,0x24441682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
248{ 0x9440,0x24451682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
249
250{ 0x9441,0x24401682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot, 0 },
251
252{ 0x9442,0x080110B0, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
253
254{ 0x9442,0x24701682, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
255{ 0x9442,0x24711682, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
256
257{ 0x9442,0xE104174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
258
259{ 0x944A,0x30001043, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
260
261{ 0x944A,0x30001458, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
262
263{ 0x944A,0x30001462, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
264
265{ 0x944A,0x30001545, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
266
267{ 0x944A,0x30001682, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
268
269{ 0x944A,0x3000174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
270
271{ 0x944A,0x30001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
272
273{ 0x944A,0x300017AF, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
274
275{ 0x944C,0x24801682, CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot, 0 },
276{ 0x944C,0x24811682, CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot, 0 },
277
278{ 0x944E,0x3260174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot, 0 },
279{ 0x944E,0x3261174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 series",kMotmot, 0 },
280
281{ 0x944E,0x30001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4730 Series",kMotmot, 0 },
282{ 0x944E,0x30101787, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot, 0 },
283{ 0x944E,0x31001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4820",kMotmot, 0 },
284
285{ 0x9480,0x3628103C, CHIP_FAMILY_RV730,"ATI Radeon HD 4650M",kGliff, 0 },
286
287{ 0x9480,0x9035104D, CHIP_FAMILY_RV730,"ATI Radeon HD 4650M",kGliff, 0 },
288
289{ 0x9490,0x4710174B, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull, 0 },
290
291{ 0x9490,0x20031787, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kFlicker, 0 },
292{ 0x9490,0x30501787, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull, 0 },
293
294{ 0x9490,0x300017AF, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull, 0 },
295
296{ 0x9498,0x21CF1458, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kNull, 0 },
297
298{ 0x9498,0x24511682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull, 0 },
299{ 0x9498,0x24521682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull, 0 },
300{ 0x9498,0x24541682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull, 0 },
301{ 0x9498,0x29331682, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull, 0 },
302{ 0x9498,0x29341682, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull, 0 },
303
304{ 0x9498,0x30501787, CHIP_FAMILY_RV730,"ATI Radeon HD 4700",kNull, 0 },
305{ 0x9498,0x31001787, CHIP_FAMILY_RV730,"ATI Radeon HD 4720",kNull, 0 },
306
307{ 0x94B3,0x0D001002, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
308
309{ 0x94B3,0x29001682, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
310
311{ 0x94B3,0x1170174B, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
312
313{ 0x94C1,0x0D021002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
314{ 0x94C1,0x10021002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Pro",kNull, 0 },
315
316{ 0x94C1,0x0D021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
317
318{ 0x94C1,0x21741458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
319
320{ 0x94C1,0x10331462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
321{ 0x94C1,0x10401462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
322{ 0x94C1,0x11101462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
323
324{ 0x94C3,0x03421002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
325
326{ 0x94C3,0x30001025, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
327
328{ 0x94C3,0x03021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
329{ 0x94C3,0x04021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
330
331{ 0x94C3,0x216A1458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
332{ 0x94C3,0x21721458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
333{ 0x94C3,0x30001458, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull, 0 },
334
335{ 0x94C3,0x10321462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
336{ 0x94C3,0x10411462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
337{ 0x94C3,0x11041462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
338{ 0x94C3,0x11051462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
339{ 0x94C3,0x30001462, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull, 0 },
340
341{ 0x94C3,0x2247148C, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull, 0 },
342{ 0x94C3,0x3000148C, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
343
344{ 0x94C3,0x30001642, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull, 0 },
345{ 0x94C3,0x37161642, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
346
347{ 0x94C3,0x3000174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
348{ 0x94C3,0xE370174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
349{ 0x94C3,0xE400174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
350
351{ 0x94C3,0x203817AF, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
352
353{ 0x94C3,0x22471787, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull, 0 },
354{ 0x94C3,0x30001787, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
355
356{ 0x94C3,0x01011A93, CHIP_FAMILY_RV610,"Qimonda Radeon HD 2400 PRO",kNull, 0 },
357
358{ 0x9501,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3870",kNull, 0 },
359{ 0x9501,0x30001002, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
360
361{ 0x9501,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull, 0 },
362{ 0x9501,0x4750174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
363
364{ 0x9501,0x30001787, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
365
366{ 0x9505,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull, 0 },
367{ 0x9505,0x30001002, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
368
369{ 0x9505,0x30011043, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
370
371{ 0x9505,0x3000148C, CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull, 0 },
372{ 0x9505,0x3001148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
373{ 0x9505,0x3002148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
374{ 0x9505,0x3003148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
375{ 0x9505,0x3004148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
376
377{ 0x9505,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull, 0 },
378{ 0x9505,0x3001174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
379{ 0x9505,0x3010174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
380{ 0x9505,0x4730174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
381
382{ 0x9505,0x30001787, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
383{ 0x9505,0x301017AF, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
384
385{ 0x9540,0x4590174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull, 0 },
386
387{ 0x9540,0x30501787, CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull, 0 },
388
389{ 0x954F,0x16131462, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull, 0 }, // ErmaC
390{ 0x954F,0x20081787, CHIP_FAMILY_RV710,"ATI Radeon HD 4350",kNull, 0 }, // ErmaC
391{ 0x954F,0x29201682, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull, 0 },
392{ 0x954F,0x29211682, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull, 0 },
393{ 0x954F,0x30901682, CHIP_FAMILY_RV710,"XFX Radeon HD 4570",kNull, 0 },
394
395{ 0x954F,0x30501787, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull, 0 },
396{ 0x954F,0x31001787, CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull, 0 },
397
398{ 0x954F,0x3000174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull, 0 },
399{ 0x954F,0x4450174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull, 0 },
400{ 0x954F,0x4570174B, CHIP_FAMILY_RV710,"Sapphire Radeon HD 4570",kNull, 0 },
401{ 0x954F,0xE990174B, CHIP_FAMILY_RV710,"Sapphire Radeon HD 4350",kNull, 0 },
402
403{ 0x954F,0x301017AF, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull, 0 },
404
405{ 0x9552,0x04341028, CHIP_FAMILY_RV710,"ATI Mobility Radeon 4330",kShrike, 0 },
406
407{ 0x9552,0x308B103C, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4300 Series",kShrike, 0 },
408
409{ 0x9552,0x3000148C, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
410
411{ 0x9552,0x3000174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
412
413{ 0x9552,0x30001787, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
414
415{ 0x9552,0x300017AF, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
416
417{ 0x9553,0x18751043, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4570",kShrike, 0 },
418{ 0x9553,0x1B321043, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4570",kShrike, 0 },
419
420{ 0x9581,0x95811002, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
421
422{ 0x9581,0x3000148C, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
423
424{ 0x9583,0x3000148C, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
425
426{ 0x9588,0x01021A93, CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 XT",kNull, 0 },
427
428{ 0x9589,0x30001462, CHIP_FAMILY_RV630,"ATI Radeon HD 3610",kNull, 0 },
429
430{ 0x9589,0x0E41174B, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
431
432{ 0x9589,0x30001787, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
433
434{ 0x9589,0x01001A93, CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 PRO",kNull, 0 },
435
436{ 0x9591,0x2303148C, CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kNull, 0 },
437
438{ 0x9598,0xB3831002, CHIP_FAMILY_RV635,"ATI All-in-Wonder HD",kNull, 0 },
439
440{ 0x9598,0x30001043, CHIP_FAMILY_RV635,"ATI Radeon HD 3730",kNull, 0 },
441{ 0x9598,0x30011043, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
442
443{ 0x9598,0x3000148C, CHIP_FAMILY_RV635,"ATI Radeon HD 3730",kNull, 0 },
444{ 0x9598,0x3001148C, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull, 0 },
445{ 0x9598,0x3031148C, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
446
447{ 0x9598,0x30001545, CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 XT",kNull, 0 },
448{ 0x9598,0x30011545, CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 Pro",kNull, 0 },
449
450{ 0x9598,0x3000174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3730",kNull, 0 },
451{ 0x9598,0x3001174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3750",kNull, 0 },
452{ 0x9598,0x4570174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
453{ 0x9598,0x4580174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull, 0 },
454{ 0x9598,0x4610174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull, 0 },
455
456{ 0x9598,0x300117AF, CHIP_FAMILY_RV635,"ATI Radeon HD 3750",kNull, 0 },
457{ 0x9598,0x301017AF, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
458{ 0x9598,0x301117AF, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull, 0 },
459
460{ 0x9598,0x30501787, CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull, 0 },
461
462{ 0x95C0,0x3000148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull, 0 },
463
464{ 0x95C0,0xE3901745, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull, 0 },
465
466{ 0x95C0,0x3000174B, CHIP_FAMILY_RV620,"Sapphire Radeon HD 3550",kNull, 0 },
467{ 0x95C0,0x3002174B, CHIP_FAMILY_RV620,"ATI Radeon HD 3570",kNull, 0 },
468{ 0x95C0,0x3020174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
469
470{ 0x95C5,0x3000148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3450",kNull, 0 },
471{ 0x95C5,0x3001148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull, 0 },
472{ 0x95C5,0x3002148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull, 0 },
473{ 0x95C5,0x3003148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
474{ 0x95C5,0x3032148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
475{ 0x95C5,0x3033148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull, 0 },
476
477{ 0x95C5,0x3010174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
478{ 0x95C5,0x4250174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
479
480{ 0x95C5,0x30501787, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
481
482{ 0x95C5,0x301017AF, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull, 0 },
483
484{ 0x95C5,0x01041A93, CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull, 0 },
485{ 0x95C5,0x01051A93, CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull, 0 },
486
487/* Evergreen */
488{ 0x6898,0x0B001002, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kZonalis, 0 },
489
490{ 0x6898,0x032E1043, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari, 0 },
491
492{ 0x6898,0x00D0106B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kLangur, 0 },
493
494{ 0x6898,0xE140174B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari, 0 },
495
496{ 0x6898,0x29611682, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari, 0 },
497
498{ 0x6899,0x21E41458, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
499
500{ 0x6899,0xE140174B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
501
502{ 0x6899,0xE174174B, CHIP_FAMILY_CYPRESS,"ATI Sapphire Radeon HD 5850",kUakari, 0 },
503
504{ 0x6899,0x200A1787, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
505{ 0x6899,0x22901787, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
506
507{ 0x689C,0x03521043, CHIP_FAMILY_HEMLOCK,"ASUS ARES",kUakari, 0 },
508{ 0x689C,0x039E1043, CHIP_FAMILY_HEMLOCK,"ASUS EAH5870 Series",kUakari, 0 },
509
510{ 0x689C,0x30201682, CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5970",kUakari, 0 },
511
512{ 0x68A0,0x043A1028,CHIP_FAMILY_BROADWAY,"ATI Mobility Radeon HD 5870",kNomascus, 0 }, // ErmaC
513
514{ 0x68A1,0x144D103C,CHIP_FAMILY_CYPRESS,"ATI Mobility Radeon HD 5850",kNomascus, 0 },
515{ 0x68A1,0x1522103C, CHIP_FAMILY_CYPRESS,"ATI Mobility Radeon HD 5850",kHoolock, 0 },
516
517{ 0x68A8,0x050E1025, CHIP_FAMILY_CYPRESS,"AMD Radeon HD 6850M",kUakari, 0 },
518
519{ 0x68BA,0x174B1482, CHIP_FAMILY_JUNIPER,"ATI Sapphire Radeon HD 6770",kVervet, 0 }, // ErmaC
520
521{ 0x68B8,0x00CF106B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kHoolock, 0 },
522
523{ 0x68B8,0x21D71458, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
524{ 0x68B8,0x21F61458, CHIP_FAMILY_JUNIPER,"GigaByte HD5770 R577SL-1GD",kVervet, 0 }, // ErmaC
525
526{ 0x68B8,0x29901682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
527{ 0x68B8,0x29911682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
528
529{ 0x68B8,0x1482174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
530{ 0x68B8,0xE144174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kHoolock, 0 }, // ErmaC
531{ 0x68B8,0xE147174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
532
533{ 0x68B8,0x200A1787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 }, // ErmaC
534{ 0x68B8,0x200B1787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
535{ 0x68B8,0x22881787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
536
537{ 0x68BE,0x22881787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5750",kVervet, 0 }, // ErmaC
538
539{ 0x68BF,0x220E1458, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 6750",kVervet, 0 },
540
541{ 0x68C0,0x1594103C, CHIP_FAMILY_REDWOOD,"AMD Radeon HD 6570M",kNull, 0 },
542
543{ 0x68C0,0x392717AA, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5730",kNull, 0 },
544
545{ 0x68C0,0x395217AA, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5730",kNull, 0 }, // ErmaC
546
547{ 0x68C1,0x02051025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5750",kNull, 0 }, // ErmaC
548{ 0x68C1,0x02961025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5750",kNull, 0 }, // ErmaC
549{ 0x68C1,0x030A1025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5750",kNull, 0 }, // ErmaC
550{ 0x68C1,0x033D1025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5750",kNull, 0 }, // ErmaC
551{ 0x68C1,0x033E1025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5750",kNull, 0 }, // ErmaC
552{ 0x68C1,0x03471025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5750",kNull, 0 }, // ErmaC
553{ 0x68C1,0x03561025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5750",kNull, 0 }, // ErmaC
554{ 0x68C1,0x03581025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5750",kNull, 0 }, // ErmaC
555{ 0x68C1,0x035A1025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5750",kNull, 0 }, // ErmaC
556{ 0x68C1,0x035C1025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5750",kNull, 0 }, // ErmaC
557{ 0x68C1,0x03641025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5750",kNull, 0 }, // ErmaC
558{ 0x68C1,0x03791025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5750",kNull, 0 }, // ErmaC
559{ 0x68C1,0x037E1025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5750",kNull, 0 }, // ErmaC
560{ 0x68C1,0x03821025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5750",kNull, 0 }, // ErmaC
561
562{ 0x68C1,0x033E1025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5650",kNull, 0 },
563
564{ 0x68C1,0x9071104D, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5650",kEulemur, 0 },
565
566{ 0x68C8,0x2306103C, CHIP_FAMILY_REDWOOD,"ATI FirePro V4800 (FireGL)",kNull, 0 },
567
568{ 0x68D8,0x03561043, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon, 0 },
569
570{ 0x68D8,0x21D91458, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon, 0 },
571
572{ 0x68D8,0x5690174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull, 0 },
573{ 0x68D8,0x5730174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull, 0 },
574{ 0x68D8,0xE151174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kEulemur, 0 },
575
576{ 0x68D8,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull, 0 },
577
578{ 0x68D8,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull, 0 },
579{ 0x68D8,0x301117AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull, 0 },
580
581{ 0x68D9,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
582
583{ 0x68DA,0x5630174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
584
585{ 0x68DA,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
586
587{ 0x68DA,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
588
589{ 0x68E0,0x04561028, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur, 0 },
590
591{ 0x68E0,0x1433103C, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur, 0 },
592
593{ 0x68E1,0x1426103C, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5430M",kEulemur, 0 },
594
595{ 0x68F9,0x010E1002, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 }, // ErmaC
596
597{ 0x68F9,0x03741043, CHIP_FAMILY_CEDAR,"ASUS EAH5450", kEulemur, 0 }, // ErmaC
598
599{ 0x68F9,0x5470174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
600{ 0x68F9,0x5490174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull, 0 },
601{ 0x68F9,0x5530174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull, 0 },
602
603{ 0x68F9,0x20091787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 },
604{ 0x68F9,0x22911787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 },
605{ 0x68F9,0x23401462, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 }, // ErmaC
606{ 0x68F9,0x30001787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
607{ 0x68F9,0x30011787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull, 0 },
608{ 0x68F9,0x30021787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull, 0 },
609
610{ 0x68F9,0x301117AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
611{ 0x68F9,0x301217AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull, 0 },
612{ 0x68F9,0x301317AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
613
614{ 0x68F9,0xE145174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 }, // ErmaC
615{ 0x68F9,0xE153174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 }, // ErmaC
616
617/* Northen Islands */
618{ 0x6718,0x0B001002, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull, 0 },
619{ 0x6718,0x67181002, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull, 0 },
620{ 0x6718,0x31301682, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull, 0 },
621
622{ 0x6719,0x0B001002, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6950",kGibba, 0 }, // ErmaC
623{ 0x6719,0x186B174B, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6950",kNull, 0 }, // ErmaC
624{ 0x6719,0x20101787, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6950",kGibba, 0 }, // ErmaC
625
626{ 0x671D,0x10020B2A, CHIP_FAMILY_ANTILLES,"AMD Radeon HD 6990",kNull, 0 }, // ErmaC
627{ 0x671D,0x10021B2A, CHIP_FAMILY_ANTILLES,"AMD Radeon HD 6990",kNull, 0 }, // ErmaC
628{ 0x671D,0x16823160, CHIP_FAMILY_ANTILLES,"AMD Radeon HD 6990",kNull, 0 }, // ErmaC
629
630{ 0x6720,0x04901028, CHIP_FAMILY_BARTS,"AMD Radeon HD 6970M",kNull, 0 }, // ErmaC
631{ 0x6720,0x04BA1028, CHIP_FAMILY_BARTS,"AMD Radeon HD 6970M",kElodea, 0 }, // ErmaC
632
633{ 0x6738,0x00D01002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
634{ 0x6738,0x174B174B, CHIP_FAMILY_BARTS,"Sapphire Radeon HD6870",kBulrushes, 0 }, // ErmaC
635{ 0x6738,0x21FA1002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
636{ 0x6738,0x67381002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
637
638{ 0x6738,0x21FA1458, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
639
640{ 0x6738,0x31031682, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
641{ 0x6738,0x31041682, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
642{ 0x6738,0x31071682, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 }, // ErmaC
643{ 0x6738,0x31081682, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 }, // ErmaC ?? kJuncus ??
644
645{ 0x6738,0xE178174B, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
646
647{ 0x6738,0x20101787, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
648{ 0x6738,0x23051787, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
649
650{ 0x6739,0xAA881002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 },
651{ 0x6739,0x03B41043, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 }, // ErmaC
652{ 0x6739,0x21F81458, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kBulrushes, 0 }, // ErmaC
653{ 0x6739,0x24411462, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 },
654{ 0x6739,0x31101682, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 },
655{ 0x6739,0x67391002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 },
656{ 0x6739,0xE177174B, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 },
657
658{ 0x6740,0x1D121043, CHIP_FAMILY_TURKS,"AMD Radeon HD 6730M",kNull, 0 }, // ErmaC
659{ 0x6740,0x1657103C, CHIP_FAMILY_TURKS,"AMD Radeon HD 6770M",kNull, 0 },
660{ 0x6740,0x165A103C, CHIP_FAMILY_TURKS,"AMD Radeon HD 6770M",kNull, 0 },
661
662{ 0x6741,0x050E1025, CHIP_FAMILY_TURKS,"AMD Radeon HD 6650M",kNull, 0 },
663{ 0x6741,0x05131025, CHIP_FAMILY_TURKS,"AMD Radeon HD 6650M",kNull, 0 },
664
665{ 0x6741,0x1646103C, CHIP_FAMILY_TURKS,"AMD Radeon HD 6750M",kNull, 0 },
666
667{ 0x6741,0x358D103C, CHIP_FAMILY_TURKS,"AMD Radeon HD 6630M/6650M/6750M",kNull, 0 }, // ErmaC
668
669{ 0x6741,0x9080104D, CHIP_FAMILY_TURKS,"AMD Radeon HD 6630M",kNull, 0 },
670
671{ 0x6758,0x67581002, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
672
673{ 0x6758,0x22051458, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
674
675{ 0x6758,0xE194174B, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
676
677{ 0x6758,0x31811682, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
678{ 0x6758,0x31831682, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
679
680{ 0x6758,0xE1941746, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
681
682{ 0x6759,0xE193174B, CHIP_FAMILY_TURKS,"AMD Radeon HD 6570",kNull, 0 },
683
684{ 0x6760,0x04CC1028, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6490M",kNull, 0 },
685
686{ 0x6760,0x11790003, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6450M",kNull, 0 }, // ErmaC
687{ 0x6760,0x165A103C, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6470M",kNull, 0 },
688{ 0x6760,0x167D103C, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6470M",kNull, 0 }, // ErmaC
689
690{ 0x6760,0x1CB21043, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6470M",kNull, 0 },
691
692{ 0x6779,0x64501092, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6450",kBulrushes, 0 },
693
694{ 0x6779,0xE164174B, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6450",kBulrushes, 0 },
695
696/* standard/default models */
697{ 0x9400,0x00000000, CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull, 0 },
698{ 0x9405,0x00000000, CHIP_FAMILY_R600,"ATI Radeon HD 2900 GT",kNull, 0 },
699
700{ 0x9440,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
701{ 0x9441,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot, 0 },
702{ 0x9442,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
703{ 0x9443,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4850 X2",kMotmot, 0 },
704{ 0x944C,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
705{ 0x944E,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4700 Series",kMotmot, 0 },
706
707{ 0x9450,0x00000000, CHIP_FAMILY_RV770,"AMD FireStream 9270",kMotmot, 0 },
708{ 0x9452,0x00000000, CHIP_FAMILY_RV770,"AMD FireStream 9250",kMotmot, 0 },
709
710{ 0x9460,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
711{ 0x9462,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
712
713{ 0x9490,0x00000000, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kFlicker, 0 },
714{ 0x9498,0x00000000, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kFlicker, 0 },
715
716{ 0x94B3,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
717{ 0x94B4,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4700 Series",kFlicker, 0 },
718{ 0x94B5,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
719
720{ 0x94C1,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago, 0 },
721{ 0x94C3,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago, 0 },
722{ 0x94C7,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2350",kIago, 0 },
723{ 0x94CC,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago, 0 },
724
725{ 0x9501,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3800 Series",kMegalodon, 0 },
726{ 0x9505,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3800 Series",kMegalodon, 0 },
727{ 0x9507,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3830",kMegalodon, 0 },
728{ 0x950F,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3870 X2",kMegalodon, 0 },
729
730{ 0x9513,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3850 X2",kMegalodon, 0 },
731{ 0x9519,0x00000000, CHIP_FAMILY_RV670,"AMD FireStream 9170",kMegalodon, 0 },
732
733{ 0x9540,0x00000000, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull, 0 },
734{ 0x954F,0x00000000, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
735
736{ 0x9553,0x00000000, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4500/5100 Series",kShrike , 0 },
737
738{ 0x9588,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 XT",kLamna, 0 },
739{ 0x9589,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 PRO",kLamna, 0 },
740{ 0x958A,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 X2 Series",kLamna, 0 },
741
742{ 0x9598,0x00000000, CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kMegalodon, 0 },
743
744{ 0x95C0,0x00000000, CHIP_FAMILY_RV620,"ATI Radeon HD 3400 Series",kIago, 0 },
745{ 0x95C5,0x00000000, CHIP_FAMILY_RV620,"ATI Radeon HD 3400 Series",kIago, 0 },
746
747/* IGP */
748{ 0x9610,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon HD 3200 Graphics",kNull, 0 },
749{ 0x9611,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon 3100 Graphics",kNull, 0 },
750{ 0x9614,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon HD 3300 Graphics",kNull, 0 },
751{ 0x9616,0x00000000, CHIP_FAMILY_RS780,"AMD 760G",kNull, 0 },
752
753{ 0x9710,0x00000000, CHIP_FAMILY_RS880,"ATI Radeon HD 4200",kNull, 0 },
754{ 0x9715,0x00000000, CHIP_FAMILY_RS880,"ATI Radeon HD 4250",kNull, 0 },
755{ 0x9714,0x00000000, CHIP_FAMILY_RS880,"ATI Radeon HD 4290",kNull, 0 },
756
757/* Evergreen */
758{ 0x688D,0x00000000, CHIP_FAMILY_CYPRESS,"AMD FireStream 9350",kUakari, 0 },
759
760{ 0x6898,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari, 0 },
761{ 0x6899,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari, 0 },
762{ 0x689C,0x00000000, CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5900 Series",kUakari, 0 },
763{ 0x689E,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari, 0 },
764
765{ 0x68A0,0x00000000, CHIP_FAMILY_BROADWAY,"ATI Mobility Radeon HD 5800 Series",kNomascus, 0 }, // ErmaC
766{ 0x68A1,0x00000000, CHIP_FAMILY_BROADWAY,"ATI Mobility Radeon HD 5800 Series",kNull, 0 }, // ErmaC
767{ 0x68B0,0x00000000, CHIP_FAMILY_BROADWAY,"ATI Mobility Radeon HD 5800 Series",kNull, 0 }, // ErmaC
768
769{ 0x68B8,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5700 Series",kVervet, 0 },
770{ 0x68B9,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5600 Series",kVervet, 0 },
771{ 0x68BA,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 6770 Series",kVervet, 0 },
772{ 0x68BE,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5700 Series",kVervet, 0 },
773
774{ 0x68D8,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5600 Series",kBaboon, 0 },
775{ 0x68D9,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5500 Series",kBaboon, 0 },
776{ 0x68DA,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5500 Series",kBaboon, 0 },
777
778{ 0x68E4,0x00000000, CHIP_FAMILY_CEDAR,"ATI Radeon HD 6370M Series",kNull, 0 },
779
780{ 0x68F9,0x00000000, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5400 Series",kNull, 0 },
781
782/* Northen Islands */
783{ 0x6718,0x00000000, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970 Series",kNull, 0 },
784{ 0x6719,0x00000000, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6950 Series",kGibba, 0 },
785
786{ 0x671D,0x00000000, CHIP_FAMILY_ANTILLES,"AMD Radeon HD 6900 Series",kNull, 0 }, // ErmaC
787{ 0x671F,0x00000000, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6900 Series",kNull, 0 }, // ErmaC
788
789{ 0x6720,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6900M Series",kNull, 0 },
790
791{ 0x6738,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870 Series",kDuckweed, 0 },
792{ 0x6739,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850 Series",kDuckweed, 0 },
793{ 0x673E,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6790 Series",kNull, 0 },
794
795{ 0x6740,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6700M Series",kNull, 0 },
796{ 0x6741,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6600M/6700M Series",kNull, 0 },
797
798{ 0x6758,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670 Series",kBulrushes, 0 },
799{ 0x6759,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6500 Series",kNull, 0 },
800
801{ 0x6760,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6400M Series",kNull, 0 },
802{ 0x6761,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6430M Series",kNull, 0 },
803
804{ 0x6770,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6400 Series",kNull, 0 },
805{ 0x6779,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6450 Series",kBulrushes, 0 },
806
807/* Southen Islands */
808
809};
810
811typedef struct {
812struct DevPropDevice*device;
813radeon_card_info_t*info;
814pci_dt_t*pci_dev;
815uint8_t*fb;
816uint8_t*mmio;
817uint8_t*io;
818uint8_t*rom;
819uint32_trom_size;
820uint32_tvram_size;
821const char*cfg_name;
822uint8_tports;
823uint32_tflags;
824boolposted;
825} card_t;
826card_t *card;
827
828/* Flags */
829#define MKFLAG(n)(1 << n)
830#define FLAGTRUEMKFLAG(0)
831#define EVERGREENMKFLAG(1)
832
833//static uint8_t atN = 0;
834
835typedef struct {
836type_ttype;
837uint32_tsize;
838uint8_t*data;
839} value_t;
840
841static value_t aty_name;
842static value_t aty_nameparent;
843//static value_t aty_model;
844
845#define DATVAL(x){kPtr, sizeof(x), (uint8_t *)x}
846#define STRVAL(x){kStr, sizeof(x), (uint8_t *)x}
847#define BYTVAL(x){kCst, 1, (uint8_t *)x}
848#define WRDVAL(x){kCst, 2, (uint8_t *)x}
849#define DWRVAL(x){kCst, 4, (uint8_t *)x}
850#define QWRVAL(x){kCst, 8, (uint8_t *)x}
851#define NULVAL{kNul, 0, (uint8_t *)NULL}
852
853bool get_bootdisplay_val(value_t *val);
854bool get_vrammemory_val(value_t *val);
855bool get_name_val(value_t *val);
856bool get_nameparent_val(value_t *val);
857bool get_model_val(value_t *val);
858bool get_conntype_val(value_t *val);
859bool get_vrammemsize_val(value_t *val);
860bool get_binimage_val(value_t *val);
861bool get_romrevision_val(value_t *val);
862bool get_deviceid_val(value_t *val);
863bool get_mclk_val(value_t *val);
864bool get_sclk_val(value_t *val);
865bool get_refclk_val(value_t *val);
866bool get_platforminfo_val(value_t *val);
867bool get_vramtotalsize_val(value_t *val);
868
869typedef struct {
870uint32_tflags;
871boolall_ports;
872char*name;
873bool(*get_value)(value_t *val);
874value_tdefault_val;
875} dev_prop_t;
876
877dev_prop_t ati_devprop_list[] = {
878{FLAGTRUE,false,"@0,AAPL,boot-display",get_bootdisplay_val,NULVAL},
879//{FLAGTRUE,false,"@0,ATY,EFIDisplay",NULL,STRVAL("TMDSA")},
880
881//{FLAGTRUE,true,"@0,AAPL,vram-memory",get_vrammemory_val,NULVAL},
882//{FLAGTRUE,true,"@0,compatible",get_name_val,NULVAL},
883//{FLAGTRUE,true,"@0,connector-type",get_conntype_val,NULVAL},
884//{FLAGTRUE,true,"@0,device_type",NULL,STRVAL("display")},
885//{FLAGTRUE,false,"@0,display-connect-flags", NULL,DWRVAL((uint32_t)0)},
886//{FLAGTRUE,true,"@0,display-type",NULL,STRVAL("NONE")},
887{FLAGTRUE,true,"@0,name",get_name_val,NULVAL},
888//{FLAGTRUE,true,"@0,VRAM,memsize",get_vrammemsize_val,NULVAL},
889
890//{FLAGTRUE,false,"AAPL,aux-power-connected", NULL,DWRVAL((uint32_t)1)},
891//{FLAGTRUE,false,"AAPL,backlight-control",NULL,DWRVAL((uint32_t)0)},
892{FLAGTRUE,false,"ATY,bin_image",get_binimage_val,NULVAL},
893{FLAGTRUE,false,"ATY,Copyright",NULL,STRVAL("Copyright AMD Inc. All Rights Reserved. 2005-2010") },
894{FLAGTRUE,false,"ATY,Card#",get_romrevision_val,NULVAL},
895{FLAGTRUE,false,"ATY,VendorID",NULL,WRDVAL((uint16_t)0x1002)},
896{FLAGTRUE,false,"ATY,DeviceID",get_deviceid_val,NULVAL},
897
898//{FLAGTRUE,false,"ATY,MCLK",get_mclk_val,NULVAL},
899//{FLAGTRUE,false,"ATY,SCLK",get_sclk_val,NULVAL},
900//{FLAGTRUE,false,"ATY,RefCLK",get_refclk_val,DWRVAL((uint32_t)0x0a8c)},
901
902//{FLAGTRUE,false,"ATY,PlatformInfo",get_platforminfo_val,NULVAL},
903
904{FLAGTRUE,false,"name",get_nameparent_val,NULVAL},
905{FLAGTRUE,false,"device_type",get_nameparent_val,NULVAL},
906{FLAGTRUE,false,"model",get_model_val,STRVAL("ATI Radeon")},
907//{FLAGTRUE,false,"VRAM,totalsize",get_vramtotalsize_val,NULVAL},
908
909{FLAGTRUE,false,NULL,NULL,NULVAL}
910};
911
912bool get_bootdisplay_val(value_t *val)
913{
914static uint32_t v = 0;
915
916if (v)
917return false;
918
919if (!card->posted)
920return false;
921
922v = 1;
923val->type = kCst;
924val->size = 4;
925val->data = (uint8_t *)&v;
926
927return true;
928}
929
930bool get_vrammemory_val(value_t *val)
931{
932return false;
933}
934
935bool get_name_val(value_t *val)
936{
937val->type = aty_name.type;
938val->size = aty_name.size;
939val->data = aty_name.data;
940
941return true;
942}
943
944bool get_nameparent_val(value_t *val)
945{
946val->type = aty_nameparent.type;
947val->size = aty_nameparent.size;
948val->data = aty_nameparent.data;
949
950return true;
951}
952
953bool get_model_val(value_t *val)
954{
955if (!card->info->model_name)
956return false;
957
958val->type = kStr;
959val->size = strlen(card->info->model_name) + 1;
960val->data = (uint8_t *)card->info->model_name;
961
962return true;
963}
964
965bool get_conntype_val(value_t *val)
966{
967//Connector types:
968//0x4 : DisplayPort
969//0x400: DL DVI-I
970//0x800: HDMI
971
972return false;
973}
974
975bool get_vrammemsize_val(value_t *val)
976{
977static int idx = -1;
978static uint64_t memsize;
979
980idx++;
981memsize = ((uint64_t)card->vram_size << 32);
982if (idx == 0)
983memsize = memsize | (uint64_t)card->vram_size;
984
985val->type = kCst;
986val->size = 8;
987val->data = (uint8_t *)&memsize;
988
989return true;
990}
991
992bool get_binimage_val(value_t *val)
993{
994if (!card->rom)
995return false;
996
997val->type = kPtr;
998val->size = card->rom_size;
999val->data = card->rom;
1000
1001return true;
1002}
1003
1004bool get_romrevision_val(value_t *val)
1005{
1006uint8_t *rev;
1007if (!card->rom)
1008return false;
1009
1010rev = card->rom + *(uint8_t *)(card->rom + OFFSET_TO_GET_ATOMBIOS_STRINGS_START);
1011
1012val->type = kPtr;
1013val->size = strlen((char *)rev);
1014val->data = malloc(val->size);
1015
1016if (!val->data)
1017return false;
1018
1019memcpy(val->data, rev, val->size);
1020
1021return true;
1022}
1023
1024bool get_deviceid_val(value_t *val)
1025{
1026val->type = kCst;
1027val->size = 2;
1028val->data = (uint8_t *)&card->pci_dev->device_id;
1029
1030return true;
1031}
1032
1033bool get_mclk_val(value_t *val)
1034{
1035return false;
1036}
1037
1038bool get_sclk_val(value_t *val)
1039{
1040return false;
1041}
1042
1043bool get_refclk_val(value_t *val)
1044{
1045return false;
1046}
1047
1048bool get_platforminfo_val(value_t *val)
1049{
1050val->data = malloc(0x80);
1051if (!val->data)
1052return false;
1053
1054bzero(val->data, 0x80);
1055
1056val->type= kPtr;
1057val->size= 0x80;
1058val->data[0]= 1;
1059
1060return true;
1061}
1062
1063bool get_vramtotalsize_val(value_t *val)
1064{
1065val->type = kCst;
1066val->size = 4;
1067val->data = (uint8_t *)&card->vram_size;
1068
1069return true;
1070}
1071
1072void free_val(value_t *val)
1073{
1074if (val->type == kPtr)
1075free(val->data);
1076
1077bzero(val, sizeof(value_t));
1078}
1079
1080void devprop_add_list(dev_prop_t devprop_list[])
1081{
1082value_t *val = malloc(sizeof(value_t));
1083int i, pnum;
1084
1085for (i = 0; devprop_list[i].name != NULL; i++)
1086{
1087if ((devprop_list[i].flags == FLAGTRUE) || (devprop_list[i].flags | card->flags))
1088{
1089if (devprop_list[i].get_value && devprop_list[i].get_value(val))
1090{
1091devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);
1092free_val(val);
1093
1094if (devprop_list[i].all_ports)
1095{
1096for (pnum = 1; pnum < card->ports; pnum++)
1097{
1098if (devprop_list[i].get_value(val))
1099{
1100devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii
1101devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);
1102free_val(val);
1103}
1104}
1105devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card
1106}
1107}
1108else
1109{
1110if (devprop_list[i].default_val.type != kNul)
1111{
1112devprop_add_value(card->device, devprop_list[i].name,
1113devprop_list[i].default_val.type == kCst ?
1114(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data,
1115devprop_list[i].default_val.size);
1116}
1117
1118if (devprop_list[i].all_ports)
1119{
1120for (pnum = 1; pnum < card->ports; pnum++)
1121{
1122if (devprop_list[i].default_val.type != kNul)
1123{
1124devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii
1125devprop_add_value(card->device, devprop_list[i].name,
1126devprop_list[i].default_val.type == kCst ?
1127(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data,
1128devprop_list[i].default_val.size);
1129}
1130}
1131devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card
1132}
1133}
1134}
1135}
1136
1137free(val);
1138}
1139
1140bool validate_rom(option_rom_header_t *rom_header, pci_dt_t *pci_dev)
1141{
1142option_rom_pci_header_t *rom_pci_header;
1143
1144if (rom_header->signature != 0xaa55)
1145return false;
1146
1147rom_pci_header = (option_rom_pci_header_t *)((uint8_t *)rom_header + rom_header->pci_header_offset);
1148
1149if (rom_pci_header->signature != 0x52494350)
1150return false;
1151
1152if (rom_pci_header->vendor_id != pci_dev->vendor_id || rom_pci_header->device_id != pci_dev->device_id)
1153return false;
1154
1155return true;
1156}
1157
1158bool load_vbios_file(const char *key, uint16_t vendor_id, uint16_t device_id, uint32_t subsys_id)
1159{
1160int fd;
1161char file_name[24];
1162bool do_load = false;
1163
1164getBoolForKey(key, &do_load, &bootInfo->chameleonConfig);
1165if (!do_load)
1166return false;
1167
1168sprintf(file_name, "/Extra/%04x_%04x_%08x.rom", vendor_id, device_id, subsys_id);
1169if ((fd = open_bvdev("bt(0,0)", file_name, 0)) < 0)
1170return false;
1171
1172card->rom_size = file_size(fd);
1173card->rom = malloc(card->rom_size);
1174if (!card->rom)
1175return false;
1176
1177read(fd, (char *)card->rom, card->rom_size);
1178
1179if (!validate_rom((option_rom_header_t *)card->rom, card->pci_dev))
1180{
1181card->rom_size = 0;
1182card->rom = 0;
1183return false;
1184}
1185
1186card->rom_size = ((option_rom_header_t *)card->rom)->rom_size * 512;
1187
1188close(fd);
1189
1190return true;
1191}
1192
1193void get_vram_size(void)
1194{
1195chip_family_t chip_family = card->info->chip_family;
1196
1197card->vram_size = 0;
1198
1199if (chip_family >= CHIP_FAMILY_CEDAR)
1200// size in MB on evergreen
1201// XXX watch for overflow!!!
1202card->vram_size = RegRead32(R600_CONFIG_MEMSIZE) * 1024 * 1024;
1203else
1204if (chip_family >= CHIP_FAMILY_R600)
1205card->vram_size = RegRead32(R600_CONFIG_MEMSIZE);
1206}
1207
1208bool read_vbios(bool from_pci)
1209{
1210option_rom_header_t *rom_addr;
1211
1212if (from_pci)
1213{
1214rom_addr = (option_rom_header_t *)(pci_config_read32(card->pci_dev->dev.addr, PCI_ROM_ADDRESS) & ~0x7ff);
1215verbose(" @0x%x", rom_addr);
1216}
1217else
1218rom_addr = (option_rom_header_t *)0xc0000;
1219
1220if (!validate_rom(rom_addr, card->pci_dev))
1221return false;
1222
1223card->rom_size = rom_addr->rom_size * 512;
1224if (!card->rom_size)
1225return false;
1226
1227card->rom = malloc(card->rom_size);
1228if (!card->rom)
1229return false;
1230
1231memcpy(card->rom, (void *)rom_addr, card->rom_size);
1232
1233return true;
1234}
1235
1236bool read_disabled_vbios(void)
1237{
1238bool ret = false;
1239chip_family_t chip_family = card->info->chip_family;
1240
1241if (chip_family >= CHIP_FAMILY_RV770)
1242{
1243uint32_t viph_control= RegRead32(RADEON_VIPH_CONTROL);
1244uint32_t bus_cntl= RegRead32(RADEON_BUS_CNTL);
1245uint32_t d1vga_control= RegRead32(AVIVO_D1VGA_CONTROL);
1246uint32_t d2vga_control= RegRead32(AVIVO_D2VGA_CONTROL);
1247uint32_t vga_render_control = RegRead32(AVIVO_VGA_RENDER_CONTROL);
1248uint32_t rom_cntl= RegRead32(R600_ROM_CNTL);
1249uint32_t cg_spll_func_cntl= 0;
1250uint32_t cg_spll_status;
1251
1252// disable VIP
1253RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
1254
1255// enable the rom
1256RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
1257
1258// Disable VGA mode
1259RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1260RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1261RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
1262
1263if (chip_family == CHIP_FAMILY_RV730)
1264{
1265cg_spll_func_cntl = RegRead32(R600_CG_SPLL_FUNC_CNTL);
1266
1267// enable bypass mode
1268RegWrite32(R600_CG_SPLL_FUNC_CNTL, (cg_spll_func_cntl | R600_SPLL_BYPASS_EN));
1269
1270// wait for SPLL_CHG_STATUS to change to 1
1271cg_spll_status = 0;
1272while (!(cg_spll_status & R600_SPLL_CHG_STATUS))
1273cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);
1274
1275RegWrite32(R600_ROM_CNTL, (rom_cntl & ~R600_SCK_OVERWRITE));
1276}
1277else
1278RegWrite32(R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));
1279
1280ret = read_vbios(true);
1281
1282// restore regs
1283if (chip_family == CHIP_FAMILY_RV730)
1284{
1285RegWrite32(R600_CG_SPLL_FUNC_CNTL, cg_spll_func_cntl);
1286
1287// wait for SPLL_CHG_STATUS to change to 1
1288cg_spll_status = 0;
1289while (!(cg_spll_status & R600_SPLL_CHG_STATUS))
1290cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);
1291}
1292RegWrite32(RADEON_VIPH_CONTROL, viph_control);
1293RegWrite32(RADEON_BUS_CNTL, bus_cntl);
1294RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);
1295RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);
1296RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
1297RegWrite32(R600_ROM_CNTL, rom_cntl);
1298}
1299else
1300if (chip_family >= CHIP_FAMILY_R600)
1301{
1302uint32_t viph_control= RegRead32(RADEON_VIPH_CONTROL);
1303uint32_t bus_cntl= RegRead32(RADEON_BUS_CNTL);
1304uint32_t d1vga_control= RegRead32(AVIVO_D1VGA_CONTROL);
1305uint32_t d2vga_control= RegRead32(AVIVO_D2VGA_CONTROL);
1306uint32_t vga_render_control= RegRead32(AVIVO_VGA_RENDER_CONTROL);
1307uint32_t rom_cntl= RegRead32(R600_ROM_CNTL);
1308uint32_t general_pwrmgt= RegRead32(R600_GENERAL_PWRMGT);
1309uint32_t low_vid_lower_gpio_cntl= RegRead32(R600_LOW_VID_LOWER_GPIO_CNTL);
1310uint32_t medium_vid_lower_gpio_cntl = RegRead32(R600_MEDIUM_VID_LOWER_GPIO_CNTL);
1311uint32_t high_vid_lower_gpio_cntl= RegRead32(R600_HIGH_VID_LOWER_GPIO_CNTL);
1312uint32_t ctxsw_vid_lower_gpio_cntl= RegRead32(R600_CTXSW_VID_LOWER_GPIO_CNTL);
1313uint32_t lower_gpio_enable= RegRead32(R600_LOWER_GPIO_ENABLE);
1314
1315// disable VIP
1316RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
1317
1318// enable the rom
1319RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
1320
1321// Disable VGA mode
1322RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1323RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1324RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
1325RegWrite32(R600_ROM_CNTL, ((rom_cntl & ~R600_SCK_PRESCALE_CRYSTAL_CLK_MASK) | (1 << R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT) | R600_SCK_OVERWRITE));
1326RegWrite32(R600_GENERAL_PWRMGT, (general_pwrmgt & ~R600_OPEN_DRAIN_PADS));
1327RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, (low_vid_lower_gpio_cntl & ~0x400));
1328RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, (medium_vid_lower_gpio_cntl & ~0x400));
1329RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, (high_vid_lower_gpio_cntl & ~0x400));
1330RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, (ctxsw_vid_lower_gpio_cntl & ~0x400));
1331RegWrite32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400));
1332
1333ret = read_vbios(true);
1334
1335// restore regs
1336RegWrite32(RADEON_VIPH_CONTROL, viph_control);
1337RegWrite32(RADEON_BUS_CNTL, bus_cntl);
1338RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);
1339RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);
1340RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
1341RegWrite32(R600_ROM_CNTL, rom_cntl);
1342RegWrite32(R600_GENERAL_PWRMGT, general_pwrmgt);
1343RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, low_vid_lower_gpio_cntl);
1344RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, medium_vid_lower_gpio_cntl);
1345RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl);
1346RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl);
1347RegWrite32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable);
1348}
1349
1350return ret;
1351}
1352
1353bool radeon_card_posted(void)
1354{
1355uint32_t reg;
1356
1357// first check CRTCs
1358reg = RegRead32(RADEON_CRTC_GEN_CNTL) | RegRead32(RADEON_CRTC2_GEN_CNTL);
1359if (reg & RADEON_CRTC_EN)
1360return true;
1361
1362// then check MEM_SIZE, in case something turned the crtcs off
1363reg = RegRead32(R600_CONFIG_MEMSIZE);
1364if (reg)
1365return true;
1366
1367return false;
1368}
1369
1370#if 0
1371bool devprop_add_pci_config_space(void)
1372{
1373int offset;
1374
1375uint8_t *config_space = malloc(0x100);
1376if (!config_space)
1377return false;
1378
1379for (offset = 0; offset < 0x100; offset += 4)
1380config_space[offset / 4] = pci_config_read32(card->pci_dev->dev.addr, offset);
1381
1382devprop_add_value(card->device, "ATY,PCIConfigSpace", config_space, 0x100);
1383free(config_space);
1384
1385return true;
1386}
1387#endif
1388
1389static bool init_card(pci_dt_t *pci_dev)
1390{
1391booladd_vbios = true;
1392charname[24];
1393charname_parent[24];
1394inti;
1395intn_ports = 0;
1396
1397card = malloc(sizeof(card_t));
1398if (!card)
1399return false;
1400bzero(card, sizeof(card_t));
1401
1402card->pci_dev = pci_dev;
1403
1404for (i = 0; radeon_cards[i].device_id ; i++)
1405{
1406if (radeon_cards[i].device_id == pci_dev->device_id)
1407{
1408card->info = &radeon_cards[i];
1409if ((radeon_cards[i].subsys_id == 0x00000000) ||
1410(radeon_cards[i].subsys_id == pci_dev->subsys_id.subsys_id))
1411break;
1412}
1413}
1414
1415if (!card->info->device_id || !card->info->cfg_name)
1416{
1417printf("Unsupported card!\n");
1418return false;
1419}
1420
1421card->fb= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_0) & ~0x0f);
1422card->mmio= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_2) & ~0x0f);
1423card->io= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_4) & ~0x03);
1424
1425verbose("Framebuffer @0x%08X MMIO @0x%08XI/O Port @0x%08X ROM Addr @0x%08X\n",
1426card->fb, card->mmio, card->io, pci_config_read32(pci_dev->dev.addr, PCI_ROM_ADDRESS));
1427
1428card->posted = radeon_card_posted();
1429verbose("ATI card %s, ", card->posted ? "POSTed" : "non-POSTed");
1430
1431get_vram_size();
1432
1433getBoolForKey(kATYbinimage, &add_vbios, &bootInfo->chameleonConfig);
1434
1435if (add_vbios)
1436{
1437if (!load_vbios_file(kUseAtiROM, pci_dev->vendor_id, pci_dev->device_id, pci_dev->subsys_id.subsys_id))
1438{
1439verbose("reading VBIOS from %s", card->posted ? "legacy space" : "PCI ROM");
1440if (card->posted)
1441read_vbios(false);
1442else
1443read_disabled_vbios();
1444verbose("\n");
1445}
1446}
1447
1448//card->ports = 2; // default - Azi: default is card_configs
1449
1450if (card->info->chip_family >= CHIP_FAMILY_CEDAR)
1451{
1452card->flags |= EVERGREEN;
1453//card->ports = 3; //Azi: use the AtiPorts key if needed
1454}
1455
1456//atN = 0;
1457
1458// Check AtiConfig key for a framebuffer name,
1459card->cfg_name = getStringForKey(kAtiConfig, &bootInfo->chameleonConfig);
1460// if none,
1461if (!card->cfg_name)
1462{
1463// use cfg_name on radeon_cards, to retrive the default name from card_configs,
1464card->cfg_name = card_configs[card->info->cfg_name].name;
1465// and leave ports alone!
1466//card->ports = card_configs[card->info->cfg_name].ports;
1467
1468// which means one of the fb's or kNull
1469verbose("Framebuffer set to device's default: %s\n", card->cfg_name);
1470}
1471else
1472{
1473// else, use the fb name returned by AtiConfig.
1474verbose("(AtiConfig) Framebuffer set to: %s\n", card->cfg_name);
1475}
1476
1477// Check AtiPorts key for nr of ports,
1478card->ports = getIntForKey(kAtiPorts, &n_ports, &bootInfo->chameleonConfig);
1479// if a value bigger than 0 ?? is found, (do we need >= 0 ?? that's null FB on card_configs)
1480if (n_ports > 0)
1481{
1482card->ports = n_ports; // use it.
1483verbose("(AtiPorts) Nr of ports set to: %d\n", card->ports);
1484 }
1485else// if (card->cfg_name > 0) // do we want 0 ports if fb is kNull or mistyped ?
1486{
1487// use max_ports value on radeon_cards
1488card->ports = card->info->max_ports;
1489// if max_ports value is 0
1490if (card->ports <= 0)
1491{
1492// match cfg_name with card_configs list and retrive default nr of ports.
1493for (i = 0; i < kCfgEnd; i++)
1494{
1495if (strcmp(card->cfg_name, card_configs[i].name) == 0)
1496card->ports = card_configs[i].ports; // default
1497}
1498verbose("Nr of ports set to framebuffer's default: %d\n", card->ports);
1499}
1500else
1501{
1502verbose("Nr of ports set to card's ?? max: %d\n", card->ports);
1503}
1504}
1505//else
1506//card->ports = 2/1 ?; // set a min if 0 ports ?
1507//verbose("Nr of ports set to min: %d\n", card->ports);
1508
1509sprintf(name, "ATY,%s", card->cfg_name);
1510aty_name.type = kStr;
1511aty_name.size = strlen(name) + 1;
1512aty_name.data = (uint8_t *)name;
1513
1514sprintf(name_parent, "ATY,%sParent", card->cfg_name);
1515aty_nameparent.type = kStr;
1516aty_nameparent.size = strlen(name_parent) + 1;
1517aty_nameparent.data = (uint8_t *)name_parent;
1518
1519return true;
1520}
1521
1522bool setup_ati_devprop(pci_dt_t *ati_dev)
1523{
1524char *devicepath;
1525
1526if (!init_card(ati_dev))
1527return false;
1528
1529// -------------------------------------------------
1530// Find a better way to do this (in device_inject.c)
1531if (!string)
1532string = devprop_create_string();
1533
1534devicepath = get_pci_dev_path(ati_dev);
1535card->device = devprop_add_device(string, devicepath);
1536if (!card->device)
1537return false;
1538// -------------------------------------------------
1539
1540#if 0
1541uint64_t fb= (uint32_t)card->fb;
1542uint64_t mmio= (uint32_t)card->mmio;
1543uint64_t io= (uint32_t)card->io;
1544devprop_add_value(card->device, "ATY,FrameBufferOffset", &fb, 8);
1545devprop_add_value(card->device, "ATY,RegisterSpaceOffset", &mmio, 8);
1546devprop_add_value(card->device, "ATY,IOSpaceOffset", &io, 8);
1547#endif
1548
1549devprop_add_list(ati_devprop_list);
1550
1551// -------------------------------------------------
1552// Find a better way to do this (in device_inject.c)
1553//Azi: XXX tried to fix a malloc error in vain; this is related to XCode 4 compilation!
1554stringdata = malloc(sizeof(uint8_t) * string->length);
1555memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);
1556stringlength = string->length;
1557// -------------------------------------------------
1558
1559verbose("ATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x]):: %s\n",
1560chip_family_name[card->info->chip_family], card->info->model_name,
1561(uint32_t)(card->vram_size / (1024 * 1024)), card->cfg_name,
1562ati_dev->vendor_id, ati_dev->device_id,
1563ati_dev->subsys_id.subsys.vendor_id, ati_dev->subsys_id.subsys.device_id,
1564devicepath);
1565
1566free(card);
1567
1568return true;
1569}
1570

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