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Root/branches/Chimera/i386/libsaio/acpi_patcher.c

1/*
2 * Copyright 2008 mackerintel
3 */
4
5#include "libsaio.h"
6#include "boot.h"
7#include "bootstruct.h"
8#include "acpi.h"
9#include "efi_tables.h"
10#include "fake_efi.h"
11#include "acpi_patcher.h"
12#include "platform.h"
13#include "cpu.h"
14#include "aml_generator.h"
15
16#ifndef DEBUG_ACPI
17#define DEBUG_ACPI 0
18#endif
19
20#if DEBUG_ACPI==2
21#define DBG(x...) {printf(x); sleep(1);}
22#elif DEBUG_ACPI==1
23#define DBG(x...) printf(x)
24#else
25#define DBG(x...)
26#endif
27
28// Slice: New signature compare function
29boolean_t tableSign(char *table, const char *sgn)
30{
31int i;
32for (i=0; i<4; i++) {
33if ((table[i] &~0x20) != (sgn[i] &~0x20)) {
34return false;
35}
36}
37return true;
38}
39
40/* Gets the ACPI 1.0 RSDP address */
41static struct acpi_2_rsdp* getAddressOfAcpiTable()
42{
43 /* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
44
45 void *acpi_addr = (void*)ACPI_RANGE_START;
46 for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
47 {
48 if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
49 {
50 uint8_t csum = checksum8(acpi_addr, 20);
51 if(csum == 0)
52 {
53 // Only return the table if it is a true version 1.0 table (Revision 0)
54 if(((struct acpi_2_rsdp*)acpi_addr)->Revision == 0)
55 return acpi_addr;
56 }
57 }
58 }
59 return NULL;
60}
61
62/* Gets the ACPI 2.0 RSDP address */
63static struct acpi_2_rsdp* getAddressOfAcpi20Table()
64{
65 /* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
66
67 void *acpi_addr = (void*)ACPI_RANGE_START;
68 for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
69 {
70 if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
71 {
72 uint8_t csum = checksum8(acpi_addr, 20);
73
74 /* Only assume this is a 2.0 or better table if the revision is greater than 0
75 * NOTE: ACPI 3.0 spec only seems to say that 1.0 tables have revision 1
76 * and that the current revision is 2.. I am going to assume that rev > 0 is 2.0.
77 */
78
79 if(csum == 0 && (((struct acpi_2_rsdp*)acpi_addr)->Revision > 0))
80 {
81 uint8_t csum2 = checksum8(acpi_addr, sizeof(struct acpi_2_rsdp));
82 if(csum2 == 0)
83 return acpi_addr;
84 }
85 }
86 }
87 return NULL;
88}
89/** The folowing ACPI Table search algo. should be reused anywhere needed:*/
90int search_and_get_acpi_fd(const char * filename, const char ** outDirspec)
91{
92int fd = 0;
93char dirSpec[512] = "";
94
95// Try finding 'filename' in the usual places
96// Start searching any potential location for ACPI Table
97sprintf(dirSpec, "%s", filename);
98fd = open(dirSpec, 0);
99if (fd < 0)
100{
101sprintf(dirSpec, "/Extra/%s", filename);
102fd = open(dirSpec, 0);
103if (fd < 0)
104{
105sprintf(dirSpec, "bt(0,0)/Extra/%s", filename);
106fd = open(dirSpec, 0);
107}
108}
109
110if (fd < 0)
111{
112// NOT FOUND:
113verbose("ACPI table not found: %s\n", filename);
114*dirSpec = '\0';
115}
116
117if (outDirspec) *outDirspec = dirSpec;
118return fd;
119}
120
121
122void *loadACPITable (const char * filename)
123{
124void *tableAddr;
125const char * dirspec=NULL;
126
127int fd = search_and_get_acpi_fd(filename, &dirspec);
128
129if (fd>=0)
130{
131tableAddr=(void*)AllocateKernelMemory(file_size (fd));
132if (tableAddr)
133{
134if (read (fd, tableAddr, file_size (fd))!=file_size (fd))
135{
136printf("Couldn't read table %s\n",dirspec);
137free (tableAddr);
138close (fd);
139return NULL;
140}
141
142DBG("Table %s read and stored at: %x\n", dirspec, tableAddr);
143close (fd);
144return tableAddr;
145}
146close (fd);
147printf("Couldn't allocate memory for table \n", dirspec);
148}
149//printf("Couldn't find table %s\n", filename);
150return NULL;
151}
152
153uint8_tacpi_cpu_count = 0;
154char* acpi_cpu_name[32];
155uint32_t acpi_cpu_p_blk = 0;
156
157void get_acpi_cpu_names(unsigned char* dsdt, uint32_t length)
158{
159uint32_t i;
160
161for (i=0; i<length-7; i++)
162{
163if (dsdt[i] == 0x5B && dsdt[i+1] == 0x83) // ProcessorOP
164{
165uint32_t offset = i + 3 + (dsdt[i+2] >> 6);
166
167bool add_name = true;
168
169uint8_t j;
170
171for (j=0; j<4; j++)
172{
173char c = dsdt[offset+j];
174
175if (!aml_isvalidchar(c))
176{
177add_name = false;
178verbose("Invalid character found in ProcessorOP 0x%x!\n", c);
179break;
180}
181}
182
183if (add_name)
184{
185acpi_cpu_name[acpi_cpu_count] = malloc(4);
186memcpy(acpi_cpu_name[acpi_cpu_count], dsdt+offset, 4);
187i = offset + 5;
188
189 if (acpi_cpu_count == 0)
190 acpi_cpu_p_blk = dsdt[i] | (dsdt[i+1] << 8);
191
192verbose("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
193
194if (++acpi_cpu_count == 32) return;
195}
196}
197}
198}
199
200struct acpi_2_ssdt *generate_cst_ssdt(struct acpi_2_fadt* fadt)
201{
202char ssdt_header[] =
203{
2040x53, 0x53, 0x44, 0x54, 0xE7, 0x00, 0x00, 0x00, /* SSDT.... */
2050x01, 0x17, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x41, /* ..PmRefA */
2060x43, 0x70, 0x75, 0x43, 0x73, 0x74, 0x00, 0x00, /* CpuCst.. */
2070x00, 0x10, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* ....INTL */
2080x31, 0x03, 0x10, 0x20/* 1.._*/
209};
210
211char resource_template_register_fixedhw[] =
212{
2130x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
2140x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2150x00, 0x00, 0x01, 0x79, 0x00
216};
217
218char resource_template_register_systemio[] =
219{
2200x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
2210x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
2220x00, 0x00, 0x00, 0x79, 0x00,
223};
224
225if (Platform.CPU.Vendor != 0x756E6547) {
226verbose ("Not an Intel platform: C-States will not be generated !!!\n");
227return NULL;
228}
229
230if (fadt == NULL) {
231verbose ("FACP not exists: C-States will not be generated !!!\n");
232return NULL;
233}
234
235struct acpi_2_dsdt* dsdt = (void*)fadt->DSDT;
236
237if (dsdt == NULL) {
238verbose ("DSDT not found: C-States will not be generated !!!\n");
239return NULL;
240}
241
242if (acpi_cpu_count == 0)
243get_acpi_cpu_names((void*)dsdt, dsdt->Length);
244
245if (acpi_cpu_count > 0)
246{
247bool c2_enabled = false;
248bool c3_enabled = false;
249bool c4_enabled = false;
250bool cst_using_systemio = false;
251
252getBoolForKey(kEnableC2State, &c2_enabled, &bootInfo->chameleonConfig);
253getBoolForKey(kEnableC3State, &c3_enabled, &bootInfo->chameleonConfig);
254getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->chameleonConfig);
255getBoolForKey(kCSTUsingSystemIO, &cst_using_systemio, &bootInfo->chameleonConfig);
256
257c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
258c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
259
260unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + (c3_enabled ? 1 : 0);
261
262struct aml_chunk* root = aml_create_node(NULL);
263aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
264struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
265struct aml_chunk* name = aml_add_name(scop, "CST_");
266struct aml_chunk* pack = aml_add_package(name);
267aml_add_byte(pack, cstates_count);
268
269struct aml_chunk* tmpl = aml_add_package(pack);
270if (cst_using_systemio)
271{
272// C1
273resource_template_register_fixedhw[8] = 0x00;
274resource_template_register_fixedhw[9] = 0x00;
275resource_template_register_fixedhw[18] = 0x00;
276aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
277aml_add_byte(tmpl, 0x01); // C1
278aml_add_word(tmpl, 0x0001); // Latency
279aml_add_dword(tmpl, 0x000003e8); // Power
280
281uint8_t p_blk_lo, p_blk_hi;
282
283if (c2_enabled) // C2
284{
285p_blk_lo = acpi_cpu_p_blk + 4;
286p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
287
288tmpl = aml_add_package(pack);
289resource_template_register_systemio[11] = p_blk_lo; // C2
290resource_template_register_systemio[12] = p_blk_hi; // C2
291aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
292aml_add_byte(tmpl, 0x02); // C2
293aml_add_word(tmpl, 0x0040); // Latency
294aml_add_dword(tmpl, 0x000001f4); // Power
295}
296
297if (c4_enabled) // C4
298{
299p_blk_lo = acpi_cpu_p_blk + 5;
300p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
301
302tmpl = aml_add_package(pack);
303resource_template_register_systemio[11] = p_blk_lo; // C4
304resource_template_register_systemio[12] = p_blk_hi; // C4
305aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
306aml_add_byte(tmpl, 0x04); // C4
307aml_add_word(tmpl, 0x0080); // Latency
308aml_add_dword(tmpl, 0x000000C8); // Power
309}
310else if (c3_enabled) // C3
311{
312p_blk_lo = acpi_cpu_p_blk + 5;
313p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
314
315tmpl = aml_add_package(pack);
316resource_template_register_systemio[11] = p_blk_lo; // C3
317resource_template_register_systemio[12] = p_blk_hi; // C3
318aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
319aml_add_byte(tmpl, 0x03);// C3
320aml_add_word(tmpl, 0x0060);// Latency
321aml_add_dword(tmpl, 0x0000015e);// Power
322}
323}
324else
325{
326// C1
327resource_template_register_fixedhw[11] = 0x00; // C1
328aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
329aml_add_byte(tmpl, 0x01);// C1
330aml_add_word(tmpl, 0x0001);// Latency
331aml_add_dword(tmpl, 0x000003e8);// Power
332
333resource_template_register_fixedhw[18] = 0x03;
334
335if (c2_enabled) // C2
336{
337tmpl = aml_add_package(pack);
338resource_template_register_fixedhw[11] = 0x10; // C2
339aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
340aml_add_byte(tmpl, 0x02);// C2
341aml_add_word(tmpl, 0x0040);// Latency
342aml_add_dword(tmpl, 0x000001f4);// Power
343}
344
345if (c4_enabled) // C4
346{
347tmpl = aml_add_package(pack);
348resource_template_register_fixedhw[11] = 0x30; // C4
349aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
350aml_add_byte(tmpl, 0x04);// C4
351aml_add_word(tmpl, 0x0080);// Latency
352aml_add_dword(tmpl, 0x000000C8);// Power
353}
354else if (c3_enabled)
355{
356tmpl = aml_add_package(pack);
357resource_template_register_fixedhw[11] = 0x20; // C3
358aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
359aml_add_byte(tmpl, 0x03);// C3
360aml_add_word(tmpl, 0x0060);// Latency
361aml_add_dword(tmpl, 0x0000015e);// Power
362}
363}
364
365// Aliaces
366int i;
367for (i = 0; i < acpi_cpu_count; i++)
368{
369char name[9];
370sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
371
372scop = aml_add_scope(root, name);
373aml_add_alias(scop, "CST_", "_CST");
374}
375
376aml_calculate_size(root);
377
378struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
379
380aml_write_node(root, (void*)ssdt, 0);
381
382ssdt->Length = root->Size;
383ssdt->Checksum = 0;
384ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
385
386aml_destroy_node(root);
387
388//dumpPhysAddr("C-States SSDT content: ", ssdt, ssdt->Length);
389
390verbose ("SSDT with CPU C-States generated successfully\n");
391
392return ssdt;
393}
394else
395{
396verbose ("ACPI CPUs not found: C-States not generated !!!\n");
397}
398
399return NULL;
400}
401
402struct acpi_2_ssdt *generate_pss_ssdt(struct acpi_2_dsdt* dsdt)
403{
404char ssdt_header[] =
405{
4060x53, 0x53, 0x44, 0x54, 0x7E, 0x00, 0x00, 0x00, /* SSDT.... */
4070x01, 0x6A, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x00, /* ..PmRef. */
4080x43, 0x70, 0x75, 0x50, 0x6D, 0x00, 0x00, 0x00, /* CpuPm... */
4090x00, 0x30, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* .0..INTL */
4100x31, 0x03, 0x10, 0x20,/* 1.._*/
411};
412
413if (Platform.CPU.Vendor != 0x756E6547) {
414verbose ("Not an Intel platform: P-States will not be generated !!!\n");
415return NULL;
416}
417
418if (!(Platform.CPU.Features & CPU_FEATURE_MSR)) {
419verbose ("Unsupported CPU: P-States will not be generated !!!\n");
420return NULL;
421}
422
423if (acpi_cpu_count == 0)
424get_acpi_cpu_names((void*)dsdt, dsdt->Length);
425
426if (acpi_cpu_count > 0)
427{
428struct p_state initial, maximum, minimum, p_states[32];
429uint8_t p_states_count = 0;
430
431// Retrieving P-States, ported from code by superhai (c)
432switch (Platform.CPU.Family) {
433case 0x06:
434{
435switch (Platform.CPU.Model)
436{
437case CPU_MODEL_DOTHAN:// Intel Pentium M
438case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
439case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
440case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
441case CPU_MODEL_ATOM:// Intel Atom (45nm)
442{
443bool cpu_dynamic_fsb = false;
444
445if (rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 27))
446{
447wrmsr64(MSR_IA32_EXT_CONFIG, (rdmsr64(MSR_IA32_EXT_CONFIG) | (1 << 28)));
448delay(1);
449cpu_dynamic_fsb = rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 28);
450}
451
452bool cpu_noninteger_bus_ratio = (rdmsr64(MSR_IA32_PERF_STATUS) & (1ULL << 46));
453
454initial.Control = rdmsr64(MSR_IA32_PERF_STATUS);
455
456maximum.Control = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 32) & 0x1F3F) | (0x4000 * cpu_noninteger_bus_ratio);
457maximum.CID = ((maximum.FID & 0x1F) << 1) | cpu_noninteger_bus_ratio;
458
459minimum.FID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 24) & 0x1F) | (0x80 * cpu_dynamic_fsb);
460minimum.VID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 48) & 0x3F);
461
462if (minimum.FID == 0)
463{
464uint64_t msr;
465uint8_t i;
466// Probe for lowest fid
467for (i = maximum.FID; i >= 0x6; i--)
468{
469msr = rdmsr64(MSR_IA32_PERF_CONTROL);
470wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (i << 8) | minimum.VID);
471intel_waitforsts();
472minimum.FID = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0x1F;
473delay(1);
474}
475
476msr = rdmsr64(MSR_IA32_PERF_CONTROL);
477wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
478intel_waitforsts();
479}
480
481if (minimum.VID == maximum.VID)
482{
483uint64_t msr;
484uint8_t i;
485// Probe for lowest vid
486for (i = maximum.VID; i > 0xA; i--)
487{
488msr = rdmsr64(MSR_IA32_PERF_CONTROL);
489wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (minimum.FID << 8) | i);
490intel_waitforsts();
491minimum.VID = rdmsr64(MSR_IA32_PERF_STATUS) & 0x3F;
492delay(1);
493}
494
495msr = rdmsr64(MSR_IA32_PERF_CONTROL);
496wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
497intel_waitforsts();
498}
499
500minimum.CID = ((minimum.FID & 0x1F) << 1) >> cpu_dynamic_fsb;
501
502// Sanity check
503if (maximum.CID < minimum.CID)
504{
505DBG("Insane FID values!");
506p_states_count = 0;
507}
508else
509{
510// Finalize P-States
511// Find how many P-States machine supports
512p_states_count = maximum.CID - minimum.CID + 1;
513
514if (p_states_count > 32)
515p_states_count = 32;
516
517uint8_t vidstep;
518uint8_t i = 0, u, invalid = 0;
519
520vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);
521
522for (u = 0; u < p_states_count; u++)
523{
524i = u - invalid;
525
526p_states[i].CID = maximum.CID - u;
527p_states[i].FID = (p_states[i].CID >> 1);
528
529if (p_states[i].FID < 0x6)
530{
531if (cpu_dynamic_fsb)
532p_states[i].FID = (p_states[i].FID << 1) | 0x80;
533}
534else if (cpu_noninteger_bus_ratio)
535{
536p_states[i].FID = p_states[i].FID | (0x40 * (p_states[i].CID & 0x1));
537}
538
539if (i && p_states[i].FID == p_states[i-1].FID)
540invalid++;
541
542p_states[i].VID = ((maximum.VID << 2) - (vidstep * u)) >> 2;
543
544uint32_t multiplier = p_states[i].FID & 0x1f;// = 0x08
545bool half = p_states[i].FID & 0x40;// = 0x01
546bool dfsb = p_states[i].FID & 0x80;// = 0x00
547uint32_t fsb = Platform.CPU.FSBFrequency / 1000000; // = 400
548uint32_t halffsb = (fsb + 1) >> 1;// = 200
549uint32_t frequency = (multiplier * fsb);// = 3200
550
551p_states[i].Frequency = (frequency + (half * halffsb)) >> dfsb;// = 3200 + 200 = 3400
552}
553
554p_states_count -= invalid;
555}
556
557break;
558}
559case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
560case CPU_MODEL_DALES:
561case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
562case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
563case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
564case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
565case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
566case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
567case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
568case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
569{
570maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff; // Seems it always contains maximum multiplier value (with turbo, that's we need)...
571minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
572
573verbose("P-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);
574
575// Sanity check
576if (maximum.Control < minimum.Control)
577{
578DBG("Insane control values!");
579p_states_count = 0;
580}
581else
582{
583uint8_t i;
584p_states_count = 0;
585
586for (i = maximum.Control; i >= minimum.Control; i--)
587{
588p_states[p_states_count].Control = i;
589p_states[p_states_count].CID = p_states[p_states_count].Control << 1;
590p_states[p_states_count].Frequency = (Platform.CPU.FSBFrequency / 1000000) * i;
591p_states_count++;
592}
593}
594
595break;
596}
597default:
598verbose ("Unsupported CPU: P-States not generated !!!\n");
599break;
600}
601}
602}
603
604// Generating SSDT
605if (p_states_count > 0)
606{
607int i;
608
609struct aml_chunk* root = aml_create_node(NULL);
610aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
611struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
612struct aml_chunk* name = aml_add_name(scop, "PSS_");
613struct aml_chunk* pack = aml_add_package(name);
614
615for (i = 0; i < p_states_count; i++)
616{
617struct aml_chunk* pstt = aml_add_package(pack);
618
619aml_add_dword(pstt, p_states[i].Frequency);
620aml_add_dword(pstt, 0x00000000); // Power
621aml_add_dword(pstt, 0x0000000A); // Latency
622aml_add_dword(pstt, 0x0000000A); // Latency
623aml_add_dword(pstt, p_states[i].Control);
624aml_add_dword(pstt, i+1); // Status
625}
626
627// Add aliaces
628for (i = 0; i < acpi_cpu_count; i++)
629{
630char name[9];
631sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
632
633scop = aml_add_scope(root, name);
634aml_add_alias(scop, "PSS_", "_PSS");
635}
636
637aml_calculate_size(root);
638
639struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
640
641aml_write_node(root, (void*)ssdt, 0);
642
643ssdt->Length = root->Size;
644ssdt->Checksum = 0;
645ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
646
647aml_destroy_node(root);
648
649//dumpPhysAddr("P-States SSDT content: ", ssdt, ssdt->Length);
650
651verbose ("SSDT with CPU P-States generated successfully\n");
652
653return ssdt;
654}
655}
656else
657{
658verbose ("ACPI CPUs not found: P-States not generated !!!\n");
659}
660
661return NULL;
662}
663
664struct acpi_2_fadt *patch_fadt(struct acpi_2_fadt *fadt, struct acpi_2_dsdt *new_dsdt)
665{
666extern void setupSystemType();
667
668struct acpi_2_fadt *fadt_mod;
669bool fadt_rev2_needed = false;
670bool fix_restart;
671const char * value;
672
673// Restart Fix
674if (Platform.CPU.Vendor == 0x756E6547) {/* Intel */
675fix_restart = true;
676getBoolForKey(kRestartFix, &fix_restart, &bootInfo->chameleonConfig);
677} else {
678verbose ("Not an Intel platform: Restart Fix not applied !!!\n");
679fix_restart = false;
680}
681
682if (fix_restart) fadt_rev2_needed = true;
683
684// Allocate new fadt table
685if (fadt->Length < 0x84 && fadt_rev2_needed)
686{
687fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(0x84);
688memcpy(fadt_mod, fadt, fadt->Length);
689fadt_mod->Length = 0x84;
690fadt_mod->Revision = 0x02; // FADT rev 2 (ACPI 1.0B MS extensions)
691}
692else
693{
694fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(fadt->Length);
695memcpy(fadt_mod, fadt, fadt->Length);
696}
697// Determine system type / PM_Model
698if ( (value=getStringForKey(kSystemType, &bootInfo->chameleonConfig))!=NULL)
699{
700if (Platform.Type > 6)
701{
702if(fadt_mod->PM_Profile<=6)
703Platform.Type = fadt_mod->PM_Profile; // get the fadt if correct
704else
705Platform.Type = 1;/* Set a fixed value (Desktop) */
706verbose("Error: system-type must be 0..6. Defaulting to %d !\n", Platform.Type);
707}
708else
709Platform.Type = (unsigned char) strtoul(value, NULL, 10);
710}
711// Set PM_Profile from System-type if only user wanted this value to be forced
712if (fadt_mod->PM_Profile != Platform.Type)
713{
714 if (value)
715{ // user has overriden the SystemType so take care of it in FACP
716verbose("FADT: changing PM_Profile from 0x%02x to 0x%02x\n", fadt_mod->PM_Profile, Platform.Type);
717fadt_mod->PM_Profile = Platform.Type;
718 }
719 else
720 { // PM_Profile has a different value and no override has been set, so reflect the user value to ioregs
721Platform.Type = fadt_mod->PM_Profile <= 6 ? fadt_mod->PM_Profile : 1;
722 }
723}
724// We now have to write the systemm-type in ioregs: we cannot do it before in setupDeviceTree()
725// because we need to take care of facp original content, if it is correct.
726setupSystemType();
727
728// Patch FADT to fix restart
729if (fix_restart)
730{
731fadt_mod->Flags|= 0x400;
732fadt_mod->Reset_SpaceID= 0x01; // System I/O
733fadt_mod->Reset_BitWidth= 0x08; // 1 byte
734fadt_mod->Reset_BitOffset= 0x00; // Offset 0
735fadt_mod->Reset_AccessWidth= 0x01; // Byte access
736fadt_mod->Reset_Address= 0x0cf9; // Address of the register
737fadt_mod->Reset_Value= 0x06; // Value to write to reset the system
738verbose("FADT: Restart Fix applied!\n");
739}
740
741// Patch DSDT Address if we have loaded DSDT.aml
742if(new_dsdt)
743{
744DBG("DSDT: Old @%x,%x, ",fadt_mod->DSDT,fadt_mod->X_DSDT);
745
746fadt_mod->DSDT=(uint32_t)new_dsdt;
747if ((uint32_t)(&(fadt_mod->X_DSDT))-(uint32_t)fadt_mod+8<=fadt_mod->Length)
748fadt_mod->X_DSDT=(uint32_t)new_dsdt;
749
750DBG("New @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);
751
752verbose("FADT: Using custom DSDT!\n");
753}
754
755// Correct the checksum
756fadt_mod->Checksum=0;
757fadt_mod->Checksum=256-checksum8(fadt_mod,fadt_mod->Length);
758
759return fadt_mod;
760}
761
762/* Setup ACPI without replacing DSDT. */
763int setupAcpiNoMod()
764{
765//addConfigurationTable(&gEfiAcpiTableGuid, getAddressOfAcpiTable(), "ACPI");
766//addConfigurationTable(&gEfiAcpi20TableGuid, getAddressOfAcpi20Table(), "ACPI_20");
767/* XXX aserebln why uint32 cast if pointer is uint64 ? */
768acpi10_p = (uint32_t)getAddressOfAcpiTable();
769acpi20_p = (uint32_t)getAddressOfAcpi20Table();
770addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
771if(acpi20_p) addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
772return 1;
773}
774
775/* Setup ACPI. Replace DSDT if DSDT.aml is found */
776int setupAcpi(void)
777{
778int version;
779void *new_dsdt;
780
781const char *filename;
782char dirSpec[128];
783int len = 0;
784
785// Try using the file specified with the DSDT option
786if (getValueForKey(kDSDT, &filename, &len, &bootInfo->chameleonConfig))
787{
788sprintf(dirSpec, filename);
789}
790else
791{
792sprintf(dirSpec, "DSDT.aml");
793}
794
795// Load replacement DSDT
796new_dsdt = loadACPITable(dirSpec);
797// Mozodojo: going to patch FACP and load SSDT's even if DSDT.aml is not present
798/*if (!new_dsdt)
799 {
800 return setupAcpiNoMod();
801 }*/
802
803// Mozodojo: Load additional SSDTs
804struct acpi_2_ssdt *new_ssdt[32]; // 30 + 2 additional tables for pss & cst
805int ssdt_count=0;
806
807// SSDT Options
808bool drop_ssdt=false, generate_pstates=false, generate_cstates=false;
809
810getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);
811getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);
812getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->chameleonConfig);
813
814{
815int i;
816
817for (i=0; i<30; i++)
818{
819char filename[512];
820
821sprintf(filename, i>0?"SSDT-%d.aml":"SSDT.aml", i);
822
823if(new_ssdt[ssdt_count] = loadACPITable(filename))
824{
825ssdt_count++;
826}
827else
828{
829break;
830}
831}
832}
833
834// Do the same procedure for both versions of ACPI
835for (version=0; version<2; version++) {
836struct acpi_2_rsdp *rsdp, *rsdp_mod;
837struct acpi_2_rsdt *rsdt, *rsdt_mod;
838int rsdplength;
839
840// Find original rsdp
841rsdp=(struct acpi_2_rsdp *)(version?getAddressOfAcpi20Table():getAddressOfAcpiTable());
842if (!rsdp)
843{
844DBG("No ACPI version %d found. Ignoring\n", version+1);
845if (version)
846addConfigurationTable(&gEfiAcpi20TableGuid, NULL, "ACPI_20");
847else
848addConfigurationTable(&gEfiAcpiTableGuid, NULL, "ACPI");
849continue;
850}
851rsdplength=version?rsdp->Length:20;
852
853DBG("RSDP version %d found @%x. Length=%d\n",version+1,rsdp,rsdplength);
854
855/* FIXME: no check that memory allocation succeeded
856 * Copy and patch RSDP,RSDT, XSDT and FADT
857 * For more info see ACPI Specification pages 110 and following
858 */
859
860rsdp_mod=(struct acpi_2_rsdp *) AllocateKernelMemory(rsdplength);
861memcpy(rsdp_mod, rsdp, rsdplength);
862rsdt=(struct acpi_2_rsdt *)(rsdp->RsdtAddress);
863
864DBG("RSDT @%x, Length %d\n",rsdt, rsdt->Length);
865
866if (rsdt && (uint32_t)rsdt !=0xffffffff && rsdt->Length<0x10000)
867{
868uint32_t *rsdt_entries;
869int rsdt_entries_num;
870int dropoffset=0, i;
871
872// mozo: using malloc cos I didn't found how to free already allocated kernel memory
873rsdt_mod=(struct acpi_2_rsdt *)malloc(rsdt->Length);
874memcpy (rsdt_mod, rsdt, rsdt->Length);
875rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
876rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
877rsdt_entries=(uint32_t *)(rsdt_mod+1);
878for (i=0;i<rsdt_entries_num;i++)
879{
880char *table=(char *)(rsdt_entries[i]);
881if (!table)
882continue;
883
884DBG("TABLE %c%c%c%c,",table[0],table[1],table[2],table[3]);
885
886rsdt_entries[i-dropoffset]=rsdt_entries[i];
887
888if (drop_ssdt && tableSign(table, "SSDT"))
889{
890dropoffset++;
891continue;
892}
893if (tableSign(table, "DSDT"))
894{
895DBG("DSDT found\n");
896
897if(new_dsdt)
898rsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
899
900continue;
901}
902if (tableSign(table, "FACP"))
903{
904struct acpi_2_fadt *fadt, *fadt_mod;
905fadt=(struct acpi_2_fadt *)rsdt_entries[i];
906
907DBG("FADT found @%x, Length %d\n",fadt, fadt->Length);
908
909if (!fadt || (uint32_t)fadt == 0xffffffff || fadt->Length>0x10000)
910{
911printf("FADT incorrect. Not modified\n");
912continue;
913}
914
915fadt_mod = patch_fadt(fadt, new_dsdt);
916rsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
917
918// Generate _CST SSDT
919if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
920{
921generate_cstates = false; // Generate SSDT only once!
922ssdt_count++;
923}
924
925// Generating _PSS SSDT
926if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
927{
928generate_pstates = false; // Generate SSDT only once!
929ssdt_count++;
930}
931
932continue;
933}
934}
935DBG("\n");
936
937// Allocate rsdt in Kernel memory area
938rsdt_mod->Length += 4*ssdt_count - 4*dropoffset;
939struct acpi_2_rsdt *rsdt_copy = (struct acpi_2_rsdt *)AllocateKernelMemory(rsdt_mod->Length);
940memcpy (rsdt_copy, rsdt_mod, rsdt_mod->Length);
941free(rsdt_mod); rsdt_mod = rsdt_copy;
942rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
943rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
944rsdt_entries=(uint32_t *)(rsdt_mod+1);
945
946// Mozodojo: Insert additional SSDTs into RSDT
947if(ssdt_count>0)
948{
949int j;
950
951for (j=0; j<ssdt_count; j++)
952rsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
953
954verbose("RSDT: Added %d SSDT table(s)\n", ssdt_count);
955}
956
957// Correct the checksum of RSDT
958DBG("RSDT: Original checksum %d, ", rsdt_mod->Checksum);
959
960rsdt_mod->Checksum=0;
961rsdt_mod->Checksum=256-checksum8(rsdt_mod,rsdt_mod->Length);
962
963DBG("New checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);
964}
965else
966{
967rsdp_mod->RsdtAddress=0;
968printf("RSDT not found or RSDT incorrect\n");
969}
970
971if (version)
972{
973struct acpi_2_xsdt *xsdt, *xsdt_mod;
974
975// FIXME: handle 64-bit address correctly
976
977xsdt=(struct acpi_2_xsdt*) ((uint32_t)rsdp->XsdtAddress);
978DBG("XSDT @%x;%x, Length=%d\n", (uint32_t)(rsdp->XsdtAddress>>32),(uint32_t)rsdp->XsdtAddress,
979xsdt->Length);
980if (xsdt && (uint64_t)rsdp->XsdtAddress<0xffffffff && xsdt->Length<0x10000)
981{
982uint64_t *xsdt_entries;
983int xsdt_entries_num, i;
984int dropoffset=0;
985
986// mozo: using malloc cos I didn't found how to free already allocated kernel memory
987xsdt_mod=(struct acpi_2_xsdt*)malloc(xsdt->Length);
988memcpy(xsdt_mod, xsdt, xsdt->Length);
989rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
990xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
991xsdt_entries=(uint64_t *)(xsdt_mod+1);
992for (i=0;i<xsdt_entries_num;i++)
993{
994char *table=(char *)((uint32_t)(xsdt_entries[i]));
995if (!table)
996continue;
997
998xsdt_entries[i-dropoffset]=xsdt_entries[i];
999
1000if (drop_ssdt && tableSign(table, "SSDT"))
1001{
1002dropoffset++;
1003continue;
1004}
1005if (tableSign(table, "DSDT"))
1006{
1007DBG("DSDT found\n");
1008
1009if (new_dsdt)
1010xsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
1011
1012DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1013
1014continue;
1015}
1016if (tableSign(table, "FACP"))
1017{
1018struct acpi_2_fadt *fadt, *fadt_mod;
1019fadt=(struct acpi_2_fadt *)(uint32_t)xsdt_entries[i];
1020
1021DBG("FADT found @%x,%x, Length %d\n",(uint32_t)(xsdt_entries[i]>>32),fadt,
1022fadt->Length);
1023
1024if (!fadt || (uint64_t)xsdt_entries[i] >= 0xffffffff || fadt->Length>0x10000)
1025{
1026verbose("FADT incorrect or after 4GB. Dropping XSDT\n");
1027goto drop_xsdt;
1028}
1029
1030fadt_mod = patch_fadt(fadt, new_dsdt);
1031xsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
1032
1033DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1034
1035// Generate _CST SSDT
1036if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
1037{
1038generate_cstates = false; // Generate SSDT only once!
1039ssdt_count++;
1040}
1041
1042// Generating _PSS SSDT
1043if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
1044{
1045generate_pstates = false; // Generate SSDT only once!
1046ssdt_count++;
1047}
1048
1049continue;
1050}
1051
1052DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1053
1054}
1055
1056// Allocate xsdt in Kernel memory area
1057xsdt_mod->Length += 8*ssdt_count - 8*dropoffset;
1058struct acpi_2_xsdt *xsdt_copy = (struct acpi_2_xsdt *)AllocateKernelMemory(xsdt_mod->Length);
1059memcpy(xsdt_copy, xsdt_mod, xsdt_mod->Length);
1060free(xsdt_mod); xsdt_mod = xsdt_copy;
1061rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1062xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1063xsdt_entries=(uint64_t *)(xsdt_mod+1);
1064
1065// Mozodojo: Insert additional SSDTs into XSDT
1066if(ssdt_count>0)
1067{
1068int j;
1069
1070for (j=0; j<ssdt_count; j++)
1071xsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
1072
1073verbose("Added %d SSDT table(s) into XSDT\n", ssdt_count);
1074}
1075
1076// Correct the checksum of XSDT
1077xsdt_mod->Checksum=0;
1078xsdt_mod->Checksum=256-checksum8(xsdt_mod,xsdt_mod->Length);
1079}
1080else
1081{
1082drop_xsdt:
1083
1084DBG("About to drop XSDT\n");
1085
1086/*FIXME: Now we just hope that if MacOS doesn't find XSDT it reverts to RSDT.
1087 * A Better strategy would be to generate
1088 */
1089
1090rsdp_mod->XsdtAddress=0xffffffffffffffffLL;
1091verbose("XSDT not found or XSDT incorrect\n");
1092}
1093}
1094
1095// Correct the checksum of RSDP
1096
1097DBG("RSDP: Original checksum %d, ", rsdp_mod->Checksum);
1098
1099rsdp_mod->Checksum=0;
1100rsdp_mod->Checksum=256-checksum8(rsdp_mod,20);
1101
1102DBG("New checksum %d\n", rsdp_mod->Checksum);
1103
1104if (version)
1105{
1106DBG("RSDP: Original extended checksum %d", rsdp_mod->ExtendedChecksum);
1107
1108rsdp_mod->ExtendedChecksum=0;
1109rsdp_mod->ExtendedChecksum=256-checksum8(rsdp_mod,rsdp_mod->Length);
1110
1111DBG("New extended checksum %d\n", rsdp_mod->ExtendedChecksum);
1112
1113}
1114
1115//verbose("Patched ACPI version %d DSDT\n", version+1);
1116if (version)
1117{
1118/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1119acpi20_p = (uint32_t)rsdp_mod;
1120addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
1121}
1122else
1123{
1124/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1125acpi10_p = (uint32_t)rsdp_mod;
1126addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
1127}
1128}
1129#if DEBUG_ACPI
1130printf("Press a key to continue... (DEBUG_ACPI)\n");
1131getchar();
1132#endif
1133return 1;
1134}
1135

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Revision: 1909