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1/*␊
2 * Add (c) here␊
3 *␊
4 * Copyright .... All rights reserved.␊
5 *␊
6 */␊
7␊
8#include "smbios_getters.h"␊
9#include "bootstruct.h"␊
10␊
11#ifndef DEBUG_SMBIOS␊
12#define DEBUG_SMBIOS 0␊
13#endif␊
14␊
15#if DEBUG_SMBIOS␊
16#define DBG(x...)␉printf(x)␊
17#else␊
18#define DBG(x...)␊
19#endif␊
20␊
21␊
22bool getProcessorInformationExternalClock(returnType *value)␊
23{␊
24␉if (Platform.CPU.Vendor == CPUID_VENDOR_INTEL) // Intel␊
25␉{␉␉␊
26␉␉switch (Platform.CPU.Family)␊
27␉␉{␊
28␉␉␉case 0x06:␊
29␉␉␉{␊
30␉␉␉␉switch (Platform.CPU.Model)␊
31␉␉␉␉{␊
32␉␉␉␉␉␉// set external clock to 0 for SANDY␊
33␉␉␉␉␉␉// removes FSB info from system profiler as on real mac's. ␊
34␉␉␉␉␉case CPU_MODEL_SANDYBRIDGE: ␊
35␉␉␉␉␉case CPU_MODEL_IVYBRIDGE:␊
36␉␉␉␉␉␉value->word = 0;␊
37␉␉␉␉␉␉break;␊
38␉␉␉␉␉default:␊
39␉␉␉␉␉␉value->word = Platform.CPU.FSBFrequency/1000000;␊
40␉␉␉␉}␊
41␉␉␉}␊
42␉␉␉␉break;␊
43␉␉␉␉␊
44␉␉␉default:␊
45␉␉␉␉value->word = Platform.CPU.FSBFrequency/1000000;␊
46␉␉}␊
47␉}␊
48␉else␊
49␉{␊
50␉␉value->word = Platform.CPU.FSBFrequency/1000000;␊
51␉}␊
52␊
53␉return true;␊
54}␊
55␊
56bool getProcessorInformationMaximumClock(returnType *value)␊
57{␊
58␉value->word = Platform.CPU.CPUFrequency/1000000;␊
59␉return true;␊
60}␊
61␊
62bool getSMBOemProcessorBusSpeed(returnType *value)␊
63{␊
64␉if (Platform.CPU.Vendor == CPUID_VENDOR_INTEL) // Intel␊
65␉{␉␉␊
66␉␉switch (Platform.CPU.Family) ␊
67␉␉{␊
68␉␉␉case 0x06:␊
69␉␉␉{␊
70␉␉␉␉switch (Platform.CPU.Model)␊
71␉␉␉␉{␊
72␉␉␉␉␉case CPU_MODEL_DOTHAN:␉␉// Intel Pentium M␊
73␉␉␉␉␉case CPU_MODEL_YONAH:␉␉// Intel Mobile Core Solo, Duo␊
74␉␉␉␉␉case CPU_MODEL_MEROM:␉␉// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx␊
75␉␉␉␉␉case CPU_MODEL_PENRYN:␉␉// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx␊
76␉␉␉␉␉case CPU_MODEL_ATOM:␉␉// Intel Atom (45nm)␊
77␉␉␉␉␉␉return false;␊
78␊
79␉␉␉␉␉case CPU_MODEL_NEHALEM:␉␉// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)␊
80␉␉␉␉␉case CPU_MODEL_FIELDS:␉␉// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)␊
81␉␉␉␉␉case CPU_MODEL_DALES:␊
82␉␉␉␉␉case CPU_MODEL_DALES_32NM:␉// Intel Core i3, i5 LGA1156 (32nm)␊
83␉␉␉␉␉case CPU_MODEL_WESTMERE:␉// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core␊
84␉␉␉␉␉case CPU_MODEL_NEHALEM_EX:␉// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x␊
85␉␉␉␉␉case CPU_MODEL_WESTMERE_EX:␉// Intel Xeon E7␊
86␉␉␉␉␉{␊
87␉␉␉␉␉␉// thanks to dgobe for i3/i5/i7 bus speed detection␊
88␉␉␉␉␉␉int nhm_bus = 0x3F;␊
89␉␉␉␉␉␉static long possible_nhm_bus[] = {0xFF, 0x7F, 0x3F};␊
90␉␉␉␉␉␉unsigned long did, vid;␊
91␉␉␉␉␉␉int i;␊
92␉␉␉␉␉␉␊
93␉␉␉␉␉␉// Nehalem supports Scrubbing␊
94␉␉␉␉␉␉// First, locate the PCI bus where the MCH is located␊
95␉␉␉␉␉␉for(i = 0; i < sizeof(possible_nhm_bus); i++)␊
96␉␉␉␉␉␉{␊
97␉␉␉␉␉␉␉vid = pci_config_read16(PCIADDR(possible_nhm_bus[i], 3, 4), 0x00);␊
98␉␉␉␉␉␉␉did = pci_config_read16(PCIADDR(possible_nhm_bus[i], 3, 4), 0x02);␊
99␉␉␉␉␉␉␉vid &= 0xFFFF;␊
100␉␉␉␉␉␉␉did &= 0xFF00;␊
101␉␉␉␉␉␉␉␊
102␉␉␉␉␉␉␉if(vid == 0x8086 && did >= 0x2C00)␊
103␉␉␉␉␉␉␉␉nhm_bus = possible_nhm_bus[i]; ␊
104␉␉␉␉␉␉}␊
105␉␉␉␉␉␉␊
106␉␉␉␉␉␉unsigned long qpimult, qpibusspeed;␊
107␉␉␉␉␉␉qpimult = pci_config_read32(PCIADDR(nhm_bus, 2, 1), 0x50);␊
108␉␉␉␉␉␉qpimult &= 0x7F;␊
109␉␉␉␉␉␉DBG("qpimult %d\n", qpimult);␊
110␉␉␉␉␉␉qpibusspeed = (qpimult * 2 * (Platform.CPU.FSBFrequency/1000000));␊
111␉␉␉␉␉␉// Rek: rounding decimals to match original mac profile info␊
112␉␉␉␉␉␉if (qpibusspeed%100 != 0)qpibusspeed = ((qpibusspeed+50)/100)*100;␊
113␉␉␉␉␉␉DBG("qpibusspeed %d\n", qpibusspeed);␊
114␉␉␉␉␉␉value->word = qpibusspeed;␊
115␉␉␉␉␉␉return true;␊
116␉␉␉␉␉}␊
117␉␉␉␉}␊
118␉␉␉}␊
119␉␉}␊
120␉}␊
121␉return false;␊
122}␊
123␊
124uint16_t simpleGetSMBOemProcessorType(void)␊
125{␊
126␉if (Platform.CPU.NoCores >= 4) ␊
127␉{␊
128␉␉return 0x0501;␉// Quad-Core Xeon␊
129␉}␊
130␉else if (Platform.CPU.NoCores == 1) ␊
131␉{␊
132␉␉return 0x0201;␉// Core Solo␊
133␉};␊
134␉␊
135␉return 0x0301;␉␉// Core 2 Duo␊
136}␊
137␊
138bool getSMBOemProcessorType(returnType *value)␊
139{␊
140␉static bool done = false;␉␉␊
141␉␉␊
142␉value->word = simpleGetSMBOemProcessorType();␊
143␊
144␉if (Platform.CPU.Vendor == CPUID_VENDOR_INTEL) // Intel␊
145␉{␊
146␉␉if (!done)␊
147␉␉{␊
148␉␉␉verbose("CPU is %s, family 0x%x, model 0x%x\n", Platform.CPU.BrandString, Platform.CPU.Family, Platform.CPU.Model);␊
149␉␉␉done = true;␊
150␉␉}␊
151␉␉␊
152␉␉switch (Platform.CPU.Family) ␊
153␉␉{␊
154␉␉␉case 0x06:␊
155␉␉␉{␊
156␉␉␉␉switch (Platform.CPU.Model)␊
157␉␉␉␉{␊
158␉␉␉␉␉case CPU_MODEL_DOTHAN:␉␉␉␉// Intel Pentium M␊
159␉␉␉␉␉case CPU_MODEL_YONAH:␉␉␉␉// Intel Mobile Core Solo, Duo␊
160␉␉␉␉␉case CPU_MODEL_MEROM:␉␉␉␉// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx␊
161␉␉␉␉␉case CPU_MODEL_PENRYN:␉␉␉␉// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx␊
162␉␉␉␉␉case CPU_MODEL_ATOM:␉␉␉␉// Intel Atom (45nm)␊
163␉␉␉␉␉␉return true;␊
164␊
165␉␉␉␉␉case CPU_MODEL_NEHALEM:␉␉␉␉// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)␊
166␉␉␉␉␉case CPU_MODEL_WESTMERE:␉␉␉// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core␊
167␉␉␉␉␉case CPU_MODEL_WESTMERE_EX:␉␉␉// Intel Xeon E7␊
168␉␉␉␉␉case CPU_MODEL_JAKETOWN:␉␉␉// Intel Core i7, Xeon E5 LGA2011 (32nm)␊
169␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Xeon(R)"))␊
170␉␉␉␉␉␉␉value->word = 0x0501;␉␉␉// Xeon ␊
171␉␉␉␉␉␉else␊
172␉␉␉␉␉␉␉value->word = 0x0701;␉␉␉// Core i7␊
173␉␉␉␉␉␉return true;␊
174␊
175␉␉␉␉␉case CPU_MODEL_FIELDS:␉␉␉␉// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)␊
176␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Xeon(R)"))␊
177␉␉␉␉␉␉␉value->word = 0x0501;␉␉␉// Xeon␊
178␉␉␉␉␉␉else␊
179␉␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))␊
180␉␉␉␉␉␉␉␉value->word = 0x0601;␉␉// Core i5␊
181␉␉␉␉␉␉␉else␊
182␉␉␉␉␉␉␉␉value->word = 0x0701;␉␉// Core i7␊
183␉␉␉␉␉␉return true;␊
184␊
185␉␉␉␉␉case CPU_MODEL_DALES:␊
186␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))␊
187␉␉␉␉␉␉␉value->word = 0x0601;␉␉␉// Core i5␊
188␉␉␉␉␉␉else␊
189␉␉␉␉␉␉␉value->word = 0x0701;␉␉␉// Core i7␊
190␉␉␉␉␉␉return true;␊
191␊
192␉␉␉␉␉case CPU_MODEL_SANDYBRIDGE:␉␉␉// Intel Core i3, i5, i7 LGA1155 (32nm)␊
193␉␉␉␉␉case CPU_MODEL_IVYBRIDGE:␉␉␉// Intel Core i3, i5, i7 LGA1155 (22nm)␊
194␉␉␉␉␉case CPU_MODEL_DALES_32NM:␉␉␉// Intel Core i3, i5 LGA1156 (32nm)␊
195␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i3"))␊
196␉␉␉␉␉␉␉value->word = 0x0901;␉␉␉// Core i3␊
197␉␉␉␉␉␉else␊
198␉␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))␊
199␉␉␉␉␉␉␉␉value->word = 0x0601;␉␉// Core i5␊
200␉␉␉␉␉␉␉else␊
201␉␉␉␉␉␉␉␉value->word = 0x0701;␉␉// Core i7␊
202␉␉␉␉␉␉return true;␊
203␉␉␉␉}␊
204␉␉␉}␊
205␉␉}␊
206␉}␊
207␉␊
208␉return false;␊
209}␊
210␊
211bool getSMBMemoryDeviceMemoryType(returnType *value)␊
212{␊
213␉static int idx = -1;␊
214␉int␉map;␊
215␊
216␉idx++;␊
217␉if (idx < MAX_RAM_SLOTS)␊
218␉{␊
219␉␉map = Platform.DMI.DIMM[idx];␊
220␉␉if (Platform.RAM.DIMM[map].InUse && Platform.RAM.DIMM[map].Type != 0)␊
221␉␉{␊
222␉␉␉DBG("RAM Detected Type = %d\n", Platform.RAM.DIMM[map].Type);␊
223␉␉␉value->byte = Platform.RAM.DIMM[map].Type;␊
224␉␉␉return true;␊
225␉␉}␊
226␉}␊
227␉␊
228␉return false;␊
229//␉value->byte = SMB_MEM_TYPE_DDR2;␊
230//␉return true;␊
231}␊
232␊
233bool getSMBMemoryDeviceMemorySpeed(returnType *value)␊
234{␊
235␉static int idx = -1;␊
236␉int␉map;␊
237␊
238␉idx++;␊
239␉if (idx < MAX_RAM_SLOTS)␊
240␉{␊
241␉␉map = Platform.DMI.DIMM[idx];␊
242␉␉if (Platform.RAM.DIMM[map].InUse && Platform.RAM.DIMM[map].Frequency != 0)␊
243␉␉{␊
244␉␉␉DBG("RAM Detected Freq = %d Mhz\n", Platform.RAM.DIMM[map].Frequency);␊
245␉␉␉value->dword = Platform.RAM.DIMM[map].Frequency;␊
246␉␉␉return true;␊
247␉␉}␊
248␉}␊
249␊
250␉return false;␊
251//␉value->dword = 800;␊
252//␉return true;␊
253}␊
254␊
255bool getSMBMemoryDeviceManufacturer(returnType *value)␊
256{␊
257␉static int idx = -1;␊
258␉int␉map;␊
259␊
260␉idx++;␊
261␉if (idx < MAX_RAM_SLOTS)␊
262␉{␊
263␉␉map = Platform.DMI.DIMM[idx];␊
264␉␉if (Platform.RAM.DIMM[map].InUse && strlen(Platform.RAM.DIMM[map].Vendor) > 0)␊
265␉␉{␊
266␉␉␉DBG("RAM Detected Vendor[%d]='%s'\n", idx, Platform.RAM.DIMM[map].Vendor);␊
267␉␉␉value->string = Platform.RAM.DIMM[map].Vendor;␊
268␉␉␉return true;␊
269␉␉}␊
270␉}␊
271␊
272␉if (!bootInfo->memDetect)␊
273␉␉return false;␊
274␉value->string = NOT_AVAILABLE;␊
275␉return true;␊
276}␊
277␉␊
278bool getSMBMemoryDeviceSerialNumber(returnType *value)␊
279{␊
280␉static int idx = -1;␊
281␉int␉map;␊
282␊
283␉idx++;␊
284␊
285 DBG("getSMBMemoryDeviceSerialNumber index: %d, MAX_RAM_SLOTS: %d\n",idx,MAX_RAM_SLOTS);␊
286␊
287␉if (idx < MAX_RAM_SLOTS)␊
288␉{␊
289␉␉map = Platform.DMI.DIMM[idx];␊
290␉␉if (Platform.RAM.DIMM[map].InUse && strlen(Platform.RAM.DIMM[map].SerialNo) > 0)␊
291␉␉{␊
292␉␉␉DBG("map=%d, RAM Detected SerialNo[%d]='%s'\n", map, idx, Platform.RAM.DIMM[map].SerialNo);␊
293␉␉␉value->string = Platform.RAM.DIMM[map].SerialNo;␊
294␉␉␉return true;␊
295␉␉}␊
296␉}␊
297␊
298␉if (!bootInfo->memDetect)␊
299␉␉return false;␊
300␉value->string = NOT_AVAILABLE;␊
301␉return true;␊
302}␊
303␊
304bool getSMBMemoryDevicePartNumber(returnType *value)␊
305{␊
306␉static int idx = -1;␊
307␉int␉map;␊
308␊
309␉idx++;␊
310␉if (idx < MAX_RAM_SLOTS)␊
311␉{␊
312␉␉map = Platform.DMI.DIMM[idx];␊
313␉␉if (Platform.RAM.DIMM[map].InUse && strlen(Platform.RAM.DIMM[map].PartNo) > 0)␊
314␉␉{␊
315␉␉␉DBG("map=%d, RAM Detected PartNo[%d]='%s'\n", map, idx, Platform.RAM.DIMM[map].PartNo);␊
316␉␉␉value->string = Platform.RAM.DIMM[map].PartNo;␊
317␉␉␉return true;␊
318␉␉}␊
319␉}␊
320␊
321␉if (!bootInfo->memDetect)␊
322␉␉return false;␊
323␉value->string = NOT_AVAILABLE;␊
324␉return true;␊
325}␊
326␊
327␊
328// getting smbios addr with fast compare ops, late checksum testing ...␊
329#define COMPARE_DWORD(a,b) ( *((uint32_t *) a) == *((uint32_t *) b) )␊
330static const char * const SMTAG = "_SM_";␊
331static const char* const DMITAG = "_DMI_";␊
332␊
333SMBEntryPoint *getAddressOfSmbiosTable(void)␊
334{␊
335␉SMBEntryPoint␉*smbios;␊
336␉/* ␊
337␉ * The logic is to start at 0xf0000 and end at 0xfffff iterating 16 bytes at a time looking␊
338␉ * for the SMBIOS entry-point structure anchor (literal ASCII "_SM_").␊
339␉ */␊
340␉smbios = (SMBEntryPoint*)SMBIOS_RANGE_START;␊
341␉while (smbios <= (SMBEntryPoint *)SMBIOS_RANGE_END) {␊
342␉␉if (COMPARE_DWORD(smbios->anchor, SMTAG) && ␊
343␉␉␉COMPARE_DWORD(smbios->dmi.anchor, DMITAG) &&␊
344␉␉␉smbios->dmi.anchor[4] == DMITAG[4] &&␊
345␉␉␉checksum8(smbios, sizeof(SMBEntryPoint)) == 0)␊
346␉ {␊
347␉␉␉return smbios;␊
348␉ }␊
349␉␉smbios = (SMBEntryPoint*)(((char*)smbios) + 16);␊
350␉}␊
351␉printf("ERROR: Unable to find SMBIOS!\n");␊
352␉pause();␊
353␉return NULL;␊
354}␊
355␊
356

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Revision: 1918