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1/*␊
2 * Copyright 2008 Islam Ahmed Zaid. All rights reserved. <azismed@gmail.com>␊
3 * AsereBLN: 2009: cleanup and bugfix␊
4 */␊
5␊
6#include "libsaio.h"␊
7#include "platform.h"␊
8#include "cpu.h"␊
9#include "bootstruct.h"␊
10#include "boot.h"␊
11␊
12#ifndef DEBUG_CPU␊
13#define DEBUG_CPU 0␊
14#endif␊
15␊
16#if DEBUG_CPU␊
17#define DBG(x...)␉␉printf(x)␊
18#else␊
19#define DBG(x...)␉␉msglog(x)␊
20#endif␊
21␊
22/*␊
23 * timeRDTSC()␊
24 * This routine sets up PIT counter 2 to count down 1/20 of a second.␊
25 * It pauses until the value is latched in the counter␊
26 * and then reads the time stamp counter to return to the caller.␊
27 */␊
28uint64_t timeRDTSC(void)␊
29{␊
30 int␉␉attempts = 0;␊
31 uint64_t latchTime;␊
32 uint64_t␉saveTime,intermediate;␊
33 unsigned int timerValue, lastValue;␊
34 //boolean_t␉int_enabled;␊
35 /*␊
36 * Table of correction factors to account for␊
37 *␉ - timer counter quantization errors, and␊
38 *␉ - undercounts 0..5␊
39 */␊
40#define SAMPLE_CLKS_EXACT␉(((double) CLKNUM) / 20.0)␊
41#define SAMPLE_CLKS_INT␉␉((int) CLKNUM / 20)␊
42#define SAMPLE_NSECS␉␉(2000000000LL)␊
43#define SAMPLE_MULTIPLIER␉(((double)SAMPLE_NSECS)*SAMPLE_CLKS_EXACT)␊
44#define ROUND64(x)␉␉((uint64_t)((x) + 0.5))␊
45 uint64_t␉scale[6] = {␊
46␉␉ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-0)), ␊
47␉␉ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-1)), ␊
48␉␉ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-2)), ␊
49␉␉ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-3)), ␊
50␉␉ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-4)), ␊
51␉␉ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-5))␊
52 };␊
53␉␊
54 //int_enabled = ml_set_interrupts_enabled(FALSE);␊
55 ␊
56restart:␊
57 if (attempts >= 9) // increase to up to 9 attempts.␊
58 // This will flash-reboot. TODO: Use tscPanic instead.␊
59 printf("Timestamp counter calibation failed with %d attempts\n", attempts);␊
60 attempts++;␊
61 enable_PIT2();␉␉// turn on PIT2␊
62 set_PIT2(0);␉␉// reset timer 2 to be zero␊
63 latchTime = rdtsc64();␉// get the time stamp to time ␊
64 latchTime = get_PIT2(&timerValue) - latchTime; // time how long this takes␊
65 set_PIT2(SAMPLE_CLKS_INT);␉// set up the timer for (almost) 1/20th a second␊
66 saveTime = rdtsc64();␉// now time how long a 20th a second is...␊
67 get_PIT2(&lastValue);␊
68 get_PIT2(&lastValue);␉// read twice, first value may be unreliable␊
69 do {␊
70␉␉intermediate = get_PIT2(&timerValue);␊
71␉␉if (timerValue > lastValue) {␊
72␉␉␉// Timer wrapped␊
73␉␉␉set_PIT2(0);␊
74␉␉␉disable_PIT2();␊
75␉␉␉goto restart;␊
76␉␉}␊
77␉␉lastValue = timerValue;␊
78 } while (timerValue > 5);␊
79 printf("timerValue␉ %d\n",timerValue);␊
80 printf("intermediate 0x%016llx\n",intermediate);␊
81 printf("saveTime␉ 0x%016llx\n",saveTime);␊
82 ␊
83 intermediate -= saveTime;␉␉// raw count for about 1/20 second␊
84 intermediate *= scale[timerValue];␉// rescale measured time spent␊
85 intermediate /= SAMPLE_NSECS;␉// so its exactly 1/20 a second␊
86 intermediate += latchTime;␉␉// add on our save fudge␊
87 ␊
88 set_PIT2(0);␉␉␉// reset timer 2 to be zero␊
89 disable_PIT2();␉␉␉// turn off PIT 2␊
90␉␊
91 //ml_set_interrupts_enabled(int_enabled);␊
92 return intermediate;␊
93}␊
94␊
95␊
96/*␊
97 * DFE: Measures the TSC frequency in Hz (64-bit) using the ACPI PM timer␊
98 */␊
99static uint64_t measure_tsc_frequency(void)␊
100{␊
101␉uint64_t tscStart;␊
102␉uint64_t tscEnd;␊
103␉uint64_t tscDelta = 0xffffffffffffffffULL;␊
104␉unsigned long pollCount;␊
105␉uint64_t retval = 0;␊
106␉int i;␊
107␉␊
108␉/* Time how many TSC ticks elapse in 30 msec using the 8254 PIT␊
109␉ * counter 2. We run this loop 3 times to make sure the cache␊
110␉ * is hot and we take the minimum delta from all of the runs.␊
111␉ * That is to say that we're biased towards measuring the minimum␊
112␉ * number of TSC ticks that occur while waiting for the timer to␊
113␉ * expire. That theoretically helps avoid inconsistencies when␊
114␉ * running under a VM if the TSC is not virtualized and the host␊
115␉ * steals time.␉ The TSC is normally virtualized for VMware.␊
116␉ */␊
117␉for(i = 0; i < 10; ++i)␊
118␉{␊
119␉␉enable_PIT2();␊
120␉␉set_PIT2_mode0(CALIBRATE_LATCH);␊
121␉␉tscStart = rdtsc64();␊
122␉␉pollCount = poll_PIT2_gate();␊
123␉␉tscEnd = rdtsc64();␊
124␉␉/* The poll loop must have run at least a few times for accuracy */␊
125␉␉if (pollCount <= 1)␊
126␉␉␉continue;␊
127␉␉/* The TSC must increment at LEAST once every millisecond.␊
128␉␉ * We should have waited exactly 30 msec so the TSC delta should␊
129␉␉ * be >= 30. Anything less and the processor is way too slow.␊
130␉␉ */␊
131␉␉if ((tscEnd - tscStart) <= CALIBRATE_TIME_MSEC)␊
132␉␉␉continue;␊
133␉␉// tscDelta = MIN(tscDelta, (tscEnd - tscStart))␊
134␉␉if ( (tscEnd - tscStart) < tscDelta )␊
135␉␉␉tscDelta = tscEnd - tscStart;␊
136␉}␊
137␉/* tscDelta is now the least number of TSC ticks the processor made in␊
138␉ * a timespan of 0.03 s (e.g. 30 milliseconds)␊
139␉ * Linux thus divides by 30 which gives the answer in kiloHertz because␊
140␉ * 1 / ms = kHz. But we're xnu and most of the rest of the code uses␊
141␉ * Hz so we need to convert our milliseconds to seconds. Since we're␊
142␉ * dividing by the milliseconds, we simply multiply by 1000.␊
143␉ */␊
144␉␊
145␉/* Unlike linux, we're not limited to 32-bit, but we do need to take care␊
146␉ * that we're going to multiply by 1000 first so we do need at least some␊
147␉ * arithmetic headroom. For now, 32-bit should be enough.␊
148␉ * Also unlike Linux, our compiler can do 64-bit integer arithmetic.␊
149␉ */␊
150␉if (tscDelta > (1ULL<<32))␊
151␉␉retval = 0;␊
152␉else␊
153␉{␊
154␉␉retval = tscDelta * 1000 / 30;␊
155␉}␊
156␉disable_PIT2();␊
157␉return retval;␊
158}␊
159␊
160/*␊
161 * Original comment/code:␊
162 * "DFE: Measures the Max Performance Frequency in Hz (64-bit)"␊
163 *␊
164 * Measures the Actual Performance Frequency in Hz (64-bit)␊
165 * (just a naming change, mperf --> aperf )␊
166 */␊
167static uint64_t measure_aperf_frequency(void)␊
168{␊
169␉uint64_t aperfStart;␊
170␉uint64_t aperfEnd;␊
171␉uint64_t aperfDelta = 0xffffffffffffffffULL;␊
172␉unsigned long pollCount;␊
173␉uint64_t retval = 0;␊
174␉int i;␊
175␉␊
176␉/* Time how many APERF ticks elapse in 30 msec using the 8254 PIT␊
177␉ * counter 2. We run this loop 3 times to make sure the cache␊
178␉ * is hot and we take the minimum delta from all of the runs.␊
179␉ * That is to say that we're biased towards measuring the minimum␊
180␉ * number of APERF ticks that occur while waiting for the timer to␊
181␉ * expire.␊
182␉ */␊
183␉for(i = 0; i < 10; ++i)␊
184␉{␊
185␉␉enable_PIT2();␊
186␉␉set_PIT2_mode0(CALIBRATE_LATCH);␊
187␉␉aperfStart = rdmsr64(MSR_AMD_APERF);␊
188␉␉pollCount = poll_PIT2_gate();␊
189␉␉aperfEnd = rdmsr64(MSR_AMD_APERF);␊
190␉␉/* The poll loop must have run at least a few times for accuracy */␊
191␉␉if (pollCount <= 1)␊
192␉␉␉continue;␊
193␉␉/* The TSC must increment at LEAST once every millisecond.␊
194␉␉ * We should have waited exactly 30 msec so the APERF delta should␊
195␉␉ * be >= 30. Anything less and the processor is way too slow.␊
196␉␉ */␊
197␉␉if ((aperfEnd - aperfStart) <= CALIBRATE_TIME_MSEC)␊
198␉␉␉continue;␊
199␉␉// tscDelta = MIN(tscDelta, (tscEnd - tscStart))␊
200␉␉if ( (aperfEnd - aperfStart) < aperfDelta )␊
201␉␉␉aperfDelta = aperfEnd - aperfStart;␊
202␉}␊
203␉/* mperfDelta is now the least number of MPERF ticks the processor made in␊
204␉ * a timespan of 0.03 s (e.g. 30 milliseconds)␊
205␉ */␊
206␉␊
207␉if (aperfDelta > (1ULL<<32))␊
208␉␉retval = 0;␊
209␉else␊
210␉{␊
211␉␉retval = aperfDelta * 1000 / 30;␊
212␉}␊
213␉disable_PIT2();␊
214␉return retval;␊
215}␊
216␊
217/*␊
218 * Calculates the FSB and CPU frequencies using specific MSRs for each CPU␊
219 * - multi. is read from a specific MSR. In the case of Intel, there is:␊
220 *␉ a max multi. (used to calculate the FSB freq.),␊
221 *␉ and a current multi. (used to calculate the CPU freq.)␊
222 * - fsbFrequency = tscFrequency / multi␊
223 * - cpuFrequency = fsbFrequency * multi␊
224 */␊
225void scan_cpu(PlatformInfo_t *p)␊
226{␊
227␉uint64_t␉tscFrequency, fsbFrequency, cpuFrequency;␊
228␉uint64_t␉msr, flex_ratio;␊
229␉uint8_t␉␉maxcoef, maxdiv, currcoef, bus_ratio_max, currdiv;␊
230␉const char␉*newratio;␊
231␉int␉␉␉len, myfsb;␊
232␉uint8_t␉␉bus_ratio_min;␊
233␉uint32_t␉max_ratio, min_ratio;␊
234␉␊
235␉max_ratio = min_ratio = myfsb = bus_ratio_min = 0;␊
236␉maxcoef = maxdiv = bus_ratio_max = currcoef = currdiv = 0;␊
237␉␊
238␉/* get cpuid values */␊
239␉do_cpuid(0x00000000, p->CPU.CPUID[CPUID_0]);␊
240␉do_cpuid(0x00000001, p->CPU.CPUID[CPUID_1]);␊
241␉do_cpuid(0x00000002, p->CPU.CPUID[CPUID_2]);␊
242␉do_cpuid(0x00000003, p->CPU.CPUID[CPUID_3]);␊
243␉do_cpuid2(0x00000004, 0, p->CPU.CPUID[CPUID_4]);␊
244␉do_cpuid(0x80000000, p->CPU.CPUID[CPUID_80]);␊
245␉if ((p->CPU.CPUID[CPUID_80][0] & 0x0000000f) >= 8) {␊
246␉␉do_cpuid(0x80000008, p->CPU.CPUID[CPUID_88]);␊
247␉␉do_cpuid(0x80000001, p->CPU.CPUID[CPUID_81]);␊
248␉}␊
249␉else if ((p->CPU.CPUID[CPUID_80][0] & 0x0000000f) >= 1) {␊
250␉␉do_cpuid(0x80000001, p->CPU.CPUID[CPUID_81]);␊
251␉}␊
252␉␊
253#if DEBUG_CPU␊
254␉{␊
255␉␉int␉␉i;␊
256␉␉printf("CPUID Raw Values:\n");␊
257␉␉for (i=0; i<CPUID_MAX; i++) {␊
258␉␉␉printf("%02d: %08x-%08x-%08x-%08x\n", i,␊
259␉␉␉␉ p->CPU.CPUID[i][0], p->CPU.CPUID[i][1],␊
260␉␉␉␉ p->CPU.CPUID[i][2], p->CPU.CPUID[i][3]);␊
261␉␉}␊
262␉}␊
263#endif␊
264␉␊
265␉p->CPU.Vendor␉␉= p->CPU.CPUID[CPUID_0][1];␊
266␉p->CPU.Signature␉= p->CPU.CPUID[CPUID_1][0];␊
267␉p->CPU.Stepping␉␉= bitfield(p->CPU.CPUID[CPUID_1][0], 3, 0);␊
268␉p->CPU.Model␉␉= bitfield(p->CPU.CPUID[CPUID_1][0], 7, 4);␊
269␉p->CPU.Family␉␉= bitfield(p->CPU.CPUID[CPUID_1][0], 11, 8);␊
270␉p->CPU.ExtModel␉␉= bitfield(p->CPU.CPUID[CPUID_1][0], 19, 16);␊
271␉p->CPU.ExtFamily␉= bitfield(p->CPU.CPUID[CPUID_1][0], 27, 20);␊
272␉␊
273␉p->CPU.Model += (p->CPU.ExtModel << 4);␊
274␉␊
275␉if (p->CPU.Vendor == CPUID_VENDOR_INTEL &&␊
276␉␉p->CPU.Family == 0x06 &&␊
277␉␉p->CPU.Model >= CPUID_MODEL_NEHALEM &&␊
278␉␉p->CPU.Model != CPUID_MODEL_ATOM␉␉// MSR is *NOT* available on the Intel Atom CPU␊
279␉␉)␊
280␉{␊
281␉␉msr = rdmsr64(MSR_CORE_THREAD_COUNT);␉␉␉␉␉// Undocumented MSR in Nehalem and newer CPUs␊
282␉␉p->CPU.NoCores␉␉= bitfield((uint32_t)msr, 31, 16);␉// Using undocumented MSR to get actual values␊
283␉␉p->CPU.NoThreads␉= bitfield((uint32_t)msr, 15, 0);␉// Using undocumented MSR to get actual values␊
284␉}␊
285␉else if (p->CPU.Vendor == CPUID_VENDOR_AMD)␊
286␉{␊
287␉␉p->CPU.NoThreads␉= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);␊
288␉␉p->CPU.NoCores␉␉= bitfield(p->CPU.CPUID[CPUID_88][2], 7, 0) + 1;␊
289␉}␊
290␉else␊
291␉{␊
292␉␉// Use previous method for Cores and Threads␊
293␉␉p->CPU.NoThreads␉= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);␊
294␉␉p->CPU.NoCores␉␉= bitfield(p->CPU.CPUID[CPUID_4][0], 31, 26) + 1;␊
295␉}␊
296␉␊
297␉/* get brand string (if supported) */␊
298␉/* Copyright: from Apple's XNU cpuid.c */␊
299␉if (p->CPU.CPUID[CPUID_80][0] > 0x80000004) {␊
300␉␉uint32_t␉reg[4];␊
301␉␉char␉␉str[128], *s;␊
302␉␉/*␊
303␉␉ * The brand string 48 bytes (max), guaranteed to␊
304␉␉ * be NULL terminated.␊
305␉␉ */␊
306␉␉do_cpuid(0x80000002, reg);␊
307␉␉bcopy((char *)reg, &str[0], 16);␊
308␉␉do_cpuid(0x80000003, reg);␊
309␉␉bcopy((char *)reg, &str[16], 16);␊
310␉␉do_cpuid(0x80000004, reg);␊
311␉␉bcopy((char *)reg, &str[32], 16);␊
312␉␉for (s = str; *s != '\0'; s++) {␊
313␉␉␉if (*s != ' ') break;␊
314␉␉}␊
315␉␉␊
316␉␉strlcpy(p->CPU.BrandString, s, sizeof(p->CPU.BrandString));␊
317␉␉␊
318␉␉if (!strncmp(p->CPU.BrandString, CPU_STRING_UNKNOWN, MIN(sizeof(p->CPU.BrandString), strlen(CPU_STRING_UNKNOWN) + 1))) {␊
319␉␉␉/*␊
320␉␉␉ * This string means we have a firmware-programmable brand string,␊
321␉␉␉ * and the firmware couldn't figure out what sort of CPU we have.␊
322␉␉␉ */␊
323␉␉␉p->CPU.BrandString[0] = '\0';␊
324␉␉}␊
325␉}␊
326␉␊
327␉/* setup features */␊
328␉if ((bit(23) & p->CPU.CPUID[CPUID_1][3]) != 0) {␊
329␉␉p->CPU.Features |= CPU_FEATURE_MMX;␊
330␉}␊
331␉if ((bit(25) & p->CPU.CPUID[CPUID_1][3]) != 0) {␊
332␉␉p->CPU.Features |= CPU_FEATURE_SSE;␊
333␉}␊
334␉if ((bit(26) & p->CPU.CPUID[CPUID_1][3]) != 0) {␊
335␉␉p->CPU.Features |= CPU_FEATURE_SSE2;␊
336␉}␊
337␉if ((bit(0) & p->CPU.CPUID[CPUID_1][2]) != 0) {␊
338␉␉p->CPU.Features |= CPU_FEATURE_SSE3;␊
339␉}␊
340␉if ((bit(19) & p->CPU.CPUID[CPUID_1][2]) != 0) {␊
341␉␉p->CPU.Features |= CPU_FEATURE_SSE41;␊
342␉}␊
343␉if ((bit(20) & p->CPU.CPUID[CPUID_1][2]) != 0) {␊
344␉␉p->CPU.Features |= CPU_FEATURE_SSE42;␊
345␉}␊
346␉if ((bit(29) & p->CPU.CPUID[CPUID_81][3]) != 0) {␊
347␉␉p->CPU.Features |= CPU_FEATURE_EM64T;␊
348␉}␊
349␉if ((bit(5) & p->CPU.CPUID[CPUID_1][3]) != 0) {␊
350␉␉p->CPU.Features |= CPU_FEATURE_MSR;␊
351␉}␊
352␉//if ((bit(28) & p->CPU.CPUID[CPUID_1][3]) != 0) {␊
353␉if (p->CPU.NoThreads > p->CPU.NoCores) {␊
354␉␉p->CPU.Features |= CPU_FEATURE_HTT;␊
355␉}␊
356␉␊
357␉tscFrequency = measure_tsc_frequency();␊
358␉DBG("cpu freq classic = 0x%016llx\n", tscFrequency);␊
359␉if ( tscFrequency < 1000 )//TEST␊
360␉{␊
361␉tscFrequency = timeRDTSC() * 20;//measure_tsc_frequency();␊
362␉DBG("cpu freq timeRDTSC = 0x%016llx\n", tscFrequency);␊
363␉}␊
364␉else{␊
365␉DBG("cpu freq timeRDTSC = 0x%016llxn", timeRDTSC() * 20);␊
366␉}␊
367␉fsbFrequency = 0;␊
368␉cpuFrequency = 0;␊
369␉␊
370␉if ((p->CPU.Vendor == CPUID_VENDOR_INTEL) && ((p->CPU.Family == 0x06) || (p->CPU.Family == 0x0f))) {␊
371␉␉int intelCPU = p->CPU.Model;␊
372␉␉if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0c) || (p->CPU.Family == 0x0f && p->CPU.Model >= 0x03)) {␊
373␉␉␉/* Nehalem CPU model */␊
374␉␉␉if (p->CPU.Family == 0x06 && (p->CPU.Model == CPU_MODEL_NEHALEM␉␉||␊
375␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_FIELDS␉␉||␊
376␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_DALES␉␉||␊
377␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_DALES_32NM␉||␊
378␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_WESTMERE␉||␊
379␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_NEHALEM_EX␉||␊
380␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_WESTMERE_EX ||␊
381␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_SANDYBRIDGE ||␊
382␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_JAKETOWN␉||␊
383␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_IVYBRIDGE␉)) {␊
384␉␉␉␉msr = rdmsr64(MSR_PLATFORM_INFO);␊
385␉␉␉␉DBG("msr(%d): platform_info %08x\n", __LINE__, bitfield(msr, 31, 0));␊
386␉␉␉␉bus_ratio_max = bitfield(msr, 14, 8);␊
387␉␉␉␉bus_ratio_min = bitfield(msr, 46, 40); //valv: not sure about this one (Remarq.1)␊
388␉␉␉␉msr = rdmsr64(MSR_FLEX_RATIO);␊
389␉␉␉␉DBG("msr(%d): flex_ratio %08x\n", __LINE__, bitfield(msr, 31, 0));␊
390␉␉␉␉if (bitfield(msr, 16, 16)) {␊
391␉␉␉␉␉flex_ratio = bitfield(msr, 14, 8);␊
392␉␉␉␉␉/* bcc9: at least on the gigabyte h67ma-ud2h,␊
393␉␉␉␉␉ where the cpu multipler can't be changed to␊
394␉␉␉␉␉ allow overclocking, the flex_ratio msr has unexpected (to OSX)␊
395␉␉␉␉␉ contents.␉These contents cause mach_kernel to␊
396␉␉␉␉␉ fail to compute the bus ratio correctly, instead␊
397␉␉␉␉␉ causing the system to crash since tscGranularity␊
398␉␉␉␉␉ is inadvertently set to 0.␊
399␉␉␉␉␉ */␊
400␉␉␉␉␉if (flex_ratio == 0) {␊
401␉␉␉␉␉␉/* Clear bit 16 (evidently the presence bit) */␊
402␉␉␉␉␉␉wrmsr64(MSR_FLEX_RATIO, (msr & 0xFFFFFFFFFFFEFFFFULL));␊
403␉␉␉␉␉␉msr = rdmsr64(MSR_FLEX_RATIO);␊
404␉␉␉␉␉␉verbose("Unusable flex ratio detected. Patched MSR now %08x\n", bitfield(msr, 31, 0));␊
405␉␉␉␉␉} else {␊
406␉␉␉␉␉␉if (bus_ratio_max > flex_ratio) {␊
407␉␉␉␉␉␉␉bus_ratio_max = flex_ratio;␊
408␉␉␉␉␉␉}␊
409␉␉␉␉␉}␊
410␉␉␉␉}␊
411␉␉␉␉␊
412␉␉␉␉if (bus_ratio_max) {␊
413␉␉␉␉␉fsbFrequency = (tscFrequency / bus_ratio_max);␊
414␉␉␉␉}␊
415␉␉␉␉//valv: Turbo Ratio Limit␊
416␉␉␉␉if ((intelCPU != 0x2e) && (intelCPU != 0x2f)) {␊
417␉␉␉␉␉msr = rdmsr64(MSR_TURBO_RATIO_LIMIT);␊
418␉␉␉␉␉cpuFrequency = bus_ratio_max * fsbFrequency;␊
419␉␉␉␉␉max_ratio = bus_ratio_max * 10;␊
420␉␉␉␉} else {␊
421␉␉␉␉␉cpuFrequency = tscFrequency;␊
422␉␉␉␉}␊
423␉␉␉␉if ((getValueForKey(kbusratio, &newratio, &len, &bootInfo->chameleonConfig)) && (len <= 4)) {␊
424␉␉␉␉␉max_ratio = atoi(newratio);␊
425␉␉␉␉␉max_ratio = (max_ratio * 10);␊
426␉␉␉␉␉if (len >= 3) max_ratio = (max_ratio + 5);␊
427␉␉␉␉␉␊
428␉␉␉␉␉verbose("Bus-Ratio: min=%d, max=%s\n", bus_ratio_min, newratio);␊
429␉␉␉␉␉␊
430␉␉␉␉␉// extreme overclockers may love 320 ;)␊
431␉␉␉␉␉if ((max_ratio >= min_ratio) && (max_ratio <= 320)) {␊
432␉␉␉␉␉␉cpuFrequency = (fsbFrequency * max_ratio) / 10;␊
433␉␉␉␉␉␉if (len >= 3) maxdiv = 1;␊
434␉␉␉␉␉␉else maxdiv = 0;␊
435␉␉␉␉␉} else {␊
436␉␉␉␉␉␉max_ratio = (bus_ratio_max * 10);␊
437␉␉␉␉␉}␊
438␉␉␉␉}␊
439␉␉␉␉//valv: to be uncommented if Remarq.1 didn't stick␊
440␉␉␉␉/*if (bus_ratio_max > 0) bus_ratio = flex_ratio;*/␊
441␉␉␉␉p->CPU.MaxRatio = max_ratio;␊
442␉␉␉␉p->CPU.MinRatio = min_ratio;␊
443␉␉␉␉␊
444␉␉␉␉myfsb = fsbFrequency / 1000000;␊
445␉␉␉␉verbose("Sticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio);␊
446␉␉␉␉currcoef = bus_ratio_max;␊
447␉␉␉} else {␊
448␉␉␉␉msr = rdmsr64(MSR_IA32_PERF_STATUS);␊
449␉␉␉␉DBG("msr(%d): ia32_perf_stat 0x%08x\n", __LINE__, bitfield(msr, 31, 0));␊
450␉␉␉␉currcoef = bitfield(msr, 12, 8);␊
451␉␉␉␉/* Non-integer bus ratio for the max-multi*/␊
452␉␉␉␉maxdiv = bitfield(msr, 46, 46);␊
453␉␉␉␉/* Non-integer bus ratio for the current-multi (undocumented)*/␊
454␉␉␉␉currdiv = bitfield(msr, 14, 14);␊
455␉␉␉␉␊
456␉␉␉␉// This will always be model >= 3␊
457␉␉␉␉if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0e) || (p->CPU.Family == 0x0f))␊
458␉␉␉␉{␊
459␉␉␉␉␉/* On these models, maxcoef defines TSC freq */␊
460␉␉␉␉␉maxcoef = bitfield(msr, 44, 40);␊
461␉␉␉␉} else {␊
462␉␉␉␉␉/* On lower models, currcoef defines TSC freq */␊
463␉␉␉␉␉/* XXX */␊
464␉␉␉␉␉maxcoef = currcoef;␊
465␉␉␉␉}␊
466␉␉␉␉␊
467␉␉␉␉if (maxcoef) {␊
468␉␉␉␉␉if (maxdiv) {␊
469␉␉␉␉␉␉fsbFrequency = ((tscFrequency * 2) / ((maxcoef * 2) + 1));␊
470␉␉␉␉␉} else {␊
471␉␉␉␉␉␉fsbFrequency = (tscFrequency / maxcoef);␊
472␉␉␉␉␉}␊
473␉␉␉␉␉if (currdiv) {␊
474␉␉␉␉␉␉cpuFrequency = (fsbFrequency * ((currcoef * 2) + 1) / 2);␊
475␉␉␉␉␉} else {␊
476␉␉␉␉␉␉cpuFrequency = (fsbFrequency * currcoef);␊
477␉␉␉␉␉}␊
478␉␉␉␉␉DBG("max: %d%s current: %d%s\n", maxcoef, maxdiv ? ".5" : "",currcoef, currdiv ? ".5" : "");␊
479␉␉␉␉}␊
480␉␉␉}␊
481␉␉}␊
482␉␉/* Mobile CPU */␊
483␉␉if (rdmsr64(MSR_IA32_PLATFORM_ID) & (1<<28)) {␊
484␉␉␉p->CPU.Features |= CPU_FEATURE_MOBILE;␊
485␉␉}␊
486␉}␊
487␉else if ((p->CPU.Vendor == CPUID_VENDOR_AMD) && (p->CPU.Family == 0x0f))␊
488␉{␊
489␉␉switch(p->CPU.ExtFamily)␊
490␉␉{␊
491␉␉␉case 0x00: /* K8 */␊
492␉␉␉␉msr = rdmsr64(K8_FIDVID_STATUS);␊
493␉␉␉␉maxcoef = bitfield(msr, 21, 16) / 2 + 4;␊
494␉␉␉␉currcoef = bitfield(msr, 5, 0) / 2 + 4;␊
495␉␉␉␉break;␊
496␉␉␉␉␊
497␉␉␉case 0x01: /* K10 */␊
498␉␉␉␉msr = rdmsr64(K10_COFVID_STATUS);␊
499␉␉␉␉do_cpuid2(0x00000006, 0, p->CPU.CPUID[CPUID_6]);␊
500␉␉␉␉// EffFreq: effective frequency interface␊
501␉␉␉␉if (bitfield(p->CPU.CPUID[CPUID_6][2], 0, 0) == 1)␊
502␉␉␉␉{␊
503␉␉␉␉␉//uint64_t mperf = measure_mperf_frequency();␊
504␉␉␉␉␉uint64_t aperf = measure_aperf_frequency();␊
505␉␉␉␉␉cpuFrequency = aperf;␊
506␉␉␉␉}␊
507␉␉␉␉// NOTE: tsc runs at the maccoeff (non turbo)␊
508␉␉␉␉//␉␉␉*not* at the turbo frequency.␊
509␉␉␉␉maxcoef␉ = bitfield(msr, 54, 49) / 2 + 4;␊
510␉␉␉␉currcoef = bitfield(msr, 5, 0) + 0x10;␊
511␉␉␉␉currdiv = 2 << bitfield(msr, 8, 6);␊
512␉␉␉␉␊
513␉␉␉␉break;␊
514␉␉␉␉␊
515␉␉␉case 0x05: /* K14 */␊
516␉␉␉␉msr = rdmsr64(K10_COFVID_STATUS);␊
517␉␉␉␉currcoef = (bitfield(msr, 54, 49) + 0x10) << 2;␊
518␉␉␉␉currdiv = (bitfield(msr, 8, 4) + 1) << 2;␊
519␉␉␉␉currdiv += bitfield(msr, 3, 0);␊
520␉␉␉␉␊
521␉␉␉␉break;␊
522␉␉␉␉␊
523␉␉␉case 0x02: /* K11 */␊
524␉␉␉␉// not implimented␊
525␉␉␉␉break;␊
526␉␉}␊
527␉␉␊
528␉␉if (maxcoef)␊
529␉␉{␊
530␉␉␉if (currdiv)␊
531␉␉␉{␊
532␉␉␉␉if (!currcoef) currcoef = maxcoef;␊
533␉␉␉␉if (!cpuFrequency)␊
534␉␉␉␉␉fsbFrequency = ((tscFrequency * currdiv) / currcoef);␊
535␉␉␉␉else␊
536␉␉␉␉␉fsbFrequency = ((cpuFrequency * currdiv) / currcoef);␊
537␉␉␉␉␊
538␉␉␉␉DBG("%d.%d\n", currcoef / currdiv, ((currcoef % currdiv) * 100) / currdiv);␊
539␉␉␉} else {␊
540␉␉␉␉if (!cpuFrequency)␊
541␉␉␉␉␉fsbFrequency = (tscFrequency / maxcoef);␊
542␉␉␉␉else ␊
543␉␉␉␉␉fsbFrequency = (cpuFrequency / maxcoef);␊
544␉␉␉␉DBG("%d\n", currcoef);␊
545␉␉␉}␊
546␉␉}␊
547␉␉else if (currcoef)␊
548␉␉{␊
549␉␉␉if (currdiv)␊
550␉␉␉{␊
551␉␉␉␉fsbFrequency = ((tscFrequency * currdiv) / currcoef);␊
552␉␉␉␉DBG("%d.%d\n", currcoef / currdiv, ((currcoef % currdiv) * 100) / currdiv);␊
553␉␉␉} else {␊
554␉␉␉␉fsbFrequency = (tscFrequency / currcoef);␊
555␉␉␉␉DBG("%d\n", currcoef);␊
556␉␉␉}␊
557␉␉}␊
558␉␉if (!cpuFrequency) cpuFrequency = tscFrequency;␊
559␉}␊
560␉␊
561#if 0␊
562␉if (!fsbFrequency) {␊
563␉␉fsbFrequency = (DEFAULT_FSB * 1000);␊
564␉␉cpuFrequency = tscFrequency;␊
565␉␉DBG("0 ! using the default value for FSB !\n");␊
566␉}␊
567␉␊
568␉DBG("cpu freq = 0x%016llxn", timeRDTSC() * 20);␊
569␉␊
570#endif␊
571␉␊
572␉p->CPU.MaxCoef = maxcoef;␊
573␉p->CPU.MaxDiv = maxdiv;␊
574␉p->CPU.CurrCoef = currcoef;␊
575␉p->CPU.CurrDiv = currdiv;␊
576␉p->CPU.TSCFrequency = tscFrequency;␊
577␉p->CPU.FSBFrequency = fsbFrequency;␊
578␉p->CPU.CPUFrequency = cpuFrequency;␊
579␉␊
580␉// keep formatted with spaces instead of tabs␊
581␉DBG("CPU: Brand String: %s\n", p->CPU.BrandString);␊
582 DBG("CPU: Vendor/Family/ExtFamily: 0x%x/0x%x/0x%x\n", p->CPU.Vendor, p->CPU.Family, p->CPU.ExtFamily);␊
583 DBG("CPU: Model/ExtModel/Stepping: 0x%x/0x%x/0x%x\n", p->CPU.Model, p->CPU.ExtModel, p->CPU.Stepping);␊
584 DBG("CPU: MaxCoef/CurrCoef: 0x%x/0x%x\n", p->CPU.MaxCoef, p->CPU.CurrCoef);␊
585 DBG("CPU: MaxDiv/CurrDiv: 0x%x/0x%x\n", p->CPU.MaxDiv, p->CPU.CurrDiv);␊
586 DBG("CPU: TSCFreq: %dMHz\n", p->CPU.TSCFrequency / 1000000);␊
587 DBG("CPU: FSBFreq: %dMHz\n", (p->CPU.FSBFrequency + 500000) / 1000000);␊
588 DBG("CPU: CPUFreq: %dMHz\n", p->CPU.CPUFrequency / 1000000);␊
589 DBG("CPU: NoCores/NoThreads: %d/%d\n", p->CPU.NoCores, p->CPU.NoThreads);␊
590 DBG("CPU: Features: 0x%08x\n", p->CPU.Features);␊
591#if DEBUG_CPU␊
592␉pause();␊
593#endif␊
594}␊
595

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