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1/*␊
2 * Add (c) here␊
3 *␊
4 * Copyright .... All rights reserved.␊
5 *␊
6 */␊
7␊
8#include "smbios_getters.h"␊
9#include "bootstruct.h"␊
10␊
11#ifndef DEBUG_SMBIOS␊
12#define DEBUG_SMBIOS 0␊
13#endif␊
14␊
15#if DEBUG_SMBIOS␊
16#define DBG(x...)␉printf(x)␊
17#else␊
18#define DBG(x...)␊
19#endif␊
20␊
21␊
22bool getProcessorInformationExternalClock(returnType *value)␊
23{␊
24␉value->word = Platform.CPU.FSBFrequency/1000000;␊
25␉return true;␊
26}␊
27␊
28bool getProcessorInformationMaximumClock(returnType *value)␊
29{␊
30␉value->word = Platform.CPU.CPUFrequency/1000000;␊
31␉return true;␊
32}␊
33␊
34bool getSMBOemProcessorBusSpeed(returnType *value)␊
35{␊
36␉if (Platform.CPU.Vendor == 0x756E6547) // Intel␊
37␉{␉␉␊
38␉␉switch (Platform.CPU.Family) ␊
39␉␉{␊
40␉␉␉case 0x06:␊
41␉␉␉{␊
42␉␉␉␉switch (Platform.CPU.Model)␊
43␉␉␉␉{␊
44␉␉␉␉␉case CPU_MODEL_DOTHAN:␉␉// Intel Pentium M␊
45␉␉␉␉␉case CPU_MODEL_YONAH:␉␉// Intel Mobile Core Solo, Duo␊
46␉␉␉␉␉case CPU_MODEL_MEROM:␉␉// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx␊
47␉␉␉␉␉case CPU_MODEL_PENRYN:␉␉// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx␊
48␉␉␉␉␉case CPU_MODEL_ATOM:␉␉// Intel Atom (45nm)␊
49␉␉␉␉␉␉return false;␊
50␊
51␉␉␉␉␉case CPU_MODEL_NEHALEM:␉␉// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)␊
52␉␉␉␉␉case CPU_MODEL_FIELDS:␉␉// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)␊
53␉␉␉␉␉case CPU_MODEL_DALES:␊
54␉␉␉␉␉case CPU_MODEL_DALES_32NM:␉// Intel Core i3, i5 LGA1156 (32nm)␊
55␉␉␉␉␉case CPU_MODEL_WESTMERE:␉// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core␊
56␉␉␉␉␉case CPU_MODEL_NEHALEM_EX:␉// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x␊
57␉␉␉␉␉case CPU_MODEL_WESTMERE_EX:␉// Intel Xeon E7␊
58␉␉␉␉␉{␊
59␉␉␉␉␉␉// thanks to dgobe for i3/i5/i7 bus speed detection␊
60␉␉␉␉␉␉int nhm_bus = 0x3F;␊
61␉␉␉␉␉␉static long possible_nhm_bus[] = {0xFF, 0x7F, 0x3F};␊
62␉␉␉␉␉␉unsigned long did, vid;␊
63␉␉␉␉␉␉int i;␊
64␉␉␉␉␉␉␊
65␉␉␉␉␉␉// Nehalem supports Scrubbing␊
66␉␉␉␉␉␉// First, locate the PCI bus where the MCH is located␊
67␉␉␉␉␉␉for(i = 0; i < sizeof(possible_nhm_bus); i++)␊
68␉␉␉␉␉␉{␊
69␉␉␉␉␉␉␉vid = pci_config_read16(PCIADDR(possible_nhm_bus[i], 3, 4), 0x00);␊
70␉␉␉␉␉␉␉did = pci_config_read16(PCIADDR(possible_nhm_bus[i], 3, 4), 0x02);␊
71␉␉␉␉␉␉␉vid &= 0xFFFF;␊
72␉␉␉␉␉␉␉did &= 0xFF00;␊
73␉␉␉␉␉␉␉␊
74␉␉␉␉␉␉␉if(vid == 0x8086 && did >= 0x2C00)␊
75␉␉␉␉␉␉␉␉nhm_bus = possible_nhm_bus[i]; ␊
76␉␉␉␉␉␉}␊
77␉␉␉␉␉␉␊
78␉␉␉␉␉␉unsigned long qpimult, qpibusspeed;␊
79␉␉␉␉␉␉qpimult = pci_config_read32(PCIADDR(nhm_bus, 2, 1), 0x50);␊
80␉␉␉␉␉␉qpimult &= 0x7F;␊
81␉␉␉␉␉␉DBG("qpimult %d\n", qpimult);␊
82␉␉␉␉␉␉qpibusspeed = (qpimult * 2 * (Platform.CPU.FSBFrequency/1000000));␊
83␉␉␉␉␉␉// Rek: rounding decimals to match original mac profile info␊
84␉␉␉␉␉␉if (qpibusspeed%100 != 0)qpibusspeed = ((qpibusspeed+50)/100)*100;␊
85␉␉␉␉␉␉DBG("qpibusspeed %d\n", qpibusspeed);␊
86␉␉␉␉␉␉value->word = qpibusspeed;␊
87␉␉␉␉␉␉return true;␊
88␉␉␉␉␉}␊
89␉␉␉␉␉case CPU_MODEL_SANDYBRIDGE:␉// Intel Core i3, i5, i7 LGA1155 (32nm)␊
90␉␉␉␉␉case CPU_MODEL_IVYBRIDGE:␉// Intel Core i3, i5, i7 LGA1155 (22nm)␊
91␉␉␉␉␉case CPU_MODEL_JAKETOWN:␉// Intel Core i7, Xeon E5 LGA2011 (32nm)␊
92␉␉␉␉␉{␊
93␉␉␉␉␉␉int busspeed;␊
94␉␉␉␉␉␉busspeed = 100;␊
95␉␉␉␉␉␉value->word = busspeed;␊
96␉␉␉␉␉␉return true;␊
97␉␉␉␉␉}␊
98␉␉␉␉}␊
99␉␉␉}␊
100␉␉}␊
101␉}␊
102␉return false;␊
103}␊
104␊
105uint16_t simpleGetSMBOemProcessorType(void)␊
106{␊
107␉if (Platform.CPU.NoCores >= 4) ␊
108␉{␊
109␉␉return 0x0501;␉// Quad-Core Xeon␊
110␉}␊
111␉else if (Platform.CPU.NoCores == 1) ␊
112␉{␊
113␉␉return 0x0201;␉// Core Solo␊
114␉};␊
115␉␊
116␉return 0x0301;␉␉// Core 2 Duo␊
117}␊
118␊
119bool getSMBOemProcessorType(returnType *value)␊
120{␊
121␉value->word = simpleGetSMBOemProcessorType();␊
122␊
123␉if (Platform.CPU.Vendor == 0x756E6547) // Intel␊
124␉{␊
125␉␉switch (Platform.CPU.Family) ␊
126␉␉{␊
127␉␉␉case 0x06:␊
128␉␉␉{␊
129␉␉␉␉switch (Platform.CPU.Model)␊
130␉␉␉␉{␊
131␉␉␉␉␉case CPU_MODEL_DOTHAN:␉␉␉␉// Intel Pentium M␊
132␉␉␉␉␉case CPU_MODEL_YONAH:␉␉␉␉// Intel Mobile Core Solo, Duo␊
133␉␉␉␉␉case CPU_MODEL_MEROM:␉␉␉␉// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx␊
134␉␉␉␉␉case CPU_MODEL_PENRYN:␉␉␉␉// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx␊
135␉␉␉␉␉case CPU_MODEL_ATOM:␉␉␉␉// Intel Atom (45nm)␊
136␉␉␉␉␉␉return true;␊
137␊
138␉␉␉␉␉case CPU_MODEL_NEHALEM:␉␉␉␉// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)␊
139␉␉␉␉␉case CPU_MODEL_WESTMERE:␉␉␉// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core␊
140␉␉␉␉␉case CPU_MODEL_WESTMERE_EX:␉␉␉// Intel Xeon E7␊
141 case CPU_MODEL_JAKETOWN:␉␉␉// Intel Core i7, Xeon E5-xxxx LGA2011 (32nm)␊
142␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Xeon(R)"))␊
143␉␉␉␉␉␉␉value->word = 0x0501;␉␉␉// Xeon ␊
144␉␉␉␉␉␉else␊
145␉␉␉␉␉␉␉value->word = 0x0701;␉␉␉// Core i7␊
146␉␉␉␉␉␉return true;␊
147␊
148␉␉␉␉␉case CPU_MODEL_FIELDS:␉␉␉␉// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)␊
149␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Xeon(R)"))␊
150␉␉␉␉␉␉␉value->word = 0x0501;␉␉␉// Xeon␊
151␉␉␉␉␉␉else␊
152␉␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))␊
153␉␉␉␉␉␉␉␉value->word = 0x0601;␉␉// Core i5␊
154␉␉␉␉␉␉␉else␊
155␉␉␉␉␉␉␉␉value->word = 0x0701;␉␉// Core i7␊
156␉␉␉␉␉␉return true;␊
157␊
158␉␉␉␉␉case CPU_MODEL_DALES:␊
159␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))␊
160␉␉␉␉␉␉␉value->word = 0x0601;␉␉␉// Core i5␊
161␉␉␉␉␉␉else␊
162␉␉␉␉␉␉␉value->word = 0x0701;␉␉␉// Core i7␊
163␉␉␉␉␉␉return true;␊
164␊
165␉␉␉␉␉case CPU_MODEL_SANDYBRIDGE:␉␉␉// Intel Core i3, i5, i7, Xeon E3-12xx LGA1155 (32nm)␊
166␉␉␉␉␉case CPU_MODEL_IVYBRIDGE:␉␉␉// Intel Core i3, i5, i7 LGA1155 (22nm)␊
167␉␉␉␉␉case CPU_MODEL_DALES_32NM:␉␉␉// Intel Core i3, i5 LGA1156 (32nm)␊
168␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Xeon(R)"))␊
169␉␉␉␉␉␉␉value->word = 0x0501;␉␉␉// Xeon␊
170␉␉␉␉␉␉else␊
171␉␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i3"))␊
172␉␉␉␉␉␉␉␉value->word = 0x0901;␉␉␉// Core i3␊
173␉␉␉␉␉␉else␊
174␉␉␉␉␉␉␉if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))␊
175␉␉␉␉␉␉␉␉value->word = 0x0601;␉␉// Core i5␊
176␉␉␉␉␉␉␉else␊
177␉␉␉␉␉␉␉␉value->word = 0x0701;␉␉// Core i7␊
178␉␉␉␉␉␉return true;␊
179␉␉␉␉}␊
180␉␉␉}␊
181␉␉}␊
182␉}␊
183␉␊
184␉return false;␊
185}␊
186␊
187bool getSMBMemoryDeviceMemoryType(returnType *value)␊
188{␊
189␉static int idx = -1;␊
190␉int␉map;␊
191␊
192␉idx++;␊
193␉if (idx < MAX_RAM_SLOTS)␊
194␉{␊
195␉␉map = Platform.DMI.DIMM[idx];␊
196␉␉if (Platform.RAM.DIMM[map].InUse && Platform.RAM.DIMM[map].Type != 0)␊
197␉␉{␊
198␉␉␉DBG("RAM Detected Type = %d\n", Platform.RAM.DIMM[map].Type);␊
199␉␉␉value->byte = Platform.RAM.DIMM[map].Type;␊
200␉␉␉return true;␊
201␉␉}␊
202␉}␊
203␉␊
204␉return false;␊
205//␉value->byte = SMB_MEM_TYPE_DDR2;␊
206//␉return true;␊
207}␊
208␊
209bool getSMBMemoryDeviceMemorySpeed(returnType *value)␊
210{␊
211␉static int idx = -1;␊
212␉int␉map;␊
213␊
214␉idx++;␊
215␉if (idx < MAX_RAM_SLOTS)␊
216␉{␊
217␉␉map = Platform.DMI.DIMM[idx];␊
218␉␉if (Platform.RAM.DIMM[map].InUse && Platform.RAM.DIMM[map].Frequency != 0)␊
219␉␉{␊
220␉␉␉DBG("RAM Detected Freq = %d Mhz\n", Platform.RAM.DIMM[map].Frequency);␊
221␉␉␉value->dword = Platform.RAM.DIMM[map].Frequency;␊
222␉␉␉return true;␊
223␉␉}␊
224␉}␊
225␊
226␉return false;␊
227//␉value->dword = 800;␊
228//␉return true;␊
229}␊
230␊
231bool getSMBMemoryDeviceManufacturer(returnType *value)␊
232{␊
233␉static int idx = -1;␊
234␉int␉map;␊
235␊
236␉idx++;␊
237␉if (idx < MAX_RAM_SLOTS)␊
238␉{␊
239␉␉map = Platform.DMI.DIMM[idx];␊
240␉␉if (Platform.RAM.DIMM[map].InUse && strlen(Platform.RAM.DIMM[map].Vendor) > 0)␊
241␉␉{␊
242␉␉␉DBG("RAM Detected Vendor[%d]='%s'\n", idx, Platform.RAM.DIMM[map].Vendor);␊
243␉␉␉value->string = Platform.RAM.DIMM[map].Vendor;␊
244␉␉␉return true;␊
245␉␉}␊
246␉}␊
247␊
248␉if (!bootInfo->memDetect)␊
249␉␉return false;␊
250␉value->string = NOT_AVAILABLE;␊
251␉return true;␊
252}␊
253␉␊
254bool getSMBMemoryDeviceSerialNumber(returnType *value)␊
255{␊
256␉static int idx = -1;␊
257␉int␉map;␊
258␊
259␉idx++;␊
260␊
261 DBG("getSMBMemoryDeviceSerialNumber index: %d, MAX_RAM_SLOTS: %d\n",idx,MAX_RAM_SLOTS);␊
262␊
263␉if (idx < MAX_RAM_SLOTS)␊
264␉{␊
265␉␉map = Platform.DMI.DIMM[idx];␊
266␉␉if (Platform.RAM.DIMM[map].InUse && strlen(Platform.RAM.DIMM[map].SerialNo) > 0)␊
267␉␉{␊
268␉␉␉DBG("map=%d, RAM Detected SerialNo[%d]='%s'\n", map, idx, Platform.RAM.DIMM[map].SerialNo);␊
269␉␉␉value->string = Platform.RAM.DIMM[map].SerialNo;␊
270␉␉␉return true;␊
271␉␉}␊
272␉}␊
273␊
274␉if (!bootInfo->memDetect)␊
275␉␉return false;␊
276␉value->string = NOT_AVAILABLE;␊
277␉return true;␊
278}␊
279␊
280bool getSMBMemoryDevicePartNumber(returnType *value)␊
281{␊
282␉static int idx = -1;␊
283␉int␉map;␊
284␊
285␉idx++;␊
286␉if (idx < MAX_RAM_SLOTS)␊
287␉{␊
288␉␉map = Platform.DMI.DIMM[idx];␊
289␉␉if (Platform.RAM.DIMM[map].InUse && strlen(Platform.RAM.DIMM[map].PartNo) > 0)␊
290␉␉{␊
291␉␉␉DBG("map=%d, RAM Detected PartNo[%d]='%s'\n", map, idx, Platform.RAM.DIMM[map].PartNo);␊
292␉␉␉value->string = Platform.RAM.DIMM[map].PartNo;␊
293␉␉␉return true;␊
294␉␉}␊
295␉}␊
296␊
297␉if (!bootInfo->memDetect)␊
298␉␉return false;␊
299␉value->string = NOT_AVAILABLE;␊
300␉return true;␊
301}␊
302␊
303␊
304// getting smbios addr with fast compare ops, late checksum testing ...␊
305#define COMPARE_DWORD(a,b) ( *((uint32_t *) a) == *((uint32_t *) b) )␊
306static const char * const SMTAG = "_SM_";␊
307static const char* const DMITAG = "_DMI_";␊
308␊
309SMBEntryPoint *getAddressOfSmbiosTable(void)␊
310{␊
311␉SMBEntryPoint␉*smbios;␊
312␉/* ␊
313␉ * The logic is to start at 0xf0000 and end at 0xfffff iterating 16 bytes at a time looking␊
314␉ * for the SMBIOS entry-point structure anchor (literal ASCII "_SM_").␊
315␉ */␊
316␉smbios = (SMBEntryPoint*)SMBIOS_RANGE_START;␊
317␉while (smbios <= (SMBEntryPoint *)SMBIOS_RANGE_END) {␊
318␉␉if (COMPARE_DWORD(smbios->anchor, SMTAG) && ␊
319␉␉␉COMPARE_DWORD(smbios->dmi.anchor, DMITAG) &&␊
320␉␉␉smbios->dmi.anchor[4] == DMITAG[4] &&␊
321␉␉␉checksum8(smbios, sizeof(SMBEntryPoint)) == 0)␊
322␉ {␊
323␉␉␉return smbios;␊
324␉ }␊
325␉␉smbios = (SMBEntryPoint*)(((char*)smbios) + 16);␊
326␉}␊
327␉printf("ERROR: Unable to find SMBIOS!\n");␊
328␉pause();␊
329␉return NULL;␊
330}␊
331␊
332

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