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Root/branches/ErmaC/Trunk/i386/libsaio/acpi_patcher.c

1/*
2 * Copyright 2008 mackerintel
3 */
4
5#include "libsaio.h"
6#include "boot.h"
7#include "bootstruct.h"
8#include "acpi.h"
9#include "efi_tables.h"
10#include "fake_efi.h"
11#include "acpi_patcher.h"
12#include "platform.h"
13#include "cpu.h"
14#include "aml_generator.h"
15
16#ifndef DEBUG_ACPI
17#define DEBUG_ACPI 0
18#endif
19
20#if DEBUG_ACPI==2
21#define DBG(x...) {printf(x); sleep(1);}
22#elif DEBUG_ACPI==1
23#define DBG(x...) printf(x)
24#else
25#define DBG(x...)
26#endif
27
28// Slice: New signature compare function
29boolean_t tableSign(char *table, const char *sgn)
30{
31int i;
32for (i=0; i<4; i++) {
33if ((table[i] &~0x20) != (sgn[i] &~0x20)) {
34return false;
35}
36}
37return true;
38}
39
40/* Gets the ACPI 1.0 RSDP address */
41static struct acpi_2_rsdp* getAddressOfAcpiTable()
42{
43 /* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
44
45 void *acpi_addr = (void*)ACPI_RANGE_START;
46 for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
47 {
48 if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
49 {
50 uint8_t csum = checksum8(acpi_addr, 20);
51 if(csum == 0)
52 {
53 // Only return the table if it is a true version 1.0 table (Revision 0)
54 if(((struct acpi_2_rsdp*)acpi_addr)->Revision == 0)
55 return acpi_addr;
56 }
57 }
58 }
59 return NULL;
60}
61
62/* Gets the ACPI 2.0 RSDP address */
63static struct acpi_2_rsdp* getAddressOfAcpi20Table()
64{
65 /* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
66
67 void *acpi_addr = (void*)ACPI_RANGE_START;
68 for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
69 {
70 if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
71 {
72 uint8_t csum = checksum8(acpi_addr, 20);
73
74 /* Only assume this is a 2.0 or better table if the revision is greater than 0
75 * NOTE: ACPI 3.0 spec only seems to say that 1.0 tables have revision 1
76 * and that the current revision is 2.. I am going to assume that rev > 0 is 2.0.
77 */
78
79 if(csum == 0 && (((struct acpi_2_rsdp*)acpi_addr)->Revision > 0))
80 {
81 uint8_t csum2 = checksum8(acpi_addr, sizeof(struct acpi_2_rsdp));
82 if(csum2 == 0)
83 return acpi_addr;
84 }
85 }
86 }
87 return NULL;
88}
89
90/* The folowing ACPI Table search algo. should be reused anywhere needed:*/
91int search_and_get_acpi_fd(const char * filename, const char ** outDirspec)
92{
93int fd = 0;
94char dirSpec[512] = "";
95
96// Try finding 'filename' in the usual places
97// Start searching any potential location for ACPI Table
98sprintf(dirSpec, "%s", filename);
99fd = open(dirSpec, 0);
100if (fd < 0)
101{
102sprintf(dirSpec, "/Extra/%s", filename);
103fd = open(dirSpec, 0);
104if (fd < 0)
105{
106sprintf(dirSpec, "bt(0,0)/Extra/%s", filename);
107fd = open(dirSpec, 0);
108}
109}
110
111if (fd < 0)
112{
113// NOT FOUND:
114verbose("ACPI Table not found: %s\n", filename);
115*dirSpec = '\0';
116}
117
118if (outDirspec) *outDirspec = dirSpec;
119return fd;
120}
121
122void *loadACPITable (const char * filename)
123{
124void *tableAddr;
125const char * dirspec=NULL;
126
127int fd = search_and_get_acpi_fd(filename, &dirspec);
128
129if (fd>=0)
130{
131tableAddr=(void*)AllocateKernelMemory(file_size (fd));
132if (tableAddr)
133{
134if (read (fd, tableAddr, file_size (fd))!=file_size (fd))
135{
136printf("Couldn't read table %s\n",dirspec);
137free (tableAddr);
138close (fd);
139return NULL;
140}
141
142DBG("Table %s read and stored at: %x\n", dirspec, tableAddr);
143close (fd);
144return tableAddr;
145}
146close (fd);
147printf("Couldn't allocate memory for table \n", dirspec);
148}
149//printf("Couldn't find table %s\n", filename);
150return NULL;
151}
152
153uint8_tacpi_cpu_count = 0;
154char* acpi_cpu_name[32];
155uint32_t acpi_cpu_p_blk = 0;
156
157void get_acpi_cpu_names(unsigned char* dsdt, uint32_t length)
158{
159uint32_t i;
160// DBG("start finding cpu names. length %d\n", length);
161for (i=0; i<length-7; i++)
162{
163if (dsdt[i] == 0x5B && dsdt[i+1] == 0x83) // ProcessorOP
164{
165
166// DBG("dsdt: %x%x\n", dsdt[i], dsdt[i+1]);
167
168uint32_t offset = i + 3 + (dsdt[i+2] >> 6);
169
170bool add_name = true;
171
172uint8_t j;
173
174for (j=0; j<4; j++)
175{
176char c = dsdt[offset+j];
177
178if (!aml_isvalidchar(c))
179{
180add_name = false;
181verbose("Invalid character found in ProcessorOP 0x%x!\n", c);
182break;
183}
184}
185
186if (add_name)
187{
188acpi_cpu_name[acpi_cpu_count] = malloc(4);
189memcpy(acpi_cpu_name[acpi_cpu_count], dsdt+offset, 4);
190i = offset + 5;
191
192 if (acpi_cpu_count == 0)
193 acpi_cpu_p_blk = dsdt[i] | (dsdt[i+1] << 8);
194
195verbose("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
196
197if (++acpi_cpu_count == 32) return;
198}
199}
200}
201// DBG("end finding cpu names: cpu names found: %d\n", acpi_cpu_count);
202}
203
204struct acpi_2_ssdt *generate_cst_ssdt(struct acpi_2_fadt* fadt)
205{
206char ssdt_header[] =
207{
2080x53, 0x53, 0x44, 0x54, 0xE7, 0x00, 0x00, 0x00, /* SSDT.... */
2090x01, 0x17, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x41, /* ..PmRefA */
2100x43, 0x70, 0x75, 0x43, 0x73, 0x74, 0x00, 0x00, /* CpuCst.. */
2110x00, 0x10, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* ....INTL */
2120x31, 0x03, 0x10, 0x20/* 1.._*/
213};
214
215char resource_template_register_fixedhw[] =
216{
2170x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
2180x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2190x00, 0x00, 0x01, 0x79, 0x00
220};
221
222char resource_template_register_systemio[] =
223{
2240x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
2250x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
2260x00, 0x00, 0x00, 0x79, 0x00,
227};
228
229if (Platform.CPU.Vendor != 0x756E6547) {
230verbose ("Not an Intel platform: C-States will not be generated !!!\n");
231return NULL;
232}
233
234if (fadt == NULL) {
235verbose ("FACP not exists: C-States will not be generated !!!\n");
236return NULL;
237}
238
239struct acpi_2_dsdt* dsdt = (void*)fadt->DSDT;
240
241if (dsdt == NULL) {
242verbose ("DSDT not found: C-States will not be generated !!!\n");
243return NULL;
244}
245
246if (acpi_cpu_count == 0)
247get_acpi_cpu_names((void*)dsdt, dsdt->Length);
248
249if (acpi_cpu_count > 0)
250{
251bool c2_enabled = false;
252bool c3_enabled = false;
253bool c4_enabled = false;
254bool cst_using_systemio = false;
255
256getBoolForKey(kEnableC2State, &c2_enabled, &bootInfo->chameleonConfig);
257getBoolForKey(kEnableC3State, &c3_enabled, &bootInfo->chameleonConfig);
258getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->chameleonConfig);
259getBoolForKey(kCSTUsingSystemIO, &cst_using_systemio, &bootInfo->chameleonConfig);
260
261c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
262c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
263
264unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + (c3_enabled ? 1 : 0);
265
266struct aml_chunk* root = aml_create_node(NULL);
267aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
268struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
269struct aml_chunk* name = aml_add_name(scop, "CST_");
270struct aml_chunk* pack = aml_add_package(name);
271aml_add_byte(pack, cstates_count);
272
273struct aml_chunk* tmpl = aml_add_package(pack);
274if (cst_using_systemio)
275{
276// C1
277resource_template_register_fixedhw[8] = 0x00;
278resource_template_register_fixedhw[9] = 0x00;
279resource_template_register_fixedhw[18] = 0x00;
280aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
281aml_add_byte(tmpl, 0x01); // C1
282aml_add_word(tmpl, 0x0001); // Latency
283aml_add_dword(tmpl, 0x000003e8); // Power
284
285uint8_t p_blk_lo, p_blk_hi;
286
287if (c2_enabled) // C2
288{
289p_blk_lo = acpi_cpu_p_blk + 4;
290p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
291
292tmpl = aml_add_package(pack);
293resource_template_register_systemio[11] = p_blk_lo; // C2
294resource_template_register_systemio[12] = p_blk_hi; // C2
295aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
296aml_add_byte(tmpl, 0x02); // C2
297aml_add_word(tmpl, 0x0040); // Latency
298aml_add_dword(tmpl, 0x000001f4); // Power
299}
300
301if (c4_enabled) // C4
302{
303p_blk_lo = acpi_cpu_p_blk + 5;
304p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
305
306tmpl = aml_add_package(pack);
307resource_template_register_systemio[11] = p_blk_lo; // C4
308resource_template_register_systemio[12] = p_blk_hi; // C4
309aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
310aml_add_byte(tmpl, 0x04); // C4
311aml_add_word(tmpl, 0x0080); // Latency
312aml_add_dword(tmpl, 0x000000C8); // Power
313}
314else if (c3_enabled) // C3
315{
316p_blk_lo = acpi_cpu_p_blk + 5;
317p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
318
319tmpl = aml_add_package(pack);
320resource_template_register_systemio[11] = p_blk_lo; // C3
321resource_template_register_systemio[12] = p_blk_hi; // C3
322aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
323aml_add_byte(tmpl, 0x03);// C3
324aml_add_word(tmpl, 0x0060);// Latency
325aml_add_dword(tmpl, 0x0000015e);// Power
326}
327}
328else
329{
330// C1
331resource_template_register_fixedhw[11] = 0x00; // C1
332aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
333aml_add_byte(tmpl, 0x01);// C1
334aml_add_word(tmpl, 0x0001);// Latency
335aml_add_dword(tmpl, 0x000003e8);// Power
336
337resource_template_register_fixedhw[18] = 0x03;
338
339if (c2_enabled) // C2
340{
341tmpl = aml_add_package(pack);
342resource_template_register_fixedhw[11] = 0x10; // C2
343aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
344aml_add_byte(tmpl, 0x02);// C2
345aml_add_word(tmpl, 0x0040);// Latency
346aml_add_dword(tmpl, 0x000001f4);// Power
347}
348
349if (c4_enabled) // C4
350{
351tmpl = aml_add_package(pack);
352resource_template_register_fixedhw[11] = 0x30; // C4
353aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
354aml_add_byte(tmpl, 0x04);// C4
355aml_add_word(tmpl, 0x0080);// Latency
356aml_add_dword(tmpl, 0x000000C8);// Power
357}
358else if (c3_enabled)
359{
360tmpl = aml_add_package(pack);
361resource_template_register_fixedhw[11] = 0x20; // C3
362aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
363aml_add_byte(tmpl, 0x03);// C3
364aml_add_word(tmpl, 0x0060);// Latency
365aml_add_dword(tmpl, 0x0000015e);// Power
366}
367}
368
369// Aliaces
370int i;
371for (i = 0; i < acpi_cpu_count; i++)
372{
373char name[9];
374sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
375
376scop = aml_add_scope(root, name);
377aml_add_alias(scop, "CST_", "_CST");
378}
379
380aml_calculate_size(root);
381
382struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
383
384aml_write_node(root, (void*)ssdt, 0);
385
386ssdt->Length = root->Size;
387ssdt->Checksum = 0;
388ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
389
390aml_destroy_node(root);
391
392// dumpPhysAddr("C-States SSDT content: ", ssdt, ssdt->Length);
393
394verbose ("SSDT with CPU C-States generated successfully\n");
395
396return ssdt;
397}
398else
399{
400verbose ("ACPI CPUs not found: C-States not generated !!!\n");
401}
402
403return NULL;
404}
405
406struct acpi_2_ssdt *generate_pss_ssdt(struct acpi_2_dsdt* dsdt)
407{
408char ssdt_header[] =
409{
4100x53, 0x53, 0x44, 0x54, 0x7E, 0x00, 0x00, 0x00, /* SSDT.... */
4110x01, 0x6A, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x00, /* ..PmRef. */
4120x43, 0x70, 0x75, 0x50, 0x6D, 0x00, 0x00, 0x00, /* CpuPm... */
4130x00, 0x30, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* .0..INTL */
4140x31, 0x03, 0x10, 0x20,/* 1.._*/
415};
416
417if (Platform.CPU.Vendor != 0x756E6547) {
418verbose ("Not an Intel platform: P-States will not be generated !!!\n");
419return NULL;
420}
421
422if (!(Platform.CPU.Features & CPU_FEATURE_MSR)) {
423verbose ("Unsupported CPU: P-States will not be generated !!! No MSR support\n");
424return NULL;
425}
426
427if (acpi_cpu_count == 0)
428get_acpi_cpu_names((void*)dsdt, dsdt->Length);
429
430if (acpi_cpu_count > 0)
431{
432struct p_state initial, maximum, minimum, p_states[32];
433uint8_t p_states_count = 0;
434
435// Retrieving P-States, ported from code by superhai (c)
436switch (Platform.CPU.Family) {
437case 0x06:
438{
439switch (Platform.CPU.Model)
440{
441case CPU_MODEL_DOTHAN:// Intel Pentium M
442case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
443case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
444case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
445case CPU_MODEL_ATOM:// Intel Atom (45nm)
446{
447bool cpu_dynamic_fsb = false;
448
449if (rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 27))
450{
451wrmsr64(MSR_IA32_EXT_CONFIG, (rdmsr64(MSR_IA32_EXT_CONFIG) | (1 << 28)));
452delay(1);
453cpu_dynamic_fsb = rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 28);
454}
455
456bool cpu_noninteger_bus_ratio = (rdmsr64(MSR_IA32_PERF_STATUS) & (1ULL << 46));
457
458initial.Control = rdmsr64(MSR_IA32_PERF_STATUS);
459
460maximum.Control = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 32) & 0x1F3F) | (0x4000 * cpu_noninteger_bus_ratio);
461maximum.CID = ((maximum.FID & 0x1F) << 1) | cpu_noninteger_bus_ratio;
462
463minimum.FID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 24) & 0x1F) | (0x80 * cpu_dynamic_fsb);
464minimum.VID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 48) & 0x3F);
465
466if (minimum.FID == 0)
467{
468uint64_t msr;
469uint8_t i;
470// Probe for lowest fid
471for (i = maximum.FID; i >= 0x6; i--)
472{
473msr = rdmsr64(MSR_IA32_PERF_CONTROL);
474wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (i << 8) | minimum.VID);
475intel_waitforsts();
476minimum.FID = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0x1F;
477delay(1);
478}
479
480msr = rdmsr64(MSR_IA32_PERF_CONTROL);
481wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
482intel_waitforsts();
483}
484
485if (minimum.VID == maximum.VID)
486{
487uint64_t msr;
488uint8_t i;
489// Probe for lowest vid
490for (i = maximum.VID; i > 0xA; i--)
491{
492msr = rdmsr64(MSR_IA32_PERF_CONTROL);
493wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (minimum.FID << 8) | i);
494intel_waitforsts();
495minimum.VID = rdmsr64(MSR_IA32_PERF_STATUS) & 0x3F;
496delay(1);
497}
498
499msr = rdmsr64(MSR_IA32_PERF_CONTROL);
500wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
501intel_waitforsts();
502}
503
504minimum.CID = ((minimum.FID & 0x1F) << 1) >> cpu_dynamic_fsb;
505
506// Sanity check
507if (maximum.CID < minimum.CID)
508{
509DBG("P-States: Insane FID values!");
510p_states_count = 0;
511}
512else
513{
514// Finalize P-States
515// Find how many P-States machine supports
516p_states_count = maximum.CID - minimum.CID + 1;
517
518if (p_states_count > 32)
519p_states_count = 32;
520
521uint8_t vidstep;
522uint8_t i = 0, u, invalid = 0;
523
524vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);
525
526for (u = 0; u < p_states_count; u++)
527{
528i = u - invalid;
529
530p_states[i].CID = maximum.CID - u;
531p_states[i].FID = (p_states[i].CID >> 1);
532
533if (p_states[i].FID < 0x6)
534{
535if (cpu_dynamic_fsb)
536p_states[i].FID = (p_states[i].FID << 1) | 0x80;
537}
538else if (cpu_noninteger_bus_ratio)
539{
540p_states[i].FID = p_states[i].FID | (0x40 * (p_states[i].CID & 0x1));
541}
542
543if (i && p_states[i].FID == p_states[i-1].FID)
544invalid++;
545
546p_states[i].VID = ((maximum.VID << 2) - (vidstep * u)) >> 2;
547
548uint32_t multiplier = p_states[i].FID & 0x1f;// = 0x08
549bool half = p_states[i].FID & 0x40;// = 0x01
550bool dfsb = p_states[i].FID & 0x80;// = 0x00
551uint32_t fsb = Platform.CPU.FSBFrequency / 1000000; // = 400
552uint32_t halffsb = (fsb + 1) >> 1;// = 200
553uint32_t frequency = (multiplier * fsb);// = 3200
554
555p_states[i].Frequency = (frequency + (half * halffsb)) >> dfsb;// = 3200 + 200 = 3400
556}
557
558p_states_count -= invalid;
559}
560
561break;
562}
563case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
564case CPU_MODEL_DALES:
565case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
566case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
567case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
568case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
569case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
570case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
571case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
572case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
573{
574 if ((Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_JAKETOWN))
575 {
576 maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;
577 } else {
578 maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff;
579 }
580 minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
581
582verbose("P-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);
583
584// Sanity check
585if (maximum.Control < minimum.Control)
586{
587DBG("Insane control values!");
588p_states_count = 0;
589}
590else
591{
592uint8_t i;
593p_states_count = 0;
594
595for (i = maximum.Control; i >= minimum.Control; i--)
596{
597p_states[p_states_count].Control = i;
598p_states[p_states_count].CID = p_states[p_states_count].Control << 1;
599p_states[p_states_count].Frequency = (Platform.CPU.FSBFrequency / 1000000) * i;
600p_states_count++;
601}
602}
603
604break;
605}
606default:
607verbose ("Unsupported CPU: P-States not generated !!! Unknown CPU Type\n");
608break;
609}
610}
611}
612
613// Generating SSDT
614if (p_states_count > 0)
615{
616int i;
617
618struct aml_chunk* root = aml_create_node(NULL);
619aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
620struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
621struct aml_chunk* name = aml_add_name(scop, "PSS_");
622struct aml_chunk* pack = aml_add_package(name);
623
624for (i = 0; i < p_states_count; i++)
625{
626struct aml_chunk* pstt = aml_add_package(pack);
627
628aml_add_dword(pstt, p_states[i].Frequency);
629aml_add_dword(pstt, 0x00000000); // Power
630aml_add_dword(pstt, 0x0000000A); // Latency
631aml_add_dword(pstt, 0x0000000A); // Latency
632aml_add_dword(pstt, p_states[i].Control);
633aml_add_dword(pstt, i+1); // Status
634}
635
636// Add aliaces
637for (i = 0; i < acpi_cpu_count; i++)
638{
639char name[9];
640sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
641
642scop = aml_add_scope(root, name);
643aml_add_alias(scop, "PSS_", "_PSS");
644}
645
646aml_calculate_size(root);
647
648struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
649
650aml_write_node(root, (void*)ssdt, 0);
651
652ssdt->Length = root->Size;
653ssdt->Checksum = 0;
654ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
655
656aml_destroy_node(root);
657
658//dumpPhysAddr("P-States SSDT content: ", ssdt, ssdt->Length);
659
660verbose ("SSDT with CPU P-States generated successfully\n");
661
662return ssdt;
663}
664}
665else
666{
667verbose ("ACPI CPUs not found: P-States not generated !!!\n");
668}
669
670return NULL;
671}
672
673struct acpi_2_fadt *patch_fadt(struct acpi_2_fadt *fadt, struct acpi_2_dsdt *new_dsdt)
674{
675extern void setupSystemType();
676
677struct acpi_2_fadt *fadt_mod;
678bool fadt_rev2_needed = false;
679bool fix_restart;
680bool fix_restart_ps2;
681const char * value;
682
683// Restart Fix
684if (Platform.CPU.Vendor == 0x756E6547) {/* Intel */
685fix_restart = true;
686fix_restart_ps2 = false;
687if ( getBoolForKey(kPS2RestartFix, &fix_restart_ps2, &bootInfo->chameleonConfig) && fix_restart_ps2)
688fix_restart = true;
689else
690getBoolForKey(kRestartFix, &fix_restart, &bootInfo->chameleonConfig);
691}
692else
693{
694verbose ("Not an Intel platform: Restart Fix not applied !!!\n");
695fix_restart = false;
696}
697
698if (fix_restart) fadt_rev2_needed = true;
699
700// Allocate new fadt table
701if (fadt->Length < 0x84 && fadt_rev2_needed)
702{
703fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(0x84);
704memcpy(fadt_mod, fadt, fadt->Length);
705fadt_mod->Length = 0x84;
706fadt_mod->Revision = 0x02; // FADT rev 2 (ACPI 1.0B MS extensions)
707}
708else
709{
710fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(fadt->Length);
711memcpy(fadt_mod, fadt, fadt->Length);
712}
713// Determine system type / PM_Model
714if ( (value=getStringForKey(kSystemType, &bootInfo->chameleonConfig))!=NULL)
715{
716if (Platform.Type > 6)
717{
718if(fadt_mod->PM_Profile<=6)
719Platform.Type = fadt_mod->PM_Profile; // get the fadt if correct
720else
721Platform.Type = 1;/* Set a fixed value (Desktop) */
722verbose("Error: system-type must be 0..6. Defaulting to %d !\n", Platform.Type);
723}
724else
725Platform.Type = (unsigned char) strtoul(value, NULL, 10);
726}
727// Set PM_Profile from System-type if only user wanted this value to be forced
728if (fadt_mod->PM_Profile != Platform.Type)
729{
730 if (value)
731 { // user has overriden the SystemType so take care of it in FACP
732verbose("FADT: changing PM_Profile from 0x%02x to 0x%02x\n", fadt_mod->PM_Profile, Platform.Type);
733fadt_mod->PM_Profile = Platform.Type;
734 }
735 else
736 { // PM_Profile has a different value and no override has been set, so reflect the user value to ioregs
737 Platform.Type = fadt_mod->PM_Profile <= 6 ? fadt_mod->PM_Profile : 1;
738 }
739}
740// We now have to write the systemm-type in ioregs: we cannot do it before in setupDeviceTree()
741// because we need to take care of facp original content, if it is correct.
742setupSystemType();
743
744// Patch FADT to fix restart
745if (fix_restart)
746{
747if (fix_restart_ps2)
748{
749fadt_mod->Flags|= 0x400;
750fadt_mod->Reset_SpaceID= 0x01; // System I/O
751fadt_mod->Reset_BitWidth= 0x08; // 1 byte
752fadt_mod->Reset_BitOffset= 0x00; // Offset 0
753fadt_mod->Reset_AccessWidth= 0x01; // Byte access
754fadt_mod->Reset_Address= 0x64; // Address of the register
755fadt_mod->Reset_Value= 0xfe; // Value to write to reset the system
756msglog("FADT: PS2 Restart Fix applied!\n");
757}
758else
759{
760fadt_mod->Flags|= 0x400;
761fadt_mod->Reset_SpaceID= 0x01; // System I/O
762fadt_mod->Reset_BitWidth= 0x08; // 1 byte
763fadt_mod->Reset_BitOffset= 0x00; // Offset 0
764fadt_mod->Reset_AccessWidth= 0x01; // Byte access
765fadt_mod->Reset_Address= 0x0cf9; // Address of the register
766fadt_mod->Reset_Value= 0x06; // Value to write to reset the system
767verbose("FADT: Restart Fix applied !\n");
768}
769
770}
771
772// Patch DSDT Address if we have loaded DSDT.aml
773if(new_dsdt)
774{
775DBG("DSDT: Old @%x,%x, ",fadt_mod->DSDT,fadt_mod->X_DSDT);
776
777fadt_mod->DSDT=(uint32_t)new_dsdt;
778if ((uint32_t)(&(fadt_mod->X_DSDT))-(uint32_t)fadt_mod+8<=fadt_mod->Length)
779fadt_mod->X_DSDT=(uint32_t)new_dsdt;
780
781DBG("New @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);
782
783verbose("FADT: Using custom DSDT!\n");
784}
785
786// Correct the checksum
787fadt_mod->Checksum=0;
788fadt_mod->Checksum=256-checksum8(fadt_mod,fadt_mod->Length);
789
790return fadt_mod;
791}
792
793/* Setup ACPI without replacing DSDT. */
794int setupAcpiNoMod()
795{
796//addConfigurationTable(&gEfiAcpiTableGuid, getAddressOfAcpiTable(), "ACPI");
797//addConfigurationTable(&gEfiAcpi20TableGuid, getAddressOfAcpi20Table(), "ACPI_20");
798/* XXX aserebln why uint32 cast if pointer is uint64 ? */
799acpi10_p = (uint32_t)getAddressOfAcpiTable();
800acpi20_p = (uint32_t)getAddressOfAcpi20Table();
801addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
802if(acpi20_p) addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
803return 1;
804}
805
806/* Setup ACPI. Replace DSDT if DSDT.aml is found */
807int setupAcpi(void)
808{
809int version;
810void *new_dsdt;
811
812const char *filename;
813char dirSpec[128];
814int len = 0;
815
816// always reset cpu count to 0 when injecting new acpi
817acpi_cpu_count = 0;
818
819// Try using the file specified with the DSDT option
820if (getValueForKey(kDSDT, &filename, &len, &bootInfo->chameleonConfig))
821{
822sprintf(dirSpec, filename);
823}
824else
825{
826sprintf(dirSpec, "DSDT.aml");
827}
828
829// Load replacement DSDT
830new_dsdt = loadACPITable(dirSpec);
831// Mozodojo: going to patch FACP and load SSDT's even if DSDT.aml is not present
832/*if (!new_dsdt)
833 {
834 return setupAcpiNoMod();
835 }*/
836
837// Mozodojo: Load additional SSDTs
838struct acpi_2_ssdt *new_ssdt[32]; // 30 + 2 additional tables for pss & cst
839int ssdt_count=0;
840
841// SSDT Options
842bool drop_ssdt=false, generate_pstates=false, generate_cstates=false;
843
844getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);
845getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);
846getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->chameleonConfig);
847
848// DBG("generating p-states config: %d\n", generate_pstates);
849// DBG("generating c-states config: %d\n", generate_cstates);
850
851{
852int i;
853
854for (i=0; i<30; i++)
855{
856char filename[512];
857
858sprintf(filename, i>0?"SSDT-%d.aml":"SSDT.aml", i);
859
860if ( (new_ssdt[ssdt_count] = loadACPITable(filename)) )
861{
862ssdt_count++;
863}
864else
865{
866break;
867}
868}
869}
870
871// Do the same procedure for both versions of ACPI
872for (version=0; version<2; version++) {
873struct acpi_2_rsdp *rsdp, *rsdp_mod;
874struct acpi_2_rsdt *rsdt, *rsdt_mod;
875int rsdplength;
876
877// Find original rsdp
878rsdp=(struct acpi_2_rsdp *)(version?getAddressOfAcpi20Table():getAddressOfAcpiTable());
879if (!rsdp)
880{
881DBG("No ACPI version %d found. Ignoring\n", version+1);
882if (version)
883addConfigurationTable(&gEfiAcpi20TableGuid, NULL, "ACPI_20");
884else
885addConfigurationTable(&gEfiAcpiTableGuid, NULL, "ACPI");
886continue;
887}
888rsdplength=version?rsdp->Length:20;
889
890DBG("RSDP version %d found @%x. Length=%d\n",version+1,rsdp,rsdplength);
891
892/* FIXME: no check that memory allocation succeeded
893 * Copy and patch RSDP,RSDT, XSDT and FADT
894 * For more info see ACPI Specification pages 110 and following
895 */
896
897rsdp_mod=(struct acpi_2_rsdp *) AllocateKernelMemory(rsdplength);
898memcpy(rsdp_mod, rsdp, rsdplength);
899
900rsdt=(struct acpi_2_rsdt *)(rsdp->RsdtAddress);
901
902DBG("RSDT @%x, Length %d\n",rsdt, rsdt->Length);
903
904if (rsdt && (uint32_t)rsdt !=0xffffffff && rsdt->Length<0x10000)
905{
906uint32_t *rsdt_entries;
907int rsdt_entries_num;
908int dropoffset=0, i;
909
910// mozo: using malloc cos I didn't found how to free already allocated kernel memory
911rsdt_mod=(struct acpi_2_rsdt *)malloc(rsdt->Length);
912memcpy (rsdt_mod, rsdt, rsdt->Length);
913rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
914rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
915rsdt_entries=(uint32_t *)(rsdt_mod+1);
916for (i=0;i<rsdt_entries_num;i++)
917{
918char *table=(char *)(rsdt_entries[i]);
919if (!table)
920continue;
921
922DBG("TABLE %c%c%c%c,",table[0],table[1],table[2],table[3]);
923
924rsdt_entries[i-dropoffset]=rsdt_entries[i];
925
926if (drop_ssdt && tableSign(table, "SSDT"))
927{
928dropoffset++;
929continue;
930}
931if (tableSign(table, "DSDT"))
932{
933DBG("DSDT found\n");
934
935if(new_dsdt)
936rsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
937
938continue;
939}
940if (tableSign(table, "FACP"))
941{
942struct acpi_2_fadt *fadt, *fadt_mod;
943fadt=(struct acpi_2_fadt *)rsdt_entries[i];
944
945DBG("FADT found @%x, Length %d\n",fadt, fadt->Length);
946
947if (!fadt || (uint32_t)fadt == 0xffffffff || fadt->Length>0x10000)
948{
949printf("FADT incorrect. Not modified\n");
950continue;
951}
952
953fadt_mod = patch_fadt(fadt, new_dsdt);
954rsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
955
956// Generate _CST SSDT
957if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
958{
959// DBG("c-states generated\n");
960generate_cstates = false; // Generate SSDT only once!
961ssdt_count++;
962}
963
964// Generating _PSS SSDT
965if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
966{
967// DBG("p-states generated\n");
968generate_pstates = false; // Generate SSDT only once!
969ssdt_count++;
970}
971
972continue;
973}
974}
975DBG("\n");
976
977// Allocate rsdt in Kernel memory area
978rsdt_mod->Length += 4*ssdt_count - 4*dropoffset;
979struct acpi_2_rsdt *rsdt_copy = (struct acpi_2_rsdt *)AllocateKernelMemory(rsdt_mod->Length);
980memcpy (rsdt_copy, rsdt_mod, rsdt_mod->Length);
981free(rsdt_mod); rsdt_mod = rsdt_copy;
982rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
983rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
984rsdt_entries=(uint32_t *)(rsdt_mod+1);
985
986// Mozodojo: Insert additional SSDTs into RSDT
987if(ssdt_count>0)
988{
989int j;
990
991for (j=0; j<ssdt_count; j++)
992rsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
993
994verbose("RSDT: Added %d SSDT table(s)\n", ssdt_count);
995
996}
997
998// Correct the checksum of RSDT
999DBG("RSDT: Original checksum %d, ", rsdt_mod->Checksum);
1000
1001rsdt_mod->Checksum=0;
1002rsdt_mod->Checksum=256-checksum8(rsdt_mod,rsdt_mod->Length);
1003
1004DBG("New checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);
1005}
1006else
1007{
1008rsdp_mod->RsdtAddress=0;
1009printf("RSDT not found or incorrect\n");
1010}
1011
1012if (version)
1013{
1014struct acpi_2_xsdt *xsdt, *xsdt_mod;
1015
1016// FIXME: handle 64-bit address correctly
1017
1018xsdt=(struct acpi_2_xsdt*) ((uint32_t)rsdp->XsdtAddress);
1019DBG("XSDT @%x;%x, Length=%d\n", (uint32_t)(rsdp->XsdtAddress>>32),(uint32_t)rsdp->XsdtAddress,
1020xsdt->Length);
1021if (xsdt && (uint64_t)rsdp->XsdtAddress<0xffffffff && xsdt->Length<0x10000)
1022{
1023uint64_t *xsdt_entries;
1024int xsdt_entries_num, i;
1025int dropoffset=0;
1026
1027// mozo: using malloc cos I didn't found how to free already allocated kernel memory
1028xsdt_mod=(struct acpi_2_xsdt*)malloc(xsdt->Length);
1029memcpy(xsdt_mod, xsdt, xsdt->Length);
1030
1031rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1032xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1033xsdt_entries=(uint64_t *)(xsdt_mod+1);
1034for (i=0;i<xsdt_entries_num;i++)
1035{
1036char *table=(char *)((uint32_t)(xsdt_entries[i]));
1037if (!table)
1038continue;
1039xsdt_entries[i-dropoffset]=xsdt_entries[i];
1040if (drop_ssdt && tableSign(table, "SSDT"))
1041{
1042dropoffset++;
1043continue;
1044}
1045if (tableSign(table, "DSDT"))
1046{
1047DBG("DSDT found\n");
1048
1049if (new_dsdt)
1050xsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
1051
1052DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1053
1054continue;
1055}
1056if (tableSign(table, "FACP"))
1057{
1058struct acpi_2_fadt *fadt, *fadt_mod;
1059fadt=(struct acpi_2_fadt *)(uint32_t)xsdt_entries[i];
1060
1061DBG("FADT found @%x,%x, Length %d\n",(uint32_t)(xsdt_entries[i]>>32),fadt,
1062fadt->Length);
1063
1064if (!fadt || (uint64_t)xsdt_entries[i] >= 0xffffffff || fadt->Length>0x10000)
1065{
1066verbose("FADT incorrect or after 4GB. Dropping XSDT\n");
1067goto drop_xsdt;
1068}
1069
1070fadt_mod = patch_fadt(fadt, new_dsdt);
1071xsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
1072
1073DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1074
1075// Generate _CST SSDT
1076if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
1077{
1078generate_cstates = false; // Generate SSDT only once!
1079ssdt_count++;
1080}
1081
1082// Generating _PSS SSDT
1083if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
1084{
1085generate_pstates = false; // Generate SSDT only once!
1086ssdt_count++;
1087}
1088
1089continue;
1090}
1091
1092DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1093
1094}
1095
1096// Allocate xsdt in Kernel memory area
1097xsdt_mod->Length += 8*ssdt_count - 8*dropoffset;
1098struct acpi_2_xsdt *xsdt_copy = (struct acpi_2_xsdt *)AllocateKernelMemory(xsdt_mod->Length);
1099memcpy(xsdt_copy, xsdt_mod, xsdt_mod->Length);
1100free(xsdt_mod); xsdt_mod = xsdt_copy;
1101rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1102xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1103xsdt_entries=(uint64_t *)(xsdt_mod+1);
1104
1105// Mozodojo: Insert additional SSDTs into XSDT
1106if(ssdt_count>0)
1107{
1108int j;
1109
1110for (j=0; j<ssdt_count; j++)
1111xsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
1112
1113verbose("Added %d SSDT table(s) into XSDT\n", ssdt_count);
1114
1115}
1116
1117// Correct the checksum of XSDT
1118xsdt_mod->Checksum=0;
1119xsdt_mod->Checksum=256-checksum8(xsdt_mod,xsdt_mod->Length);
1120}
1121else
1122{
1123drop_xsdt:
1124
1125DBG("About to drop XSDT\n");
1126
1127/*FIXME: Now we just hope that if MacOS doesn't find XSDT it reverts to RSDT.
1128 * A Better strategy would be to generate
1129 */
1130
1131rsdp_mod->XsdtAddress=0xffffffffffffffffLL;
1132verbose("XSDT not found or incorrect\n");
1133}
1134}
1135
1136// Correct the checksum of RSDP
1137
1138DBG("RSDP: Original checksum %d, ", rsdp_mod->Checksum);
1139
1140rsdp_mod->Checksum=0;
1141rsdp_mod->Checksum=256-checksum8(rsdp_mod,20);
1142
1143DBG("New checksum %d\n", rsdp_mod->Checksum);
1144
1145if (version)
1146{
1147DBG("RSDP: Original extended checksum %d", rsdp_mod->ExtendedChecksum);
1148
1149rsdp_mod->ExtendedChecksum=0;
1150rsdp_mod->ExtendedChecksum=256-checksum8(rsdp_mod,rsdp_mod->Length);
1151
1152DBG("New extended checksum %d\n", rsdp_mod->ExtendedChecksum);
1153
1154}
1155
1156//verbose("Patched ACPI version %d DSDT\n", version+1);
1157if (version)
1158{
1159/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1160acpi20_p = (uint32_t)rsdp_mod;
1161addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
1162}
1163else
1164{
1165/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1166acpi10_p = (uint32_t)rsdp_mod;
1167addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
1168}
1169}
1170#if DEBUG_ACPI
1171printf("Press a key to continue... (DEBUG_ACPI)\n");
1172getchar();
1173#endif
1174return 1;
1175}
1176

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Revision: 1996