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1/*
2 * Copyright 2008 mackerintel
3 */
4
5#include "libsaio.h"
6#include "boot.h"
7#include "bootstruct.h"
8#include "acpi.h"
9#include "efi_tables.h"
10#include "fake_efi.h"
11#include "acpi_patcher.h"
12#include "platform.h"
13#include "cpu.h"
14#include "aml_generator.h"
15
16#ifndef DEBUG_ACPI
17#define DEBUG_ACPI 0
18#endif
19
20#if DEBUG_ACPI==2
21#define DBG(x...) {printf(x); sleep(1);}
22#elif DEBUG_ACPI==1
23#define DBG(x...) printf(x)
24#else
25#define DBG(x...)
26#endif
27
28// Slice: New signature compare function
29boolean_t tableSign(char *table, const char *sgn)
30{
31int i;
32for (i=0; i<4; i++)
33{
34if ((table[i] &~0x20) != (sgn[i] &~0x20))
35{
36return false;
37}
38}
39return true;
40}
41
42/* Gets the ACPI 1.0 RSDP address */
43static struct acpi_2_rsdp* getAddressOfAcpiTable()
44{
45 /* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
46
47 void *acpi_addr = (void*)ACPI_RANGE_START;
48 for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
49 {
50 if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
51 {
52 uint8_t csum = checksum8(acpi_addr, 20);
53 if(csum == 0)
54 {
55 // Only return the table if it is a true version 1.0 table (Revision 0)
56 if(((struct acpi_2_rsdp*)acpi_addr)->Revision == 0)
57 return acpi_addr;
58 }
59 }
60 }
61 return NULL;
62}
63
64/* Gets the ACPI 2.0 RSDP address */
65static struct acpi_2_rsdp* getAddressOfAcpi20Table()
66{
67 /* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
68
69 void *acpi_addr = (void*)ACPI_RANGE_START;
70 for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
71 {
72 if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
73 {
74 uint8_t csum = checksum8(acpi_addr, 20);
75
76 /* Only assume this is a 2.0 or better table if the revision is greater than 0
77 * NOTE: ACPI 3.0 spec only seems to say that 1.0 tables have revision 1
78 * and that the current revision is 2.. I am going to assume that rev > 0 is 2.0.
79 */
80
81 if(csum == 0 && (((struct acpi_2_rsdp*)acpi_addr)->Revision > 0))
82 {
83 uint8_t csum2 = checksum8(acpi_addr, sizeof(struct acpi_2_rsdp));
84 if(csum2 == 0)
85 return acpi_addr;
86 }
87 }
88 }
89 return NULL;
90}
91
92/* The folowing ACPI Table search algo. should be reused anywhere needed:*/
93int search_and_get_acpi_fd(const char * filename, const char ** outDirspec)
94{
95int fd = 0;
96char dirSpec[512] = "";
97
98// Try finding 'filename' in the usual places
99// Start searching any potential location for ACPI Table
100sprintf(dirSpec, "%s", filename);
101fd = open(dirSpec, 0);
102if (fd < 0)
103{
104sprintf(dirSpec, "/Extra/%s", filename);
105fd = open(dirSpec, 0);
106if (fd < 0)
107{
108sprintf(dirSpec, "bt(0,0)/Extra/%s", filename);
109fd = open(dirSpec, 0);
110}
111}
112
113if (fd < 0)
114{
115// NOT FOUND:
116verbose("ACPI Table not found: %s\n", filename);
117*dirSpec = '\0';
118}
119
120if (outDirspec) *outDirspec = dirSpec;
121return fd;
122}
123
124void *loadACPITable (const char * filename)
125{
126void *tableAddr;
127const char * dirspec=NULL;
128
129int fd = search_and_get_acpi_fd(filename, &dirspec);
130
131if (fd>=0)
132{
133tableAddr=(void*)AllocateKernelMemory(file_size (fd));
134if (tableAddr)
135{
136if (read (fd, tableAddr, file_size (fd))!=file_size (fd))
137{
138printf("Couldn't read table %s\n",dirspec);
139free (tableAddr);
140close (fd);
141return NULL;
142}
143
144DBG("Table %s read and stored at: %x\n", dirspec, tableAddr);
145close (fd);
146return tableAddr;
147}
148close (fd);
149printf("Couldn't allocate memory for table \n", dirspec);
150}
151//printf("Couldn't find table %s\n", filename);
152return NULL;
153}
154
155uint8_tacpi_cpu_count = 0;
156char* acpi_cpu_name[32];
157uint32_t acpi_cpu_p_blk = 0;
158
159void get_acpi_cpu_names(unsigned char* dsdt, uint32_t length)
160{
161uint32_t i;
162// DBG("start finding cpu names. length %d\n", length);
163for (i=0; i<length-7; i++)
164{
165if (dsdt[i] == 0x5B && dsdt[i+1] == 0x83) // ProcessorOP
166{
167
168// DBG("dsdt: %x%x\n", dsdt[i], dsdt[i+1]);
169
170uint32_t offset = i + 3 + (dsdt[i+2] >> 6);
171
172bool add_name = true;
173
174uint8_t j;
175
176for (j=0; j<4; j++)
177{
178char c = dsdt[offset+j];
179if( c == '\\')
180{
181offset = i + 8 + (dsdt[i+7] >> 6);
182c = dsdt[offset+j];
183}
184
185if (!aml_isvalidchar(c))
186{
187add_name = false;
188verbose("Invalid character found in ProcessorOP 0x%x!\n", c);
189break;
190}
191}
192
193if (add_name)
194{
195acpi_cpu_name[acpi_cpu_count] = malloc(4);
196memcpy(acpi_cpu_name[acpi_cpu_count], dsdt+offset, 4);
197i = offset + 5;
198
199if (acpi_cpu_count == 0)
200{
201verbose("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count]);
202} else {
203verbose("And %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count]);
204}
205
206if (++acpi_cpu_count == 32)
207break;
208}
209}
210}
211DBG("end finding cpu names: cpu names found: %d\n", acpi_cpu_count);
212return;
213}
214
215struct acpi_2_ssdt *generate_cst_ssdt(struct acpi_2_fadt* fadt)
216{
217char ssdt_header[] =
218{
2190x53, 0x53, 0x44, 0x54, 0xE7, 0x00, 0x00, 0x00, /* SSDT.... */
2200x01, 0x17, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x41, /* ..PmRefA */
2210x43, 0x70, 0x75, 0x43, 0x73, 0x74, 0x00, 0x00, /* CpuCst.. */
2220x00, 0x10, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* ....INTL */
2230x31, 0x03, 0x10, 0x20/* 1.._*/
224};
225
226char resource_template_register_fixedhw[] =
227{
2280x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
2290x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2300x00, 0x00, 0x01, 0x79, 0x00
231};
232
233char resource_template_register_systemio[] =
234{
2350x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
2360x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
2370x00, 0x00, 0x00, 0x79, 0x00,
238};
239
240if (Platform.CPU.Vendor != 0x756E6547) {
241verbose ("Not an Intel platform: C-States will not be generated !!!\n");
242return NULL;
243}
244
245if (fadt == NULL) {
246verbose ("FACP not exists: C-States will not be generated !!!\n");
247return NULL;
248}
249
250struct acpi_2_dsdt* dsdt = (void*)fadt->DSDT;
251
252if (dsdt == NULL) {
253verbose ("DSDT not found: C-States will not be generated !!!\n");
254return NULL;
255}
256
257if (acpi_cpu_count == 0)
258get_acpi_cpu_names((void*)dsdt, dsdt->Length);
259
260if (acpi_cpu_count > 0)
261{
262bool c2_enabled = false;
263bool c3_enabled = false;
264bool c4_enabled = false;
265bool cst_using_systemio = false;
266
267getBoolForKey(kEnableC2State, &c2_enabled, &bootInfo->chameleonConfig);
268getBoolForKey(kEnableC3State, &c3_enabled, &bootInfo->chameleonConfig);
269getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->chameleonConfig);
270getBoolForKey(kCSTUsingSystemIO, &cst_using_systemio, &bootInfo->chameleonConfig);
271
272c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
273c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
274
275unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + (c3_enabled ? 1 : 0);
276
277struct aml_chunk* root = aml_create_node(NULL);
278aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
279struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
280struct aml_chunk* name = aml_add_name(scop, "CST_");
281struct aml_chunk* pack = aml_add_package(name);
282aml_add_byte(pack, cstates_count);
283
284struct aml_chunk* tmpl = aml_add_package(pack);
285if (cst_using_systemio)
286{
287// C1
288resource_template_register_fixedhw[8] = 0x00;
289resource_template_register_fixedhw[9] = 0x00;
290resource_template_register_fixedhw[18] = 0x00;
291aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
292aml_add_byte(tmpl, 0x01); // C1
293aml_add_word(tmpl, 0x0001); // Latency
294aml_add_dword(tmpl, 0x000003e8); // Power
295
296uint8_t p_blk_lo, p_blk_hi;
297
298if (c2_enabled) // C2
299{
300p_blk_lo = acpi_cpu_p_blk + 4;
301p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
302
303tmpl = aml_add_package(pack);
304resource_template_register_systemio[11] = p_blk_lo; // C2
305resource_template_register_systemio[12] = p_blk_hi; // C2
306aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
307aml_add_byte(tmpl, 0x02); // C2
308aml_add_word(tmpl, 0x0040); // Latency
309aml_add_dword(tmpl, 0x000001f4); // Power
310}
311
312if (c4_enabled) // C4
313{
314p_blk_lo = acpi_cpu_p_blk + 5;
315p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
316
317tmpl = aml_add_package(pack);
318resource_template_register_systemio[11] = p_blk_lo; // C4
319resource_template_register_systemio[12] = p_blk_hi; // C4
320aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
321aml_add_byte(tmpl, 0x04); // C4
322aml_add_word(tmpl, 0x0080); // Latency
323aml_add_dword(tmpl, 0x000000C8); // Power
324}
325else if (c3_enabled) // C3
326{
327p_blk_lo = acpi_cpu_p_blk + 5;
328p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
329
330tmpl = aml_add_package(pack);
331resource_template_register_systemio[11] = p_blk_lo; // C3
332resource_template_register_systemio[12] = p_blk_hi; // C3
333aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
334aml_add_byte(tmpl, 0x03);// C3
335aml_add_word(tmpl, 0x0060);// Latency
336aml_add_dword(tmpl, 0x0000015e);// Power
337}
338}
339else
340{
341// C1
342resource_template_register_fixedhw[11] = 0x00; // C1
343aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
344aml_add_byte(tmpl, 0x01);// C1
345aml_add_word(tmpl, 0x0001);// Latency
346aml_add_dword(tmpl, 0x000003e8);// Power
347
348resource_template_register_fixedhw[18] = 0x03;
349
350if (c2_enabled) // C2
351{
352tmpl = aml_add_package(pack);
353resource_template_register_fixedhw[11] = 0x10; // C2
354aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
355aml_add_byte(tmpl, 0x02);// C2
356aml_add_word(tmpl, 0x0040);// Latency
357aml_add_dword(tmpl, 0x000001f4);// Power
358}
359
360if (c4_enabled) // C4
361{
362tmpl = aml_add_package(pack);
363resource_template_register_fixedhw[11] = 0x30; // C4
364aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
365aml_add_byte(tmpl, 0x04);// C4
366aml_add_word(tmpl, 0x0080);// Latency
367aml_add_dword(tmpl, 0x000000C8);// Power
368}
369else if (c3_enabled)
370{
371tmpl = aml_add_package(pack);
372resource_template_register_fixedhw[11] = 0x20; // C3
373aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
374aml_add_byte(tmpl, 0x03);// C3
375aml_add_word(tmpl, 0x0060);// Latency
376aml_add_dword(tmpl, 0x0000015e);// Power
377}
378}
379
380// Aliaces
381int i;
382for (i = 0; i < acpi_cpu_count; i++)
383{
384char name[9];
385sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
386
387scop = aml_add_scope(root, name);
388aml_add_alias(scop, "CST_", "_CST");
389}
390
391aml_calculate_size(root);
392
393struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
394
395aml_write_node(root, (void*)ssdt, 0);
396
397ssdt->Length = root->Size;
398ssdt->Checksum = 0;
399ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
400
401aml_destroy_node(root);
402
403// dumpPhysAddr("C-States SSDT content: ", ssdt, ssdt->Length);
404
405verbose ("SSDT with CPU C-States generated successfully\n");
406
407return ssdt;
408}
409else
410{
411verbose ("ACPI CPUs not found: C-States not generated !!!\n");
412}
413
414return NULL;
415}
416
417struct acpi_2_ssdt *generate_pss_ssdt(struct acpi_2_dsdt* dsdt)
418{
419char ssdt_header[] =
420{
4210x53, 0x53, 0x44, 0x54, 0x7E, 0x00, 0x00, 0x00, /* SSDT.... */
4220x01, 0x6A, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x00, /* ..PmRef. */
4230x43, 0x70, 0x75, 0x50, 0x6D, 0x00, 0x00, 0x00, /* CpuPm... */
4240x00, 0x30, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* .0..INTL */
4250x31, 0x03, 0x10, 0x20,/* 1.._*/
426};
427
428if (Platform.CPU.Vendor != 0x756E6547) {
429verbose ("Not an Intel platform: P-States will not be generated !!!\n");
430return NULL;
431}
432
433if (!(Platform.CPU.Features & CPU_FEATURE_MSR)) {
434verbose ("Unsupported CPU: P-States will not be generated !!! No MSR support\n");
435return NULL;
436}
437
438if (acpi_cpu_count == 0)
439get_acpi_cpu_names((void*)dsdt, dsdt->Length);
440
441if (acpi_cpu_count > 0)
442{
443struct p_state initial, maximum, minimum, p_states[32];
444uint8_t p_states_count = 0;
445
446// Retrieving P-States, ported from code by superhai (c)
447switch (Platform.CPU.Family) {
448case 0x06:
449{
450switch (Platform.CPU.Model)
451{
452case CPU_MODEL_DOTHAN:// Intel Pentium M
453case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
454case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
455case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
456case CPU_MODEL_ATOM:// Intel Atom (45nm)
457{
458bool cpu_dynamic_fsb = false;
459
460if (rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 27))
461{
462wrmsr64(MSR_IA32_EXT_CONFIG, (rdmsr64(MSR_IA32_EXT_CONFIG) | (1 << 28)));
463delay(1);
464cpu_dynamic_fsb = rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 28);
465}
466
467bool cpu_noninteger_bus_ratio = (rdmsr64(MSR_IA32_PERF_STATUS) & (1ULL << 46));
468
469initial.Control = rdmsr64(MSR_IA32_PERF_STATUS);
470
471maximum.Control = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 32) & 0x1F3F) | (0x4000 * cpu_noninteger_bus_ratio);
472maximum.CID = ((maximum.FID & 0x1F) << 1) | cpu_noninteger_bus_ratio;
473
474minimum.FID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 24) & 0x1F) | (0x80 * cpu_dynamic_fsb);
475minimum.VID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 48) & 0x3F);
476
477if (minimum.FID == 0)
478{
479uint64_t msr;
480uint8_t i;
481// Probe for lowest fid
482for (i = maximum.FID; i >= 0x6; i--)
483{
484msr = rdmsr64(MSR_IA32_PERF_CONTROL);
485wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (i << 8) | minimum.VID);
486intel_waitforsts();
487minimum.FID = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0x1F;
488delay(1);
489}
490
491msr = rdmsr64(MSR_IA32_PERF_CONTROL);
492wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
493intel_waitforsts();
494}
495
496if (minimum.VID == maximum.VID)
497{
498uint64_t msr;
499uint8_t i;
500// Probe for lowest vid
501for (i = maximum.VID; i > 0xA; i--)
502{
503msr = rdmsr64(MSR_IA32_PERF_CONTROL);
504wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (minimum.FID << 8) | i);
505intel_waitforsts();
506minimum.VID = rdmsr64(MSR_IA32_PERF_STATUS) & 0x3F;
507delay(1);
508}
509
510msr = rdmsr64(MSR_IA32_PERF_CONTROL);
511wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
512intel_waitforsts();
513}
514
515minimum.CID = ((minimum.FID & 0x1F) << 1) >> cpu_dynamic_fsb;
516
517// Sanity check
518if (maximum.CID < minimum.CID)
519{
520DBG("P-States: Insane FID values!");
521p_states_count = 0;
522}
523else
524{
525// Finalize P-States
526// Find how many P-States machine supports
527p_states_count = maximum.CID - minimum.CID + 1;
528
529if (p_states_count > 32)
530p_states_count = 32;
531
532uint8_t vidstep;
533uint8_t i = 0, u, invalid = 0;
534
535vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);
536
537for (u = 0; u < p_states_count; u++)
538{
539i = u - invalid;
540
541p_states[i].CID = maximum.CID - u;
542p_states[i].FID = (p_states[i].CID >> 1);
543
544if (p_states[i].FID < 0x6)
545{
546if (cpu_dynamic_fsb)
547p_states[i].FID = (p_states[i].FID << 1) | 0x80;
548}
549else if (cpu_noninteger_bus_ratio)
550{
551p_states[i].FID = p_states[i].FID | (0x40 * (p_states[i].CID & 0x1));
552}
553
554if (i && p_states[i].FID == p_states[i-1].FID)
555invalid++;
556
557p_states[i].VID = ((maximum.VID << 2) - (vidstep * u)) >> 2;
558
559uint32_t multiplier = p_states[i].FID & 0x1f;// = 0x08
560bool half = p_states[i].FID & 0x40;// = 0x01
561bool dfsb = p_states[i].FID & 0x80;// = 0x00
562uint32_t fsb = Platform.CPU.FSBFrequency / 1000000; // = 400
563uint32_t halffsb = (fsb + 1) >> 1;// = 200
564uint32_t frequency = (multiplier * fsb);// = 3200
565
566p_states[i].Frequency = (frequency + (half * halffsb)) >> dfsb;// = 3200 + 200 = 3400
567}
568
569p_states_count -= invalid;
570}
571
572break;
573}
574case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
575case CPU_MODEL_DALES:
576case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
577case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
578case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
579case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
580case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
581case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
582case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
583case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
584{
585 if ((Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_JAKETOWN))
586 {
587 maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;
588 } else {
589 maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff;
590 }
591 minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
592
593verbose("P-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);
594
595// Sanity check
596if (maximum.Control < minimum.Control)
597{
598DBG("Insane control values!");
599p_states_count = 0;
600}
601else
602{
603uint8_t i;
604p_states_count = 0;
605
606for (i = maximum.Control; i >= minimum.Control; i--)
607{
608p_states[p_states_count].Control = i;
609p_states[p_states_count].CID = p_states[p_states_count].Control << 1;
610p_states[p_states_count].Frequency = (Platform.CPU.FSBFrequency / 1000000) * i;
611p_states_count++;
612}
613}
614
615break;
616}
617default:
618verbose ("Unsupported CPU: P-States not generated !!! Unknown CPU Type\n");
619break;
620}
621}
622}
623
624// Generating SSDT
625if (p_states_count > 0)
626{
627int i;
628
629struct aml_chunk* root = aml_create_node(NULL);
630aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
631struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
632struct aml_chunk* name = aml_add_name(scop, "PSS_");
633struct aml_chunk* pack = aml_add_package(name);
634
635for (i = 0; i < p_states_count; i++)
636{
637struct aml_chunk* pstt = aml_add_package(pack);
638
639aml_add_dword(pstt, p_states[i].Frequency);
640aml_add_dword(pstt, 0x00000000); // Power
641aml_add_dword(pstt, 0x0000000A); // Latency
642aml_add_dword(pstt, 0x0000000A); // Latency
643aml_add_dword(pstt, p_states[i].Control);
644aml_add_dword(pstt, i+1); // Status
645}
646
647// Add aliaces
648for (i = 0; i < acpi_cpu_count; i++)
649{
650char name[9];
651sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
652
653scop = aml_add_scope(root, name);
654aml_add_alias(scop, "PSS_", "_PSS");
655}
656
657aml_calculate_size(root);
658
659struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
660
661aml_write_node(root, (void*)ssdt, 0);
662
663ssdt->Length = root->Size;
664ssdt->Checksum = 0;
665ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
666
667aml_destroy_node(root);
668
669//dumpPhysAddr("P-States SSDT content: ", ssdt, ssdt->Length);
670
671verbose ("SSDT with CPU P-States generated successfully\n");
672
673return ssdt;
674}
675}
676else
677{
678verbose ("ACPI CPUs not found: P-States not generated !!!\n");
679}
680
681return NULL;
682}
683
684struct acpi_2_fadt *patch_fadt(struct acpi_2_fadt *fadt, struct acpi_2_dsdt *new_dsdt)
685{
686extern void setupSystemType();
687
688struct acpi_2_fadt *fadt_mod;
689bool fadt_rev2_needed = false;
690bool fix_restart;
691bool fix_restart_ps2;
692const char * value;
693
694// Restart Fix
695if (Platform.CPU.Vendor == 0x756E6547) {/* Intel */
696fix_restart = true;
697fix_restart_ps2 = false;
698if ( getBoolForKey(kPS2RestartFix, &fix_restart_ps2, &bootInfo->chameleonConfig) && fix_restart_ps2)
699fix_restart = true;
700else
701getBoolForKey(kRestartFix, &fix_restart, &bootInfo->chameleonConfig);
702}
703else
704{
705verbose ("Not an Intel platform: Restart Fix not applied !!!\n");
706fix_restart = false;
707}
708
709if (fix_restart) fadt_rev2_needed = true;
710
711// Allocate new fadt table
712if (fadt->Length < 0x84 && fadt_rev2_needed)
713{
714fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(0x84);
715memcpy(fadt_mod, fadt, fadt->Length);
716fadt_mod->Length = 0x84;
717fadt_mod->Revision = 0x02; // FADT rev 2 (ACPI 1.0B MS extensions)
718}
719else
720{
721fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(fadt->Length);
722memcpy(fadt_mod, fadt, fadt->Length);
723}
724// Determine system type / PM_Model
725if ( (value=getStringForKey(kSystemType, &bootInfo->chameleonConfig))!=NULL)
726{
727if (Platform.Type > 6)
728{
729if(fadt_mod->PM_Profile<=6)
730Platform.Type = fadt_mod->PM_Profile; // get the fadt if correct
731else
732Platform.Type = 1;/* Set a fixed value (Desktop) */
733verbose("Error: system-type must be 0..6. Defaulting to %d !\n", Platform.Type);
734}
735else
736Platform.Type = (unsigned char) strtoul(value, NULL, 10);
737}
738// Set PM_Profile from System-type if only user wanted this value to be forced
739if (fadt_mod->PM_Profile != Platform.Type)
740{
741 if (value)
742 { // user has overriden the SystemType so take care of it in FACP
743verbose("FADT: changing PM_Profile from 0x%02x to 0x%02x\n", fadt_mod->PM_Profile, Platform.Type);
744fadt_mod->PM_Profile = Platform.Type;
745 }
746 else
747 { // PM_Profile has a different value and no override has been set, so reflect the user value to ioregs
748 Platform.Type = fadt_mod->PM_Profile <= 6 ? fadt_mod->PM_Profile : 1;
749 }
750}
751// We now have to write the systemm-type in ioregs: we cannot do it before in setupDeviceTree()
752// because we need to take care of facp original content, if it is correct.
753setupSystemType();
754
755// Patch FADT to fix restart
756if (fix_restart)
757{
758if (fix_restart_ps2)
759{
760fadt_mod->Flags|= 0x400;
761fadt_mod->Reset_SpaceID= 0x01; // System I/O
762fadt_mod->Reset_BitWidth= 0x08; // 1 byte
763fadt_mod->Reset_BitOffset= 0x00; // Offset 0
764fadt_mod->Reset_AccessWidth= 0x01; // Byte access
765fadt_mod->Reset_Address= 0x64; // Address of the register
766fadt_mod->Reset_Value= 0xfe; // Value to write to reset the system
767msglog("FADT: PS2 Restart Fix applied!\n");
768}
769else
770{
771fadt_mod->Flags|= 0x400;
772fadt_mod->Reset_SpaceID= 0x01; // System I/O
773fadt_mod->Reset_BitWidth= 0x08; // 1 byte
774fadt_mod->Reset_BitOffset= 0x00; // Offset 0
775fadt_mod->Reset_AccessWidth= 0x01; // Byte access
776fadt_mod->Reset_Address= 0x0cf9; // Address of the register
777fadt_mod->Reset_Value= 0x06; // Value to write to reset the system
778verbose("FADT: Restart Fix applied !\n");
779}
780
781}
782
783// Patch DSDT Address if we have loaded DSDT.aml
784if(new_dsdt)
785{
786DBG("DSDT: Old @%x,%x, ",fadt_mod->DSDT,fadt_mod->X_DSDT);
787
788fadt_mod->DSDT=(uint32_t)new_dsdt;
789if ((uint32_t)(&(fadt_mod->X_DSDT))-(uint32_t)fadt_mod+8<=fadt_mod->Length)
790fadt_mod->X_DSDT=(uint32_t)new_dsdt;
791
792DBG("New @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);
793
794verbose("FADT: Using custom DSDT!\n");
795}
796
797// Correct the checksum
798fadt_mod->Checksum=0;
799fadt_mod->Checksum=256-checksum8(fadt_mod,fadt_mod->Length);
800
801return fadt_mod;
802}
803
804/* Setup ACPI without replacing DSDT. */
805int setupAcpiNoMod()
806{
807//addConfigurationTable(&gEfiAcpiTableGuid, getAddressOfAcpiTable(), "ACPI");
808//addConfigurationTable(&gEfiAcpi20TableGuid, getAddressOfAcpi20Table(), "ACPI_20");
809/* XXX aserebln why uint32 cast if pointer is uint64 ? */
810acpi10_p = (uint32_t)getAddressOfAcpiTable();
811acpi20_p = (uint32_t)getAddressOfAcpi20Table();
812addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
813if(acpi20_p) addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
814return 1;
815}
816
817/* Setup ACPI. Replace DSDT if DSDT.aml is found */
818int setupAcpi(void)
819{
820int version;
821void *new_dsdt;
822
823const char *filename;
824char dirSpec[128];
825int len = 0;
826
827// always reset cpu count to 0 when injecting new acpi
828acpi_cpu_count = 0;
829
830// Try using the file specified with the DSDT option
831if (getValueForKey(kDSDT, &filename, &len, &bootInfo->chameleonConfig))
832{
833sprintf(dirSpec, filename);
834}
835else
836{
837sprintf(dirSpec, "DSDT.aml");
838}
839
840// Load replacement DSDT
841new_dsdt = loadACPITable(dirSpec);
842// Mozodojo: going to patch FACP and load SSDT's even if DSDT.aml is not present
843/*if (!new_dsdt)
844 {
845 return setupAcpiNoMod();
846 }*/
847
848// Mozodojo: Load additional SSDTs
849struct acpi_2_ssdt *new_ssdt[32]; // 30 + 2 additional tables for pss & cst
850int ssdt_count=0;
851
852// SSDT Options
853bool drop_ssdt=false, generate_pstates=false, generate_cstates=false;
854
855getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);
856getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);
857getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->chameleonConfig);
858
859// DBG("generating p-states config: %d\n", generate_pstates);
860// DBG("generating c-states config: %d\n", generate_cstates);
861
862{
863int i;
864
865for (i=0; i<30; i++)
866{
867char filename[512];
868
869sprintf(filename, i>0?"SSDT-%d.aml":"SSDT.aml", i);
870
871if ( (new_ssdt[ssdt_count] = loadACPITable(filename)) )
872{
873ssdt_count++;
874}
875else
876{
877break;
878}
879}
880}
881
882// Do the same procedure for both versions of ACPI
883for (version=0; version<2; version++) {
884struct acpi_2_rsdp *rsdp, *rsdp_mod;
885struct acpi_2_rsdt *rsdt, *rsdt_mod;
886int rsdplength;
887
888// Find original rsdp
889rsdp=(struct acpi_2_rsdp *)(version?getAddressOfAcpi20Table():getAddressOfAcpiTable());
890if (!rsdp)
891{
892DBG("No ACPI version %d found. Ignoring\n", version+1);
893if (version)
894addConfigurationTable(&gEfiAcpi20TableGuid, NULL, "ACPI_20");
895else
896addConfigurationTable(&gEfiAcpiTableGuid, NULL, "ACPI");
897continue;
898}
899rsdplength=version?rsdp->Length:20;
900
901DBG("RSDP version %d found @%x. Length=%d\n",version+1,rsdp,rsdplength);
902
903/* FIXME: no check that memory allocation succeeded
904 * Copy and patch RSDP,RSDT, XSDT and FADT
905 * For more info see ACPI Specification pages 110 and following
906 */
907
908rsdp_mod=(struct acpi_2_rsdp *) AllocateKernelMemory(rsdplength);
909memcpy(rsdp_mod, rsdp, rsdplength);
910
911rsdt=(struct acpi_2_rsdt *)(rsdp->RsdtAddress);
912
913DBG("RSDT @%x, Length %d\n",rsdt, rsdt->Length);
914
915if (rsdt && (uint32_t)rsdt !=0xffffffff && rsdt->Length<0x10000)
916{
917uint32_t *rsdt_entries;
918int rsdt_entries_num;
919int dropoffset=0, i;
920
921// mozo: using malloc cos I didn't found how to free already allocated kernel memory
922rsdt_mod=(struct acpi_2_rsdt *)malloc(rsdt->Length);
923memcpy (rsdt_mod, rsdt, rsdt->Length);
924rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
925rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
926rsdt_entries=(uint32_t *)(rsdt_mod+1);
927for (i=0;i<rsdt_entries_num;i++)
928{
929char *table=(char *)(rsdt_entries[i]);
930if (!table)
931continue;
932
933DBG("TABLE %c%c%c%c,",table[0],table[1],table[2],table[3]);
934
935rsdt_entries[i-dropoffset]=rsdt_entries[i];
936
937if (drop_ssdt && tableSign(table, "SSDT"))
938{
939dropoffset++;
940continue;
941}
942if (tableSign(table, "DSDT"))
943{
944DBG("DSDT found\n");
945
946if(new_dsdt)
947rsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
948
949continue;
950}
951if (tableSign(table, "FACP"))
952{
953struct acpi_2_fadt *fadt, *fadt_mod;
954fadt=(struct acpi_2_fadt *)rsdt_entries[i];
955
956DBG("FADT found @%x, Length %d\n",fadt, fadt->Length);
957
958if (!fadt || (uint32_t)fadt == 0xffffffff || fadt->Length>0x10000)
959{
960printf("FADT incorrect. Not modified\n");
961continue;
962}
963
964fadt_mod = patch_fadt(fadt, new_dsdt);
965rsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
966
967// Generate _CST SSDT
968if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
969{
970// DBG("c-states generated\n");
971generate_cstates = false; // Generate SSDT only once!
972ssdt_count++;
973}
974
975// Generating _PSS SSDT
976if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
977{
978// DBG("p-states generated\n");
979generate_pstates = false; // Generate SSDT only once!
980ssdt_count++;
981}
982
983continue;
984}
985}
986DBG("\n");
987
988// Allocate rsdt in Kernel memory area
989rsdt_mod->Length += 4*ssdt_count - 4*dropoffset;
990struct acpi_2_rsdt *rsdt_copy = (struct acpi_2_rsdt *)AllocateKernelMemory(rsdt_mod->Length);
991memcpy (rsdt_copy, rsdt_mod, rsdt_mod->Length);
992free(rsdt_mod); rsdt_mod = rsdt_copy;
993rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
994rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
995rsdt_entries=(uint32_t *)(rsdt_mod+1);
996
997// Mozodojo: Insert additional SSDTs into RSDT
998if(ssdt_count>0)
999{
1000int j;
1001
1002for (j=0; j<ssdt_count; j++)
1003rsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
1004
1005verbose("RSDT: Added %d SSDT table(s)\n", ssdt_count);
1006
1007}
1008
1009// Correct the checksum of RSDT
1010DBG("RSDT: Original checksum %d, ", rsdt_mod->Checksum);
1011
1012rsdt_mod->Checksum=0;
1013rsdt_mod->Checksum=256-checksum8(rsdt_mod,rsdt_mod->Length);
1014
1015DBG("New checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);
1016}
1017else
1018{
1019rsdp_mod->RsdtAddress=0;
1020printf("RSDT not found or incorrect\n");
1021}
1022
1023if (version)
1024{
1025struct acpi_2_xsdt *xsdt, *xsdt_mod;
1026
1027// FIXME: handle 64-bit address correctly
1028
1029xsdt=(struct acpi_2_xsdt*) ((uint32_t)rsdp->XsdtAddress);
1030DBG("XSDT @%x;%x, Length=%d\n", (uint32_t)(rsdp->XsdtAddress>>32),(uint32_t)rsdp->XsdtAddress,
1031xsdt->Length);
1032if (xsdt && (uint64_t)rsdp->XsdtAddress<0xffffffff && xsdt->Length<0x10000)
1033{
1034uint64_t *xsdt_entries;
1035int xsdt_entries_num, i;
1036int dropoffset=0;
1037
1038// mozo: using malloc cos I didn't found how to free already allocated kernel memory
1039xsdt_mod=(struct acpi_2_xsdt*)malloc(xsdt->Length);
1040memcpy(xsdt_mod, xsdt, xsdt->Length);
1041
1042rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1043xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1044xsdt_entries=(uint64_t *)(xsdt_mod+1);
1045for (i=0;i<xsdt_entries_num;i++)
1046{
1047char *table=(char *)((uint32_t)(xsdt_entries[i]));
1048if (!table)
1049continue;
1050xsdt_entries[i-dropoffset]=xsdt_entries[i];
1051if (drop_ssdt && tableSign(table, "SSDT"))
1052{
1053dropoffset++;
1054continue;
1055}
1056if (tableSign(table, "DSDT"))
1057{
1058DBG("DSDT found\n");
1059
1060if (new_dsdt)
1061xsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
1062
1063DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1064
1065continue;
1066}
1067if (tableSign(table, "FACP"))
1068{
1069struct acpi_2_fadt *fadt, *fadt_mod;
1070fadt=(struct acpi_2_fadt *)(uint32_t)xsdt_entries[i];
1071
1072DBG("FADT found @%x,%x, Length %d\n",(uint32_t)(xsdt_entries[i]>>32),fadt,
1073fadt->Length);
1074
1075if (!fadt || (uint64_t)xsdt_entries[i] >= 0xffffffff || fadt->Length>0x10000)
1076{
1077verbose("FADT incorrect or after 4GB. Dropping XSDT\n");
1078goto drop_xsdt;
1079}
1080
1081fadt_mod = patch_fadt(fadt, new_dsdt);
1082xsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
1083
1084DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1085
1086// Generate _CST SSDT
1087if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
1088{
1089generate_cstates = false; // Generate SSDT only once!
1090ssdt_count++;
1091}
1092
1093// Generating _PSS SSDT
1094if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
1095{
1096generate_pstates = false; // Generate SSDT only once!
1097ssdt_count++;
1098}
1099
1100continue;
1101}
1102
1103DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1104
1105}
1106
1107// Allocate xsdt in Kernel memory area
1108xsdt_mod->Length += 8*ssdt_count - 8*dropoffset;
1109struct acpi_2_xsdt *xsdt_copy = (struct acpi_2_xsdt *)AllocateKernelMemory(xsdt_mod->Length);
1110memcpy(xsdt_copy, xsdt_mod, xsdt_mod->Length);
1111free(xsdt_mod); xsdt_mod = xsdt_copy;
1112rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1113xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1114xsdt_entries=(uint64_t *)(xsdt_mod+1);
1115
1116// Mozodojo: Insert additional SSDTs into XSDT
1117if(ssdt_count>0)
1118{
1119int j;
1120
1121for (j=0; j<ssdt_count; j++)
1122xsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
1123
1124verbose("Added %d SSDT table(s) into XSDT\n", ssdt_count);
1125
1126}
1127
1128// Correct the checksum of XSDT
1129xsdt_mod->Checksum=0;
1130xsdt_mod->Checksum=256-checksum8(xsdt_mod,xsdt_mod->Length);
1131}
1132else
1133{
1134drop_xsdt:
1135
1136DBG("About to drop XSDT\n");
1137
1138/*FIXME: Now we just hope that if MacOS doesn't find XSDT it reverts to RSDT.
1139 * A Better strategy would be to generate
1140 */
1141
1142rsdp_mod->XsdtAddress=0xffffffffffffffffLL;
1143verbose("XSDT not found or incorrect\n");
1144}
1145}
1146
1147// Correct the checksum of RSDP
1148
1149DBG("RSDP: Original checksum %d, ", rsdp_mod->Checksum);
1150
1151rsdp_mod->Checksum=0;
1152rsdp_mod->Checksum=256-checksum8(rsdp_mod,20);
1153
1154DBG("New checksum %d\n", rsdp_mod->Checksum);
1155
1156if (version)
1157{
1158DBG("RSDP: Original extended checksum %d", rsdp_mod->ExtendedChecksum);
1159
1160rsdp_mod->ExtendedChecksum=0;
1161rsdp_mod->ExtendedChecksum=256-checksum8(rsdp_mod,rsdp_mod->Length);
1162
1163DBG("New extended checksum %d\n", rsdp_mod->ExtendedChecksum);
1164
1165}
1166
1167//verbose("Patched ACPI version %d DSDT\n", version+1);
1168if (version)
1169{
1170/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1171acpi20_p = (uint32_t)rsdp_mod;
1172addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
1173}
1174else
1175{
1176/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1177acpi10_p = (uint32_t)rsdp_mod;
1178addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
1179}
1180}
1181#if DEBUG_ACPI
1182printf("Press a key to continue... (DEBUG_ACPI)\n");
1183getchar();
1184#endif
1185return 1;
1186}
1187

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