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Root/branches/cparm/i386/modules/Memory/spd.c

1/*␊
2 * spd.c - serial presence detect memory information␊
3 *␊
4 * Originally restored from pcefi10.5␊
5 * Dynamic mem detection original impl. by Rekursor␊
6 * System profiler fix and other fixes by Mozodojo.␊
7 */␊
8␊
9#include "libsaio.h"␊
10#include "pci.h"␊
11#include "platform.h"␊
12#include "spd.h"␊
13#include "saio_internal.h"␊
14#include "bootstruct.h"␊
15#include "memvendors.h"␊
16␊
17#ifndef DEBUG_SPD␊
18#define DEBUG_SPD 0␊
19#endif␊
20␊
21#if DEBUG_SPD␊
22#define DBG(x...)␉printf(x)␊
23#include "mem.h"␊
24#else␊
25#define DBG(x...)␊
26#endif␊
27␊
28static const char *spd_memory_types[] =␊
29{␊
30␉"RAM", /* 00h Undefined */␊
31␉"FPM", /* 01h FPM */␊
32␉"EDO", /* 02h EDO */␊
33␉"",␉␉␉␉/* 03h PIPELINE NIBBLE */␊
34␉"SDRAM", /* 04h SDRAM */␊
35␉"",␉␉␉␉/* 05h MULTIPLEXED ROM */␊
36␉"DDR SGRAM",␉/* 06h SGRAM DDR */␊
37␉"DDR SDRAM",␉/* 07h SDRAM DDR */␊
38␉"DDR2 SDRAM", /* 08h SDRAM DDR 2 */␊
39␉"",␉␉␉␉/* 09h Undefined */␊
40␉"",␉␉␉␉/* 0Ah Undefined */␊
41␉"DDR3 SDRAM" /* 0Bh SDRAM DDR 3 */␊
42};␊
43␊
44#define UNKNOWN_MEM_TYPE 2␊
45static uint8_t spd_mem_to_smbios[] =␊
46{␊
47␉UNKNOWN_MEM_TYPE, /* 00h Undefined */␊
48␉UNKNOWN_MEM_TYPE, /* 01h FPM */␊
49␉UNKNOWN_MEM_TYPE, /* 02h EDO */␊
50␉UNKNOWN_MEM_TYPE,␉ /* 03h PIPELINE NIBBLE */␊
51␉SMB_MEM_TYPE_SDRAM, /* 04h SDRAM */␊
52␉SMB_MEM_TYPE_ROM,␉ /* 05h MULTIPLEXED ROM */␊
53␉SMB_MEM_TYPE_SGRAM, /* 06h SGRAM DDR */␊
54␉SMB_MEM_TYPE_DDR, /* 07h SDRAM DDR */␊
55␉SMB_MEM_TYPE_DDR2, /* 08h SDRAM DDR 2 */␊
56␉UNKNOWN_MEM_TYPE, ␉ /* 09h Undefined */␊
57␉UNKNOWN_MEM_TYPE,␉ /* 0Ah Undefined */␊
58␉SMB_MEM_TYPE_DDR3 /* 0Bh SDRAM DDR 3 */␊
59};␊
60//#define SPD_TO_SMBIOS_SIZE (sizeof(spd_mem_to_smbios)/sizeof(uint8_t))␊
61␊
62#define rdtsc(low,high) \␊
63__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))␊
64␊
65#define SMBHSTSTS 0␊
66#define SMBHSTCNT 2␊
67#define SMBHSTCMD 3␊
68#define SMBHSTADD 4␊
69#define SMBHSTDAT 5␊
70//#define SBMBLKDAT 7␊
71␊
72static unsigned char smb_read_byte_intel(uint32_t base, uint8_t adr, uint8_t cmd);␊
73static void init_spd(char * spd, uint32_t base, int slot);␊
74static const char * getVendorName(RamSlotInfo_t* slot, uint32_t base, int slot_num);␊
75static int getDDRspeedMhz(const char * spd);␊
76static const char *getDDRSerial(const char* spd);␊
77static const char * getDDRPartNum(char* spd, uint32_t base, int slot);␊
78static void read_smb_intel(pci_dt_t *smbus_dev);␊
79␊
80␊
81/** Read one byte from the intel i2c, used for reading SPD on intel chipsets only. */␊
82static unsigned char smb_read_byte_intel(uint32_t base, uint8_t adr, uint8_t cmd)␊
83{␊
84 int l1, h1, l2, h2;␊
85 unsigned long long t;␊
86␉␊
87 outb(base + SMBHSTSTS, 0x1f);␉␉␉␉␉// reset SMBus Controller␊
88 outb(base + SMBHSTDAT, 0xff);␊
89␉␊
90 rdtsc(l1, h1);␊
91 ␊
92 uint64_t tsc = get_env(envTSCFreq);␊
93 ␊
94 while ( inb(base + SMBHSTSTS) & 0x01) // wait until read␊
95 { ␊
96␉␉rdtsc(l2, h2);␊
97␉␉t = ((h2 - h1) * 0xffffffff + (l2 - l1)) / (tsc / 100);␊
98␉␉if (t > 5)␊
99␉␉␉return 0xFF; // break␊
100 }␊
101␉␊
102 outb(base + SMBHSTCMD, cmd);␊
103 outb(base + SMBHSTADD, (adr << 1) | 0x01 );␊
104 outb(base + SMBHSTCNT, 0x48 );␊
105␉␊
106 rdtsc(l1, h1);␊
107␉␊
108 ␉while (!( inb(base + SMBHSTSTS) & 0x02))␉␉// wait til command finished␊
109␉{␉␊
110␉␉rdtsc(l2, h2);␊
111␉␉t = ((h2 - h1) * 0xffffffff + (l2 - l1)) / (tsc / 100);␊
112␉␉if (t > 5)␊
113␉␉␉break;␉␉␉␉␉␉␉␉␉// break after 5ms␊
114 }␊
115 return inb(base + SMBHSTDAT);␊
116}␊
117␊
118/* SPD i2c read optimization: prefetch only what we need, read non prefetcheable bytes on the fly */␊
119#define READ_SPD(spd, base, slot, x) spd[x] = smb_read_byte_intel(base, 0x50 + slot, x)␊
120␊
121int spd_indexes[] = {␊
122␉SPD_MEMORY_TYPE,␊
123␉SPD_DDR3_MEMORY_BANK,␊
124␉SPD_DDR3_MEMORY_CODE,␊
125␉SPD_NUM_ROWS,␊
126␉SPD_NUM_COLUMNS,␊
127␉SPD_NUM_DIMM_BANKS,␊
128␉SPD_NUM_BANKS_PER_SDRAM,␊
129␉4,7,8,9,12,64, /* TODO: give names to these values */␊
130␉95,96,97,98, 122,123,124,125 /* UIS */␊
131};␊
132#define SPD_INDEXES_SIZE (sizeof(spd_indexes) / sizeof(int))␊
133␊
134/** Read from spd *used* values only*/␊
135static void init_spd(char * spd, uint32_t base, int slot)␊
136{␊
137␉int i;␊
138␉for (i=0; (unsigned)i< SPD_INDEXES_SIZE; i++) {␊
139␉␉READ_SPD(spd, base, slot, spd_indexes[i]);␊
140␉}␊
141}␊
142␊
143/** Get Vendor Name from spd, 2 cases handled DDR3 and DDR2, ␊
144 have different formats, always return a valid ptr.*/␊
145static const char * getVendorName(RamSlotInfo_t* slot, uint32_t base, int slot_num)␊
146{␊
147 uint8_t bank = 0;␊
148 uint8_t code = 0;␊
149 int i = 0;␊
150 uint8_t * spd = (uint8_t *) slot->spd;␊
151␉␊
152 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) { // DDR3␊
153 bank = (spd[SPD_DDR3_MEMORY_BANK] & 0x07f); // constructors like Patriot use b7=1␊
154 code = spd[SPD_DDR3_MEMORY_CODE];␊
155 for (i=0; (unsigned)i < VEN_MAP_SIZE; i++)␊
156 if (bank==vendorMap[i].bank && code==vendorMap[i].code)␊
157 return vendorMap[i].name;␊
158 }␊
159 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) {␊
160 if(spd[64]==0x7f) {␊
161 for (i=64; i<72 && spd[i]==0x7f;i++) {␊
162␉␉␉␉bank++;␊
163␉␉␉␉READ_SPD(spd, base, slot_num,i+1); // prefetch next spd byte to read for next loop␊
164␉␉␉}␊
165␉␉␉READ_SPD(spd, base, slot_num,i);␊
166 code = spd[i];␊
167 } else {␊
168 code = spd[64]; ␊
169 bank = 0;␊
170 }␊
171 for (i=0; (unsigned)i < VEN_MAP_SIZE; i++)␊
172 if (bank==vendorMap[i].bank && code==vendorMap[i].code)␊
173 return vendorMap[i].name;␊
174 }␊
175 /* OK there is no vendor id here lets try to match the partnum if it exists */␊
176 if (strstr(slot->PartNo,"GU332") == slot->PartNo) // Unifosa fingerprint␊
177 return "Unifosa";␊
178 return "NoName";␊
179}␊
180␊
181/** Get Default Memory Module Speed (no overclocking handled) */␊
182static int getDDRspeedMhz(const char * spd)␊
183{␊
184 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) { ␊
185 switch(spd[12]) {␊
186␉␉␉case 0x0f:␊
187␉␉␉␉return 1066;␊
188␉␉␉case 0x0c:␊
189␉␉␉␉return 1333;␊
190␉␉␉case 0x0a:␊
191␉␉␉␉return 1600;␊
192␉␉␉case 0x14:␊
193␉␉␉default:␊
194␉␉␉␉return 800;␊
195 }␊
196 } ␊
197 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) {␊
198 switch(spd[9]) {␊
199␉␉␉case 0x50:␊
200␉␉␉␉return 400;␊
201␉␉␉case 0x3d:␊
202␉␉␉␉return 533;␊
203␉␉␉case 0x30:␊
204␉␉␉␉return 667;␊
205␉␉␉case 0x25:␊
206␉␉␉default:␊
207␉␉␉␉return 800;␊
208 }␊
209 }␊
210 return 800; // default freq for unknown types␊
211}␊
212␊
213#define SMST(a) ((uint8_t)((spd[a] & 0xf0) >> 4))␊
214#define SLST(a) ((uint8_t)(spd[a] & 0x0f))␊
215␊
216/** Get DDR3 or DDR2 serial number, 0 most of the times, always return a valid ptr */␊
217//char asciiSerial[16];␊
218static const char *getDDRSerial(const char* spd)␊
219{␊
220 static char asciiSerial[16];␊
221␉␊
222 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) // DDR3␊
223 {␊
224␉␉snprintf(asciiSerial, sizeof(asciiSerial),"%X%X%X%X%X%X%X%X", SMST(122) /*& 0x7*/, SLST(122), SMST(123), SLST(123), SMST(124), SLST(124), SMST(125), SLST(125));␊
225 }␊
226 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) // DDR2 or DDR␊
227 { ␊
228␉␉snprintf(asciiSerial, sizeof(asciiSerial),"%X%X%X%X%X%X%X%X", SMST(95) /*& 0x7*/, SLST(95), SMST(96), SLST(96), SMST(97), SLST(97), SMST(98), SLST(98));␊
229 }␊
230␉␊
231 return strdup(asciiSerial);␊
232}␊
233␊
234/** Get DDR3 or DDR2 Part Number, always return a valid ptr */␊
235//char asciiPartNo[32];␊
236static const char * getDDRPartNum(char* spd, uint32_t base, int slot)␊
237{␊
238␉static char asciiPartNo[32];␊
239␉int i, start=0, index = 0;␊
240␉␊
241 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) {␊
242␉␉start = 128;␊
243␉}␊
244 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) {␊
245␉␉start = 73;␊
246␉}␊
247␉␊
248 // Check that the spd part name is zero terminated and that it is ascii:␊
249 bzero(asciiPartNo, sizeof(asciiPartNo));␊
250␉char c;␊
251␉for (i=start; (unsigned)i < start + sizeof(asciiPartNo); i++) {␊
252␉␉READ_SPD(spd, base, slot, i); // only read once the corresponding model part (ddr3 or ddr2)␊
253␉␉c = spd[i];␊
254␉␉if (isalpha(c) || isdigit(c) || ispunct(c)) // It seems that System Profiler likes only letters and digits...␊
255␉␉␉asciiPartNo[index++] = c;␊
256␉␉else if (!isascii(c))␊
257␉␉␉break;␊
258␉}␊
259␉␊
260␉return strdup(asciiPartNo);␊
261}␊
262␊
263int mapping []= {0,2,1,3,4,6,5,7,8,10,9,11};␊
264␊
265␊
266/** Read from smbus the SPD content and interpret it for detecting memory attributes */␊
267static void read_smb_intel(pci_dt_t *smbus_dev)␊
268{ ␊
269 int i, speed;␊
270 uint8_t spd_size, spd_type;␊
271 uint32_t base;␊
272#if DEBUG_SPD␊
273 uint32_t mmio, hostc;␊
274#endif␊
275 bool dump = false;␊
276 RamSlotInfo_t* slot;␊
277␉␊
278␉uint16_t cmd = pci_config_read16(smbus_dev->dev.addr, 0x04);␊
279␉DBG("SMBus CmdReg: 0x%x\n", cmd);␊
280␉pci_config_write16(smbus_dev->dev.addr, 0x04, cmd | 1);␊
281␉␊
282 base = pci_config_read16(smbus_dev->dev.addr, 0x20) & 0xFFFE;␊
283#if DEBUG_SPD␊
284 mmio = pci_config_read32(smbus_dev->dev.addr, 0x10);// & ~0x0f;␊
285␉hostc = pci_config_read8(smbus_dev->dev.addr, 0x40);␊
286 DBG("Scanning SMBus [%04x:%04x], mmio: 0x%x, ioport: 0x%x, hostc: 0x%x\n", ␊
287␉␉␉smbus_dev->vendor_id, smbus_dev->device_id, mmio, base, hostc);␊
288#endif␊
289␉␊
290 getBoolForKey("DumpSPD", &dump, DEFAULT_BOOT_CONFIG);␊
291 bool fullBanks ; // needed at least for laptops␊
292 ␊
293 int DMIMaxMemorySlots = (int)get_env(envDMIMaxMemorySlots);␊
294 int DMIMemModules = (int)get_env(envDMIMemModules);␊
295␊
296 fullBanks = (bool)(DMIMemModules == DMIMaxMemorySlots) ;␊
297 ␊
298 // Search MAX_RAM_SLOTS slots␊
299␉char spdbuf[MAX_SPD_SIZE];␊
300␉␊
301 RamSlotInfo_t *RamDIMM = get_env_ptr(envRamDimm);␊
302␊
303 static int␉DmiDIMM[MAX_RAM_SLOTS];␉// Information and SPD mapping for each slot␊
304␊
305 uint64_t␉␉RamFrequency = get_env(envRamFrequency);␊
306 ␊
307 for (i = 0; i < MAX_RAM_SLOTS; i++){␊
308␉␉DBG("Scanning slot %d\n", i);␊
309 slot = &RamDIMM[i];␊
310 spd_size = smb_read_byte_intel(base, 0x50 + i, 0);␊
311 // Check spd is present␊
312 if (spd_size && (spd_size != 0xff) ) {␊
313␉␉␉slot->spd = spdbuf;␊
314 slot->InUse = true;␊
315␉␉␉␊
316 bzero(slot->spd, spd_size);␊
317 ␊
318 // Copy spd data into buffer␊
319 ␊
320␉␉␉//for (x = 0; x < spd_size; x++) slot->spd[x] = smb_read_byte_intel(base, 0x50 + i, x);␊
321 init_spd(slot->spd, base, i);␊
322␉␉␉␊
323 switch (slot->spd[SPD_MEMORY_TYPE]) {␊
324␉␉␉␉case SPD_MEMORY_TYPE_SDRAM_DDR2:␊
325␉␉␉␉␉␊
326␉␉␉␉␉/*slot->ModuleSize = ((1 << (slot->spd[SPD_NUM_ROWS] & 0x0f) + (slot->spd[SPD_NUM_COLUMNS] & 0x0f) - 17) * ␊
327␉␉␉␉␉␉␉␉␉␉((slot->spd[SPD_NUM_DIMM_BANKS] & 0x7) + 1) * slot->spd[SPD_NUM_BANKS_PER_SDRAM]);*/␊
328␉␉␉␉␉␊
329␉␉␉␉␉slot->ModuleSize = ((1 << (slot->spd[SPD_NUM_ROWS] & 0x0f) + (slot->spd[SPD_NUM_COLUMNS] & 0x0f) - 17) * ␊
330␉␉␉␉␉␉␉␉␉␉((slot->spd[SPD_NUM_DIMM_BANKS] & 0x7) + 1) * slot->spd[SPD_NUM_BANKS_PER_SDRAM]);␊
331␉␉␉␉␉break;␊
332␉␉␉␉␉␊
333␉␉␉␉case SPD_MEMORY_TYPE_SDRAM_DDR3:␊
334␉␉␉␉␉␊
335␉␉␉␉␉slot->ModuleSize = ((slot->spd[4] & 0x0f) + 28 ) + ((slot->spd[8] & 0x7) + 3 );␊
336␉␉␉␉␉slot->ModuleSize -= (slot->spd[7] & 0x7) + 25;␊
337␉␉␉␉␉slot->ModuleSize = ((1 << slot->ModuleSize) * (((slot->spd[7] >> 3) & 0x1f) + 1));␊
338␉␉␉␉␉␊
339␉␉␉␉␉break;␊
340 }␊
341 ␊
342 spd_type = (slot->spd[SPD_MEMORY_TYPE] < ((char) 12) ? slot->spd[SPD_MEMORY_TYPE] : 0);␊
343 slot->Type = spd_mem_to_smbios[spd_type];␊
344 slot->PartNo = getDDRPartNum(slot->spd, base, i);␊
345 slot->Vendor = getVendorName(slot, base, i);␊
346 slot->SerialNo = getDDRSerial(slot->spd);␊
347␉␉␉␊
348 // determine spd speed␊
349 speed = getDDRspeedMhz(slot->spd);␊
350 if (slot->Frequency<(uint32_t)speed) slot->Frequency = speed;␊
351␉␉␉␊
352␉␉␉// pci memory controller if available, is more reliable␊
353␉␉␉if ( RamFrequency > 0) {␊
354␉␉␉␉uint32_t freq = (uint32_t)(RamFrequency / 500000);␊
355␉␉␉␉// now round off special cases␊
356␉␉␉␉uint32_t fmod100 = freq %100;␊
357␉␉␉␉switch(fmod100) {␊
358␉␉␉␉␉case 1:␉freq--;␉break;␊
359␉␉␉␉␉case 32:␉freq++;␉break;␊
360␉␉␉␉␉case 65:␉freq++; break;␊
361␉␉␉␉␉case 98:␉freq+=2;break;␊
362␉␉␉␉␉case 99:␉freq++; break;␊
363␉␉␉␉}␊
364␉␉␉␉slot->Frequency = freq;␊
365␉␉␉}␊
366␉␉␉␊
367␉␉␉verbose("Slot: %d Type %d %dMB (%s) %dMHz Vendor=%s\n PartNo=%s SerialNo=%s\n", ␊
368␉␉␉␉␉i, ␊
369␉␉␉␉␉(int)slot->Type,␊
370␉␉␉␉␉slot->ModuleSize, ␊
371␉␉␉␉␉spd_memory_types[spd_type],␊
372␉␉␉␉␉slot->Frequency,␊
373␉␉␉␉␉slot->Vendor,␊
374␉␉␉␉␉slot->PartNo,␊
375␉␉␉␉␉slot->SerialNo); ␊
376#if DEBUG_SPD␉␉␉␊
377␉␉␉␉dumpPhysAddr("spd content: ",slot->spd, spd_size);␊
378␉␉␉␉getc();␊
379#endif ␊
380 }␊
381 // laptops sometimes show slot 0 and 2 with slot 1 empty when only 2 slots are presents so:␊
382 DmiDIMM[i]= ␊
383␉␉i>0 && RamDIMM[1].InUse==false && fullBanks && (DMIMaxMemorySlots==2) ? ␊
384␉␉mapping[i] : i; // for laptops case, mapping setup would need to be more generic than this␊
385 ␊
386␉␉slot->spd = NULL;␊
387␉␉␊
388 } // for␊
389 ␊
390 safe_set_env_copy(envDmiDimm, DmiDIMM, sizeof(DmiDIMM));␊
391␊
392}␊
393␊
394static struct smbus_controllers_t smbus_controllers[] = {␊
395␉␊
396␉{0x8086, 0x269B, "ESB2", read_smb_intel },␊
397␉{0x8086, 0x25A4, "6300ESB", read_smb_intel },␊
398␉{0x8086, 0x24C3, "ICH4", read_smb_intel },␊
399␉{0x8086, 0x24D3, "ICH5", read_smb_intel },␊
400␉{0x8086, 0x266A, "ICH6", read_smb_intel },␊
401␉{0x8086, 0x27DA, "ICH7", read_smb_intel },␊
402␉{0x8086, 0x283E, "ICH8", read_smb_intel },␊
403␉{0x8086, 0x2930, "ICH9", read_smb_intel },␉␊
404␉{0x8086, 0x3A30, "ICH10R", read_smb_intel },␊
405␉{0x8086, 0x3A60, "ICH10B", read_smb_intel },␊
406␉{0x8086, 0x3B30, "P55", read_smb_intel },␊
407␉{0x8086, 0x5032, "EP80579", read_smb_intel }␊
408␉␊
409};␊
410␊
411bool is_smbus_controller(pci_dt_t* pci_dt)␊
412{␊
413␉int i = 0;␊
414␉for ( ; (unsigned)i < sizeof(smbus_controllers) / sizeof(smbus_controllers[0]); i++ )␊
415␉{␊
416␉␉if (pci_dt->vendor_id == smbus_controllers[i].vendor &&␊
417␉␉␉pci_dt->device_id == smbus_controllers[i].device)␊
418␉␉{␊
419␉␉␉return true;␊
420␉␉} ␊
421␉}␊
422␉return false;␊
423}␉␊
424␊
425␊
426void scan_spd(pci_dt_t* smbus_controller_dev)␊
427{␊
428␉int i = 0;␊
429␉for ( ; (unsigned)i < sizeof(smbus_controllers) / sizeof(smbus_controllers[0]); i++ )␊
430␉{␊
431␉␉if (smbus_controller_dev->vendor_id == smbus_controllers[i].vendor &&␊
432␉␉␉smbus_controller_dev->device_id == smbus_controllers[i].device)␊
433␉␉{␊
434␉␉␉smbus_controllers[i].read_smb(smbus_controller_dev); // read smb␊
435␉␉} ␊
436␉}␊
437}␊
438

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