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Root/trunk/i386/libsaio/nvidia.c

1/*␊
2 *␉NVidia injector␊
3 *␊
4 *␉Copyright (C) 2009␉Jasmin Fazlic, iNDi␊
5 *␊
6 *␉NVidia injector modified by Fabio (ErmaC) on May 2012,␊
7 *␉for allow the cosmetics injection also based on SubVendorID and SubDeviceID.␊
8 *␊
9 *␉NVidia injector is free software: you can redistribute it and/or modify␊
10 *␉it under the terms of the GNU General Public License as published by␊
11 *␉the Free Software Foundation, either version 3 of the License, or␊
12 *␉(at your option) any later version.␊
13 *␊
14 *␉NVidia driver and injector is distributed in the hope that it will be useful,␊
15 *␉but WITHOUT ANY WARRANTY; without even the implied warranty of␊
16 *␉MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the␊
17 *␉GNU General Public License for more details.␊
18 *␊
19 *␉You should have received a copy of the GNU General Public License␊
20 *␉along with NVidia injector.␉ If not, see <http://www.gnu.org/licenses/>.␊
21 *␊
22 *␉Alternatively you can choose to comply with APSL␊
23 *␊
24 *␉DCB-Table parsing is based on software (nouveau driver) originally distributed under following license:␊
25 *␊
26 *␊
27 *␉Copyright 2005-2006 Erik Waling␊
28 *␉Copyright 2006 Stephane Marchesin␊
29 *␉Copyright 2007-2009 Stuart Bennett␊
30 *␊
31 *␉Permission is hereby granted, free of charge, to any person obtaining a␊
32 *␉copy of this software and associated documentation files (the "Software"),␊
33 *␉to deal in the Software without restriction, including without limitation␊
34 *␉the rights to use, copy, modify, merge, publish, distribute, sublicense,␊
35 *␉and/or sell copies of the Software, and to permit persons to whom the␊
36 *␉Software is furnished to do so, subject to the following conditions:␊
37 *␊
38 *␉The above copyright notice and this permission notice shall be included in␊
39 *␉all copies or substantial portions of the Software.␊
40 *␊
41 *␉THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR␊
42 *␉IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,␊
43 *␉FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL␊
44 *␉THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,␊
45 *␉WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF␊
46 *␉OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE␊
47 *␉SOFTWARE.␊
48 */␊
49␊
50#include "boot.h"␊
51#include "bootstruct.h"␊
52#include "pci.h"␊
53#include "platform.h"␊
54#include "device_inject.h"␊
55#include "nvidia.h"␊
56#include "nvidia_helper.h"␊
57␊
58#ifndef DEBUG_NVIDIA␊
59#define DEBUG_NVIDIA 0␊
60#endif␊
61␊
62#if DEBUG_NVIDIA␊
63#define DBG(x...)␉printf(x)␊
64#else␊
65#define DBG(x...)␊
66#endif␊
67␊
68#define NVIDIA_ROM_SIZE␉␉␉␉0x20000␊
69#define PATCH_ROM_SUCCESS␉␉␉1␊
70#define PATCH_ROM_SUCCESS_HAS_LVDS␉␉2␊
71#define PATCH_ROM_FAILED␉␉␉0␊
72#define MAX_NUM_DCB_ENTRIES␉␉␉16␊
73#define TYPE_GROUPED␉␉␉␉0xff␊
74#define READ_BYTE(rom, offset) (*(u_char *)(rom + offset))␊
75#define READ_LE_SHORT(rom, offset) (READ_BYTE(rom, offset+1) << 8 | READ_BYTE(rom, offset))␊
76#define READ_LE_INT(rom, offset) (READ_LE_SHORT(rom, offset+2) << 16 | READ_LE_SHORT(rom, offset))␊
77#define WRITE_LE_SHORT(data) (((data) << 8 & 0xff00) | ((data) >> 8 & 0x00ff ))␊
78#define WRITE_LE_INT(data) (WRITE_LE_SHORT(data) << 16 | WRITE_LE_SHORT(data >> 16))␊
79␊
80extern uint32_t devices_number;␊
81␊
82const char *nvidia_compatible_0[] =␉{ "@0,compatible",␉"NVDA,NVMac"␉ };␊
83const char *nvidia_compatible_1[] =␉{ "@1,compatible",␉"NVDA,NVMac"␉ };␊
84const char *nvidia_device_type_0[] =␉{ "@0,device_type",␉"display"␉ };␊
85const char *nvidia_device_type_1[] =␉{ "@1,device_type",␉"display"␉ };␊
86const char *nvidia_device_type[] =␉{ "device_type",␉"NVDA,Parent"␉ };␊
87const char *nvidia_device_type_child[]␉=␉{ "device_type",␉"NVDA,Child"␉ };␊
88const char *nvidia_name_0[] =␉{ "@0,name",␉␉"NVDA,Display-A" };␊
89const char *nvidia_name_1[] =␉{ "@1,name",␉␉"NVDA,Display-B" };␊
90const char *nvidia_slot_name[] =␉{ "AAPL,slot-name", "Slot-1"␉␉ };␊
91␊
92static uint8_t default_NVCAP[]= {␊
93␉0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x00,␊
94␉0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a,␊
95␉0x00, 0x00, 0x00, 0x00␊
96};␊
97␊
98#define NVCAP_LEN ( sizeof(default_NVCAP) / sizeof(uint8_t) )␊
99␊
100static uint8_t default_dcfg_0[]␉␉=␉{0x03, 0x01, 0x03, 0x00};␊
101static uint8_t default_dcfg_1[]␉␉=␉{0xff, 0xff, 0x00, 0x01};␊
102␊
103#define DCFG0_LEN ( sizeof(default_dcfg_0) / sizeof(uint8_t) )␊
104#define DCFG1_LEN ( sizeof(default_dcfg_1) / sizeof(uint8_t) )␊
105␊
106static uint8_t default_NVPM[]= {␊
107␉0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,␊
108␉0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,␊
109␉0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,␊
110␉0x00, 0x00, 0x00, 0x00␊
111};␊
112␊
113#define NVPM_LEN ( sizeof(default_NVPM) / sizeof(uint8_t) )␊
114␊
115static nvidia_pci_info_t nvidia_card_vendors[] = {␊
116␉{ 0x10190000,␉"Elitegroup" },␊
117␉{ 0x10250000,␉"Acer" },␊
118␉{ 0x10280000,␉"Dell" },␊
119␉{ 0x10330000,␉"NEC" },␊
120␉{ 0x103C0000,␉"HP" },␊
121␉{ 0x10430000,␉"Asus" },␊
122␉{ 0x104D0000,␉"Sony" },␊
123␉{ 0x105B0000,␉"Foxconn" },␊
124␉{ 0x106B0000,␉"Apple" },␊
125␉{ 0x10710000,␉"Mitac" },␊
126␉{ 0x107B0000,␉"Gateway" },␊
127␉{ 0x107D0000,␉"Leadtek" },␊
128␉{ 0x109F0000,␉"Trigem" },␊
129␉{ 0x10B00000,␉"Gainward" },␊
130␉{ 0x10CF0000,␉"Fujitsu" },␊
131␉{ 0x10DE0000,␉"nVidia" },␊
132␉{ 0x11790000,␉"Toshiba" },␊
133␉{ 0x13DC0000,␉"Netbost" },␊
134␉{ 0x144D0000,␉"Samsung" },␊
135␉{ 0x14580000,␉"Gigabyte" },␊
136␉{ 0x14620000,␉"MSi" },␊
137␉{ 0x14C00000,␉"Compal" },␊
138␉{ 0x152D0000,␉"Quanta" },␊
139␉{ 0x15540000,␉"Prolink" },␊
140␉{ 0x15580000,␉"Clevo" },␊
141␉{ 0x15690000,␉"Palit" },␊
142␉{ 0x161F0000,␉"Arima" },␊
143 ␉{ 0x16310000,␉"NEC" },␊
144␉{ 0x16420000,␉"Bitland" },␊
145␉{ 0x16820000,␉"XFX" },␊
146␉{ 0x17340000,␉"Fujitsu" },␊
147␉{ 0x174B0000,␉"PC Partner" },␊
148␉{ 0x17AA0000,␉"Lenovo" },␊
149 ␉{ 0x17C00000,␉"Wistron" },␊
150␉{ 0x17FF0000,␉"Benq" },␊
151␉{ 0x18490000,␉"ASRock" },␊
152␉{ 0x18540000,␉"LG" },␊
153␉{ 0x18640000,␉"LG" },␊
154␉{ 0x18940000,␉"LG" },␊
155␉{ 0x19610000,␉"ESS" },␊
156␉{ 0x196E0000,␉"PNY" },␊
157␉{ 0x19910000,␉"Topstar" },␊
158␉{ 0x19DA0000,␉"Zotac" },␊
159␉{ 0x19F10000,␉"BFG" },␊
160␉{ 0x1ACC0000,␉"Point of View" },␊
161␉{ 0x1B0A0000,␉"Pegatron" },␊
162␉{ 0x1B130000,␉"Jaton" },␊
163␉{ 0x34420000,␉"Bihl" },␊
164␉{ 0x38420000,␉"EVGA" },␊
165␉{ 0x73770000,␉"Colorful" },␊
166};␊
167␊
168static nvidia_pci_info_t nvidia_card_generic[] = {␊
169␉// 0000 - 0040␉␊
170␉{ 0x10DE0000,␉"Unknown" },␊
171␉// 0040 - 004F␉␊
172␉{ 0x10DE0040,␉"GeForce 6800 Ultra" },␊
173␉{ 0x10DE0041,␉"GeForce 6800" },␊
174␉{ 0x10DE0042,␉"GeForce 6800 LE" },␊
175␉{ 0x10DE0043,␉"GeForce 6800 XE" },␊
176␉{ 0x10DE0044,␉"GeForce 6800 XT" },␊
177␉{ 0x10DE0045,␉"GeForce 6800 GT" },␊
178␉{ 0x10DE0046,␉"GeForce 6800 GT" },␊
179␉{ 0x10DE0047,␉"GeForce 6800 GS" },␊
180␉{ 0x10DE0048,␉"GeForce 6800 XT" },␊
181␉{ 0x10DE004D,␉"Quadro FX 3400" },␊
182␉{ 0x10DE004E,␉"Quadro FX 4000" },␊
183␉// 0050 - 005F␊
184␉// 0060 - 006F␊
185␉// 0070 - 007F␊
186␉// 0080 - 008F␊
187␉// 0090 - 009F␊
188␉{ 0x10DE0090,␉"GeForce 7800 GTX" },␊
189␉{ 0x10DE0091,␉"GeForce 7800 GTX" },␊
190␉{ 0x10DE0092,␉"GeForce 7800 GT" },␊
191␉{ 0x10DE0093,␉"GeForce 7800 GS" },␊
192␉{ 0x10DE0095,␉"GeForce 7800 SLI" },␊
193␉{ 0x10DE0098,␉"GeForce Go 7800" },␊
194␉{ 0x10DE0099,␉"GeForce Go 7800 GTX" },␊
195␉{ 0x10DE009D,␉"Quadro FX 4500" },␊
196␉// 00A0 - 00AF␉␊
197␉// 00B0 - 00BF␉␊
198␉// 00C0 - 00CF␉␊
199␉{ 0x10DE00C0,␉"GeForce 6800 GS" },␊
200␉{ 0x10DE00C1,␉"GeForce 6800" },␊
201␉{ 0x10DE00C2,␉"GeForce 6800 LE" },␊
202␉{ 0x10DE00C3,␉"GeForce 6800 XT" },␊
203␉{ 0x10DE00C8,␉"GeForce Go 6800" },␊
204␉{ 0x10DE00C9,␉"GeForce Go 6800 Ultra" },␊
205␉{ 0x10DE00CC,␉"Quadro FX Go1400" },␊
206␉{ 0x10DE00CD,␉"Quadro FX 3450/4000 SDI" },␊
207␉{ 0x10DE00CE,␉"Quadro FX 1400" },␊
208␉// 00D0 - 00DF␉␊
209␉// 00E0 - 00EF␉␊
210␉// 00F0 - 00FF␉␊
211␉{ 0x10DE00F1,␉"GeForce 6600 GT" },␊
212␉{ 0x10DE00F2,␉"GeForce 6600" },␊
213␉{ 0x10DE00F3,␉"GeForce 6200" },␊
214␉{ 0x10DE00F4,␉"GeForce 6600 LE" },␊
215␉{ 0x10DE00F5,␉"GeForce 7800 GS" },␊
216␉{ 0x10DE00F6,␉"GeForce 6800 GS/XT" },␊
217␉{ 0x10DE00F8,␉"Quadro FX 3400/4400" },␊
218␉{ 0x10DE00F9,␉"GeForce 6800 Series GPU" },␊
219␉// 0100 - 010F␉␊
220␉// 0110 - 011F␉␊
221␉// 0120 - 012F␉␊
222␉// 0130 - 013F␉␊
223␉// 0140 - 014F␉␊
224␉{ 0x10DE0140,␉"GeForce 6600 GT" },␊
225␉{ 0x10DE0141,␉"GeForce 6600" },␊
226␉{ 0x10DE0142,␉"GeForce 6600 LE" },␊
227␉{ 0x10DE0143,␉"GeForce 6600 VE" },␊
228␉{ 0x10DE0144,␉"GeForce Go 6600" },␊
229␉{ 0x10DE0145,␉"GeForce 6610 XL" },␊
230␉{ 0x10DE0146,␉"GeForce Go 6600 TE/6200 TE" },␊
231␉{ 0x10DE0147,␉"GeForce 6700 XL" },␊
232␉{ 0x10DE0148,␉"GeForce Go 6600" },␊
233␉{ 0x10DE0149,␉"GeForce Go 6600 GT" },␊
234␉{ 0x10DE014A,␉"Quadro NVS 440" },␊
235␉{ 0x10DE014C,␉"Quadro FX 550" },␊
236␉{ 0x10DE014D,␉"Quadro FX 550" },␊
237␉{ 0x10DE014E,␉"Quadro FX 540" },␊
238␉{ 0x10DE014F,␉"GeForce 6200" },␊
239␉// 0150 - 015F␉␊
240␉// 0160 - 016F␉␊
241␉{ 0x10DE0160,␉"GeForce 6500" },␊
242␉{ 0x10DE0161,␉"GeForce 6200 TurboCache(TM)" },␊
243␉{ 0x10DE0162,␉"GeForce 6200SE TurboCache(TM)" },␊
244␉{ 0x10DE0163,␉"GeForce 6200 LE" },␊
245␉{ 0x10DE0164,␉"GeForce Go 6200" },␊
246␉{ 0x10DE0165,␉"Quadro NVS 285" },␊
247␉{ 0x10DE0166,␉"GeForce Go 6400" },␊
248␉{ 0x10DE0167,␉"GeForce Go 6200" },␊
249␉{ 0x10DE0168,␉"GeForce Go 6400" },␊
250␉{ 0x10DE0169,␉"GeForce 6250" },␊
251␉{ 0x10DE016A,␉"GeForce 7100 GS" },␊
252␉{ 0x10DE016C,␉"NVIDIA NV44GLM" },␊
253␉{ 0x10DE016D,␉"NVIDIA NV44GLM" },␊
254␉// 0170 - 017F␉␊
255␉// 0180 - 018F␉␊
256␉// 0190 - 019F␉␉␊
257␉{ 0x10DE0191,␉"GeForce 8800 GTX" },␊
258␉{ 0x10DE0193,␉"GeForce 8800 GTS" },␊
259␉{ 0x10DE0194,␉"GeForce 8800 Ultra" },␊
260␉{ 0x10DE0197,␉"Tesla C870" },␊
261␉{ 0x10DE019D,␉"Quadro FX 5600" },␊
262␉{ 0x10DE019E,␉"Quadro FX 4600" },␊
263␉// 01A0 - 01AF␊
264␉// 01B0 - 01BF␊
265␉// 01C0 - 01CF␊
266␉// 01D0 - 01DF␊
267␉{ 0x10DE01D0,␉"GeForce 7350 LE" },␊
268␉{ 0x10DE01D1,␉"GeForce 7300 LE" },␊
269␉{ 0x10DE01D2,␉"GeForce 7550 LE" },␊
270␉{ 0x10DE01D3,␉"GeForce 7300 SE/7200 GS" },␊
271␉{ 0x10DE01D6,␉"GeForce Go 7200" },␊
272␉{ 0x10DE01D7,␉"GeForce Go 7300" },␊
273␉{ 0x10DE01D8,␉"GeForce Go 7400" },␊
274␉{ 0x10DE01D9,␉"GeForce Go 7450" },␊
275␉{ 0x10DE01DA,␉"Quadro NVS 110M" },␊
276␉{ 0x10DE01DB,␉"Quadro NVS 120M" },␊
277␉{ 0x10DE01DC,␉"Quadro FX 350M" },␊
278␉{ 0x10DE01DD,␉"GeForce 7500 LE" },␊
279␉{ 0x10DE01DE,␉"Quadro FX 350" },␊
280␉{ 0x10DE01DF,␉"GeForce 7300 GS" },␊
281␉// 01E0 - 01EF␉␊
282␉// 01F0 - 01FF␊
283␉{ 0x10DE01F0,␉"GeForce4 MX" },␊
284␉// 0200 - 020F␉␊
285␉// 0210 - 021F␉␊
286␉{ 0x10DE0211,␉"GeForce 6800" },␊
287␉{ 0x10DE0212,␉"GeForce 6800 LE" },␊
288␉{ 0x10DE0215,␉"GeForce 6800 GT" },␊
289␉{ 0x10DE0218,␉"GeForce 6800 XT" },␊
290␉// 0220 - 022F␊
291␉{ 0x10DE0221,␉"GeForce 6200" },␊
292␉{ 0x10DE0222,␉"GeForce 6200 A-LE" },␊
293␉{ 0x10DE0228,␉"NVIDIA NV44M" },␊
294␉// 0230 - 023F␊
295␉// 0240 - 024F␊
296␉{ 0x10DE0240,␉"GeForce 6150" },␊
297␉{ 0x10DE0241,␉"GeForce 6150 LE" },␊
298␉{ 0x10DE0242,␉"GeForce 6100" },␊
299␉{ 0x10DE0243,␉"NVIDIA C51" },␊
300␉{ 0x10DE0244,␉"GeForce Go 6150" },␊
301␉{ 0x10DE0245,␉"Quadro NVS 210S / GeForce 6150LE" },␊
302␉{ 0x10DE0247,␉"GeForce Go 6100" },␊
303␉// 0250 - 025F␊
304␉{ 0x10DE025B,␉"Quadro4 700 XGL" },␊
305␉// 0260 - 026F␊
306␉// 0270 - 027F␊
307␉// 0280 - 028F␊
308␉// 0290 - 029F␊
309␉{ 0x10DE0290,␉"GeForce 7900 GTX" },␊
310␉{ 0x10DE0291,␉"GeForce 7900 GT/GTO" },␊
311␉{ 0x10DE0292,␉"GeForce 7900 GS" },␊
312␉{ 0x10DE0293,␉"GeForce 7950 GX2" },␊
313␉{ 0x10DE0294,␉"GeForce 7950 GX2" },␊
314␉{ 0x10DE0295,␉"GeForce 7950 GT" },␊
315␉{ 0x10DE0298,␉"GeForce Go 7900 GS" },␊
316␉{ 0x10DE0299,␉"GeForce Go 7900 GTX" },␊
317␉{ 0x10DE029A,␉"Quadro FX 2500M" },␊
318␉{ 0x10DE029B,␉"Quadro FX 1500M" },␊
319␉{ 0x10DE029C,␉"Quadro FX 5500" },␊
320␉{ 0x10DE029D,␉"Quadro FX 3500" },␊
321␉{ 0x10DE029E,␉"Quadro FX 1500" },␊
322␉{ 0x10DE029F,␉"Quadro FX 4500 X2" },␊
323␉// 02A0 - 02AF␊
324␉// 02B0 - 02BF␊
325␉// 02C0 - 02CF␊
326␉// 02D0 - 02DF␊
327␉// 02E0 - 02EF␊
328␉{ 0x10DE02E0,␉"GeForce 7600 GT" },␊
329␉{ 0x10DE02E1,␉"GeForce 7600 GS" },␊
330␉{ 0x10DE02E2,␉"GeForce 7300 GT" },␊
331␉{ 0x10DE02E3,␉"GeForce 7900 GS" },␊
332␉{ 0x10DE02E4,␉"GeForce 7950 GT" },␊
333␉// 02F0 - 02FF␊
334␉// 0300 - 030F␊
335␉{ 0x10DE0301,␉"GeForce FX 5800 Ultra" },␊
336␉{ 0x10DE0302,␉"GeForce FX 5800" },␊
337␉{ 0x10DE0308,␉"Quadro FX 2000" },␊
338␉{ 0x10DE0309,␉"Quadro FX 1000" },␊
339␉// 0310 - 031F␊
340␉{ 0x10DE0311,␉"GeForce FX 5600 Ultra" },␊
341␉{ 0x10DE0312,␉"GeForce FX 5600" },␊
342␉{ 0x10DE0314,␉"GeForce FX 5600XT" },␊
343␉{ 0x10DE031A,␉"GeForce FX Go5600" },␊
344␉{ 0x10DE031B,␉"GeForce FX Go5650" },␊
345␉{ 0x10DE031C,␉"Quadro FX Go700" },␊
346␉// 0320 - 032F␊
347␉{ 0x10DE0320,␉"GeForce FX 5200" },␊
348␉{ 0x10DE0321,␉"GeForce FX 5200 Ultra" },␊
349␉{ 0x10DE0322,␉"GeForce FX 5200" },␊
350␉{ 0x10DE0323,␉"GeForce FX 5200 LE" },␊
351␉{ 0x10DE0324,␉"GeForce FX Go5200" },␊
352␉{ 0x10DE0325,␉"GeForce FX Go5250" },␊
353␉{ 0x10DE0326,␉"GeForce FX 5500" },␊
354␉{ 0x10DE0328,␉"GeForce FX Go5200 32M/64M" },␊
355␉{ 0x10DE0329,␉"GeForce FX Go5200" },␊
356␉{ 0x10DE032A,␉"Quadro NVS 55/280 PCI" },␊
357␉{ 0x10DE032B,␉"Quadro FX 500/600 PCI" },␊
358␉{ 0x10DE032C,␉"GeForce FX Go53xx Series" },␊
359␉{ 0x10DE032D,␉"GeForce FX Go5100" },␊
360␉{ 0x10DE032F,␉"NV34GL" },␊
361␉// 0330 - 033F␊
362␉{ 0x10DE0330,␉"GeForce FX 5900 Ultra" },␊
363␉{ 0x10DE0331,␉"GeForce FX 5900" },␊
364␉{ 0x10DE0332,␉"GeForce FX 5900XT" },␊
365␉{ 0x10DE0333,␉"GeForce FX 5950 Ultra" },␊
366␉{ 0x10DE0334,␉"GeForce FX 5900ZT" },␊
367␉{ 0x10DE0338,␉"Quadro FX 3000" },␊
368␉{ 0x10DE033F,␉"Quadro FX 700" },␊
369␉// 0340 - 034F␊
370␉{ 0x10DE0341,␉"GeForce FX 5700 Ultra" },␊
371␉{ 0x10DE0342,␉"GeForce FX 5700" },␊
372␉{ 0x10DE0343,␉"GeForce FX 5700LE" },␊
373␉{ 0x10DE0344,␉"GeForce FX 5700VE" },␊
374␉{ 0x10DE0345,␉"NV36.5" },␊
375␉{ 0x10DE0347,␉"GeForce FX Go5700" },␊
376␉{ 0x10DE0348,␉"GeForce FX Go5700" },␊
377␉{ 0x10DE0349,␉"NV36M Pro" },␊
378␉{ 0x10DE034B,␉"NV36MAP" },␊
379␉{ 0x10DE034C,␉"Quadro FX Go1000" },␊
380␉{ 0x10DE034E,␉"Quadro FX 1100" },␊
381␉{ 0x10DE034F,␉"NV36GL" },␊
382␉// 0350 - 035F␊
383␉// 0360 - 036F␊
384␉// 0370 - 037F␊
385␉// 0380 - 038F␊
386␉{ 0x10DE038B,␉"GeForce 7650 GS" },␊
387␉// 0390 - 039F␊
388␉{ 0x10DE0390,␉"GeForce 7650 GS" },␊
389␉{ 0x10DE0391,␉"GeForce 7600 GT" },␊
390␉{ 0x10DE0392,␉"GeForce 7600 GS" },␊
391␉{ 0x10DE0393,␉"GeForce 7300 GT" },␊
392␉{ 0x10DE0394,␉"GeForce 7600 LE" },␊
393␉{ 0x10DE0395,␉"GeForce 7300 GT" },␊
394␉{ 0x10DE0397,␉"GeForce Go 7700" },␊
395␉{ 0x10DE0398,␉"GeForce Go 7600" },␊
396␉{ 0x10DE0399,␉"GeForce Go 7600 GT"},␊
397␉{ 0x10DE039A,␉"Quadro NVS 300M" },␊
398␉{ 0x10DE039B,␉"GeForce Go 7900 SE" },␊
399␉{ 0x10DE039C,␉"Quadro FX 560M" },␊
400␉{ 0x10DE039E,␉"Quadro FX 560" },␊
401␉// 03A0 - 03AF␊
402␉// 03B0 - 03BF␊
403␉// 03C0 - 03CF␊
404␉// 03D0 - 03DF␊
405␉{ 0x10DE03D0,␉"GeForce 6150SE nForce 430" },␊
406␉{ 0x10DE03D1,␉"GeForce 6100 nForce 405" },␊
407␉{ 0x10DE03D2,␉"GeForce 6100 nForce 400" },␊
408␉{ 0x10DE03D5,␉"GeForce 6100 nForce 420" },␊
409␉{ 0x10DE03D6,␉"GeForce 7025 / nForce 630a" },␊
410␉// 03E0 - 03EF␊
411␉// 03F0 - 03FF␊
412␉// 0400 - 040F␊
413␉{ 0x10DE0400,␉"GeForce 8600 GTS" },␊
414␉{ 0x10DE0401,␉"GeForce 8600 GT" },␊
415␉{ 0x10DE0402,␉"GeForce 8600 GT" },␊
416␉{ 0x10DE0403,␉"GeForce 8600 GS" },␊
417␉{ 0x10DE0404,␉"GeForce 8400 GS" },␊
418␉{ 0x10DE0405,␉"GeForce 9500M GS" },␊
419␉{ 0x10DE0406,␉"GeForce 8300 GS" },␊
420␉{ 0x10DE0407,␉"GeForce 8600M GT" },␊
421␉{ 0x10DE0408,␉"GeForce 9650M GS" },␊
422␉{ 0x10DE0409,␉"GeForce 8700M GT" },␊
423␉{ 0x10DE040A,␉"Quadro FX 370" },␊
424␉{ 0x10DE040B,␉"Quadro NVS 320M" },␊
425␉{ 0x10DE040C,␉"Quadro FX 570M" },␊
426␉{ 0x10DE040D,␉"Quadro FX 1600M" },␊
427␉{ 0x10DE040E,␉"Quadro FX 570" },␊
428␉{ 0x10DE040F,␉"Quadro FX 1700" },␊
429␉// 0410 - 041F␊
430␉{ 0x10DE0410,␉"GeForce GT 330" },␊
431␉// 0420 - 042F␊
432␉{ 0x10DE0420,␉"GeForce 8400 SE" },␊
433␉{ 0x10DE0421,␉"GeForce 8500 GT" },␊
434␉{ 0x10DE0422,␉"GeForce 8400 GS" },␊
435␉{ 0x10DE0423,␉"GeForce 8300 GS" },␊
436␉{ 0x10DE0424,␉"GeForce 8400 GS" },␊
437␉{ 0x10DE0425,␉"GeForce 8600M GS" },␊
438␉{ 0x10DE0426,␉"GeForce 8400M GT" },␊
439␉{ 0x10DE0427,␉"GeForce 8400M GS" },␊
440␉{ 0x10DE0428,␉"GeForce 8400M G" },␊
441␉{ 0x10DE0429,␉"Quadro NVS 140M" },␊
442␉{ 0x10DE042A,␉"Quadro NVS 130M" },␊
443␉{ 0x10DE042B,␉"Quadro NVS 135M" },␊
444␉{ 0x10DE042C,␉"GeForce 9400 GT" },␊
445␉{ 0x10DE042D,␉"Quadro FX 360M" },␊
446␉{ 0x10DE042E,␉"GeForce 9300M G" },␊
447␉{ 0x10DE042F,␉"Quadro NVS 290" },␊
448␉// 0430 - 043F␊
449␉// 0440 - 044F␊
450␉// 0450 - 045F␊
451␉// 0460 - 046F␊
452␉// 0470 - 047F␊
453␉// 0480 - 048F␊
454␉// 0490 - 049F␊
455␉// 04A0 - 04AF␊
456␉// 04B0 - 04BF␊
457␉// 04C0 - 04CF␊
458␉{ 0x10DE04C0,␉"NVIDIA G78" },␊
459␉{ 0x10DE04C1,␉"NVIDIA G78" },␊
460␉{ 0x10DE04C2,␉"NVIDIA G78" },␊
461␉{ 0x10DE04C3,␉"NVIDIA G78" },␊
462␉{ 0x10DE04C4,␉"NVIDIA G78" },␊
463␉{ 0x10DE04C5,␉"NVIDIA G78" },␊
464␉{ 0x10DE04C6,␉"NVIDIA G78" },␊
465␉{ 0x10DE04C7,␉"NVIDIA G78" },␊
466␉{ 0x10DE04C8,␉"NVIDIA G78" },␊
467␉{ 0x10DE04C9,␉"NVIDIA G78" },␊
468␉{ 0x10DE04CA,␉"NVIDIA G78" },␊
469␉{ 0x10DE04CB,␉"NVIDIA G78" },␊
470␉{ 0x10DE04CC,␉"NVIDIA G78" },␊
471␉{ 0x10DE04CD,␉"NVIDIA G78" },␊
472␉{ 0x10DE04CE,␉"NVIDIA G78" },␊
473␉{ 0x10DE04CF,␉"NVIDIA G78" },␊
474␉// 04D0 - 04DF␊
475␉// 04E0 - 04EF␊
476␉// 04F0 - 04FF␊
477␉// 0500 - 050F␊
478␉// 0510 - 051F␊
479␉// 0520 - 052F␊
480␉// 0530 - 053F␊
481␉{ 0x10DE0530,␉"GeForce 7190M / nForce 650M" },␊
482␉{ 0x10DE0531,␉"GeForce 7150M / nForce 630M" },␊
483␉{ 0x10DE0533,␉"GeForce 7000M / nForce 610M" },␊
484␉{ 0x10DE053A,␉"GeForce 7050 PV / nForce 630a" },␊
485␉{ 0x10DE053B,␉"GeForce 7050 PV / nForce 630a" },␊
486␉{ 0x10DE053E,␉"GeForce 7025 / nForce 630a" },␊
487␉// 0540 - 054F␊
488␉// 0550 - 055F␊
489␉// 0560 - 056F␊
490␉// 0570 - 057F␊
491␉// 0580 - 058F␊
492␉// 0590 - 059F␊
493␉// 05A0 - 05AF␊
494␉// 05B0 - 05BF␊
495␉// 05C0 - 05CF␊
496␉// 05D0 - 05DF␊
497␉// 05E0 - 05EF␊
498␉{ 0x10DE05E0,␉"GeForce GTX 295" },␊
499␉{ 0x10DE05E1,␉"GeForce GTX 280" },␊
500␉{ 0x10DE05E2,␉"GeForce GTX 260" },␊
501␉{ 0x10DE05E3,␉"GeForce GTX 285" },␊
502␉{ 0x10DE05E4,␉"NVIDIA GT200" },␊
503␉{ 0x10DE05E5,␉"NVIDIA GT200" },␊
504␉{ 0x10DE05E6,␉"GeForce GTX 275" },␊
505␉{ 0x10DE05E7,␉"nVidia Tesla C1060" },␊
506␉{ 0x10DE05E8,␉"NVIDIA GT200" },␊
507␉{ 0x10DE05E9,␉"NVIDIA GT200" },␊
508␉{ 0x10DE05EA,␉"GeForce GTX 260" },␊
509␉{ 0x10DE05EB,␉"GeForce GTX 295" },␊
510␉{ 0x10DE05EC,␉"NVIDIA GT200" },␊
511␉{ 0x10DE05ED,␉"Quadroplex 2200 D2" },␊
512␉{ 0x10DE05EE,␉"NVIDIA GT200" },␊
513␉{ 0x10DE05EF,␉"NVIDIA GT200" },␊
514␉// 05F0 - 05FF␊
515␉{ 0x10DE05F0,␉"NVIDIA GT200" },␊
516␉{ 0x10DE05F1,␉"NVIDIA GT200" },␊
517␉{ 0x10DE05F2,␉"NVIDIA GT200" },␊
518␉{ 0x10DE05F3,␉"NVIDIA GT200" },␊
519␉{ 0x10DE05F4,␉"NVIDIA GT200" },␊
520␉{ 0x10DE05F5,␉"NVIDIA GT200" },␊
521␉{ 0x10DE05F6,␉"NVIDIA GT200" },␊
522␉{ 0x10DE05F7,␉"NVIDIA GT200" },␊
523␉{ 0x10DE05F8,␉"Quadroplex 2200 S4" },␊
524␉{ 0x10DE05F9,␉"NVIDIA Quadro CX" },␊
525␉{ 0x10DE05FA,␉"NVIDIA GT200" },␊
526␉{ 0x10DE05FB,␉"NVIDIA GT200" },␊
527␉{ 0x10DE05FC,␉"NVIDIA GT200" },␊
528␉{ 0x10DE05FD,␉"Quadro FX 5800" },␊
529␉{ 0x10DE05FE,␉"Quadro FX 4800" },␊
530␉{ 0x10DE05FF,␉"Quadro FX 3800" },␊
531␉// 0600 - 060F␊
532␉{ 0x10DE0600,␉"GeForce 8800 GTS" },␊
533␉{ 0x10DE0601,␉"GeForce 9800 GT" },␊
534␉{ 0x10DE0602,␉"GeForce 8800 GT" },␊
535␉{ 0x10DE0603,␉"GeForce GT 230" },␊
536␉{ 0x10DE0604,␉"GeForce 9800 GX2" },␊
537␉{ 0x10DE0605,␉"GeForce 9800 GT" },␊
538␉{ 0x10DE0606,␉"GeForce 8800 GS" },␊
539␉{ 0x10DE0607,␉"GeForce GTS 240" },␊
540␉{ 0x10DE0608,␉"GeForce 9800M GTX" },␊
541␉{ 0x10DE0609,␉"GeForce 8800M GTS" },␊
542␉{ 0x10DE060A,␉"GeForce GTX 280M" },␊
543␉{ 0x10DE060B,␉"GeForce 9800M GT" },␊
544␉{ 0x10DE060C,␉"GeForce 8800M GTX" },␊
545␉{ 0x10DE060D,␉"GeForce 8800 GS" },␊
546␉{ 0x10DE060F,␉"GeForce GTX 285M" },␊
547␉// 0610 - 061F␊
548␉{ 0x10DE0610,␉"GeForce 9600 GSO" },␊
549␉{ 0x10DE0611,␉"GeForce 8800 GT" },␊
550␉{ 0x10DE0612,␉"GeForce 9800 GTX" },␊
551␉{ 0x10DE0613,␉"GeForce 9800 GTX+" },␊
552␉{ 0x10DE0614,␉"GeForce 9800 GT" },␊
553␉{ 0x10DE0615,␉"GeForce GTS 250" },␊
554␉{ 0x10DE0617,␉"GeForce 9800M GTX" },␊
555␉{ 0x10DE0618,␉"GeForce GTX 260M" },␊
556␉{ 0x10DE0619,␉"Quadro FX 4700 X2" },␊
557␉{ 0x10DE061A,␉"Quadro FX 3700" },␊
558␉{ 0x10DE061B,␉"Quadro VX 200" },␊
559␉{ 0x10DE061C,␉"Quadro FX 3600M" },␊
560␉{ 0x10DE061D,␉"Quadro FX 2800M" },␊
561␉{ 0x10DE061E,␉"Quadro FX 3700M" },␊
562␉{ 0x10DE061F,␉"Quadro FX 3800M" },␊
563␉// 0620 - 062F␊
564␉{ 0x10DE0620,␉"NVIDIA G94" },␊
565␉{ 0x10DE0621,␉"GeForce GT 230" },␊
566␉{ 0x10DE0622,␉"GeForce 9600 GT" },␊
567␉{ 0x10DE0623,␉"GeForce 9600 GS" },␊
568␉{ 0x10DE0624,␉"NVIDIA G94" },␊
569␉{ 0x10DE0625,␉"GeForce 9600 GSO 512"},␊
570␉{ 0x10DE0626,␉"GeForce GT 130" },␊
571␉{ 0x10DE0627,␉"GeForce GT 140" },␊
572␉{ 0x10DE0628,␉"GeForce 9800M GTS" },␊
573␉{ 0x10DE0629,␉"NVIDIA G94" },␊
574␉{ 0x10DE062A,␉"GeForce 9700M GTS" },␊
575␉{ 0x10DE062B,␉"GeForce 9800M GS" },␊
576␉{ 0x10DE062C,␉"GeForce 9800M GTS" },␊
577␉{ 0x10DE062D,␉"GeForce 9600 GT" },␊
578␉{ 0x10DE062E,␉"GeForce 9600 GT" },␊
579␉{ 0x10DE062F,␉"GeForce 9800 S" },␊
580␉// 0630 - 063F␊
581␉{ 0x10DE0630,␉"GeForce 9700 S" },␊
582␉{ 0x10DE0631,␉"GeForce GTS 160M" },␊
583␉{ 0x10DE0632,␉"GeForce GTS 150M" },␊
584␉{ 0x10DE0633,␉"NVIDIA G94" },␊
585␉{ 0x10DE0634,␉"NVIDIA G94" },␊
586␉{ 0x10DE0635,␉"GeForce 9600 GSO" },␊
587␉{ 0x10DE0636,␉"NVIDIA G94" },␊
588␉{ 0x10DE0637,␉"GeForce 9600 GT" },␊
589␉{ 0x10DE0638,␉"Quadro FX 1800" },␊
590␉{ 0x10DE0639,␉"NVIDIA G94" },␊
591␉{ 0x10DE063A,␉"Quadro FX 2700M" },␊
592␉{ 0x10DE063B,␉"NVIDIA G94" },␊
593␉{ 0x10DE063C,␉"NVIDIA G94" },␊
594␉{ 0x10DE063D,␉"NVIDIA G94" },␊
595␉{ 0x10DE063E,␉"NVIDIA G94" },␊
596␉{ 0x10DE063F,␉"NVIDIA G94" },␊
597␉// 0640 - 064F␊
598␉{ 0x10DE0640,␉"GeForce 9500 GT" },␊
599␉{ 0x10DE0641,␉"GeForce 9400 GT" },␊
600␉{ 0x10DE0642,␉"GeForce 8400 GS" },␊
601␉{ 0x10DE0643,␉"GeForce 9500 GT" },␊
602␉{ 0x10DE0644,␉"GeForce 9500 GS" },␊
603␉{ 0x10DE0645,␉"GeForce 9500 GS" },␊
604␉{ 0x10DE0646,␉"GeForce GT 120" },␊
605␉{ 0x10DE0647,␉"GeForce 9600M GT" },␊
606␉{ 0x10DE0648,␉"GeForce 9600M GS" },␊
607␉{ 0x10DE0649,␉"GeForce 9600M GT" },␊
608␉{ 0x10DE064A,␉"GeForce 9700M GT" },␊
609␉{ 0x10DE064B,␉"GeForce 9500M G" },␊
610␉{ 0x10DE064C,␉"GeForce 9650M GT" },␊
611␉// 0650 - 065F␊
612␉{ 0x10DE0650,␉"NVIDIA G96-825" },␊
613␉{ 0x10DE0651,␉"GeForce G 110M" },␊
614␉{ 0x10DE0652,␉"GeForce GT 130M" },␊
615␉{ 0x10DE0653,␉"GeForce GT 120M" },␊
616␉{ 0x10DE0654,␉"GeForce GT 220M" },␊
617␉{ 0x10DE0655,␉"GeForce GT 120" },␊
618␉{ 0x10DE0656,␉"GeForce 9650 S" },␊
619␉{ 0x10DE0657,␉"NVIDIA G96" },␊
620␉{ 0x10DE0658,␉"Quadro FX 380" },␊
621␉{ 0x10DE0659,␉"Quadro FX 580" },␊
622␉{ 0x10DE065A,␉"Quadro FX 1700M" },␊
623␉{ 0x10DE065B,␉"GeForce 9400 GT" },␊
624␉{ 0x10DE065C,␉"Quadro FX 770M" },␊
625␉{ 0x10DE065D,␉"NVIDIA G96" },␊
626␉{ 0x10DE065E,␉"NVIDIA G96" },␊
627␉{ 0x10DE065F,␉"GeForce G210" },␊
628␉// 0660 - 066F␊
629␉// 0670 - 067F␊
630␉// 0680 - 068F␊
631␉// 0690 - 069F␊
632␉// 06A0 - 06AF␊
633␉{ 0x10DE06A0,␉"NVIDIA GT214" },␊
634␉// 06B0 - 06BF␊
635␉{ 0x10DE06B0,␉"NVIDIA GT214" },␊
636␉// 06C0 - 06CF␊
637␉{ 0x10DE06C0,␉"GeForce GTX 480" },␊
638␉{ 0x10DE06C3,␉"GeForce GTX D12U" },␊
639␉{ 0x10DE06C4,␉"GeForce GTX 465" },␊
640␉{ 0x10DE06CA,␉"GeForce GTX 480M" },␊
641␉{ 0x10DE06CD,␉"GeForce GTX 470" },␊
642␉// 06D0 - 06DF␊
643␉{ 0x10DE06D1,␉"Tesla C2050" }, // C2070␊
644␉{ 0x10DE06D2,␉"Tesla M2070" }, // X2070␊
645␉{ 0x10DE06D8,␉"Quadro 6000" },␊
646␉{ 0x10DE06D9,␉"Quadro 5000" },␊
647␉{ 0x10DE06DA,␉"Quadro 5000M" },␊
648␉{ 0x10DE06DC,␉"Quadro 6000" },␊
649␉{ 0x10DE06DD,␉"Quadro 4000" },␊
650␉{ 0x10DE06DE,␉"Tesla M2050" }, // S2050, X2070␊
651␉{ 0x10DE06DF,␉"Tesla M2070-Q" },␊
652␉// 06E0 - 06EF␊
653␉{ 0x10DE06E0,␉"GeForce 9300 GE" },␊
654␉{ 0x10DE06E1,␉"GeForce 9300 GS" },␊
655␉{ 0x10DE06E2,␉"GeForce 8400" },␊
656␉{ 0x10DE06E3,␉"GeForce 8400 SE" },␊
657␉{ 0x10DE06E4,␉"GeForce 8400 GS" },␊
658␉{ 0x10DE06E5,␉"GeForce 9300M GS" },␊
659␉{ 0x10DE06E6,␉"GeForce G100" },␊
660␉{ 0x10DE06E7,␉"GeForce 9300 SE" },␊
661␉{ 0x10DE06E8,␉"GeForce 9200M GE" },␊
662␉{ 0x10DE06E9,␉"GeForce 9300M GS" },␊
663␉{ 0x10DE06EA,␉"Quadro NVS 150M" },␊
664␉{ 0x10DE06EB,␉"Quadro NVS 160M" },␊
665␉{ 0x10DE06EC,␉"GeForce G 105M" },␊
666␉{ 0x10DE06ED,␉"NVIDIA G98" },␊
667␉{ 0x10DE06EF,␉"GeForce G 103M" },␊
668␉// 06F0 - 06FF␊
669␉{ 0x10DE06F0,␉"NVIDIA G98" },␊
670␉{ 0x10DE06F1,␉"GeForce G105M" },␊
671␉{ 0x10DE06F2,␉"NVIDIA G98" },␊
672␉{ 0x10DE06F3,␉"NVIDIA G98" },␊
673␉{ 0x10DE06F4,␉"NVIDIA G98" },␊
674␉{ 0x10DE06F5,␉"NVIDIA G98" },␊
675␉{ 0x10DE06F6,␉"NVIDIA G98" },␊
676␉{ 0x10DE06F7,␉"NVIDIA G98" },␊
677␉{ 0x10DE06F8,␉"Quadro NVS 420" },␊
678␉{ 0x10DE06F9,␉"Quadro FX 370 LP" },␊
679␉{ 0x10DE06FA,␉"Quadro NVS 450" },␊
680␉{ 0x10DE06FB,␉"Quadro FX 370M" },␊
681␉{ 0x10DE06FC,␉"NVIDIA G98" },␊
682␉{ 0x10DE06FD,␉"Quadro NVS 295" },␊
683␉{ 0x10DE06FE,␉"NVIDIA G98" },␊
684␉{ 0x10DE06FF,␉"HICx16 + Graphics" },␊
685␉// 0700 - 070F␊
686␉// 0710 - 071F␊
687␉// 0720 - 072F␊
688␉// 0730 - 073F␊
689␉// 0740 - 074F␊
690␉// 0750 - 075F␊
691␉// 0760 - 076F␊
692␉// 0770 - 077F␊
693␉// 0780 - 078F␊
694␉// 0790 - 079F␊
695␉// 07A0 - 07AF␊
696␉// 07B0 - 07BF␊
697␉// 07C0 - 07CF␊
698␉// 07D0 - 07DF␊
699␉// 07E0 - 07EF␊
700␉{ 0x10DE07E0,␉"GeForce 7150 / nForce 630i" },␊
701␉{ 0x10DE07E1,␉"GeForce 7100 / nForce 630i" },␊
702␉{ 0x10DE07E2,␉"GeForce 7050 / nForce 630i" },␊
703␉{ 0x10DE07E3,␉"GeForce 7050 / nForce 610i" },␊
704␉{ 0x10DE07E5,␉"GeForce 7050 / nForce 620i" },␊
705␉// 07F0 - 07FF␊
706␉// 0800 - 080F␊
707␉// 0810 - 081F␊
708␉// 0820 - 082F␊
709␉// 0830 - 083F␊
710␉// 0840 - 084F␊
711␉{ 0x10DE0840,␉"GeForce 8200M" },␊
712␉{ 0x10DE0844,␉"GeForce 9100M G" },␊
713␉{ 0x10DE0845,␉"GeForce 8200M G" },␊
714␉{ 0x10DE0846,␉"GeForce 9200" }, // Tesla M2050 ??␊
715␉{ 0x10DE0847,␉"GeForce 9100" },␊
716␉{ 0x10DE0848,␉"GeForce 8300" },␊
717␉{ 0x10DE0849,␉"GeForce 8200" },␊
718␉{ 0x10DE084A,␉"nForce 730a" },␊
719␉{ 0x10DE084B,␉"GeForce 9200" }, // nVidia GeForce 8200 ??␊
720␉{ 0x10DE084C,␉"nForce 980a/780a SLI" },␊
721␉{ 0x10DE084D,␉"nForce 750a SLI" },␊
722␉{ 0x10DE084F,␉"GeForce 8100 / nForce 720a" },␊
723␉// 0850 - 085F␊
724␉// 0860 - 086F␊
725␉{ 0x10DE0860,␉"GeForce 9300" },␊
726␉{ 0x10DE0861,␉"GeForce 9400" },␊
727␉{ 0x10DE0862,␉"GeForce 9400M G" },␊
728␉{ 0x10DE0863,␉"GeForce 9400M" },␊
729␉{ 0x10DE0864,␉"GeForce 9300" },␊
730␉{ 0x10DE0865,␉"GeForce 9300" }, // ION ??␊
731␉{ 0x10DE0866,␉"GeForce 9400M G" },␊
732␉{ 0x10DE0867,␉"GeForce 9400" },␊
733␉{ 0x10DE0868,␉"nForce 760i SLI" },␊
734␉{ 0x10DE0869,␉"GeForce 9400" },␊
735␉{ 0x10DE086A,␉"GeForce 9400" },␊
736␉{ 0x10DE086C,␉"GeForce 9300 / nForce 730i" },␊
737␉{ 0x10DE086D,␉"GeForce 9200" },␊
738␉{ 0x10DE086E,␉"GeForce 9100M G" },␊
739␉{ 0x10DE086F,␉"GeForce 8200M G" },␊
740␉// 0870 - 087F␊
741␉{ 0x10DE0870,␉"GeForce 9400M" },␊
742␉{ 0x10DE0871,␉"GeForce 9200" },␊
743␉{ 0x10DE0872,␉"GeForce G102M" },␊
744␉{ 0x10DE0873,␉"GeForce G205M" },␊
745␉{ 0x10DE0874,␉"ION 9300M" },␊
746␉{ 0x10DE0876,␉"ION 9400M" },␊
747␉{ 0x10DE087A,␉"GeForce 9400" },␊
748␉{ 0x10DE087D,␉"ION 9400M" },␊
749␉{ 0x10DE087E,␉"ION LE" },␊
750␉{ 0x10DE087F,␉"ION LE" }, // Tesla M2070-Q ??␊
751␉// 0880 - 088F␊
752␉// 0890 - 089F␊
753␉// 08A0 - 08AF␊
754␉{ 0x10DE08A0,␉"GeForce 320M" },␊
755␉{ 0x10DE08A1,␉"MCP89-MZT" },␊
756␉{ 0x10DE08A2,␉"GeForce 320M" },␊
757␉{ 0x10DE08A3,␉"GeForce 320M" },␊
758␉{ 0x10DE08A4,␉"GeForce 320M" },␊
759␉{ 0x10DE08A5,␉"GeForce 320M" },␊
760␉// 08B0 - 08BF␊
761␉{ 0x10DE08B0,␉"MCP83 MMD" },␊
762␉{ 0x10DE08B1,␉"GeForce 300M" },␊
763␉{ 0x10DE08B2,␉"GeForce 300M" }, // MCP83-MJ␊
764␉{ 0x10DE08B3,␉"MCP89 MM9" },␊
765␉// 08C0 - 08CF␊
766␉// 08D0 - 08DF␊
767␉// 08E0 - 08EF␊
768␉// 08F0 - 08FF␊
769␉// 0900 - 090F␊
770␉// 0910 - 091F␊
771␉// 0920 - 092F␊
772␉// 0930 - 093F␊
773␉// 0940 - 094F␊
774␉// 0950 - 095F␊
775␉// 0960 - 096F␊
776␉// 0970 - 097F␊
777␉// 0980 - 098F␊
778␉// 0990 - 099F␊
779␉// 09A0 - 09AF␊
780␉// 09B0 - 09BF␊
781␉// 09C0 - 09CF␊
782␉// 09D0 - 09DF␊
783␉// 09E0 - 09EF␊
784␉// 09F0 - 09FF␊
785␉// 0A00 - 0A0F␊
786␉// { 0x10DE0A00,␉"NVIDIA GT212" },␊
787␉// 0A10 - 0A1F␊
788␉// { 0x10DE0A10,␉"NVIDIA GT212" },␊
789␉// 0A20 - 0A2F␊
790␉{ 0x10DE0A20,␉"GeForce GT 220" },␊
791␉{ 0x10DE0A21,␉"D10M2-20" },␊
792␉{ 0x10DE0A22,␉"GeForce 315" },␊
793␉{ 0x10DE0A23,␉"GeForce 210" },␊
794␉{ 0x10DE0A26,␉"GeForce 405" },␊
795␉{ 0x10DE0A27,␉"GeForce 405" },␊
796␉{ 0x10DE0A28,␉"GeForce GT 230" },␊
797␉{ 0x10DE0A29,␉"GeForce GT 330M" },␊
798␉{ 0x10DE0A2A,␉"GeForce GT 230M" },␊
799␉{ 0x10DE0A2B,␉"GeForce GT 330M" },␊
800␉{ 0x10DE0A2C,␉"NVS 5100M" },␊
801␉{ 0x10DE0A2D,␉"GeForce GT 320M" },␉␊
802␉// 0A30 - 0A3F␊
803␉{ 0x10DE0A30,␉"GeForce GT 330M" },␊
804␉{ 0x10DE0A32,␉"GeForce GT 415" },␊
805␉{ 0x10DE0A34,␉"GeForce GT 240M" },␊
806␉{ 0x10DE0A35,␉"GeForce GT 325M" },␊
807␉{ 0x10DE0A38,␉"Quadro 400" },␊
808␉{ 0x10DE0A3C,␉"Quadro FX 880M" },␊
809␉{ 0x10DE0A3D,␉"N10P-ES" },␊
810␉{ 0x10DE0A3F,␉"GT216-INT" },␊
811␉// 0A40 - 0A4F␊
812␉// 0A50 - 0A5F␊
813␉// 0A60 - 0A6F␊
814␉{ 0x10DE0A60,␉"GeForce G210" },␊
815␉{ 0x10DE0A61,␉"NVS 2100" },␊
816␉{ 0x10DE0A62,␉"GeForce 205" },␊
817␉{ 0x10DE0A63,␉"GeForce 310" },␊
818␉{ 0x10DE0A64,␉"ION" },␊
819␉{ 0x10DE0A65,␉"GeForce 210" },␊
820␉{ 0x10DE0A66,␉"GeForce 310" },␊
821␉{ 0x10DE0A67,␉"GeForce 315" },␊
822␉{ 0x10DE0A68,␉"GeForce G105M" },␊
823␉{ 0x10DE0A69,␉"GeForce G105M" },␊
824␉{ 0x10DE0A6A,␉"NVS 2100M" },␊
825␉{ 0x10DE0A6C,␉"NVS 3100M" },␊
826␉{ 0x10DE0A6E,␉"GeForce 305M" },␊
827␉{ 0x10DE0A6F,␉"ION" },␉␊
828␉// 0A70 - 0A7F␊
829␉{ 0x10DE0A70,␉"GeForce 310M" },␊
830␉{ 0x10DE0A71,␉"GeForce 305M" },␊
831␉{ 0x10DE0A72,␉"GeForce 310M" },␊
832␉{ 0x10DE0A73,␉"GeForce 305M" },␊
833␉{ 0x10DE0A74,␉"GeForce G210M" },␊
834␉{ 0x10DE0A75,␉"GeForce G310M" },␊
835␉{ 0x10DE0A76,␉"ION" },␊
836␉{ 0x10DE0A78,␉"Quadro FX 380 LP" },␊
837␉// { 0x10DE0A79,␉"N12M-NS-S" },␊
838␉{ 0x10DE0A7A,␉"GeForce 315M" },␊
839␉{ 0x10DE0A7B,␉"GeForce 505" },␊
840␉{ 0x10DE0A7C,␉"Quadro FX 380M" },␊
841␉{ 0x10DE0A7D,␉"N11M-ES" }, //SUBIDS␊
842␉{ 0x10DE0A7E,␉"GT218-INT-S" },␊
843␉{ 0x10DE0A7F,␉"GT218-INT-B" },␊
844␉// 0A80 - 0A8F␊
845␉// 0A90 - 0A9F␊
846␉// 0AA0 - 0AAF␊
847␉// 0AB0 - 0ABF␊
848␉// 0AC0 - 0ACF␊
849␉// 0AD0 - 0ADF␊
850␉// 0AE0 - 0AEF␊
851␉// 0AF0 - 0AFF␊
852␉// 0B00 - 0B0F␊
853␉// 0B10 - 0B1F␊
854␉// 0B20 - 0B2F␊
855␉// 0B30 - 0B3F␊
856␉// 0B40 - 0B4F␊
857␉// 0B50 - 0B5F␊
858␉// 0B60 - 0B6F␊
859␉// 0B70 - 0B7F␊
860␉// 0B80 - 0B8F␊
861␉// 0B90 - 0B9F␊
862␉// 0BA0 - 0BAF␊
863␉// 0BB0 - 0BBF␊
864␉// 0BC0 - 0BCF␊
865␉// 0BD0 - 0BDF␊
866␉// 0BE0 - 0BEF␊
867␉// 0BF0 - 0BFF␊
868␉// 0C00 - 0C0F␊
869␉// 0C10 - 0C1F␊
870␉// 0C20 - 0C2F␊
871␉// 0C30 - 0C3F␊
872␉// 0C40 - 0C4F␊
873␉// 0C50 - 0C5F␊
874␉// 0C60 - 0C6F␊
875␉// 0C70 - 0C7F␊
876␉// 0C80 - 0C8F␊
877␉// 0C90 - 0C9F␊
878␉// 0CA0 - 0CAF␊
879␉{ 0x10DE0CA0,␉"GeForce GT 330 " },␊
880␉{ 0x10DE0CA2,␉"GeForce GT 320" },␊
881␉{ 0x10DE0CA3,␉"GeForce GT 240" },␊
882␉{ 0x10DE0CA4,␉"GeForce GT 340" },␊
883␉{ 0x10DE0CA5,␉"GeForce GT 220" },␊
884␉{ 0x10DE0CA7,␉"GeForce GT 330" },␊
885␉{ 0x10DE0CA8,␉"GeForce GTS 260M" },␊
886␉{ 0x10DE0CA9,␉"GeForce GTS 250M" },␊
887␉{ 0x10DE0CAC,␉"GeForce GT 220" },␊
888␉{ 0x10DE0CAD,␉"N10E-ES" }, // SUBIDS␊
889␉{ 0x10DE0CAE,␉"GT215-INT" },␊
890␉{ 0x10DE0CAF,␉"GeForce GT 335M" },␊
891␉// 0CB0 - 0CBF␉␊
892␉{ 0x10DE0CB0,␉"GeForce GTS 350M" },␊
893␉{ 0x10DE0CB1,␉"GeForce GTS 360M" },␊
894␉{ 0x10DE0CBC,␉"Quadro FX 1800M" },␊
895␉// 0CC0 - 0CCF␊
896␉// 0CD0 - 0CDF␊
897␉// 0CE0 - 0CEF␊
898␉// 0CF0 - 0CFF␊
899␉// 0D00 - 0D0F␊
900␉// 0D10 - 0D1F␊
901␉// 0D20 - 0D2F␊
902␉// 0D30 - 0D3F␊
903␉// 0D40 - 0D4F␊
904␉// 0D50 - 0D5F␊
905␉// 0D60 - 0D6F␊
906␉// 0D70 - 0D7F␊
907␉// 0D80 - 0D8F␊
908␉// 0D90 - 0D9F␊
909␉// 0DA0 - 0DAF␊
910␉// 0DB0 - 0DBF␊
911␉// 0DC0 - 0DCF␊
912␉{ 0x10DE0DC0,␉"GeForce GT 440" },␊
913␉// { 0x10DE0DC1,␉"D12-P1-35" },␊
914␉// { 0x10DE0DC2,␉"D12-P1-35" },␊
915␉{ 0x10DE0DC4,␉"GeForce GTS 450" },␊
916␉{ 0x10DE0DC5,␉"GeForce GTS 450" },␊
917␉{ 0x10DE0DC6,␉"GeForce GTS 450" },␊
918␉// { 0x10DE0DCA,␉"GF10x" },␊
919␉// { 0x10DE0DCC,␉"N12E-GS" },␊
920␉{ 0x10DE0DCD,␉"GeForce GT 555M" },␊
921␉{ 0x10DE0DCE,␉"GeForce GT 555M" },␊
922␉// { 0x10DE0DCF,␉"N12P-GT-B" },␊
923␉// 0DD0 - 0DDF␉␊
924␉// { 0x10DE0DD0,␉"N11E-GT" },␊
925␉{ 0x10DE0DD1,␉"GeForce GTX 460M" },␊
926␉{ 0x10DE0DD2,␉"GeForce GT 445M" },␊
927␉{ 0x10DE0DD3,␉"GeForce GT 435M" },␊
928␉{ 0x10DE0DD6,␉"GeForce GT 550M" },␊
929␉{ 0x10DE0DD8,␉"Quadro 2000" },␊
930␉{ 0x10DE0DDA,␉"Quadro 2000M" },␊
931␉{ 0x10DE0DDE,␉"GF106-ES" },␊
932␉// { 0x10DE0DDF,␉"GF106-INT" },␊
933␉// 0DE0 - 0DEF␊
934␉{ 0x10DE0DE0,␉"GeForce GT 440" },␊
935␉{ 0x10DE0DE1,␉"GeForce GT 430" },␊
936␉{ 0x10DE0DE2,␉"GeForce GT 420" },␊
937␉{ 0x10DE0DE3,␉"GeForce GT 635M" },␊
938␉{ 0x10DE0DE4,␉"GeForce GT 520" },␊
939␉{ 0x10DE0DE5,␉"GeForce GT 530" },␊
940␉{ 0x10DE0DE8,␉"GeForce GT 620M" },␊
941␉{ 0x10DE0DE9,␉"GeForce GT 630M" },␊
942␉{ 0x10DE0DEA,␉"GeForce GT 610M" },␊
943␉{ 0x10DE0DEB,␉"GeForce GT 555M" },␊
944␉{ 0x10DE0DEC,␉"GeForce GT 525M" },␊
945␉{ 0x10DE0DED,␉"GeForce GT 520M" },␊
946␉{ 0x10DE0DEE,␉"GeForce GT 415M" },␊
947␉{ 0x10DE0DEF,␉"N13P-NS1-A1" },␊
948␉// 0DF0 - 0DFF␊
949␉{ 0x10DE0DF0,␉"GeForce GT 425M" },␊
950␉{ 0x10DE0DF1,␉"GeForce GT 420M" },␊
951␉{ 0x10DE0DF2,␉"GeForce GT 435M" },␊
952␉{ 0x10DE0DF3,␉"GeForce GT 420M" },␊
953␉{ 0x10DE0DF4,␉"GeForce GT 540M" },␊
954␉{ 0x10DE0DF5,␉"GeForce GT 525M" },␊
955␉{ 0x10DE0DF6,␉"GeForce GT 550M" },␊
956␉{ 0x10DE0DF7,␉"GeForce GT 520M" },␊
957␉{ 0x10DE0DF8,␉"Quadro 600" },␊
958␉{ 0x10DE0DF9,␉"Quadro 500M" },␊
959␉{ 0x10DE0DFA,␉"Quadro 1000M" },␊
960␉{ 0x10DE0DFC,␉"NVS 5200M" },␊
961␉{ 0x10DE0DFE,␉"GF108 ES" },␊
962␉// { 0x10DE0DFF,␉"GF108 INT" },␊
963␉// 0E00 - 0E0F␊
964␉// 0E10 - 0E1F␊
965␉// 0E20 - 0E2F␊
966␉{ 0x10DE0E21,␉"D12U-25" },␊
967␉{ 0x10DE0E22,␉"GeForce GTX 460" },␊
968␉{ 0x10DE0E23,␉"GeForce GTX 460 SE" },␊
969␉{ 0x10DE0E24,␉"GeForce GTX 460" },␊
970␉// { 0x10DE0E25,␉"D12U-50" },␊
971␉{ 0x10DE0E28,␉"GeForce GTX 460" },␊
972␉// 0E30 - 0E3F␊
973␉{ 0x10DE0E30,␉"GeForce GTX 470M" },␊
974␉{ 0x10DE0E31,␉"GeForce GTX 485M" },␊
975␉// { 0x10DE0E32,␉"N12E-GT" },␊
976␉{ 0x10DE0E38,␉"GF104GL" },␊
977␉{ 0x10DE0E3A,␉"Quadro 3000M" },␊
978␉{ 0x10DE0E3B,␉"Quadro 4000M" },␊
979␉// { 0x10DE0E3E,␉"GF104-ES" },␊
980␉// { 0x10DE0E3F,␉"GF104-INT" },␊
981␉// 0E40 - 0E4F␊
982␉// 0E50 - 0E5F␊
983␉// 0E60 - 0E6F␊
984␉// 0E70 - 0E7F␊
985␉// 0E80 - 0E8F␊
986␉// 0E90 - 0E9F␊
987␉// 0EA0 - 0EAF␊
988␉// 0EB0 - 0EBF␊
989␉// 0EC0 - 0ECF␊
990␉// 0ED0 - 0EDF␊
991␉// 0EE0 - 0EEF␊
992␉// 0EF0 - 0EFF␊
993␉// 0F00 - 0F0F␊
994␉{ 0x10DE0F00,␉"GeForce GT 630" },␊
995␉{ 0x10DE0F01,␉"GeForce GT 620" },␊
996␉// 0F10 - 0F1F␊
997␉// 0F20 - 0F2F␊
998␉// 0F30 - 0F3F␊
999␉// 0F40 - 0F4F␊
1000␉// 0F50 - 0F5F␊
1001␉// 0F60 - 0F6F␊
1002␉// 0F70 - 0F7F␊
1003␉// 0F80 - 0F8F␊
1004␉// 0F90 - 0F9F␊
1005␉// 0FA0 - 0FAF␊
1006␉// 0FB0 - 0FBF␊
1007␉// 0FC0 - 0FCF␊
1008␉{ 0x10DE0FC0,␉"GeForce GT 640" },␊
1009␉{ 0x10DE0FC1,␉"GeForce GT 640" },␊
1010␉{ 0x10DE0FC2,␉"GeForce GT 630" },␊
1011␉{ 0x10DE0FC6,␉"GeForce GTX 650" },␊
1012␉// 0FD0 - 0FDF␊
1013␉{ 0x10DE0FD1,␉"GeForce GT 650M" },␊
1014␉{ 0x10DE0FD2,␉"GeForce GT 640M" },␊
1015␉{ 0x10DE0FD3,␉"GeForce GT 640M LE" },␊
1016␉{ 0x10DE0FD4,␉"GeForce GTX 660M" },␊
1017␉{ 0x10DE0FD5,␉"GeForce GT 650M" },␊
1018␉{ 0x10DE0FDB,␉"GK107-ESP-A1" },␊
1019␉// 0FE0 - 0FEF␊
1020␉{ 0x10DE0FE0,␉"GeForce GTX 660M" },␊
1021␉// 0FF0 - 0FFF␊
1022␉{ 0x10DE0FFB,␉"Quadro K2000M" },␊
1023␉{ 0x10DE0FFC,␉"Quadro K1000M" },␊
1024␉{ 0x10DE0FFD,␉"NVS 510" },␊
1025␉{ 0x10DE0FFF,␉"Quadro 410" },␊
1026␉// 1000 - 100F␊
1027␉// 1010 - 101F␊
1028␉// 1020 - 102F␊
1029␉// 1030 - 103F␊
1030␉// 1040 - 104F␊
1031␉{ 0x10DE1040,␉"GeForce GT 520" },␊
1032␉// { 0x10DE1041,␉"D13M1-45" },␊
1033␉{ 0x10DE1042,␉"GeForce 510" },␊
1034␉{ 0x10DE1048,␉"GeForce 605" },␊
1035␉{ 0x10DE1049,␉"GeForce GT 620" },␊
1036␉{ 0x10DE104A,␉"GeForce GT 610" },␊
1037␉// 1050 - 105F␊
1038␉{ 0x10DE1050,␉"GeForce GT 520M" },␊
1039␉{ 0x10DE1051,␉"GeForce GT 520MX" },␊
1040␉{ 0x10DE1052,␉"GeForce GT 520M" },␊
1041␉{ 0x10DE1054,␉"GeForce GT 410M" },␊
1042␉{ 0x10DE1055,␉"GeForce 410M" },␊
1043␉{ 0x10DE1056,␉"Quadro NVS 4200M" },␊
1044␉{ 0x10DE1057,␉"Quadro NVS 4200M" },␊
1045␉{ 0x10DE1058,␉"GeForce GT 610M" },␊
1046␉{ 0x10DE1059,␉"GeForce 610M" },␊
1047␉{ 0x10DE105A,␉"GeForce 610M" },␊
1048␉// 1060 - 106F␊
1049␉// 1070 - 107F␊
1050␉{ 0x10DE107D,␉"NVS 310" },␊
1051␉// { 0x10DE107E,␉"GF119-INT" },␊
1052␉// { 0x10DE107F,␉"GF119-ES" },␊
1053␉// 1080 - 108F␊
1054␉{ 0x10DE1080,␉"GeForce GTX 580" },␊
1055␉{ 0x10DE1081,␉"GeForce GTX 570" },␊
1056␉{ 0x10DE1082,␉"GeForce GTX 560 Ti" },␊
1057␉{ 0x10DE1083,␉"D13U" },␊
1058␉{ 0x10DE1084,␉"GeForce GTX 560" },␊
1059␉{ 0x10DE1086,␉"GeForce GTX 570" },␊
1060␉{ 0x10DE1087,␉"GeForce GTX 560 Ti-448" },␊
1061␉{ 0x10DE1088,␉"GeForce GTX 590" },␊
1062␉{ 0x10DE1089,␉"GeForce GTX 580" },␊
1063␉{ 0x10DE108B,␉"GeForce GTX 590" },␊
1064␉// { 0x10DE108C,␉"D13U" },␊
1065␉{ 0x10DE108E,␉"Tesla C2090" },␊
1066␉// 1090 - 109F␊
1067␉{ 0x10DE1091,␉"Tesla M2090" }, // X2090␊
1068␉{ 0x10DE1094,␉"Tesla M2075" },␊
1069␉{ 0x10DE1096,␉"Tesla C2075" },␊
1070␉{ 0x10DE1098,␉"D13U" },␊
1071␉{ 0x10DE109A,␉"Quadro 5010M" },␊
1072␉{ 0x10DE109B,␉"Quadro 7000" },␊
1073␉// 10A0 - 10AF␊
1074␉// 10B0 - 10BF␊
1075␉// 10C0 - 10CF␊
1076␉{ 0x10DE10C0,␉"GeForce 9300 GS" },␊
1077␉{ 0x10DE10C3,␉"GeForce 8400 GS" },␊
1078␉{ 0x10DE10C4,␉"ION" },␊
1079␉{ 0x10DE10C5,␉"GeForce 405" },␊
1080␉// 10D0 - 10DF␊
1081␉{ 0x10DE10D8,␉"NVS 300" },␊
1082␉// 10E0 - 10EF␊
1083␉// 10F0 - 10FF␊
1084␉// 1100 - 110F␊
1085␉// 1110 - 111F␊
1086␉// 1120 - 112F␊
1087␉// 1130 - 113F␊
1088␉// 1140 - 114F␊
1089␉{ 0x10DE1140,␉"GeForce GT 610M" },␊
1090␉{ 0x10DE1141,␉"GeForce 610M" },␊
1091␉{ 0x10DE1142,␉"GeForce 620M" },␊
1092␉// { 0x10DE1143,␉"N13P-GV" },␊
1093␉// { 0x10DE1144,␉"GF117" },␊
1094␉// { 0x10DE1145,␉"GF117" },␊
1095␉// { 0x10DE1146,␉"GF117" },␊
1096␉// { 0x10DE1147,␉"GF117" },␊
1097␉// { 0x10DE1149,␉"GF117-ES" },␊
1098␉// { 0x10DE114A,␉"GF117-INT" },␊
1099␉// { 0x10DE114B,␉"PCI-GEN3-B" },␊
1100␉// 1150 - 115F␊
1101␉// 1160 - 116F␊
1102␉// 1170 - 117F␊
1103␉// 1180 - 118F␊
1104␉{ 0x10DE1180,␉"GeForce GTX 680" },␊
1105␉{ 0x10DE1183,␉"GeForce GTX 660 Ti" },␊
1106␉{ 0x10DE1185,␉"GeForce GTX 660" },␊
1107␉{ 0x10DE1188,␉"GeForce GTX 690" },␊
1108␉{ 0x10DE1189,␉"GeForce GTX 670" },␊
1109␉{ 0x10DE118F,␉"Tesla K10" },␊
1110␉// 1190 - 119F␊
1111␉// 11A0 - 11AF␊
1112␉{ 0x10DE11A0,␉"GeForce GTX 680M" },␊
1113␉{ 0x10DE11A1,␉"GeForce GTX 670MX" },␊
1114␉{ 0x10DE11A7,␉"GeForce GTX 675MX" },␊
1115␉// 11B0 - 11BF␊
1116␉{ 0x10DE11BA,␉"Quadro K5000" },␊
1117␉{ 0x10DE11BC,␉"Quadro K5000M" },␊
1118␉{ 0x10DE11BD,␉"Quadro K4000M" },␊
1119␉{ 0x10DE11BE,␉"Quadro K3000M" },␊
1120␉// 11C0 - 11CF␊
1121␉{ 0x10DE11C0,␉"GeForce GTX 660" },␊
1122␉{ 0x10DE11C6,␉"GeForce GTX 650 Ti" },␊
1123␉// 11D0 - 11DF␊
1124␉// 11E0 - 11EF␊
1125␉// 11F0 - 11FF␊
1126␉{ 0x10DE11FA,␉"Quadro K4000" },␊
1127␉// 1200 - 120F␊
1128␉{ 0x10DE1200,␉"GeForce GTX 560 Ti" },␊
1129␉{ 0x10DE1201,␉"GeForce GTX 560" },␊
1130␉{ 0x10DE1202,␉"GeForce GTX 560 Ti" },␊
1131␉{ 0x10DE1203,␉"GeForce GTX 460 SE v2" },␊
1132␉{ 0x10DE1205,␉"GeForce GTX 460 v2" },␊
1133␉{ 0x10DE1206,␉"GeForce GTX 555" },␊
1134␉{ 0x10DE1207,␉"GeForce GT 645" },␊
1135␉{ 0x10DE1208,␉"GeForce GTX 560 SE" },␊
1136␉{ 0x10DE1210,␉"GeForce GTX 570M" },␊
1137␉{ 0x10DE1211,␉"GeForce GTX 580M" },␊
1138␉{ 0x10DE1212,␉"GeForce GTX 675M" },␊
1139␉{ 0x10DE1213,␉"GeForce GTX 670M" },␊
1140␉{ 0x10DE1240,␉"GeForce GT 620M" },␊
1141␉{ 0x10DE1241,␉"GeForce GT 545" },␊
1142␉{ 0x10DE1243,␉"GeForce GT 545" },␊
1143␉{ 0x10DE1244,␉"GeForce GTX 550 Ti" },␊
1144␉{ 0x10DE1245,␉"GeForce GTS 450" },␊
1145␉{ 0x10DE1246,␉"GeForce GT 550M" },␊
1146␉{ 0x10DE1247,␉"GeForce GT 555M" },␊
1147␉{ 0x10DE1248,␉"GeForce GT 555M" },␊
1148␉{ 0x10DE1249,␉"GeForce GTS 450" }, // 450M?␊
1149␉{ 0x10DE124B,␉"GeForce GT 640" },␊
1150␉{ 0x10DE124D,␉"GeForce GT 555M" },␊
1151␉// { 0x10DE1250,␉"GF116-INT" },␊
1152␉{ 0x10DE1251,␉"GeForce GTX 560M" },␊
1153␉// 1260 - 126F␊
1154␉// 1270 - 127F␊
1155␉// 1280 - 128F␊
1156␉// 1290 - 129F␊
1157␉// 12A0 - 12AF␊
1158␉// 12B0 - 12BF␊
1159␉// 12C0 - 12CF␊
1160␉// 12D0 - 12DF␊
1161␉// 12E0 - 12EF␊
1162␉// 12F0 - 12FF␊
1163};␊
1164␊
1165static nvidia_card_info_t nvidia_card_exceptions[] = {␊
1166 /* ========================================================================================␊
1167 * Layout is device(VendorId + DeviceId), subdev (SubvendorId + SubdeviceId), display name.␊
1168 * ========================================================================================␊
1169 */␊
1170 /* ------ Specific DeviceID and SubDevID. ------ */␊
1171␉// 0000 - 00FF␊
1172␉{ 0x10DE0040,␉0x10438178,␉"Asus V9999 Ultra V62.11" },␊
1173␉{ 0x10DE0040,␉0x1043817D,␉"Asus V9999GT V61.21" },␊
1174␉{ 0x10DE0040,␉0x7FFFFFFF,␉"GeForce 6800 Ultra [NV40.0]" },␊
1175␉// 0100 - 01FF␊
1176␉{ 0x10DE01D7,␉0x102801C2,␉"Dell Quadro NVS 110M" },␊
1177␉{ 0x10DE01D7,␉0x102801CC,␉"Dell Quadro NVS 110M" },␊
1178␉{ 0x10DE01D7,␉0x10DE014B,␉"nVidia Quadro NVS 110M" },␊
1179␊
1180␉{ 0x10DE01D8,␉0x102801CC,␉"Dell Quadro NVS 120M" },␊
1181␉{ 0x10DE01D8,␉0x10282003,␉"Dell Quadro NVS 120M" },␊
1182␊
1183␉{ 0x10DE01DA,␉0x10280407,␉"Dell GeForce 7300 LE" },␊
1184␉// 0200 - 02FF␊
1185␉{ 0x10DE025B,␉0x10480D23,␉"ELSA Gloria4 700XGL" },␊
1186␉// 0300 - 03FF␊
1187␉{ 0x10DE0391,␉0x10DE047A,␉"Galaxy GeForce 7600 GT" },␊
1188␉{ 0x10DE0391,␉0x19F120DE,␉"Galaxy GeForce 7600 GT" },␊
1189␊
1190␉{ 0x10DE0393,␉0x00000400,␉"Apple GeForce 7300GT" },␊
1191␉// 0400 - 04FF␊
1192␉{ 0x10DE0402,␉0x10DE0439,␉"Galaxy 8600GT" },␊
1193␉{ 0x10DE0402,␉0x10DE0505,␉"Galaxy 8600GT" },␊
1194␉// 0500 - 05FF␊
1195␉{ 0x10DE05E2,␉0x104382EB,␉"ASUS ENGTX260" },␊
1196␉{ 0x10DE05E2,␉0x16822390,␉"HFX GeForce GTX 260" },␊
1197␉{ 0x10DE05E2,␉0x17870000,␉"HIS GeForce GTX 260" },␊
1198␊
1199␉{ 0x10DE05E6,␉0x10B00401,␉"Gainward GeForce GTX 285" },␊
1200␊
1201␉{ 0x10DE05E7,␉0x10DE0595,␉"nVidia Tesla T10 Processor" },␊
1202␉{ 0x10DE05E7,␉0x10DE066A,␉"nVidia Tesla C1060" },␊
1203␉{ 0x10DE05E7,␉0x10DE068F,␉"nVidia Tesla T10 Processor" },␊
1204␉{ 0x10DE05E7,␉0x10DE0697,␉"nVidia Tesla M1060" },␊
1205␉{ 0x10DE05E7,␉0x10DE0714,␉"nVidia Tesla M1060" },␊
1206␉{ 0x10DE05E7,␉0x10DE0743,␉"nVidia Tesla M1060" },␊
1207␉// 0600 - 06FF␊
1208␉{ 0x10DE0600,␉0x10DE0000,␉"Abit GeForce 8800 GTS" },␊
1209␊
1210␉{ 0x10DE0605,␉0x145834A2,␉"Gigabyte GV-N98TOC-512H" },␊
1211␊
1212␉{ 0x10DE0608,␉0x15880577,␉"Solidum GeForce 9800M GTX" },␊
1213␊
1214␉{ 0x10DE0609,␉0x11700121,␉"Inventec GeForce 8800M GTS" },␊
1215␊
1216␉{ 0x10DE0612,␉0x104382A6,␉"Asus GeForce 9800 GTX+" },␊
1217␉{ 0x10DE0612,␉0x10DE0571,␉"nVidia GeForce 9800 GTX+" },␊
1218␉{ 0x10DE0612,␉0x10DE0592,␉"nVidia GeForce 9800 GTX+" },␊
1219␉{ 0x10DE0612,␉0x3842C842,␉"EVGA GeForce 9800 GTX+" },␊
1220␉{ 0x10DE0612,␉0x3842C875,␉"EVGA GeForce 9800 GTX+" },␊
1221␊
1222␉{ 0x10DE0615,␉0x10480F67,␉"ELSA GeForce GTS 250" },␊
1223␉{ 0x10DE0615,␉0x10DE0592,␉"Palit GeForce GTS 250" },␊
1224␉{ 0x10DE0615,␉0x10DE0593,␉"Palit GeForce GTS 250" },␊
1225␉{ 0x10DE0615,␉0x10DE0652,␉"Palit GeForce GTS 250" },␊
1226␉{ 0x10DE0615,␉0x10DE0719,␉"Palit GeForce GTS 250" },␊
1227␉{ 0x10DE0615,␉0x10DE079E,␉"Palit GeForce GTS 250" },␊
1228␉{ 0x10DE0615,␉0x11503842,␉"TMC GeForce GTS 250" }, // Thinking Machines Corporation␊
1229␉{ 0x10DE0615,␉0x11513842,␉"JAE GeForce GTS 250" },␊
1230␉{ 0x10DE0615,␉0x11553842,␉"Pine GeForce GTS 250" },␊
1231␉{ 0x10DE0615,␉0x11563842,␉"Periscope GeForce GTS 250" },␊
1232␊
1233␉{ 0x10DE0618,␉0x10432028,␉"Asus GeForce GTX 170M" },␊
1234␉{ 0x10DE0618,␉0x1043202B,␉"Asus GeForce GTX 680" },␊
1235␊
1236␉{ 0x10DE0622,␉0x104382AC,␉"Asus EN9600GT Magic" },␊
1237␊
1238␉{ 0x10DE0640,␉0x10DE077F,␉"Inno3D GeForce 9500GT HDMI" },␊
1239␊
1240␉{ 0x10DE0649,␉0x1043202D,␉"Asus GeForce GT 220M" },␊
1241␊
1242␉{ 0x10DE06CD,␉0x10DE079F,␉"Point of View GeForce GTX 470" },␊
1243␉{ 0x10DE06CD,␉0x14622220,␉"MSi GeForce GTX 470 Twin Frozr II" },␊
1244␊
1245␉{ 0x10DE06D1,␉0x10DE0772,␉"nVidia Tesla C2070" },␊
1246␊
1247␉{ 0x10DE06D2,␉0x10DE088F,␉"nVidia Tesla X2070" },␊
1248␊
1249␉{ 0x10DE06DE,␉0x10DE0773,␉"nVidia Tesla S2050" },␊
1250␉{ 0x10DE06DE,␉0x10DE0830,␉"nVidia Tesla M2070" },␊
1251␉{ 0x10DE06DE,␉0x10DE0831,␉"nVidia Tesla M2070" },␊
1252␉{ 0x10DE06DE,␉0x10DE0832,␉"nVidia Tesla M2070" },␊
1253␉{ 0x10DE06DE,␉0x10DE0840,␉"nVidia Tesla X2070" },␊
1254␊
1255␉{ 0x10DE06E4,␉0x10438322,␉"Asus EN8400GS" },␊
1256␉{ 0x10DE06E4,␉0x14583475,␉"GV-NX84S256HE [GeForce 8400 GS]" },␊
1257␊
1258␉{ 0x10DE06E8,␉0x10280262,␉"Dell GeForce 9200M GS" },␊
1259␉{ 0x10DE06E8,␉0x10280271,␉"Dell GeForce 9200M GS" },␊
1260␉{ 0x10DE06E8,␉0x10280272,␉"Dell GeForce 9200M GS" },␊
1261␉{ 0x10DE06E8,␉0x103C30F4,␉"HP GeForce 9200M GS" },␊
1262␉{ 0x10DE06E8,␉0x103C30F7,␉"HP GeForce 9200M GS" },␊
1263␉{ 0x10DE06E8,␉0x103C3603,␉"HP GeForce 9200M GS" },␊
1264␉// 0700 - 07FF␊
1265␉// 0800 - 08FF␊
1266␉{ 0x10DE0873,␉0x104319B4,␉"Asus GeForce G102M" },␊
1267␉// 0900 - 09FF␊
1268␉// 0A00 - 0AFF␊
1269␉{ 0x10DE0A70,␉0x17AA3605,␉"Lenovo ION" },␊
1270␊
1271␉{ 0x10DE0A73,␉0x17AA3607,␉"Lenovo ION" },␊
1272␉{ 0x10DE0A73,␉0x17AA3610,␉"Lenovo ION" },␊
1273␊
1274␉{ 0x10DE0A75,␉0x17AA3605,␉"Lenovo ION" },␊
1275␉// 0B00 - 0BFF␊
1276␉// 0C00 - 0CFF␊
1277␉{ 0x10DE0CA3,␉0x14628041,␉"MSi VN240GT-MD1G" },␊
1278␉{ 0x10DE0CA3,␉0x16423926,␉"Bitland GeForce GT 230" },␊
1279␉// 0D00 - 0DFF␊
1280␉{ 0x10DE0DD8,␉0x10DE0914,␉"nVidia Quadro 2000D" },␊
1281␊
1282␉{ 0x10DE0DEF,␉0x17AA21F3,␉"Lenovo NVS 5400M" },␊
1283␉{ 0x10DE0DEF,␉0x17AA21F4,␉"Lenovo NVS 5400M" },␊
1284␉{ 0x10DE0DEF,␉0x17AA21F5,␉"Lenovo NVS 5400M" },␊
1285␉{ 0x10DE0DEF,␉0x17AA21F6,␉"Lenovo NVS 5400M" },␊
1286␉{ 0x10DE0DEF,␉0x17AA5005,␉"Lenovo NVS 5400M" },␊
1287␊
1288␉// 0E00 - 0EFF␊
1289␉{ 0x10DE0E22,␉0x1043835D,␉"Asus ENGTX460" },␊
1290␊
1291␉{ 0x10DE0E23,␉0x10B00401,␉"Gainward GeForce GTX 460" },␊
1292␉// 0F00 - 0FFF␊
1293␉{ 0x10DE0FD2,␉0x10280595,␉"Dell GeForce GT 640M LE" },␊
1294␉{ 0x10DE0FD2,␉0x102805B2,␉"Dell GeForce GT 640M LE" },␊
1295␉// 1000 - 10FF␊
1296␉{ 0x10DE1080,␉0x14622561,␉"MSI N580GTX Lightning" },␊
1297␉{ 0x10DE1080,␉0x14622563,␉"MSI N580GTX Lightning" },␊
1298␊
1299␉{ 0x10DE1086,␉0x10DE0871,␉"Inno3D GeForce GTX 570" },␊
1300␊
1301␉{ 0x10DE1087,␉0x104383D6,␉"Asus ENGTX560Ti448 DCII" },␊
1302␊
1303␉{ 0x10DE1091,␉0x10DE088E,␉"nVidia Tesla X2090" },␊
1304␉{ 0x10DE1091,␉0x10DE0891,␉"nVidia Tesla X2090" },␊
1305␉// 1100 - 11FF␊
1306␉{ 0x10DE1140,␉0x1025064A,␉"Acer GeForce GT 620M" },␊
1307␉{ 0x10DE1140,␉0x1025064C,␉"Acer GeForce GT 620M" },␊
1308␉{ 0x10DE1140,␉0x10250680,␉"Acer GeForce GT 620M" },␊
1309␉{ 0x10DE1140,␉0x10250692,␉"Acer GeForce GT 620M" },␊
1310␉{ 0x10DE1140,␉0x10250694,␉"Acer GeForce GT 620M" },␊
1311␉{ 0x10DE1140,␉0x10250702,␉"Acer GeForce GT 620M" },␊
1312␉{ 0x10DE1140,␉0x10250719,␉"Acer GeForce GT 620M" },␊
1313␉{ 0x10DE1140,␉0x10250725,␉"Acer GeForce GT 620M" },␊
1314␉{ 0x10DE1140,␉0x10250728,␉"Acer GeForce GT 620M" },␊
1315␉{ 0x10DE1140,␉0x1025072B,␉"Acer GeForce GT 620M" },␊
1316␉{ 0x10DE1140,␉0x1025072E,␉"Acer GeForce GT 620M" },␊
1317␉{ 0x10DE1140,␉0x10250732,␉"Acer GeForce GT 620M" },␊
1318␉{ 0x10DE1140,␉0x10280565,␉"Dell GeForce GT 630M" },␊
1319␉{ 0x10DE1140,␉0x10280568,␉"Dell GeForce GT 630M" },␊
1320␉{ 0x10DE1140,␉0x144DC0D5,␉"Samsung GeForce GT 630M" },␊
1321␉{ 0x10DE1140,␉0x17AA500D,␉"Lenovo GeForce GT 620M" },␊
1322␉{ 0x10DE1140,␉0x1B0A20DD,␉"Pegatron GeForce GT 620M" },␊
1323␉{ 0x10DE1140,␉0x1B0A20FD,␉"Pegatron GeForce GT 620M" },␊
1324␊
1325␉{ 0x10DE1180,␉0x00001255,␉"Afox GTX 680" },␊
1326␉{ 0x10DE1180,␉0x104383F0,␉"Asus GTX680-2GD5" },␊
1327␉{ 0x10DE1180,␉0x104383F6,␉"Asus GTX 680 Direct CU II" },␊
1328␉{ 0x10DE1180,␉0x104383F7,␉"Asus GTX 680 Direct CU II" },␊
1329␉{ 0x10DE1180,␉0x1458353C,␉"GV-N680OC-2GD WindForce GTX 680 OC" },␊
1330␉{ 0x10DE1180,␉0x14622820,␉"MSi N680GTX TwinFrozer" },␊
1331␉{ 0x10DE1180,␉0x14622830,␉"MSi GTX 680 Lightning" },␊
1332␉{ 0x10DE1180,␉0x14622831,␉"MSi GTX 680 Lightning LN2" },␊
1333␉{ 0x10DE1180,␉0x15691180,␉"Palit GTX 680 JetStream" },␊
1334␉{ 0x10DE1180,␉0x15691181,␉"Palit GTX 680 JetStream" },␊
1335␉{ 0x10DE1180,␉0x15691189,␉"Palit GTX 680 JetStream" },␊
1336␉{ 0x10DE1180,␉0x38422682,␉"EVGA GTX 680 SC" },␊
1337␉{ 0x10DE1180,␉0x38422683,␉"EVGA GTX 680 SC" },␊
1338␊
1339␉{ 0x10DE1189,␉0x10438405,␉"Asus GTX 670 Direct CU II TOP" },␊
1340␉{ 0x10DE1189,␉0x15691189,␉"Palit GTX 670 JetStream" },␊
1341␉{ 0x10DE1189,␉0x19DA1255,␉"Zotac GTX 670 AMP! Edition" },␊
1342␊
1343␉{ 0x10DE11A1,␉0x15587102,␉"Clevo N13E-GR" },␊
1344␊
1345␉{ 0x10DE11C0,␉0x10DE0995,␉"Inno3D GeForce GTX660" },␊
1346␉// 1200 - 12FF␊
1347␉{ 0x10DE1247,␉0x10432119,␉"Asus GeForce GT 670M" },␊
1348␉{ 0x10DE1247,␉0x10432120,␉"Asus GeForce GT 670M" },␊
1349␉{ 0x10DE1247,␉0x1043212A,␉"Asus GeForce GT 635M" },␊
1350␉{ 0x10DE1247,␉0x1043212B,␉"Asus GeForce GT 635M" },␊
1351␉{ 0x10DE1247,␉0x1043212C,␉"Asus GeForce GT 635M" },␊
1352␉{ 0x10DE1247,␉0x152D0930,␉"Quanta GeForce GT 635M" },␊
1353␊
1354␉{ 0x10DE1248,␉0x152D0930,␉"Quanta GeForce GT 635M" },␊
1355␊
1356␉{ 0x10DE124D,␉0x146210CC,␉"MSi GeForce GT 635M" },␊
1357};␊
1358␊
1359static int patch_nvidia_rom(uint8_t *rom)␊
1360{␊
1361␉if (!rom || (rom[0] != 0x55 && rom[1] != 0xaa)) {␊
1362␉␉printf("False ROM signature: 0x%02x%02x\n", rom[0], rom[1]);␊
1363␉␉return PATCH_ROM_FAILED;␊
1364␉}␊
1365␊
1366␉uint16_t dcbptr = READ_LE_SHORT(rom, 0x36);␊
1367␊
1368␉if (!dcbptr) {␊
1369␉␉printf("no dcb table found\n");␊
1370␉␉return PATCH_ROM_FAILED;␊
1371␉}␊
1372//␉else␊
1373//␉␉printf("dcb table at offset 0x%04x\n", dcbptr);␊
1374␊
1375␉uint8_t *dcbtable␉ = &rom[dcbptr];␊
1376␉uint8_t dcbtable_version = dcbtable[0];␊
1377␉uint8_t headerlength␉ = 0;␊
1378␉uint8_t numentries␉ = 0;␊
1379␉uint8_t recordlength␉ = 0;␊
1380␉␊
1381␉if (dcbtable_version >= 0x20)␊
1382␉{␊
1383␉␉uint32_t sig;␊
1384␉␉␊
1385␉␉if (dcbtable_version >= 0x30)␊
1386␉␉{␊
1387␉␉␉headerlength = dcbtable[1];␊
1388␉␉␉numentries␉ = dcbtable[2];␊
1389␉␉␉recordlength = dcbtable[3];␊
1390␊
1391␉␉␉sig = READ_LE_INT(dcbtable, 6);␊
1392␉␉}␊
1393␉␉else␊
1394␉␉{␊
1395␉␉␉sig = READ_LE_INT(dcbtable, 4);␊
1396␉␉␉headerlength = 8;␊
1397␉␉}␊
1398␊
1399␉␉if (sig != 0x4edcbdcb)␊
1400␉␉{␊
1401␉␉␉printf("Bad display config block signature (0x%8x)\n", sig); //Azi: issue #48␊
1402␉␉␉return PATCH_ROM_FAILED;␊
1403␉␉}␊
1404␉}␊
1405␉else if (dcbtable_version >= 0x14) /* some NV15/16, and NV11+ */␊
1406␉{␊
1407␉␉char sig[8] = { 0 };␊
1408␉␉␊
1409␉␉strncpy(sig, (char *)&dcbtable[-7], 7);␊
1410␉␉recordlength = 10;␊
1411␊
1412␉␉if (strcmp(sig, "DEV_REC"))␊
1413␉␉{␊
1414␉␉␉printf("Bad Display Configuration Block signature (%s)\n", sig);␊
1415␉␉␉return PATCH_ROM_FAILED;␊
1416␉␉}␊
1417␉}␊
1418␉else␊
1419␉{␊
1420␉␉printf("ERROR: dcbtable_version is 0x%X\n", dcbtable_version);␊
1421␉␉return PATCH_ROM_FAILED;␊
1422␉}␊
1423␉␊
1424␉if (numentries >= MAX_NUM_DCB_ENTRIES)␊
1425␉␉numentries = MAX_NUM_DCB_ENTRIES;␊
1426␊
1427␉uint8_t num_outputs = 0, i = 0;␊
1428␊
1429␉struct dcbentry␊
1430␉{␊
1431␉␉uint8_t type;␊
1432␉␉uint8_t index;␊
1433␉␉uint8_t *heads;␊
1434␉} entries[numentries];␊
1435␊
1436␉for (i = 0; i < numentries; i++)␊
1437␉{␊
1438␉␉uint32_t connection;␊
1439␉␉connection = READ_LE_INT(dcbtable,headerlength + recordlength * i);␊
1440␊
1441␉␉/* Should we allow discontinuous DCBs? Certainly DCB I2C tables can be discontinuous */␊
1442␉␉if ((connection & 0x0000000f) == 0x0000000f) /* end of records */ ␊
1443␉␉␉continue;␊
1444␉␉if (connection == 0x00000000) /* seen on an NV11 with DCB v1.5 */ ␊
1445␉␉␉continue;␊
1446␉␉if ((connection & 0xf) == 0x6) /* we skip type 6 as it doesnt appear on macbook nvcaps */␊
1447␉␉␉continue;␊
1448␊
1449␉␉entries[num_outputs].type = connection & 0xf;␊
1450␉␉entries[num_outputs].index = num_outputs;␊
1451␉␉entries[num_outputs++].heads = (uint8_t*)&(dcbtable[(headerlength + recordlength * i) + 1]);␊
1452␊
1453␉}␊
1454␉␊
1455␉int has_lvds = false;␊
1456␉uint8_t channel1 = 0, channel2 = 0;␊
1457␊
1458␉for (i = 0; i < num_outputs; i++)␊
1459␉{␊
1460␉␉if (entries[i].type == 3)␊
1461␉␉{␊
1462␉␉␉has_lvds = true;␊
1463␉␉␉//printf("found LVDS\n");␊
1464␉␉␉channel1 |= ( 0x1 << entries[i].index);␊
1465␉␉␉entries[i].type = TYPE_GROUPED;␊
1466␉␉}␊
1467␉}␊
1468␊
1469␉// if we have a LVDS output, we group the rest to the second channel␊
1470␉if (has_lvds)␊
1471␉{␊
1472␉␉for (i = 0; i < num_outputs; i++)␊
1473␉␉{␊
1474␉␉␉if (entries[i].type == TYPE_GROUPED)␊
1475␉␉␉␉continue;␊
1476␊
1477␉␉␉channel2 |= ( 0x1 << entries[i].index);␊
1478␉␉␉entries[i].type = TYPE_GROUPED;␊
1479␉␉}␊
1480␉}␊
1481␉else␊
1482␉{␊
1483␉␉int x;␊
1484␉␉// we loop twice as we need to generate two channels␊
1485␉␉for (x = 0; x <= 1; x++)␊
1486␉␉{␊
1487␉␉␉for (i=0; i<num_outputs; i++)␊
1488␉␉␉{␊
1489␉␉␉␉if (entries[i].type == TYPE_GROUPED)␊
1490␉␉␉␉␉continue;␊
1491␉␉␉␉// if type is TMDS, the prior output is ANALOG␊
1492␉␉␉␉// we always group ANALOG and TMDS␊
1493␉␉␉␉// if there is a TV output after TMDS, we group it to that channel as well␊
1494␉␉␉␉if (i && entries[i].type == 0x2)␊
1495␉␉␉␉{␊
1496␉␉␉␉␉switch (x)␊
1497␉␉␉␉␉{␊
1498␉␉␉␉␉␉case 0:␊
1499␉␉␉␉␉␉␉//printf("group channel 1\n");␊
1500␉␉␉␉␉␉␉channel1 |= ( 0x1 << entries[i].index);␊
1501␉␉␉␉␉␉␉entries[i].type = TYPE_GROUPED;␊
1502␊
1503␉␉␉␉␉␉␉if (entries[i-1].type == 0x0)␊
1504␉␉␉␉␉␉␉{␊
1505␉␉␉␉␉␉␉␉channel1 |= ( 0x1 << entries[i-1].index);␊
1506␉␉␉␉␉␉␉␉entries[i-1].type = TYPE_GROUPED;␊
1507␉␉␉␉␉␉␉}␊
1508␉␉␉␉␉␉␉// group TV as well if there is one␊
1509␉␉␉␉␉␉␉if ( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) )␊
1510␉␉␉␉␉␉␉{␊
1511␉␉␉␉␉␉␉␉//␉printf("group tv1\n");␊
1512␉␉␉␉␉␉␉␉channel1 |= ( 0x1 << entries[i+1].index);␊
1513␉␉␉␉␉␉␉␉entries[i+1].type = TYPE_GROUPED;␊
1514␉␉␉␉␉␉␉}␊
1515␉␉␉␉␉␉␉break;␊
1516␊
1517␉␉␉␉␉␉case 1:␊
1518␉␉␉␉␉␉␉//printf("group channel 2 : %d\n", i);␊
1519␉␉␉␉␉␉␉channel2 |= ( 0x1 << entries[i].index);␊
1520␉␉␉␉␉␉␉entries[i].type = TYPE_GROUPED;␊
1521␊
1522␉␉␉␉␉␉␉if (entries[i - 1].type == 0x0)␊
1523␉␉␉␉␉␉␉{␊
1524␉␉␉␉␉␉␉␉channel2 |= ( 0x1 << entries[i-1].index);␊
1525␉␉␉␉␉␉␉␉entries[i-1].type = TYPE_GROUPED;␊
1526␉␉␉␉␉␉␉}␊
1527␉␉␉␉␉␉␉// group TV as well if there is one␊
1528␉␉␉␉␉␉␉if ( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) )␊
1529␉␉␉␉␉␉␉{␊
1530␉␉␉␉␉␉␉␉//␉printf("group tv2\n");␊
1531␉␉␉␉␉␉␉␉channel2 |= ( 0x1 << entries[i+1].index);␊
1532␉␉␉␉␉␉␉␉entries[i+1].type = TYPE_GROUPED;␊
1533␉␉␉␉␉␉␉}␊
1534␉␉␉␉␉␉␉break;␊
1535␉␉␉␉␉}␊
1536␉␉␉␉␉break;␊
1537␉␉␉␉}␊
1538␉␉␉}␊
1539␉␉}␊
1540␉}␊
1541␉␊
1542␉// if we have left ungrouped outputs merge them to the empty channel␊
1543␉uint8_t *togroup;// = (channel1 ? (channel2 ? NULL : &channel2) : &channel1);␊
1544␉togroup = &channel2;␊
1545␊
1546␉for (i = 0; i < num_outputs; i++)␊
1547␉{␊
1548␉␉if (entries[i].type != TYPE_GROUPED)␊
1549␉␉{␊
1550␉␉␉//printf("%d not grouped\n", i);␊
1551␉␉␉if (togroup)␊
1552␉␉␉{␊
1553␉␉␉␉*togroup |= ( 0x1 << entries[i].index);␊
1554␉␉␉}␊
1555␉␉␉entries[i].type = TYPE_GROUPED;␊
1556␉␉}␊
1557␉}␊
1558␉␊
1559␉if (channel1 > channel2)␊
1560␉{␊
1561␉␉uint8_t buff = channel1;␊
1562␉␉channel1 = channel2;␊
1563␉␉channel2 = buff;␊
1564␉}␊
1565␉␊
1566␉default_NVCAP[6] = channel1;␊
1567␉default_NVCAP[8] = channel2;␊
1568␉␊
1569␉// patching HEADS␊
1570␉for (i = 0; i < num_outputs; i++)␊
1571␉{␊
1572␉␉if (channel1 & (1 << i))␊
1573␉␉{␊
1574␉␉␉*entries[i].heads = 1;␊
1575␉␉}␊
1576␉␉else if(channel2 & (1 << i))␊
1577␉␉{␊
1578␉␉␉*entries[i].heads = 2;␊
1579␉␉}␊
1580␉}␊
1581␉return (has_lvds ? PATCH_ROM_SUCCESS_HAS_LVDS : PATCH_ROM_SUCCESS);␊
1582}␊
1583␊
1584static char *get_nvidia_model(uint32_t device_id, uint32_t subsys_id)␊
1585{␊
1586␉int i, j;␊
1587␉static char name_model[128];␊
1588␊
1589␉// First check in the plist, (for e.g this can override any hardcoded devices)␊
1590␉cardList_t * nvcard = FindCardWithIds(device_id, subsys_id);␊
1591␉if (nvcard) ␊
1592␉{␊
1593␉␉if (nvcard->model) ␊
1594␉␉{␊
1595␉␉␉return nvcard->model;␊
1596␉␉}␊
1597␉}␊
1598␊
1599␉// Then check the exceptions table␊
1600␉if (subsys_id)␊
1601␉{␊
1602␉␉for (i = 0; i < (sizeof(nvidia_card_exceptions) / sizeof(nvidia_card_exceptions[0])); i++)␊
1603␉␉{␊
1604␉␉␉if ((nvidia_card_exceptions[i].device == device_id) &&␊
1605␉␉␉ (nvidia_card_exceptions[i].subdev == subsys_id))␊
1606␉␉␉{␊
1607␉␉␉␉return nvidia_card_exceptions[i].name;␊
1608␉␉␉}␊
1609␉␉}␊
1610␉}␊
1611␊
1612␉// At last try the generic names␊
1613␉for (i = 1; i < (sizeof(nvidia_card_generic) / sizeof(nvidia_card_generic[0])); i++)␊
1614␉{␊
1615 ␉if (nvidia_card_generic[i].device == device_id)␊
1616␉␉{␊
1617␉␉␉if (subsys_id)␊
1618␉␉␉{␊
1619␉␉␉␉for (j = 0; j < (sizeof(nvidia_card_vendors) / sizeof(nvidia_card_vendors[0])); j++)␊
1620␉␉␉␉{␊
1621␉␉␉␉␉if (nvidia_card_vendors[j].device == (subsys_id & 0xffff0000))␊
1622␉␉␉␉␉{␊
1623␉␉␉␉␉␉sprintf(name_model, "%s %s",␊
1624␉␉␉␉␉␉␉nvidia_card_vendors[j].name, nvidia_card_generic[i].name);␊
1625␉␉␉␉␉␉name_model[sizeof(name_model) - 1] = '\0';␊
1626␉␉␉␉␉␉return name_model;␊
1627␉␉␉␉␉}␊
1628␉␉␉␉}␊
1629␉␉␉}␊
1630␉␉␉return nvidia_card_generic[i].name;␊
1631␉␉}␊
1632␉}␊
1633␉return nvidia_card_generic[0].name;␊
1634}␊
1635␊
1636static uint32_t load_nvidia_bios_file(const char *filename, uint8_t **buf)␊
1637{␊
1638␉int fd;␊
1639␉int size;␊
1640␊
1641␉if ((fd = open_bvdev("bt(0,0)", filename, 0)) < 0)␊
1642␉{␊
1643␉␉return 0;␊
1644␉}␊
1645␊
1646␉size = file_size(fd);␊
1647 if(size)␊
1648 {␊
1649 *buf = malloc(size);␊
1650 size = read(fd, (char *)buf, size);␊
1651 }␊
1652␉close(fd);␊
1653␊
1654␉return size > 0 ? size : 0;␊
1655}␊
1656␊
1657static int devprop_add_nvidia_template(struct DevPropDevice *device)␊
1658{␊
1659␉char tmp[16];␊
1660␊
1661␉if (!device)␊
1662␉␉return 0;␊
1663␊
1664␉if (!DP_ADD_TEMP_VAL(device, nvidia_compatible_0))␊
1665␉␉return 0;␊
1666␉if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_0))␊
1667␉␉return 0;␊
1668␉if (!DP_ADD_TEMP_VAL(device, nvidia_name_0))␊
1669␉␉return 0;␊
1670␉if (!DP_ADD_TEMP_VAL(device, nvidia_compatible_1))␊
1671␉␉return 0;␊
1672␉if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_1))␊
1673␉␉return 0;␊
1674␉if (!DP_ADD_TEMP_VAL(device, nvidia_name_1))␊
1675␉␉return 0;␊
1676␉if (devices_number == 1)␊
1677␉{␊
1678␉ if (!DP_ADD_TEMP_VAL(device, nvidia_device_type))␊
1679␉␉ return 0;␊
1680␉}␊
1681␉else␊
1682␉{␊
1683␉ if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_child))␊
1684␉␉ return 0;␊
1685␉}␊
1686␊
1687␉// Rek : Dont use sprintf return, it does not WORK !! our custom sprintf() always return 0!␊
1688␉// len = sprintf(tmp, "Slot-%x", devices_number);␊
1689␉sprintf(tmp, "Slot-%x",devices_number);␊
1690␉devprop_add_value(device, "AAPL,slot-name", (uint8_t *) tmp, strlen(tmp));␊
1691␉devices_number++;␊
1692␊
1693␉return 1;␊
1694}␊
1695␊
1696int hex2bin(const char *hex, uint8_t *bin, int len)␊
1697{␊
1698␉char␉*p;␊
1699␉int␉i;␊
1700␉char␉buf[3];␊
1701␊
1702␉if (hex == NULL || bin == NULL || len <= 0 || strlen(hex) != len * 2) {␊
1703␉␉printf("[ERROR] bin2hex input error\n");␊
1704␉␉return -1;␊
1705␉}␊
1706␊
1707␉buf[2] = '\0';␊
1708␉p = (char *) hex;␊
1709␊
1710␉for (i = 0; i < len; i++)␊
1711␉{␊
1712␉␉if (p[0] == '\0' || p[1] == '\0' || !isxdigit(p[0]) || !isxdigit(p[1])) {␊
1713␉␉␉printf("[ERROR] bin2hex '%s' syntax error\n", hex);␊
1714␉␉␉return -2;␊
1715␉␉}␊
1716␉␉buf[0] = *p++;␊
1717␉␉buf[1] = *p++;␊
1718␉␉bin[i] = (unsigned char) strtoul(buf, NULL, 16);␊
1719␉}␊
1720␉return 0;␊
1721}␊
1722␊
1723unsigned long long mem_detect(volatile uint8_t *regs, uint8_t nvCardType, pci_dt_t *nvda_dev, uint32_t device_id, uint32_t subsys_id)␊
1724{␊
1725␉unsigned long long vram_size = 0;␊
1726␉␊
1727␉// First check if any value exist in the plist␊
1728␉cardList_t * nvcard = FindCardWithIds(device_id, subsys_id);␊
1729␉if (nvcard) ␊
1730␉{␊
1731␉␉if (nvcard->videoRam > 0) ␊
1732␉␉{␊
1733␉␉␉vram_size = nvcard->videoRam * 1024 * 1024;␊
1734␊
1735␉␉␉return vram_size;␊
1736␉␉}␊
1737␉}␊
1738␊
1739␉// Then, Workaround for 9600M GT, GT 210/420/430/440/525M/540M & GTX 560M␊
1740␉switch (nvda_dev->device_id)␊
1741␉{␊
1742␉␉case 0x0647: // 9600M GT 0647␊
1743␉␉␉vram_size = 512*1024*1024;␊
1744␉␉␉break;␊
1745␉␉case 0x0649:␉// 9600M GT 0649␊
1746␉␉␉// 10DE06491043202D 1GB VRAM␊
1747␉␉␉if (((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id) == 0x1043202D )␊
1748␉␉␉{␊
1749␉␉␉␉vram_size = 1024*1024*1024;␊
1750␉␉␉}␊
1751␉␉␉break;␊
1752␉␉case 0x0A65: // GT 210␊
1753␉␉case 0x0DE0: // GT 440␊
1754␉␉case 0x0DE1: // GT 430␊
1755␉␉case 0x0DE2: // GT 420␊
1756␉␉case 0x0DEC: // GT 525M 0DEC␊
1757␉␉case 0x0DF4: // GT 540M␊
1758␉␉case 0x0DF5: // GT 525M 0DF5␊
1759␉␉␉vram_size = 1024*1024*1024;␊
1760␉␉␉break;␊
1761␉␉case 0x1251: // GTX 560M␊
1762␉␉␉vram_size = 1536*1024*1024;␊
1763␉␉␉break;␊
1764␉␉default:␊
1765␉␉␉break;␊
1766␉}␊
1767␊
1768␉if (!vram_size) ␊
1769␉{ // Finally, if vram_size still not set do the calculation with our own method␊
1770␉␉if (nvCardType < NV_ARCH_50)␊
1771␉␉{␊
1772␉␉␉vram_size = REG32(NV04_PFB_FIFO_DATA);␊
1773␉␉␉vram_size &= NV10_PFB_FIFO_DATA_RAM_AMOUNT_MB_MASK;␊
1774␉␉}␊
1775␉␉else if (nvCardType < NV_ARCH_C0)␊
1776␉␉{␊
1777␉␉␉vram_size = REG32(NV04_PFB_FIFO_DATA);␊
1778␉␉␉vram_size |= (vram_size & 0xff) << 32;␊
1779␉␉␉vram_size &= 0xffffffff00ll;␊
1780␉␉}␊
1781␉␉else // >= NV_ARCH_C0␊
1782␉␉{␊
1783␉␉␉vram_size = REG32(NVC0_MEM_CTRLR_RAM_AMOUNT) << 20;␊
1784␉␉␉vram_size *= REG32(NVC0_MEM_CTRLR_COUNT);␊
1785␉␉}␊
1786␉}␊
1787␊
1788␉return vram_size;␊
1789}␊
1790␊
1791static bool checkNvRomSig(uint8_t * aRom){␊
1792 return aRom != NULL && (aRom[0] == 0x55 && aRom[1] == 0xaa);␊
1793}␊
1794␊
1795bool setup_nvidia_devprop(pci_dt_t *nvda_dev)␊
1796{␊
1797␉struct DevPropDevice␉*device;␊
1798␉char␉␉␉␉␉*devicepath;␊
1799␉option_rom_pci_header_t *rom_pci_header;␊
1800␉volatile uint8_t␉␉*regs;␊
1801␉uint8_t␉␉␉␉␉*rom;␊
1802␉uint8_t␉␉␉␉␉*nvRom;␊
1803␉uint8_t␉␉␉␉␉nvCardType;␊
1804␉unsigned long long␉␉videoRam;␊
1805␉uint32_t␉␉␉␉nvBiosOveride;␊
1806␉uint32_t␉␉␉␉bar[7];␊
1807␉uint32_t␉␉␉␉boot_display;␊
1808␉int␉␉␉␉␉␉nvPatch;␊
1809␉int␉␉␉␉␉␉len;␊
1810␉char␉␉␉␉␉biosVersion[32];␊
1811␉char␉␉␉␉␉nvFilename[32];␊
1812␉char␉␉␉␉␉kNVCAP[12];␊
1813␉char␉␉␉␉␉*model;␊
1814␉const char␉␉␉␉*value;␊
1815␉bool␉␉␉␉␉doit;␊
1816␊
1817␉fill_card_list();␊
1818␊
1819␉devicepath = get_pci_dev_path(nvda_dev);␊
1820␉bar[0] = pci_config_read32(nvda_dev->dev.addr, 0x10 );␊
1821␉regs = (uint8_t *) (bar[0] & ~0x0f);␊
1822␊
1823␉// get card type␊
1824␉nvCardType = (REG32(0) >> 20) & 0x1ff;␊
1825␊
1826␉model = get_nvidia_model(((nvda_dev->vendor_id << 16) | nvda_dev->device_id),((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id));␊
1827␊
1828␉// Amount of VRAM in kilobytes␊
1829␉videoRam = mem_detect(regs, nvCardType, nvda_dev,((nvda_dev->vendor_id << 16) | nvda_dev->device_id),((nvda_dev->subsys_id.subsys.vendor_id << 16) | nvda_dev->subsys_id.subsys.device_id) );␊
1830␊
1831␉sprintf(nvFilename, "/Extra/%04x_%04x.rom", (uint16_t)nvda_dev->vendor_id,␊
1832␉␉␉(uint16_t)nvda_dev->device_id);␊
1833␊
1834␉if (getBoolForKey(kUseNvidiaROM, &doit, &bootInfo->chameleonConfig) && doit)␊
1835␉{␊
1836␉␉verbose("Looking for nvidia video bios file %s\n", nvFilename);␊
1837␉␉nvBiosOveride = load_nvidia_bios_file(nvFilename, &rom);␊
1838␊
1839␉␉if (nvBiosOveride > 0)␊
1840␉␉{␊
1841␉␉␉verbose("Using nVidia Video BIOS File %s (%d Bytes)\n", nvFilename, nvBiosOveride);␊
1842␉␉␉DBG("%s Signature 0x%02x%02x %d bytes\n", nvFilename, rom[0], rom[1], nvBiosOveride);␊
1843␉␉}␊
1844␉␉else␊
1845␉␉{␊
1846␉␉␉printf("ERROR: unable to open nVidia Video BIOS File %s\n", nvFilename);␊
1847␉␉␉return false;␊
1848␉␉}␊
1849␉}␊
1850␉else␊
1851␉{␊
1852 rom = malloc(NVIDIA_ROM_SIZE);␊
1853␊
1854␉␉// Otherwise read bios from card␊
1855␉␉nvBiosOveride = 0;␊
1856␊
1857 // PROM first␊
1858 // Enable PROM access␊
1859 (REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED;␊
1860 nvRom = (uint8_t*)&regs[NV_PROM_OFFSET];␊
1861␊
1862 // Valid Signature ?␊
1863␉␉if (checkNvRomSig(nvRom))␊
1864␉␉{␊
1865 bcopy((uint8_t *)nvRom, rom, NVIDIA_ROM_SIZE);␊
1866 DBG("PROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
1867 }␊
1868 else␊
1869 {␊
1870␊
1871 // disable PROM access␊
1872 (REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED;␊
1873␊
1874␉ //PRAM next␊
1875 nvRom = (uint8_t*)&regs[NV_PRAMIN_OFFSET];␊
1876␊
1877 if(checkNvRomSig(nvRom))␊
1878 {␊
1879 bcopy((uint32_t *)nvRom, rom, NVIDIA_ROM_SIZE);␊
1880 DBG("PRAM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
1881 }␊
1882 else␊
1883 ␉␉{␊
1884␉␉␉␉// 0xC0000 last␊
1885␉␉␉␉bcopy((char *)0xc0000, rom, NVIDIA_ROM_SIZE);␊
1886␉␉␉␉␊
1887␉␉␉␉// Valid Signature ?␊
1888␉␉␉␉if (!checkNvRomSig(rom))␊
1889␉␉␉␉{␊
1890␉␉␉␉␉printf("ERROR: Unable to locate nVidia Video BIOS\n");␊
1891␉␉␉␉␉return false;␊
1892␉␉␉␉}␊
1893 else␊
1894 {␊
1895 DBG("ROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
1896 }␊
1897 ␉␉␉}//end PRAM check␊
1898 }//end PROM check␊
1899 ␉}//end load rom from bios␊
1900␊
1901␉if ((nvPatch = patch_nvidia_rom(rom)) == PATCH_ROM_FAILED)␊
1902␉{␊
1903␉␉printf("ERROR: nVidia ROM Patching Failed!\n");␊
1904␉␉//return false;␊
1905␉}␊
1906␊
1907␉rom_pci_header = (option_rom_pci_header_t*)(rom + *(uint16_t *)&rom[24]);␊
1908␊
1909␉// check for 'PCIR' sig␊
1910␉if (rom_pci_header->signature == 0x50434952)␊
1911␉{␊
1912␉␉if (rom_pci_header->device_id != nvda_dev->device_id)␊
1913␉␉{␊
1914␉␉␉// Get Model from the OpROM␊
1915␉␉␉model = get_nvidia_model(((rom_pci_header->vendor_id << 16) | rom_pci_header->device_id), 0);␊
1916␊
1917␉␉␉// Get VRAM again␊
1918␉␉␉videoRam = mem_detect(regs, nvCardType, nvda_dev, ((rom_pci_header->vendor_id << 16) | rom_pci_header->device_id), 0);␊
1919␊
1920␉␉}␊
1921␉␉else␊
1922␉␉{␊
1923␉␉␉printf("nVidia incorrect PCI ROM signature: 0x%x\n", rom_pci_header->signature);␊
1924␉␉}␊
1925␉}␊
1926␊
1927␉verbose("%s %dMB NV%02x [%04x:%04x]-[%04x:%04x] :: %s device number: %d\n",␊
1928␉␉␉model, (uint32_t)(videoRam / 1024 / 1024),␊
1929␉␉␉(REG32(0) >> 20) & 0x1ff, nvda_dev->vendor_id, nvda_dev->device_id,␊
1930␉␉␉nvda_dev->subsys_id.subsys.vendor_id, nvda_dev->subsys_id.subsys.device_id,␊
1931␉␉␉devicepath, devices_number);␊
1932␊
1933␉if (!string) {␊
1934␉␉string = devprop_create_string();␊
1935␉}␊
1936␉device = devprop_add_device(string, devicepath);␊
1937␊
1938␉/* FIXME: for primary graphics card only */␊
1939␉boot_display = 1;␊
1940␉if (devices_number == 1)␊
1941␉{␊
1942␉␉devprop_add_value(device, "@0,AAPL,boot-display", (uint8_t*)&boot_display, 4);␊
1943␉}␊
1944␊
1945␉if (nvPatch == PATCH_ROM_SUCCESS_HAS_LVDS) {␊
1946␉␉uint8_t built_in = 0x01;␊
1947␉␉devprop_add_value(device, "@0,built-in", &built_in, 1);␊
1948␉}␊
1949␊
1950␉// get bios version␊
1951␉const int MAX_BIOS_VERSION_LENGTH = 32;␊
1952␉char* version_str = (char*)malloc(MAX_BIOS_VERSION_LENGTH);␊
1953␊
1954␉memset(version_str, 0, MAX_BIOS_VERSION_LENGTH);␊
1955␊
1956␉int i, version_start;␊
1957␉int crlf_count = 0;␊
1958␊
1959␉// only search the first 384 bytes␊
1960␉for (i = 0; i < 0x180; i++)␊
1961␉{␊
1962␉␉if (rom[i] == 0x0D && rom[i+1] == 0x0A)␊
1963␉␉{␊
1964␉␉␉crlf_count++;␊
1965␉␉␉// second 0x0D0A was found, extract bios version␊
1966␉␉␉if (crlf_count == 2)␊
1967␉␉␉{␊
1968␉␉␉␉if (rom[i-1] == 0x20) i--; // strip last " "␊
1969␊
1970␉␉␉␉for (version_start = i; version_start > (i-MAX_BIOS_VERSION_LENGTH); version_start--)␊
1971␉␉␉␉{␊
1972␉␉␉␉␉// find start␊
1973␉␉␉␉␉if (rom[version_start] == 0x00)␊
1974␉␉␉␉␉{␊
1975␉␉␉␉␉␉version_start++;␊
1976␊
1977␉␉␉␉␉␉// strip "Version "␊
1978␉␉␉␉␉␉if (strncmp((const char*)rom+version_start, "Version ", 8) == 0)␊
1979␉␉␉␉␉␉{␊
1980␉␉␉␉␉␉␉version_start += 8;␊
1981␉␉␉␉␉␉}␊
1982␉␉␉␉␉␉␊
1983␉␉␉␉␉␉strncpy(version_str, (const char*)rom+version_start, i-version_start);␊
1984␉␉␉␉␉␉break;␊
1985␉␉␉␉␉}␊
1986␉␉␉␉}␊
1987␉␉␉␉break;␊
1988␉␉␉}␊
1989␉␉}␊
1990␉}␊
1991␉␊
1992␉sprintf(biosVersion, "%s", (nvBiosOveride > 0) ? nvFilename : version_str);␊
1993␉sprintf(kNVCAP, "NVCAP_%04x", nvda_dev->device_id);␊
1994␊
1995␉if (getValueForKey(kNVCAP, &value, &len, &bootInfo->chameleonConfig) && len == NVCAP_LEN * 2)␊
1996␉{␊
1997␉␉uint8_t new_NVCAP[NVCAP_LEN];␊
1998␊
1999␉␉if (hex2bin(value, new_NVCAP, NVCAP_LEN) == 0)␊
2000␉␉{␊
2001␉␉␉verbose("Using user supplied NVCAP for %s :: %s\n", model, devicepath);␊
2002␉␉␉memcpy(default_NVCAP, new_NVCAP, NVCAP_LEN);␊
2003␉␉}␊
2004␉}␊
2005␊
2006␉if (getValueForKey(kDcfg0, &value, &len, &bootInfo->chameleonConfig) && len == DCFG0_LEN * 2)␊
2007␉{␊
2008␉␉uint8_t new_dcfg0[DCFG0_LEN];␊
2009␊
2010␉␉if (hex2bin(value, new_dcfg0, DCFG0_LEN) == 0)␊
2011␉␉{␊
2012␉␉␉memcpy(default_dcfg_0, new_dcfg0, DCFG0_LEN);␊
2013␊
2014␉␉␉verbose("Using user supplied @0,display-cfg\n");␊
2015␉␉␉printf("@0,display-cfg: %02x%02x%02x%02x\n",␊
2016␉␉␉␉ default_dcfg_0[0], default_dcfg_0[1], default_dcfg_0[2], default_dcfg_0[3]);␊
2017␉␉}␊
2018␉}␊
2019␊
2020␉if (getValueForKey(kDcfg1, &value, &len, &bootInfo->chameleonConfig) && len == DCFG1_LEN * 2)␊
2021␉{␊
2022␉␉uint8_t new_dcfg1[DCFG1_LEN];␊
2023␊
2024␉␉if (hex2bin(value, new_dcfg1, DCFG1_LEN) == 0)␊
2025␉␉{␊
2026␉␉␉memcpy(default_dcfg_1, new_dcfg1, DCFG1_LEN);␊
2027␊
2028␉␉␉verbose("Using user supplied @1,display-cfg\n");␊
2029␉␉␉printf("@1,display-cfg: %02x%02x%02x%02x\n",␊
2030␉␉␉␉ default_dcfg_1[0], default_dcfg_1[1], default_dcfg_1[2], default_dcfg_1[3]);␊
2031␉␉}␊
2032␉}␊
2033␊
2034#if DEBUG_NVCAP␊
2035␉printf("NVCAP: %02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x\n",␊
2036␉default_NVCAP[0], default_NVCAP[1], default_NVCAP[2], default_NVCAP[3],␊
2037␉default_NVCAP[4], default_NVCAP[5], default_NVCAP[6], default_NVCAP[7],␊
2038␉default_NVCAP[8], default_NVCAP[9], default_NVCAP[10], default_NVCAP[11],␊
2039␉default_NVCAP[12], default_NVCAP[13], default_NVCAP[14], default_NVCAP[15],␊
2040␉default_NVCAP[16], default_NVCAP[17], default_NVCAP[18], default_NVCAP[19]);␊
2041#endif␊
2042␉␊
2043␉devprop_add_nvidia_template(device);␊
2044␉devprop_add_value(device, "NVCAP", default_NVCAP, NVCAP_LEN);␊
2045␉devprop_add_value(device, "NVPM", default_NVPM, NVPM_LEN);␊
2046␉devprop_add_value(device, "VRAM,totalsize", (uint8_t*)&videoRam, 4);␊
2047␉devprop_add_value(device, "model", (uint8_t*)model, strlen(model) + 1);␊
2048␉devprop_add_value(device, "rom-revision", (uint8_t*)biosVersion, strlen(biosVersion) + 1);␊
2049␉devprop_add_value(device, "@0,display-cfg", default_dcfg_0, DCFG0_LEN);␊
2050␉devprop_add_value(device, "@1,display-cfg", default_dcfg_1, DCFG1_LEN);␊
2051␊
2052␉if (getBoolForKey(kVBIOS, &doit, &bootInfo->chameleonConfig) && doit)␊
2053␉{␊
2054␉␉devprop_add_value(device, "vbios", rom, (nvBiosOveride > 0) ? nvBiosOveride : (rom[2] * 512));␊
2055␉}␊
2056␊
2057␉//add HDMI Audio back to nvidia␊
2058␉doit = false;␊
2059␉//http://forge.voodooprojects.org/p/chameleon/issues/67/␊
2060␉if(getBoolForKey(kEnableHDMIAudio, &doit, &bootInfo->chameleonConfig) && doit)␊
2061␉{␊
2062␉␉static uint8_t connector_type_1[]= {0x00, 0x08, 0x00, 0x00};␊
2063␉␉devprop_add_value(device, "@1,connector-type",connector_type_1, 4);␊
2064␉}␊
2065␉//end Nvidia HDMI Audio␊
2066␊
2067␉stringdata = malloc(sizeof(uint8_t) * string->length);␊
2068␉memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);␊
2069␉stringlength = string->length;␊
2070␊
2071␉free(rom);␊
2072␉return true;␊
2073}␊
2074

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