| 1 | /*␊ |
| 2 | * Copyright (c) 2000-2007 Apple Computer, Inc. All rights reserved.␊ |
| 3 | *␊ |
| 4 | * @APPLE_OSREFERENCE_LICENSE_HEADER_START@␊ |
| 5 | * ␊ |
| 6 | * This file contains Original Code and/or Modifications of Original Code␊ |
| 7 | * as defined in and that are subject to the Apple Public Source License␊ |
| 8 | * Version 2.0 (the 'License'). You may not use this file except in␊ |
| 9 | * compliance with the License. The rights granted to you under the License␊ |
| 10 | * may not be used to create, or enable the creation or redistribution of,␊ |
| 11 | * unlawful or unlicensed copies of an Apple operating system, or to␊ |
| 12 | * circumvent, violate, or enable the circumvention or violation of, any␊ |
| 13 | * terms of an Apple operating system software license agreement.␊ |
| 14 | * ␊ |
| 15 | * Please obtain a copy of the License at␊ |
| 16 | * http://www.opensource.apple.com/apsl/ and read it before using this file.␊ |
| 17 | * ␊ |
| 18 | * The Original Code and all software distributed under the License are␊ |
| 19 | * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER␊ |
| 20 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,␊ |
| 21 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,␊ |
| 22 | * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.␊ |
| 23 | * Please see the License for the specific language governing rights and␊ |
| 24 | * limitations under the License.␊ |
| 25 | * ␊ |
| 26 | * @APPLE_OSREFERENCE_LICENSE_HEADER_END@␊ |
| 27 | */␊ |
| 28 | /* ␊ |
| 29 | * Mach Operating System␊ |
| 30 | * Copyright (c) 1991,1990,1989,1988,1987 Carnegie Mellon University␊ |
| 31 | * All Rights Reserved.␊ |
| 32 | * ␊ |
| 33 | * Permission to use, copy, modify and distribute this software and its␊ |
| 34 | * documentation is hereby granted, provided that both the copyright␊ |
| 35 | * notice and this permission notice appear in all copies of the␊ |
| 36 | * software, derivative works or modified versions, and any portions␊ |
| 37 | * thereof, and that both notices appear in supporting documentation.␊ |
| 38 | * ␊ |
| 39 | * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"␊ |
| 40 | * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR␊ |
| 41 | * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.␊ |
| 42 | * ␊ |
| 43 | * Carnegie Mellon requests users of this software to return to␊ |
| 44 | * ␊ |
| 45 | * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU␊ |
| 46 | * School of Computer Science␊ |
| 47 | * Carnegie Mellon University␊ |
| 48 | * Pittsburgh PA 15213-3890␊ |
| 49 | * ␊ |
| 50 | * any improvements or extensions that they make and grant Carnegie Mellon␊ |
| 51 | * the rights to redistribute these changes.␊ |
| 52 | */␊ |
| 53 | /*␉File:␉machine.h␊ |
| 54 | *␉Author:␉Avadis Tevanian, Jr.␊ |
| 55 | *␉Date:␉1986␊ |
| 56 | *␊ |
| 57 | *␉Machine independent machine abstraction.␊ |
| 58 | */␊ |
| 59 | ␊ |
| 60 | #ifndef␉_MACH_MACHINE_H_␊ |
| 61 | #define _MACH_MACHINE_H_␊ |
| 62 | ␊ |
| 63 | #ifndef __ASSEMBLER__␊ |
| 64 | ␊ |
| 65 | #include <stdint.h>␊ |
| 66 | #include <mach/machine/vm_types.h>␊ |
| 67 | #include <mach/boolean.h>␊ |
| 68 | ␊ |
| 69 | typedef integer_t␉cpu_type_t;␊ |
| 70 | typedef integer_t␉cpu_subtype_t;␊ |
| 71 | typedef integer_t␉cpu_threadtype_t;␊ |
| 72 | ␊ |
| 73 | #define CPU_STATE_MAX␉␉4␊ |
| 74 | ␊ |
| 75 | #define CPU_STATE_USER␉␉0␊ |
| 76 | #define CPU_STATE_SYSTEM␉1␊ |
| 77 | #define CPU_STATE_IDLE␉␉2␊ |
| 78 | #define CPU_STATE_NICE␉␉3␊ |
| 79 | ␊ |
| 80 | ␊ |
| 81 | ␊ |
| 82 | /*␊ |
| 83 | * Capability bits used in the definition of cpu_type.␊ |
| 84 | */␊ |
| 85 | #define␉CPU_ARCH_MASK␉0xff000000␉␉/* mask for architecture bits */␊ |
| 86 | #define CPU_ARCH_ABI64␉0x01000000␉␉/* 64 bit ABI */␊ |
| 87 | ␊ |
| 88 | /*␊ |
| 89 | *␉Machine types known by all.␊ |
| 90 | */␊ |
| 91 | ␊ |
| 92 | #define CPU_TYPE_ANY␉␉((cpu_type_t) -1)␊ |
| 93 | ␊ |
| 94 | #define CPU_TYPE_VAX␉␉((cpu_type_t) 1)␊ |
| 95 | /* skip␉␉␉␉((cpu_type_t) 2)␉*/␊ |
| 96 | /* skip␉␉␉␉((cpu_type_t) 3)␉*/␊ |
| 97 | /* skip␉␉␉␉((cpu_type_t) 4)␉*/␊ |
| 98 | /* skip␉␉␉␉((cpu_type_t) 5)␉*/␊ |
| 99 | #define␉CPU_TYPE_MC680x0␉((cpu_type_t) 6)␊ |
| 100 | #define CPU_TYPE_X86␉␉((cpu_type_t) 7)␊ |
| 101 | #define CPU_TYPE_I386␉␉CPU_TYPE_X86␉␉/* compatibility */␊ |
| 102 | #define␉CPU_TYPE_X86_64␉␉(CPU_TYPE_X86 | CPU_ARCH_ABI64)␊ |
| 103 | ␊ |
| 104 | /* skip CPU_TYPE_MIPS␉␉((cpu_type_t) 8)␉*/␊ |
| 105 | /* skip ␉␉␉((cpu_type_t) 9)␉*/␊ |
| 106 | #define CPU_TYPE_MC98000␉((cpu_type_t) 10)␊ |
| 107 | #define CPU_TYPE_HPPA ((cpu_type_t) 11)␊ |
| 108 | #define CPU_TYPE_ARM␉␉((cpu_type_t) 12)␊ |
| 109 | #define CPU_TYPE_MC88000␉((cpu_type_t) 13)␊ |
| 110 | #define CPU_TYPE_SPARC␉␉((cpu_type_t) 14)␊ |
| 111 | #define CPU_TYPE_I860␉␉((cpu_type_t) 15)␊ |
| 112 | /* skip␉CPU_TYPE_ALPHA␉␉((cpu_type_t) 16)␉*/␊ |
| 113 | /* skip␉␉␉␉((cpu_type_t) 17)␉*/␊ |
| 114 | #define CPU_TYPE_POWERPC␉␉((cpu_type_t) 18)␊ |
| 115 | #define CPU_TYPE_POWERPC64␉␉(CPU_TYPE_POWERPC | CPU_ARCH_ABI64)␊ |
| 116 | ␊ |
| 117 | /*␊ |
| 118 | *␉Machine subtypes (these are defined here, instead of in a machine␊ |
| 119 | *␉dependent directory, so that any program can get all definitions␊ |
| 120 | *␉regardless of where is it compiled).␊ |
| 121 | */␊ |
| 122 | ␊ |
| 123 | /*␊ |
| 124 | * Capability bits used in the definition of cpu_subtype.␊ |
| 125 | */␊ |
| 126 | #define CPU_SUBTYPE_MASK␉0xff000000␉/* mask for feature flags */␊ |
| 127 | #define CPU_SUBTYPE_LIB64␉0x80000000␉/* 64 bit libraries */␊ |
| 128 | ␊ |
| 129 | ␊ |
| 130 | /*␊ |
| 131 | *␉Object files that are hand-crafted to run on any␊ |
| 132 | *␉implementation of an architecture are tagged with␊ |
| 133 | *␉CPU_SUBTYPE_MULTIPLE. This functions essentially the same as␊ |
| 134 | *␉the "ALL" subtype of an architecture except that it allows us␊ |
| 135 | *␉to easily find object files that may need to be modified␊ |
| 136 | *␉whenever a new implementation of an architecture comes out.␊ |
| 137 | *␊ |
| 138 | *␉It is the responsibility of the implementor to make sure the␊ |
| 139 | *␉software handles unsupported implementations elegantly.␊ |
| 140 | */␊ |
| 141 | #define␉CPU_SUBTYPE_MULTIPLE␉␉((cpu_subtype_t) -1)␊ |
| 142 | #define CPU_SUBTYPE_LITTLE_ENDIAN␉((cpu_subtype_t) 0)␊ |
| 143 | #define CPU_SUBTYPE_BIG_ENDIAN␉␉((cpu_subtype_t) 1)␊ |
| 144 | ␊ |
| 145 | /*␊ |
| 146 | * Machine threadtypes.␊ |
| 147 | * This is none - not defined - for most machine types/subtypes.␊ |
| 148 | */␊ |
| 149 | #define CPU_THREADTYPE_NONE␉␉((cpu_threadtype_t) 0)␊ |
| 150 | ␊ |
| 151 | /*␊ |
| 152 | *␉VAX subtypes (these do *not* necessary conform to the actual cpu␊ |
| 153 | *␉ID assigned by DEC available via the SID register).␊ |
| 154 | */␊ |
| 155 | ␊ |
| 156 | #define␉CPU_SUBTYPE_VAX_ALL␉((cpu_subtype_t) 0) ␊ |
| 157 | #define CPU_SUBTYPE_VAX780␉((cpu_subtype_t) 1)␊ |
| 158 | #define CPU_SUBTYPE_VAX785␉((cpu_subtype_t) 2)␊ |
| 159 | #define CPU_SUBTYPE_VAX750␉((cpu_subtype_t) 3)␊ |
| 160 | #define CPU_SUBTYPE_VAX730␉((cpu_subtype_t) 4)␊ |
| 161 | #define CPU_SUBTYPE_UVAXI␉((cpu_subtype_t) 5)␊ |
| 162 | #define CPU_SUBTYPE_UVAXII␉((cpu_subtype_t) 6)␊ |
| 163 | #define CPU_SUBTYPE_VAX8200␉((cpu_subtype_t) 7)␊ |
| 164 | #define CPU_SUBTYPE_VAX8500␉((cpu_subtype_t) 8)␊ |
| 165 | #define CPU_SUBTYPE_VAX8600␉((cpu_subtype_t) 9)␊ |
| 166 | #define CPU_SUBTYPE_VAX8650␉((cpu_subtype_t) 10)␊ |
| 167 | #define CPU_SUBTYPE_VAX8800␉((cpu_subtype_t) 11)␊ |
| 168 | #define CPU_SUBTYPE_UVAXIII␉((cpu_subtype_t) 12)␊ |
| 169 | ␊ |
| 170 | /*␊ |
| 171 | * ␉680x0 subtypes␊ |
| 172 | *␊ |
| 173 | * The subtype definitions here are unusual for historical reasons.␊ |
| 174 | * NeXT used to consider 68030 code as generic 68000 code. For␊ |
| 175 | * backwards compatability:␊ |
| 176 | * ␊ |
| 177 | *␉CPU_SUBTYPE_MC68030 symbol has been preserved for source code␊ |
| 178 | *␉compatability.␊ |
| 179 | *␊ |
| 180 | *␉CPU_SUBTYPE_MC680x0_ALL has been defined to be the same␊ |
| 181 | *␉subtype as CPU_SUBTYPE_MC68030 for binary comatability.␊ |
| 182 | *␊ |
| 183 | *␉CPU_SUBTYPE_MC68030_ONLY has been added to allow new object␊ |
| 184 | *␉files to be tagged as containing 68030-specific instructions.␊ |
| 185 | */␊ |
| 186 | ␊ |
| 187 | #define␉CPU_SUBTYPE_MC680x0_ALL␉␉((cpu_subtype_t) 1)␊ |
| 188 | #define CPU_SUBTYPE_MC68030␉␉((cpu_subtype_t) 1) /* compat */␊ |
| 189 | #define CPU_SUBTYPE_MC68040␉␉((cpu_subtype_t) 2) ␊ |
| 190 | #define␉CPU_SUBTYPE_MC68030_ONLY␉((cpu_subtype_t) 3)␊ |
| 191 | ␊ |
| 192 | /*␊ |
| 193 | *␉I386 subtypes␊ |
| 194 | */␊ |
| 195 | ␊ |
| 196 | #define CPU_SUBTYPE_INTEL(f, m)␉((cpu_subtype_t) (f) + ((m) << 4))␊ |
| 197 | ␊ |
| 198 | #define␉CPU_SUBTYPE_I386_ALL␉␉␉CPU_SUBTYPE_INTEL(3, 0)␊ |
| 199 | #define CPU_SUBTYPE_386␉␉␉␉␉CPU_SUBTYPE_INTEL(3, 0)␊ |
| 200 | #define CPU_SUBTYPE_486␉␉␉␉␉CPU_SUBTYPE_INTEL(4, 0)␊ |
| 201 | #define CPU_SUBTYPE_486SX␉␉␉␉CPU_SUBTYPE_INTEL(4, 8)␉// 8 << 4 = 128␊ |
| 202 | #define CPU_SUBTYPE_586␉␉␉␉␉CPU_SUBTYPE_INTEL(5, 0)␊ |
| 203 | #define CPU_SUBTYPE_PENT␉CPU_SUBTYPE_INTEL(5, 0)␊ |
| 204 | #define CPU_SUBTYPE_PENTPRO␉CPU_SUBTYPE_INTEL(6, 1)␊ |
| 205 | #define CPU_SUBTYPE_PENTII_M3␉CPU_SUBTYPE_INTEL(6, 3)␊ |
| 206 | #define CPU_SUBTYPE_PENTII_M5␉CPU_SUBTYPE_INTEL(6, 5)␊ |
| 207 | #define CPU_SUBTYPE_CELERON␉␉␉␉CPU_SUBTYPE_INTEL(7, 6)␊ |
| 208 | #define CPU_SUBTYPE_CELERON_MOBILE␉␉CPU_SUBTYPE_INTEL(7, 7)␊ |
| 209 | #define CPU_SUBTYPE_PENTIUM_3␉␉␉CPU_SUBTYPE_INTEL(8, 0)␊ |
| 210 | #define CPU_SUBTYPE_PENTIUM_3_M␉␉␉CPU_SUBTYPE_INTEL(8, 1)␊ |
| 211 | #define CPU_SUBTYPE_PENTIUM_3_XEON␉␉CPU_SUBTYPE_INTEL(8, 2)␊ |
| 212 | #define CPU_SUBTYPE_PENTIUM_M␉␉␉CPU_SUBTYPE_INTEL(9, 0)␊ |
| 213 | #define CPU_SUBTYPE_PENTIUM_4␉␉␉CPU_SUBTYPE_INTEL(10, 0)␊ |
| 214 | #define CPU_SUBTYPE_PENTIUM_4_M␉␉␉CPU_SUBTYPE_INTEL(10, 1)␊ |
| 215 | #define CPU_SUBTYPE_ITANIUM␉␉␉␉CPU_SUBTYPE_INTEL(11, 0)␊ |
| 216 | #define CPU_SUBTYPE_ITANIUM_2␉␉␉CPU_SUBTYPE_INTEL(11, 1)␊ |
| 217 | #define CPU_SUBTYPE_XEON␉␉␉␉CPU_SUBTYPE_INTEL(12, 0)␊ |
| 218 | #define CPU_SUBTYPE_XEON_MP␉␉␉␉CPU_SUBTYPE_INTEL(12, 1)␊ |
| 219 | ␊ |
| 220 | #define CPU_SUBTYPE_INTEL_FAMILY(x)␉((x) & 15)␊ |
| 221 | #define CPU_SUBTYPE_INTEL_FAMILY_MAX␉15␊ |
| 222 | ␊ |
| 223 | #define CPU_SUBTYPE_INTEL_MODEL(x)␉((x) >> 4)␊ |
| 224 | #define CPU_SUBTYPE_INTEL_MODEL_ALL␉0␊ |
| 225 | ␊ |
| 226 | /*␊ |
| 227 | *␉X86 subtypes.␊ |
| 228 | */␊ |
| 229 | ␊ |
| 230 | #define CPU_SUBTYPE_X86_ALL␉␉((cpu_subtype_t)3)␊ |
| 231 | #define CPU_SUBTYPE_X86_64_ALL␉␉((cpu_subtype_t)3)␊ |
| 232 | #define CPU_SUBTYPE_X86_ARCH1␉␉((cpu_subtype_t)4)␊ |
| 233 | ␊ |
| 234 | ␊ |
| 235 | #define CPU_THREADTYPE_INTEL_HTT␉((cpu_threadtype_t) 1)␊ |
| 236 | ␊ |
| 237 | /*␊ |
| 238 | *␉Mips subtypes.␊ |
| 239 | */␊ |
| 240 | ␊ |
| 241 | #define␉CPU_SUBTYPE_MIPS_ALL␉((cpu_subtype_t) 0)␊ |
| 242 | #define CPU_SUBTYPE_MIPS_R2300␉((cpu_subtype_t) 1)␊ |
| 243 | #define CPU_SUBTYPE_MIPS_R2600␉((cpu_subtype_t) 2)␊ |
| 244 | #define CPU_SUBTYPE_MIPS_R2800␉((cpu_subtype_t) 3)␊ |
| 245 | #define CPU_SUBTYPE_MIPS_R2000a␉((cpu_subtype_t) 4)␉/* pmax */␊ |
| 246 | #define CPU_SUBTYPE_MIPS_R2000␉((cpu_subtype_t) 5)␊ |
| 247 | #define CPU_SUBTYPE_MIPS_R3000a␉((cpu_subtype_t) 6)␉/* 3max */␊ |
| 248 | #define CPU_SUBTYPE_MIPS_R3000␉((cpu_subtype_t) 7)␊ |
| 249 | ␊ |
| 250 | /*␊ |
| 251 | *␉MC98000 (PowerPC) subtypes␊ |
| 252 | */␊ |
| 253 | #define␉CPU_SUBTYPE_MC98000_ALL␉((cpu_subtype_t) 0)␊ |
| 254 | #define CPU_SUBTYPE_MC98601␉((cpu_subtype_t) 1)␊ |
| 255 | ␊ |
| 256 | /*␊ |
| 257 | *␉HPPA subtypes for Hewlett-Packard HP-PA family of␊ |
| 258 | *␉risc processors. Port by NeXT to 700 series. ␊ |
| 259 | */␊ |
| 260 | ␊ |
| 261 | #define␉CPU_SUBTYPE_HPPA_ALL␉␉((cpu_subtype_t) 0)␊ |
| 262 | #define CPU_SUBTYPE_HPPA_7100␉␉((cpu_subtype_t) 0) /* compat */␊ |
| 263 | #define CPU_SUBTYPE_HPPA_7100LC␉␉((cpu_subtype_t) 1)␊ |
| 264 | ␊ |
| 265 | /*␊ |
| 266 | *␉MC88000 subtypes.␊ |
| 267 | */␊ |
| 268 | #define␉CPU_SUBTYPE_MC88000_ALL␉((cpu_subtype_t) 0)␊ |
| 269 | #define CPU_SUBTYPE_MC88100␉((cpu_subtype_t) 1)␊ |
| 270 | #define CPU_SUBTYPE_MC88110␉((cpu_subtype_t) 2)␊ |
| 271 | ␊ |
| 272 | /*␊ |
| 273 | *␉SPARC subtypes␊ |
| 274 | */␊ |
| 275 | #define␉CPU_SUBTYPE_SPARC_ALL␉␉((cpu_subtype_t) 0)␊ |
| 276 | ␊ |
| 277 | /*␊ |
| 278 | *␉I860 subtypes␊ |
| 279 | */␊ |
| 280 | #define CPU_SUBTYPE_I860_ALL␉((cpu_subtype_t) 0)␊ |
| 281 | #define CPU_SUBTYPE_I860_860␉((cpu_subtype_t) 1)␊ |
| 282 | ␊ |
| 283 | /*␊ |
| 284 | *␉PowerPC subtypes␊ |
| 285 | */␊ |
| 286 | #define CPU_SUBTYPE_POWERPC_ALL␉␉((cpu_subtype_t) 0)␊ |
| 287 | #define CPU_SUBTYPE_POWERPC_601␉␉((cpu_subtype_t) 1)␊ |
| 288 | #define CPU_SUBTYPE_POWERPC_602␉␉((cpu_subtype_t) 2)␊ |
| 289 | #define CPU_SUBTYPE_POWERPC_603␉␉((cpu_subtype_t) 3)␊ |
| 290 | #define CPU_SUBTYPE_POWERPC_603e␉((cpu_subtype_t) 4)␊ |
| 291 | #define CPU_SUBTYPE_POWERPC_603ev␉((cpu_subtype_t) 5)␊ |
| 292 | #define CPU_SUBTYPE_POWERPC_604␉␉((cpu_subtype_t) 6)␊ |
| 293 | #define CPU_SUBTYPE_POWERPC_604e␉((cpu_subtype_t) 7)␊ |
| 294 | #define CPU_SUBTYPE_POWERPC_620␉␉((cpu_subtype_t) 8)␊ |
| 295 | #define CPU_SUBTYPE_POWERPC_750␉␉((cpu_subtype_t) 9)␊ |
| 296 | #define CPU_SUBTYPE_POWERPC_7400␉((cpu_subtype_t) 10)␊ |
| 297 | #define CPU_SUBTYPE_POWERPC_7450␉((cpu_subtype_t) 11)␊ |
| 298 | #define CPU_SUBTYPE_POWERPC_970␉␉((cpu_subtype_t) 100)␊ |
| 299 | ␊ |
| 300 | /*␊ |
| 301 | *␉ARM subtypes␊ |
| 302 | */␊ |
| 303 | #define CPU_SUBTYPE_ARM_ALL ((cpu_subtype_t) 0)␊ |
| 304 | #define CPU_SUBTYPE_ARM_V4T ((cpu_subtype_t) 5)␊ |
| 305 | #define CPU_SUBTYPE_ARM_V6 ((cpu_subtype_t) 6)␊ |
| 306 | #define CPU_SUBTYPE_ARM_V5TEJ ((cpu_subtype_t) 7)␊ |
| 307 | #define CPU_SUBTYPE_ARM_XSCALE␉␉((cpu_subtype_t) 8)␊ |
| 308 | #define CPU_SUBTYPE_ARM_V7␉␉((cpu_subtype_t) 9)␊ |
| 309 | #define CPU_SUBTYPE_ARM_V7F␉␉((cpu_subtype_t) 10) /* Cortex A9 */␊ |
| 310 | #define CPU_SUBTYPE_ARM_V7K␉␉((cpu_subtype_t) 12) /* Kirkwood40 */␊ |
| 311 | ␊ |
| 312 | #endif /* !__ASSEMBLER__ */␊ |
| 313 | ␊ |
| 314 | /*␊ |
| 315 | *␉CPU families (sysctl hw.cpufamily)␊ |
| 316 | *␊ |
| 317 | * These are meant to identify the CPU's marketing name - an␊ |
| 318 | * application can map these to (possibly) localized strings.␊ |
| 319 | * NB: the encodings of the CPU families are intentionally arbitrary.␊ |
| 320 | * There is no ordering, and you should never try to deduce whether␊ |
| 321 | * or not some feature is available based on the family.␊ |
| 322 | * Use feature flags (eg, hw.optional.altivec) to test for optional␊ |
| 323 | * functionality.␊ |
| 324 | */␊ |
| 325 | #define CPUFAMILY_UNKNOWN ␉␉0␊ |
| 326 | #define CPUFAMILY_POWERPC_G3␉␉0xcee41549␊ |
| 327 | #define CPUFAMILY_POWERPC_G4␉␉0x77c184ae␊ |
| 328 | #define CPUFAMILY_POWERPC_G5␉␉0xed76d8aa␊ |
| 329 | #define CPUFAMILY_INTEL_6_13␉␉0xaa33392b␊ |
| 330 | #define CPUFAMILY_INTEL_YONAH␉␉0x73d67300␊ |
| 331 | #define CPUFAMILY_INTEL_MEROM␉␉0x426f69ef␊ |
| 332 | #define CPUFAMILY_INTEL_PENRYN␉␉0x78ea4fbc␊ |
| 333 | #define CPUFAMILY_INTEL_NEHALEM␉␉0x6b5a4cd2␊ |
| 334 | #define CPUFAMILY_INTEL_WESTMERE␉0x573b5eec␊ |
| 335 | #define CPUFAMILY_INTEL_SANDYBRIDGE␉0x5490b78c␊ |
| 336 | #define CPUFAMILY_INTEL_IVYBRIDGE␉0x1f65e835␊ |
| 337 | #define CPUFAMILY_ARM_9␉␉␉0xe73283ae␊ |
| 338 | #define CPUFAMILY_ARM_11␉␉0x8ff620d8␊ |
| 339 | #define CPUFAMILY_ARM_XSCALE␉␉0x53b005f5␊ |
| 340 | #define CPUFAMILY_ARM_13␉␉0x0cc90e64␊ |
| 341 | #define CPUFAMILY_ARM_14␉␉0x96077ef1␊ |
| 342 | ␊ |
| 343 | /* The following synonyms are deprecated: */␊ |
| 344 | #define CPUFAMILY_INTEL_6_14␉CPUFAMILY_INTEL_YONAH␊ |
| 345 | #define CPUFAMILY_INTEL_6_15␉CPUFAMILY_INTEL_MEROM␊ |
| 346 | #define CPUFAMILY_INTEL_6_23␉CPUFAMILY_INTEL_PENRYN␊ |
| 347 | #define CPUFAMILY_INTEL_6_26␉CPUFAMILY_INTEL_NEHALEM␊ |
| 348 | ␊ |
| 349 | #define CPUFAMILY_INTEL_CORE␉CPUFAMILY_INTEL_YONAH␊ |
| 350 | #define CPUFAMILY_INTEL_CORE2␉CPUFAMILY_INTEL_MEROM␊ |
| 351 | ␊ |
| 352 | ␊ |
| 353 | #endif␉/* _MACH_MACHINE_H_ */␊ |
| 354 | |
