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Root/branches/Chimera/i386/libsaio/acpi_patcher.c

1/*
2 * Copyright 2008 mackerintel
3 */
4
5#include "libsaio.h"
6#include "boot.h"
7#include "bootstruct.h"
8#include "acpi.h"
9#include "efi_tables.h"
10#include "fake_efi.h"
11#include "acpi_patcher.h"
12#include "platform.h"
13#include "cpu.h"
14#include "aml_generator.h"
15
16#ifndef DEBUG_ACPI
17#define DEBUG_ACPI 0
18#endif
19
20#if DEBUG_ACPI==2
21#define DBG(x...) {printf(x); sleep(1);}
22#elif DEBUG_ACPI==1
23#define DBG(x...) printf(x)
24#else
25#define DBG(x...)
26#endif
27
28// Slice: New signature compare function
29boolean_t tableSign(char *table, const char *sgn)
30{
31int i;
32for (i=0; i<4; i++) {
33if ((table[i] &~0x20) != (sgn[i] &~0x20)) {
34return false;
35}
36}
37return true;
38}
39
40/* Gets the ACPI 1.0 RSDP address */
41static struct acpi_2_rsdp* getAddressOfAcpiTable()
42{
43 /* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
44
45 void *acpi_addr = (void*)ACPI_RANGE_START;
46 for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
47 {
48 if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
49 {
50 uint8_t csum = checksum8(acpi_addr, 20);
51 if(csum == 0)
52 {
53 // Only return the table if it is a true version 1.0 table (Revision 0)
54 if(((struct acpi_2_rsdp*)acpi_addr)->Revision == 0)
55 return acpi_addr;
56 }
57 }
58 }
59 return NULL;
60}
61
62/* Gets the ACPI 2.0 RSDP address */
63static struct acpi_2_rsdp* getAddressOfAcpi20Table()
64{
65 /* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
66
67 void *acpi_addr = (void*)ACPI_RANGE_START;
68 for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
69 {
70 if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
71 {
72 uint8_t csum = checksum8(acpi_addr, 20);
73
74 /* Only assume this is a 2.0 or better table if the revision is greater than 0
75 * NOTE: ACPI 3.0 spec only seems to say that 1.0 tables have revision 1
76 * and that the current revision is 2.. I am going to assume that rev > 0 is 2.0.
77 */
78
79 if(csum == 0 && (((struct acpi_2_rsdp*)acpi_addr)->Revision > 0))
80 {
81 uint8_t csum2 = checksum8(acpi_addr, sizeof(struct acpi_2_rsdp));
82 if(csum2 == 0)
83 return acpi_addr;
84 }
85 }
86 }
87 return NULL;
88}
89/** The folowing ACPI Table search algo. should be reused anywhere needed:*/
90int search_and_get_acpi_fd(const char * filename, const char ** outDirspec)
91{
92int fd = 0;
93char dirSpec[512];
94
95// Try finding 'filename' in the usual places
96// Start searching any potential location for ACPI Table
97sprintf(dirSpec, "%s", filename);
98fd = open(dirSpec, 0);
99if (fd < 0)
100{
101sprintf(dirSpec, "/Extra/%s", filename);
102fd = open(dirSpec, 0);
103if (fd < 0)
104{
105sprintf(dirSpec, "bt(0,0)/Extra/%s", filename);
106fd = open(dirSpec, 0);
107}
108}
109
110if (fd < 0)
111{
112// NOT FOUND:
113verbose("ACPI table not found: %s\n", filename);
114*dirSpec = '\0';
115}
116
117if (outDirspec) *outDirspec = dirSpec;
118return fd;
119}
120
121
122void *loadACPITable (const char * filename)
123{
124void *tableAddr;
125const char * dirspec=NULL;
126
127int fd = search_and_get_acpi_fd(filename, &dirspec);
128
129if (fd>=0)
130{
131tableAddr=(void*)AllocateKernelMemory(file_size (fd));
132if (tableAddr)
133{
134if (read (fd, tableAddr, file_size (fd))!=file_size (fd))
135{
136printf("Couldn't read table %s\n",dirspec);
137free (tableAddr);
138close (fd);
139return NULL;
140}
141
142DBG("Table %s read and stored at: %x\n", dirspec, tableAddr);
143close (fd);
144return tableAddr;
145}
146close (fd);
147printf("Couldn't allocate memory for table \n", dirspec);
148}
149//printf("Couldn't find table %s\n", filename);
150return NULL;
151}
152
153uint8_tacpi_cpu_count = 0;
154char* acpi_cpu_name[32];
155uint32_t acpi_cpu_p_blk = 0;
156
157void get_acpi_cpu_names(unsigned char* dsdt, uint32_t length)
158{
159uint32_t i;
160
161 DBG("start finding cpu names. length %d\n", length);
162
163for (i=0; i<length-7; i++)
164{
165if (dsdt[i] == 0x5B && dsdt[i+1] == 0x83) // ProcessorOP
166{
167 DBG("dsdt: %x%x\n", dsdt[i], dsdt[i+1]);
168
169uint32_t offset = i + 3 + (dsdt[i+2] >> 6);
170
171bool add_name = true;
172
173uint8_t j;
174
175for (j=0; j<4; j++)
176{
177char c = dsdt[offset+j];
178
179if (!aml_isvalidchar(c))
180{
181add_name = false;
182verbose("Invalid character found in ProcessorOP 0x%x!\n", c);
183break;
184}
185}
186
187if (add_name)
188{
189acpi_cpu_name[acpi_cpu_count] = malloc(4);
190memcpy(acpi_cpu_name[acpi_cpu_count], dsdt+offset, 4);
191i = offset + 5;
192
193 if (acpi_cpu_count == 0)
194 acpi_cpu_p_blk = dsdt[i] | (dsdt[i+1] << 8);
195
196verbose("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
197
198if (++acpi_cpu_count == 32) return;
199}
200}
201}
202
203 DBG("end finding cpu names: cpu names found: %d\n", acpi_cpu_count);
204}
205
206struct acpi_2_ssdt *generate_cst_ssdt(struct acpi_2_fadt* fadt)
207{
208char ssdt_header[] =
209{
2100x53, 0x53, 0x44, 0x54, 0xE7, 0x00, 0x00, 0x00, /* SSDT.... */
2110x01, 0x17, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x41, /* ..PmRefA */
2120x43, 0x70, 0x75, 0x43, 0x73, 0x74, 0x00, 0x00, /* CpuCst.. */
2130x00, 0x10, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* ....INTL */
2140x31, 0x03, 0x10, 0x20/* 1.._*/
215};
216
217char resource_template_register_fixedhw[] =
218{
2190x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
2200x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2210x00, 0x00, 0x01, 0x79, 0x00
222};
223
224char resource_template_register_systemio[] =
225{
2260x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
2270x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
2280x00, 0x00, 0x00, 0x79, 0x00,
229};
230
231if (Platform.CPU.Vendor != 0x756E6547) {
232verbose ("Not an Intel platform: C-States will not be generated !!!\n");
233return NULL;
234}
235
236if (fadt == NULL) {
237verbose ("FACP not exists: C-States will not be generated !!!\n");
238return NULL;
239}
240
241struct acpi_2_dsdt* dsdt = (void*)fadt->DSDT;
242
243if (dsdt == NULL) {
244verbose ("DSDT not found: C-States will not be generated !!!\n");
245return NULL;
246}
247
248if (acpi_cpu_count == 0)
249get_acpi_cpu_names((void*)dsdt, dsdt->Length);
250
251if (acpi_cpu_count > 0)
252{
253bool c2_enabled = false;
254bool c3_enabled = false;
255bool c4_enabled = false;
256bool cst_using_systemio = false;
257
258getBoolForKey(kEnableC2State, &c2_enabled, &bootInfo->chameleonConfig);
259getBoolForKey(kEnableC3State, &c3_enabled, &bootInfo->chameleonConfig);
260getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->chameleonConfig);
261getBoolForKey(kCSTUsingSystemIO, &cst_using_systemio, &bootInfo->chameleonConfig);
262
263c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
264c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
265
266unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + (c3_enabled ? 1 : 0);
267
268struct aml_chunk* root = aml_create_node(NULL);
269aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
270struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
271struct aml_chunk* name = aml_add_name(scop, "CST_");
272struct aml_chunk* pack = aml_add_package(name);
273aml_add_byte(pack, cstates_count);
274
275struct aml_chunk* tmpl = aml_add_package(pack);
276if (cst_using_systemio)
277{
278// C1
279resource_template_register_fixedhw[8] = 0x00;
280resource_template_register_fixedhw[9] = 0x00;
281resource_template_register_fixedhw[18] = 0x00;
282aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
283aml_add_byte(tmpl, 0x01); // C1
284aml_add_word(tmpl, 0x0001); // Latency
285aml_add_dword(tmpl, 0x000003e8); // Power
286
287uint8_t p_blk_lo, p_blk_hi;
288
289if (c2_enabled) // C2
290{
291p_blk_lo = acpi_cpu_p_blk + 4;
292p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
293
294tmpl = aml_add_package(pack);
295resource_template_register_systemio[11] = p_blk_lo; // C2
296resource_template_register_systemio[12] = p_blk_hi; // C2
297aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
298aml_add_byte(tmpl, 0x02); // C2
299aml_add_word(tmpl, 0x0040); // Latency
300aml_add_dword(tmpl, 0x000001f4); // Power
301}
302
303if (c4_enabled) // C4
304{
305p_blk_lo = acpi_cpu_p_blk + 5;
306p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
307
308tmpl = aml_add_package(pack);
309resource_template_register_systemio[11] = p_blk_lo; // C4
310resource_template_register_systemio[12] = p_blk_hi; // C4
311aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
312aml_add_byte(tmpl, 0x04); // C4
313aml_add_word(tmpl, 0x0080); // Latency
314aml_add_dword(tmpl, 0x000000C8); // Power
315}
316else if (c3_enabled) // C3
317{
318p_blk_lo = acpi_cpu_p_blk + 5;
319p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
320
321tmpl = aml_add_package(pack);
322resource_template_register_systemio[11] = p_blk_lo; // C3
323resource_template_register_systemio[12] = p_blk_hi; // C3
324aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
325aml_add_byte(tmpl, 0x03);// C3
326aml_add_word(tmpl, 0x0060);// Latency
327aml_add_dword(tmpl, 0x0000015e);// Power
328}
329}
330else
331{
332// C1
333resource_template_register_fixedhw[11] = 0x00; // C1
334aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
335aml_add_byte(tmpl, 0x01);// C1
336aml_add_word(tmpl, 0x0001);// Latency
337aml_add_dword(tmpl, 0x000003e8);// Power
338
339resource_template_register_fixedhw[18] = 0x03;
340
341if (c2_enabled) // C2
342{
343tmpl = aml_add_package(pack);
344resource_template_register_fixedhw[11] = 0x10; // C2
345aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
346aml_add_byte(tmpl, 0x02);// C2
347aml_add_word(tmpl, 0x0040);// Latency
348aml_add_dword(tmpl, 0x000001f4);// Power
349}
350
351if (c4_enabled) // C4
352{
353tmpl = aml_add_package(pack);
354resource_template_register_fixedhw[11] = 0x30; // C4
355aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
356aml_add_byte(tmpl, 0x04);// C4
357aml_add_word(tmpl, 0x0080);// Latency
358aml_add_dword(tmpl, 0x000000C8);// Power
359}
360else if (c3_enabled)
361{
362tmpl = aml_add_package(pack);
363resource_template_register_fixedhw[11] = 0x20; // C3
364aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
365aml_add_byte(tmpl, 0x03);// C3
366aml_add_word(tmpl, 0x0060);// Latency
367aml_add_dword(tmpl, 0x0000015e);// Power
368}
369}
370
371// Aliaces
372int i;
373for (i = 0; i < acpi_cpu_count; i++)
374{
375char name[9];
376sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
377
378scop = aml_add_scope(root, name);
379aml_add_alias(scop, "CST_", "_CST");
380}
381
382aml_calculate_size(root);
383
384struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
385
386aml_write_node(root, (void*)ssdt, 0);
387
388ssdt->Length = root->Size;
389ssdt->Checksum = 0;
390ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
391
392aml_destroy_node(root);
393
394// dumpPhysAddr("C-States SSDT content: ", ssdt, ssdt->Length);
395
396verbose ("SSDT with CPU C-States generated successfully\n");
397
398return ssdt;
399}
400else
401{
402verbose ("ACPI CPUs not found: C-States not generated !!!\n");
403}
404
405return NULL;
406}
407
408struct acpi_2_ssdt *generate_pss_ssdt(struct acpi_2_dsdt* dsdt)
409{
410char ssdt_header[] =
411{
4120x53, 0x53, 0x44, 0x54, 0x7E, 0x00, 0x00, 0x00, /* SSDT.... */
4130x01, 0x6A, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x00, /* ..PmRef. */
4140x43, 0x70, 0x75, 0x50, 0x6D, 0x00, 0x00, 0x00, /* CpuPm... */
4150x00, 0x30, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* .0..INTL */
4160x31, 0x03, 0x10, 0x20,/* 1.._*/
417};
418
419if (Platform.CPU.Vendor != 0x756E6547) {
420verbose ("Not an Intel platform: P-States will not be generated !!!\n");
421return NULL;
422}
423
424if (!(Platform.CPU.Features & CPU_FEATURE_MSR)) {
425verbose ("Unsupported CPU: P-States will not be generated !!!\n");
426return NULL;
427}
428
429if (acpi_cpu_count == 0)
430get_acpi_cpu_names((void*)dsdt, dsdt->Length);
431
432if (acpi_cpu_count > 0)
433{
434struct p_state initial, maximum, minimum, p_states[32];
435uint8_t p_states_count = 0;
436
437// Retrieving P-States, ported from code by superhai (c)
438switch (Platform.CPU.Family) {
439case 0x06:
440{
441switch (Platform.CPU.Model)
442{
443case CPU_MODEL_DOTHAN:// Intel Pentium M
444case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
445case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
446case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
447case CPU_MODEL_ATOM:// Intel Atom (45nm)
448{
449bool cpu_dynamic_fsb = false;
450
451if (rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 27))
452{
453wrmsr64(MSR_IA32_EXT_CONFIG, (rdmsr64(MSR_IA32_EXT_CONFIG) | (1 << 28)));
454delay(1);
455cpu_dynamic_fsb = rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 28);
456}
457
458bool cpu_noninteger_bus_ratio = (rdmsr64(MSR_IA32_PERF_STATUS) & (1ULL << 46));
459
460initial.Control = rdmsr64(MSR_IA32_PERF_STATUS);
461
462maximum.Control = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 32) & 0x1F3F) | (0x4000 * cpu_noninteger_bus_ratio);
463maximum.CID = ((maximum.FID & 0x1F) << 1) | cpu_noninteger_bus_ratio;
464
465minimum.FID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 24) & 0x1F) | (0x80 * cpu_dynamic_fsb);
466minimum.VID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 48) & 0x3F);
467
468if (minimum.FID == 0)
469{
470uint64_t msr;
471uint8_t i;
472// Probe for lowest fid
473for (i = maximum.FID; i >= 0x6; i--)
474{
475msr = rdmsr64(MSR_IA32_PERF_CONTROL);
476wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (i << 8) | minimum.VID);
477intel_waitforsts();
478minimum.FID = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0x1F;
479delay(1);
480}
481
482msr = rdmsr64(MSR_IA32_PERF_CONTROL);
483wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
484intel_waitforsts();
485}
486
487if (minimum.VID == maximum.VID)
488{
489uint64_t msr;
490uint8_t i;
491// Probe for lowest vid
492for (i = maximum.VID; i > 0xA; i--)
493{
494msr = rdmsr64(MSR_IA32_PERF_CONTROL);
495wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (minimum.FID << 8) | i);
496intel_waitforsts();
497minimum.VID = rdmsr64(MSR_IA32_PERF_STATUS) & 0x3F;
498delay(1);
499}
500
501msr = rdmsr64(MSR_IA32_PERF_CONTROL);
502wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
503intel_waitforsts();
504}
505
506minimum.CID = ((minimum.FID & 0x1F) << 1) >> cpu_dynamic_fsb;
507
508// Sanity check
509if (maximum.CID < minimum.CID)
510{
511DBG("Insane FID values!");
512p_states_count = 0;
513}
514else
515{
516// Finalize P-States
517// Find how many P-States machine supports
518p_states_count = maximum.CID - minimum.CID + 1;
519
520if (p_states_count > 32)
521p_states_count = 32;
522
523uint8_t vidstep;
524uint8_t i = 0, u, invalid = 0;
525
526vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);
527
528for (u = 0; u < p_states_count; u++)
529{
530i = u - invalid;
531
532p_states[i].CID = maximum.CID - u;
533p_states[i].FID = (p_states[i].CID >> 1);
534
535if (p_states[i].FID < 0x6)
536{
537if (cpu_dynamic_fsb)
538p_states[i].FID = (p_states[i].FID << 1) | 0x80;
539}
540else if (cpu_noninteger_bus_ratio)
541{
542p_states[i].FID = p_states[i].FID | (0x40 * (p_states[i].CID & 0x1));
543}
544
545if (i && p_states[i].FID == p_states[i-1].FID)
546invalid++;
547
548p_states[i].VID = ((maximum.VID << 2) - (vidstep * u)) >> 2;
549
550uint32_t multiplier = p_states[i].FID & 0x1f;// = 0x08
551bool half = p_states[i].FID & 0x40;// = 0x01
552bool dfsb = p_states[i].FID & 0x80;// = 0x00
553uint32_t fsb = Platform.CPU.FSBFrequency / 1000000; // = 400
554uint32_t halffsb = (fsb + 1) >> 1;// = 200
555uint32_t frequency = (multiplier * fsb);// = 3200
556
557p_states[i].Frequency = (frequency + (half * halffsb)) >> dfsb;// = 3200 + 200 = 3400
558}
559
560p_states_count -= invalid;
561}
562
563break;
564}
565case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
566case CPU_MODEL_DALES:
567case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
568case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
569case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
570case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
571case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
572case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
573case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
574case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
575 case CPU_MODEL_HASWELL: // Intel Core i3, i5, i7, Xeon E3 LGA1155 (22nm)
576
577{
578if ((Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE) ||
579 (Platform.CPU.Model == CPU_MODEL_JAKETOWN) ||
580 (Platform.CPU.Model == CPU_MODEL_HASWELL))
581 {
582 maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;
583 } else {
584 maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff;
585 }
586 minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
587
588verbose("P-States: min %d, max %d\n", minimum.Control, maximum.Control);
589
590// Sanity check
591if (maximum.Control < minimum.Control)
592{
593DBG("Insane control values!");
594p_states_count = 0;
595}
596else
597{
598uint8_t i;
599p_states_count = 0;
600
601for (i = maximum.Control; i >= minimum.Control; i--)
602{
603p_states[p_states_count].Control = i;
604p_states[p_states_count].CID = p_states[p_states_count].Control << 1;
605p_states[p_states_count].Frequency = (Platform.CPU.FSBFrequency / 1000000) * i;
606p_states_count++;
607}
608}
609
610break;
611}
612default:
613verbose ("Unsupported CPU: P-States not generated !!!\n");
614break;
615}
616}
617}
618
619// Generating SSDT
620if (p_states_count > 0)
621{
622int i;
623
624struct aml_chunk* root = aml_create_node(NULL);
625aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
626struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
627struct aml_chunk* name = aml_add_name(scop, "PSS_");
628struct aml_chunk* pack = aml_add_package(name);
629
630for (i = 0; i < p_states_count; i++)
631{
632struct aml_chunk* pstt = aml_add_package(pack);
633
634aml_add_dword(pstt, p_states[i].Frequency);
635aml_add_dword(pstt, 0x00000000); // Power
636aml_add_dword(pstt, 0x0000000A); // Latency
637aml_add_dword(pstt, 0x0000000A); // Latency
638aml_add_dword(pstt, p_states[i].Control);
639aml_add_dword(pstt, i+1); // Status
640}
641
642// Add aliaces
643for (i = 0; i < acpi_cpu_count; i++)
644{
645char name[9];
646sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
647
648scop = aml_add_scope(root, name);
649aml_add_alias(scop, "PSS_", "_PSS");
650}
651
652aml_calculate_size(root);
653
654struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
655
656aml_write_node(root, (void*)ssdt, 0);
657
658ssdt->Length = root->Size;
659ssdt->Checksum = 0;
660ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
661
662aml_destroy_node(root);
663
664//dumpPhysAddr("P-States SSDT content: ", ssdt, ssdt->Length);
665
666verbose ("SSDT with CPU P-States generated successfully\n");
667
668return ssdt;
669}
670}
671else
672{
673verbose ("ACPI CPUs not found: P-States not generated !!!\n");
674}
675
676return NULL;
677}
678
679struct acpi_2_fadt *patch_fadt(struct acpi_2_fadt *fadt, struct acpi_2_dsdt *new_dsdt)
680{
681extern void setupSystemType();
682
683struct acpi_2_fadt *fadt_mod;
684bool fadt_rev2_needed = false;
685bool fix_restart;
686bool fix_restart_ps2;
687const char * value;
688
689// Restart Fix
690if (Platform.CPU.Vendor == 0x756E6547) {/* Intel */
691fix_restart = true;
692fix_restart_ps2 = false;
693if ( getBoolForKey(kPS2RestartFix, &fix_restart_ps2, &bootInfo->chameleonConfig) && fix_restart_ps2)
694fix_restart = true;
695else
696getBoolForKey(kRestartFix, &fix_restart, &bootInfo->chameleonConfig);
697
698} else {
699verbose ("Not an Intel platform: Restart Fix not applied !!!\n");
700fix_restart = false;
701}
702
703if (fix_restart) fadt_rev2_needed = true;
704
705// Allocate new fadt table
706if (fadt->Length < 0x84 && fadt_rev2_needed)
707{
708fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(0x84);
709memcpy(fadt_mod, fadt, fadt->Length);
710fadt_mod->Length = 0x84;
711fadt_mod->Revision = 0x02; // FADT rev 2 (ACPI 1.0B MS extensions)
712}
713else
714{
715fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(fadt->Length);
716memcpy(fadt_mod, fadt, fadt->Length);
717}
718// Determine system type / PM_Model
719if ( (value=getStringForKey(kSystemType, &bootInfo->chameleonConfig))!=NULL)
720{
721if (Platform.Type > 6)
722{
723if(fadt_mod->PM_Profile<=6)
724Platform.Type = fadt_mod->PM_Profile; // get the fadt if correct
725else
726Platform.Type = 1;/* Set a fixed value (Desktop) */
727verbose("Error: system-type must be 0..6. Defaulting to %d !\n", Platform.Type);
728}
729else
730Platform.Type = (unsigned char) strtoul(value, NULL, 10);
731}
732// Set PM_Profile from System-type if only user wanted this value to be forced
733if (fadt_mod->PM_Profile != Platform.Type)
734{
735 if (value)
736{ // user has overriden the SystemType so take care of it in FACP
737verbose("FADT: changing PM_Profile from 0x%02x to 0x%02x\n", fadt_mod->PM_Profile, Platform.Type);
738fadt_mod->PM_Profile = Platform.Type;
739 }
740 else
741 { // PM_Profile has a different value and no override has been set, so reflect the user value to ioregs
742Platform.Type = fadt_mod->PM_Profile <= 6 ? fadt_mod->PM_Profile : 1;
743 }
744}
745// We now have to write the systemm-type in ioregs: we cannot do it before in setupDeviceTree()
746// because we need to take care of facp original content, if it is correct.
747setupSystemType();
748
749// Patch FADT to fix restart
750if (fix_restart)
751{
752if (fix_restart_ps2) {
753fadt_mod->Flags|= 0x400;
754fadt_mod->Reset_SpaceID= 0x01; // System I/O
755fadt_mod->Reset_BitWidth= 0x08; // 1 byte
756fadt_mod->Reset_BitOffset= 0x00; // Offset 0
757fadt_mod->Reset_AccessWidth= 0x01; // Byte access
758fadt_mod->Reset_Address= 0x64; // Address of the register
759fadt_mod->Reset_Value= 0xfe; // Value to write to reset the system
760msglog("FADT: PS2 Restart Fix applied!\n");
761}
762else {
763fadt_mod->Flags|= 0x400;
764fadt_mod->Reset_SpaceID= 0x01; // System I/O
765fadt_mod->Reset_BitWidth= 0x08; // 1 byte
766fadt_mod->Reset_BitOffset= 0x00; // Offset 0
767fadt_mod->Reset_AccessWidth= 0x01; // Byte access
768fadt_mod->Reset_Address= 0x0cf9; // Address of the register
769fadt_mod->Reset_Value= 0x06; // Value to write to reset the system
770verbose("FADT: ACPI Restart Fix applied!\n");
771}
772
773}
774
775// Patch DSDT Address if we have loaded DSDT.aml
776if(new_dsdt)
777{
778DBG("DSDT: Old @%x,%x, ",fadt_mod->DSDT,fadt_mod->X_DSDT);
779
780fadt_mod->DSDT=(uint32_t)new_dsdt;
781if ((uint32_t)(&(fadt_mod->X_DSDT))-(uint32_t)fadt_mod+8<=fadt_mod->Length)
782fadt_mod->X_DSDT=(uint32_t)new_dsdt;
783
784DBG("New @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);
785
786verbose("FADT: Using custom DSDT!\n");
787}
788
789// Correct the checksum
790fadt_mod->Checksum=0;
791fadt_mod->Checksum=256-checksum8(fadt_mod,fadt_mod->Length);
792
793return fadt_mod;
794}
795
796/* Setup ACPI without replacing DSDT. */
797int setupAcpiNoMod()
798{
799//addConfigurationTable(&gEfiAcpiTableGuid, getAddressOfAcpiTable(), "ACPI");
800//addConfigurationTable(&gEfiAcpi20TableGuid, getAddressOfAcpi20Table(), "ACPI_20");
801/* XXX aserebln why uint32 cast if pointer is uint64 ? */
802acpi10_p = (uint32_t)getAddressOfAcpiTable();
803acpi20_p = (uint32_t)getAddressOfAcpi20Table();
804addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
805if(acpi20_p) addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
806return 1;
807}
808
809/* Setup ACPI. Replace DSDT if DSDT.aml is found */
810int setupAcpi(void)
811{
812int version;
813void *new_dsdt;
814
815
816const char *filename;
817char dirSpec[128];
818int len = 0;
819
820 // always reset cpu count to 0 when injecting new acpi
821 acpi_cpu_count = 0;
822
823// Try using the file specified with the DSDT option
824if (getValueForKey(kDSDT, &filename, &len, &bootInfo->chameleonConfig))
825{
826sprintf(dirSpec, filename);
827}
828else
829{
830sprintf(dirSpec, "DSDT.aml");
831}
832
833// Load replacement DSDT
834new_dsdt = loadACPITable(dirSpec);
835// Mozodojo: going to patch FACP and load SSDT's even if DSDT.aml is not present
836/*if (!new_dsdt)
837 {
838 return setupAcpiNoMod();
839 }*/
840
841// Mozodojo: Load additional SSDTs
842struct acpi_2_ssdt *new_ssdt[32]; // 30 + 2 additional tables for pss & cst
843int ssdt_count=0;
844
845// SSDT Options
846bool drop_ssdt=false, generate_pstates=false, generate_cstates=false;
847
848getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);
849getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);
850getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->chameleonConfig);
851
852 DBG("Generating P-states config: %d\n", generate_pstates);
853 DBG("Generating C-states config: %d\n", generate_cstates);
854
855{
856int i;
857
858for (i=0; i<30; i++)
859{
860char filename[512];
861
862sprintf(filename, i>0?"SSDT-%d.aml":"SSDT.aml", i);
863
864if ( (new_ssdt[ssdt_count] = loadACPITable(filename)) )
865{
866ssdt_count++;
867}
868else
869{
870break;
871}
872}
873}
874
875// Do the same procedure for both versions of ACPI
876for (version=0; version<2; version++) {
877struct acpi_2_rsdp *rsdp, *rsdp_mod;
878struct acpi_2_rsdt *rsdt, *rsdt_mod;
879int rsdplength;
880
881// Find original rsdp
882rsdp=(struct acpi_2_rsdp *)(version?getAddressOfAcpi20Table():getAddressOfAcpiTable());
883if (!rsdp)
884{
885DBG("No ACPI version %d found. Ignoring\n", version+1);
886if (version)
887addConfigurationTable(&gEfiAcpi20TableGuid, NULL, "ACPI_20");
888else
889addConfigurationTable(&gEfiAcpiTableGuid, NULL, "ACPI");
890continue;
891}
892rsdplength=version?rsdp->Length:20;
893
894DBG("RSDP version %d found @%x. Length=%d\n",version+1,rsdp,rsdplength);
895
896/* FIXME: no check that memory allocation succeeded
897 * Copy and patch RSDP,RSDT, XSDT and FADT
898 * For more info see ACPI Specification pages 110 and following
899 */
900
901rsdp_mod=(struct acpi_2_rsdp *) AllocateKernelMemory(rsdplength);
902memcpy(rsdp_mod, rsdp, rsdplength);
903rsdt=(struct acpi_2_rsdt *)(rsdp->RsdtAddress);
904
905DBG("RSDT @%x, Length %d\n",rsdt, rsdt->Length);
906
907if (rsdt && (uint32_t)rsdt !=0xffffffff && rsdt->Length<0x10000)
908{
909uint32_t *rsdt_entries;
910int rsdt_entries_num;
911int dropoffset=0, i;
912
913// mozo: using malloc cos I didn't found how to free already allocated kernel memory
914rsdt_mod=(struct acpi_2_rsdt *)malloc(rsdt->Length);
915memcpy (rsdt_mod, rsdt, rsdt->Length);
916rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
917rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
918rsdt_entries=(uint32_t *)(rsdt_mod+1);
919for (i=0;i<rsdt_entries_num;i++)
920{
921char *table=(char *)(rsdt_entries[i]);
922if (!table)
923continue;
924
925DBG("TABLE %c%c%c%c,",table[0],table[1],table[2],table[3]);
926
927rsdt_entries[i-dropoffset]=rsdt_entries[i];
928
929if (drop_ssdt && tableSign(table, "SSDT"))
930{
931dropoffset++;
932continue;
933}
934if (tableSign(table, "DSDT"))
935{
936DBG("DSDT found\n");
937
938if(new_dsdt)
939rsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
940
941continue;
942}
943if (tableSign(table, "FACP"))
944{
945struct acpi_2_fadt *fadt, *fadt_mod;
946fadt=(struct acpi_2_fadt *)rsdt_entries[i];
947
948DBG("FADT found @%x, Length %d\n",fadt, fadt->Length);
949
950if (!fadt || (uint32_t)fadt == 0xffffffff || fadt->Length>0x10000)
951{
952printf("FADT incorrect. Not modified\n");
953continue;
954}
955
956fadt_mod = patch_fadt(fadt, new_dsdt);
957rsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
958
959// Generate _CST SSDT
960if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
961{
962 DBG("C-states generated\n");
963generate_cstates = false; // Generate SSDT only once!
964ssdt_count++;
965}
966
967// Generating _PSS SSDT
968if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
969{
970 DBG("P-states generated\n");
971generate_pstates = false; // Generate SSDT only once!
972ssdt_count++;
973}
974
975continue;
976}
977}
978DBG("\n");
979
980// Allocate rsdt in Kernel memory area
981rsdt_mod->Length += 4*ssdt_count - 4*dropoffset;
982struct acpi_2_rsdt *rsdt_copy = (struct acpi_2_rsdt *)AllocateKernelMemory(rsdt_mod->Length);
983memcpy (rsdt_copy, rsdt_mod, rsdt_mod->Length);
984free(rsdt_mod); rsdt_mod = rsdt_copy;
985rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
986rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
987rsdt_entries=(uint32_t *)(rsdt_mod+1);
988
989// Mozodojo: Insert additional SSDTs into RSDT
990if(ssdt_count>0)
991{
992int j;
993
994for (j=0; j<ssdt_count; j++)
995rsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
996
997verbose("RSDT: Added %d SSDT table(s)\n", ssdt_count);
998}
999
1000// Correct the checksum of RSDT
1001DBG("RSDT: Original checksum %d, ", rsdt_mod->Checksum);
1002
1003rsdt_mod->Checksum=0;
1004rsdt_mod->Checksum=256-checksum8(rsdt_mod,rsdt_mod->Length);
1005
1006DBG("New checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);
1007}
1008else
1009{
1010rsdp_mod->RsdtAddress=0;
1011printf("RSDT not found or RSDT incorrect\n");
1012}
1013
1014if (version)
1015{
1016struct acpi_2_xsdt *xsdt, *xsdt_mod;
1017
1018// FIXME: handle 64-bit address correctly
1019
1020xsdt=(struct acpi_2_xsdt*) ((uint32_t)rsdp->XsdtAddress);
1021DBG("XSDT @%x;%x, Length=%d\n", (uint32_t)(rsdp->XsdtAddress>>32),(uint32_t)rsdp->XsdtAddress,
1022xsdt->Length);
1023if (xsdt && (uint64_t)rsdp->XsdtAddress<0xffffffff && xsdt->Length<0x10000)
1024{
1025uint64_t *xsdt_entries;
1026int xsdt_entries_num, i;
1027int dropoffset=0;
1028
1029// mozo: using malloc cos I didn't found how to free already allocated kernel memory
1030xsdt_mod=(struct acpi_2_xsdt*)malloc(xsdt->Length);
1031memcpy(xsdt_mod, xsdt, xsdt->Length);
1032rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1033xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1034xsdt_entries=(uint64_t *)(xsdt_mod+1);
1035for (i=0;i<xsdt_entries_num;i++)
1036{
1037char *table=(char *)((uint32_t)(xsdt_entries[i]));
1038if (!table)
1039continue;
1040
1041xsdt_entries[i-dropoffset]=xsdt_entries[i];
1042
1043if (drop_ssdt && tableSign(table, "SSDT"))
1044{
1045dropoffset++;
1046continue;
1047}
1048if (tableSign(table, "DSDT"))
1049{
1050DBG("DSDT found\n");
1051
1052if (new_dsdt)
1053xsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
1054
1055DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1056
1057continue;
1058}
1059if (tableSign(table, "FACP"))
1060{
1061struct acpi_2_fadt *fadt, *fadt_mod;
1062fadt=(struct acpi_2_fadt *)(uint32_t)xsdt_entries[i];
1063
1064DBG("FADT found @%x,%x, Length %d\n",(uint32_t)(xsdt_entries[i]>>32),fadt,
1065fadt->Length);
1066
1067if (!fadt || (uint64_t)xsdt_entries[i] >= 0xffffffff || fadt->Length>0x10000)
1068{
1069verbose("FADT incorrect or after 4GB. Dropping XSDT\n");
1070goto drop_xsdt;
1071}
1072
1073fadt_mod = patch_fadt(fadt, new_dsdt);
1074xsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
1075
1076DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1077
1078// Generate _CST SSDT
1079if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
1080{
1081generate_cstates = false; // Generate SSDT only once!
1082ssdt_count++;
1083}
1084
1085// Generating _PSS SSDT
1086if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
1087{
1088generate_pstates = false; // Generate SSDT only once!
1089ssdt_count++;
1090}
1091
1092continue;
1093}
1094
1095DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1096
1097}
1098
1099// Allocate xsdt in Kernel memory area
1100xsdt_mod->Length += 8*ssdt_count - 8*dropoffset;
1101struct acpi_2_xsdt *xsdt_copy = (struct acpi_2_xsdt *)AllocateKernelMemory(xsdt_mod->Length);
1102memcpy(xsdt_copy, xsdt_mod, xsdt_mod->Length);
1103free(xsdt_mod); xsdt_mod = xsdt_copy;
1104rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1105xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1106xsdt_entries=(uint64_t *)(xsdt_mod+1);
1107
1108// Mozodojo: Insert additional SSDTs into XSDT
1109if(ssdt_count>0)
1110{
1111int j;
1112
1113for (j=0; j<ssdt_count; j++)
1114xsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
1115
1116verbose("Added %d SSDT table(s) into XSDT\n", ssdt_count);
1117}
1118
1119// Correct the checksum of XSDT
1120xsdt_mod->Checksum=0;
1121xsdt_mod->Checksum=256-checksum8(xsdt_mod,xsdt_mod->Length);
1122}
1123else
1124{
1125drop_xsdt:
1126
1127DBG("About to drop XSDT\n");
1128
1129/*FIXME: Now we just hope that if MacOS doesn't find XSDT it reverts to RSDT.
1130 * A Better strategy would be to generate
1131 */
1132
1133rsdp_mod->XsdtAddress=0xffffffffffffffffLL;
1134verbose("XSDT not found or XSDT incorrect\n");
1135}
1136}
1137
1138// Correct the checksum of RSDP
1139
1140DBG("RSDP: Original checksum %d, ", rsdp_mod->Checksum);
1141
1142rsdp_mod->Checksum=0;
1143rsdp_mod->Checksum=256-checksum8(rsdp_mod,20);
1144
1145DBG("New checksum %d\n", rsdp_mod->Checksum);
1146
1147if (version)
1148{
1149DBG("RSDP: Original extended checksum %d", rsdp_mod->ExtendedChecksum);
1150
1151rsdp_mod->ExtendedChecksum=0;
1152rsdp_mod->ExtendedChecksum=256-checksum8(rsdp_mod,rsdp_mod->Length);
1153
1154DBG("New extended checksum %d\n", rsdp_mod->ExtendedChecksum);
1155
1156}
1157
1158//verbose("Patched ACPI version %d DSDT\n", version+1);
1159if (version)
1160{
1161/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1162acpi20_p = (uint32_t)rsdp_mod;
1163addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
1164}
1165else
1166{
1167/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1168acpi10_p = (uint32_t)rsdp_mod;
1169addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
1170}
1171}
1172#if DEBUG_ACPI
1173printf("Press a key to continue... (DEBUG_ACPI)\n");
1174getchar();
1175#endif
1176return 1;
1177}
1178

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