Chameleon

Chameleon Svn Source Tree

Root/branches/chucko/i386/libsaio/acpi_patcher.c

1/*
2 * Copyright 2008 mackerintel
3 * 2010 mojodojo, 2012 slice
4 */
5
6#include "libsaio.h"
7#include "boot.h"
8#include "bootstruct.h"
9#include "acpi.h"
10#include "efi_tables.h"
11#include "fake_efi.h"
12#include "acpi_patcher.h"
13#include "platform.h"
14#include "cpu.h"
15#include "aml_generator.h"
16
17#ifndef DEBUG_ACPI
18#define DEBUG_ACPI 0
19#endif
20
21#if DEBUG_ACPI==2
22#define DBG(x...) {printf(x); sleep(1);}
23#elif DEBUG_ACPI==1
24#define DBG(x...) printf(x)
25#else
26#define DBG(x...) msglog(x)
27#endif
28
29// Slice: New signature compare function
30boolean_t tableSign(char *table, const char *sgn)
31{
32int i;
33for (i=0; i<4; i++)
34{
35if ((table[i] &~0x20) != (sgn[i] &~0x20))
36{
37return false;
38}
39}
40return true;
41}
42
43/* Gets the ACPI 1.0 RSDP address */
44static struct acpi_2_rsdp* getAddressOfAcpiTable()
45{
46/* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
47
48void *acpi_addr = (void*)ACPI_RANGE_START;
49for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
50{
51if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
52{
53uint8_t csum = checksum8(acpi_addr, 20);
54if(csum == 0)
55{
56// Only return the table if it is a true version 1.0 table (Revision 0)
57if(((struct acpi_2_rsdp*)acpi_addr)->Revision == 0)
58return acpi_addr;
59}
60}
61}
62return NULL;
63}
64
65/* Gets the ACPI 2.0 RSDP address */
66static struct acpi_2_rsdp* getAddressOfAcpi20Table()
67{
68/* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
69
70void *acpi_addr = (void*)ACPI_RANGE_START;
71for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
72{
73if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
74{
75uint8_t csum = checksum8(acpi_addr, 20);
76
77/* Only assume this is a 2.0 or better table if the revision is greater than 0
78 * NOTE: ACPI 3.0 spec only seems to say that 1.0 tables have revision 1
79 * and that the current revision is 2.. I am going to assume that rev > 0 is 2.0.
80 */
81
82if(csum == 0 && (((struct acpi_2_rsdp*)acpi_addr)->Revision > 0))
83{
84uint8_t csum2 = checksum8(acpi_addr, sizeof(struct acpi_2_rsdp));
85if(csum2 == 0)
86{
87return acpi_addr;
88}
89}
90}
91}
92return NULL;
93}
94
95/* The folowing ACPI Table search algo. should be reused anywhere needed:*/
96/* WARNING: outDirspec string will be overwritten by subsequent calls! */
97int search_and_get_acpi_fd(const char * filename, const char ** outDirspec)
98{
99int fd = 0;
100static char dirSpec[512];
101
102// Try finding 'filename' in the usual places
103// Start searching any potential location for ACPI Table
104snprintf(dirSpec, sizeof(dirSpec), "%s", filename);
105fd = open(dirSpec, 0);
106if (fd < 0) {
107snprintf(dirSpec, sizeof(dirSpec), "/Extra/%s", filename);
108fd = open(dirSpec, 0);
109if (fd < 0)
110{
111snprintf(dirSpec, sizeof(dirSpec), "bt(0,0)/Extra/%s", filename);
112fd = open(dirSpec, 0);
113if (fd < 0) {
114// NOT FOUND:
115DBG("ACPI Table not found: %s\n", filename);
116*dirSpec = '\0';
117}
118}
119}
120
121if (outDirspec) *outDirspec = dirSpec;
122return fd;
123}
124
125void *loadACPITable (const char * filename)
126{
127const char * dirspec=NULL;
128
129int fd = search_and_get_acpi_fd(filename, &dirspec);
130
131if (fd>=0)
132{
133 void *tableAddr = (void*)AllocateKernelMemory(file_size (fd));
134if (tableAddr)
135{
136if (read (fd, tableAddr, file_size (fd))!=file_size (fd))
137{
138DBG("Couldn't read table %s\n",dirspec);
139free (tableAddr);
140close (fd);
141return NULL;
142}
143
144DBG("Table %s read and stored at: %x\n", dirspec, tableAddr);
145close (fd);
146return tableAddr;
147}
148close (fd);
149DBG("Couldn't allocate memory for table \n", dirspec);
150}
151//printf("Couldn't find table %s\n", filename);
152return NULL;
153}
154
155uint8_tacpi_cpu_count = 0;
156char* acpi_cpu_name[32];
157uint32_t acpi_cpu_p_blk = 0;
158
159void get_acpi_cpu_names(unsigned char* dsdt, uint32_t length)
160{
161uint32_t i;
162
163DBG("Start finding cpu names. length %d\n", length);
164
165for (i=0; i<length-7; i++)
166{
167if (dsdt[i] == 0x5B && dsdt[i+1] == 0x83) // ProcessorOP
168{
169DBG("DSDT: %x%x\n", dsdt[i], dsdt[i+1]);
170
171uint32_t offset = i + 3 + (dsdt[i+2] >> 6);
172
173bool add_name = true;
174
175uint8_t j;
176
177for (j=0; j<4; j++)
178{
179char c = dsdt[offset+j];
180
181if (!aml_isvalidchar(c))
182{
183add_name = false;
184DBG("Invalid character found in ProcessorOP 0x%x!\n", c);
185break;
186}
187}
188
189if (add_name)
190{
191acpi_cpu_name[acpi_cpu_count] = malloc(4);
192memcpy(acpi_cpu_name[acpi_cpu_count], dsdt+offset, 4);
193i = offset + 5;
194
195if (acpi_cpu_count == 0)
196acpi_cpu_p_blk = dsdt[i] | (dsdt[i+1] << 8);
197
198DBG("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
199
200if (++acpi_cpu_count == 32) {
201return;
202}
203}
204}
205}
206
207DBG("End finding cpu names: cpu names found: %d\n", acpi_cpu_count);
208}
209
210struct acpi_2_ssdt *generate_cst_ssdt(struct acpi_2_fadt* fadt)
211{
212static char const ssdt_header[] =
213{
2140x53, 0x53, 0x44, 0x54, 0xE7, 0x00, 0x00, 0x00, /* SSDT.... */
2150x01, 0x17, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x41, /* ..PmRefA */
2160x43, 0x70, 0x75, 0x43, 0x73, 0x74, 0x00, 0x00, /* CpuCst.. */
2170x00, 0x10, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* ....INTL */
2180x31, 0x03, 0x10, 0x20/* 1.._*/
219};
220
221char resource_template_register_fixedhw[] =
222{
2230x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
2240x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2250x00, 0x00, 0x01, 0x79, 0x00
226};
227
228char resource_template_register_systemio[] =
229{
2300x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
2310x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
2320x00, 0x00, 0x00, 0x79, 0x00,
233};
234
235if (Platform.CPU.Vendor != 0x756E6547) {
236DBG("Not an Intel platform: C-States will not be generated !!!\n");
237return NULL;
238}
239
240if (fadt == NULL) {
241DBG("FACP not exists: C-States will not be generated !!!\n");
242return NULL;
243}
244
245struct acpi_2_dsdt* dsdt = (void*)fadt->DSDT;
246
247if (dsdt == NULL) {
248DBG("DSDT not found: C-States will not be generated !!!\n");
249return NULL;
250}
251
252if (acpi_cpu_count == 0)
253get_acpi_cpu_names((void*)dsdt, dsdt->Length);
254
255if (acpi_cpu_count > 0)
256{
257bool c2_enabled = false;
258bool c3_enabled = false;
259bool c4_enabled = false;
260bool cst_using_systemio = false;
261
262getBoolForKey(kEnableC2State, &c2_enabled, &bootInfo->chameleonConfig);
263getBoolForKey(kEnableC3State, &c3_enabled, &bootInfo->chameleonConfig);
264getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->chameleonConfig);
265getBoolForKey(kCSTUsingSystemIO, &cst_using_systemio, &bootInfo->chameleonConfig);
266
267c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
268c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
269
270unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + (c3_enabled ? 1 : 0);
271
272AML_CHUNK* root = aml_create_node(NULL);
273aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
274AML_CHUNK* scop = aml_add_scope(root, "\\_PR_");
275AML_CHUNK* name = aml_add_name(scop, "CST_");
276AML_CHUNK* pack = aml_add_package(name);
277aml_add_byte(pack, cstates_count);
278
279AML_CHUNK* tmpl = aml_add_package(pack);
280if (cst_using_systemio) {
281// C1
282resource_template_register_fixedhw[8] = 0x00;
283resource_template_register_fixedhw[9] = 0x00;
284resource_template_register_fixedhw[18] = 0x00;
285aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
286aml_add_byte(tmpl, 0x01);// C1
287aml_add_word(tmpl, 0x0001);// Latency
288aml_add_dword(tmpl, 0x000003e8);// Power
289
290uint8_t p_blk_lo, p_blk_hi;
291
292if (c2_enabled) // C2
293{
294p_blk_lo = acpi_cpu_p_blk + 4;
295p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
296
297tmpl = aml_add_package(pack);
298resource_template_register_systemio[11] = p_blk_lo; // C2
299resource_template_register_systemio[12] = p_blk_hi; // C2
300aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
301aml_add_byte(tmpl, 0x02);// C2
302aml_add_word(tmpl, 0x0040);// Latency
303aml_add_dword(tmpl, 0x000001f4);// Power
304}
305
306if (c4_enabled) // C4
307{
308p_blk_lo = acpi_cpu_p_blk + 5;
309p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
310
311tmpl = aml_add_package(pack);
312resource_template_register_systemio[11] = p_blk_lo; // C4
313resource_template_register_systemio[12] = p_blk_hi; // C4
314aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
315aml_add_byte(tmpl, 0x04);// C4
316aml_add_word(tmpl, 0x0080);// Latency
317aml_add_dword(tmpl, 0x000000C8);// Power
318}
319else if (c3_enabled) // C3
320{
321p_blk_lo = acpi_cpu_p_blk + 5;
322p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
323
324tmpl = aml_add_package(pack);
325resource_template_register_systemio[11] = p_blk_lo; // C3
326resource_template_register_systemio[12] = p_blk_hi; // C3
327aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
328aml_add_byte(tmpl, 0x03);// C3
329aml_add_word(tmpl, 0x0060);// Latency
330aml_add_dword(tmpl, 0x0000015e);// Power
331}
332}
333else
334{
335// C1
336resource_template_register_fixedhw[11] = 0x00; // C1
337aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
338aml_add_byte(tmpl, 0x01);// C1
339aml_add_word(tmpl, 0x0001);// Latency
340aml_add_dword(tmpl, 0x000003e8);// Power
341
342resource_template_register_fixedhw[18] = 0x03;
343
344if (c2_enabled) // C2
345{
346tmpl = aml_add_package(pack);
347resource_template_register_fixedhw[11] = 0x10; // C2
348aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
349aml_add_byte(tmpl, 0x02);// C2
350aml_add_word(tmpl, 0x0040);// Latency
351aml_add_dword(tmpl, 0x000001f4);// Power
352}
353
354if (c4_enabled) // C4
355{
356tmpl = aml_add_package(pack);
357resource_template_register_fixedhw[11] = 0x30; // C4
358aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
359aml_add_byte(tmpl, 0x04);// C4
360aml_add_word(tmpl, 0x0080);// Latency
361aml_add_dword(tmpl, 0x000000C8);// Power
362}
363else if (c3_enabled)
364{
365tmpl = aml_add_package(pack);
366resource_template_register_fixedhw[11] = 0x20; // C3
367aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
368aml_add_byte(tmpl, 0x03);// C3
369aml_add_word(tmpl, 0x0060);// Latency
370aml_add_dword(tmpl, 0x0000015e);// Power
371}
372}
373
374// Aliaces
375int i;
376for (i = 0; i < acpi_cpu_count; i++)
377{
378char name[9];
379sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
380
381scop = aml_add_scope(root, name);
382aml_add_alias(scop, "CST_", "_CST");
383}
384
385aml_calculate_size(root);
386
387struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
388
389aml_write_node(root, (void*)ssdt, 0);
390
391ssdt->Length = root->Size;
392ssdt->Checksum = 0;
393ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
394
395aml_destroy_node(root);
396
397// dumpPhysAddr("C-States SSDT content: ", ssdt, ssdt->Length);
398
399DBG("SSDT with CPU C-States generated successfully\n");
400
401return ssdt;
402} else {
403DBG("ACPI CPUs not found: C-States not generated !!!\n");
404}
405
406return NULL;
407}
408
409struct acpi_2_ssdt *generate_pss_ssdt(struct acpi_2_dsdt* dsdt)
410{
411 static char const ssdt_header[] =
412{
4130x53, 0x53, 0x44, 0x54, 0x7E, 0x00, 0x00, 0x00, /* SSDT.... */
4140x01, 0x6A, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x00, /* ..PmRef. */
4150x43, 0x70, 0x75, 0x50, 0x6D, 0x00, 0x00, 0x00, /* CpuPm... */
4160x00, 0x30, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* .0..INTL */
4170x31, 0x03, 0x10, 0x20,/* 1.._*/
418};
419
420if (Platform.CPU.Vendor != 0x756E6547) {
421DBG("Not an Intel platform: P-States will not be generated !!!\n");
422return NULL;
423}
424
425if (!(Platform.CPU.Features & CPU_FEATURE_MSR)) {
426DBG("Unsupported CPU: P-States will not be generated !!! No MSR support\n");
427return NULL;
428}
429
430if (acpi_cpu_count == 0)
431get_acpi_cpu_names((void*)dsdt, dsdt->Length);
432
433if (acpi_cpu_count > 0)
434{
435struct p_state initial, maximum, minimum, p_states[32];
436uint8_t p_states_count = 0;
437
438// Retrieving P-States, ported from code by superhai (c)
439switch (Platform.CPU.Family) {
440case 0x06:
441{
442switch (Platform.CPU.Model)
443{
444case CPU_MODEL_DOTHAN:// Intel Pentium M
445case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
446case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
447case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
448case CPU_MODEL_ATOM:// Intel Atom (45nm)
449{
450bool cpu_dynamic_fsb = false;
451
452if (rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 27))
453{
454wrmsr64(MSR_IA32_EXT_CONFIG, (rdmsr64(MSR_IA32_EXT_CONFIG) | (1 << 28)));
455delay(1);
456cpu_dynamic_fsb = rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 28);
457}
458
459bool cpu_noninteger_bus_ratio = (rdmsr64(MSR_IA32_PERF_STATUS) & (1ULL << 46));
460
461initial.Control = rdmsr64(MSR_IA32_PERF_STATUS);
462
463maximum.Control = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 32) & 0x1F3F) | (0x4000 * cpu_noninteger_bus_ratio);
464maximum.CID = ((maximum.FID & 0x1F) << 1) | cpu_noninteger_bus_ratio;
465
466minimum.FID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 24) & 0x1F) | (0x80 * cpu_dynamic_fsb);
467minimum.VID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 48) & 0x3F);
468
469if (minimum.FID == 0)
470{
471uint64_t msr;
472uint8_t i;
473// Probe for lowest fid
474for (i = maximum.FID; i >= 0x6; i--)
475{
476msr = rdmsr64(MSR_IA32_PERF_CONTROL);
477wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (i << 8) | minimum.VID);
478intel_waitforsts();
479minimum.FID = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0x1F;
480delay(1);
481}
482
483msr = rdmsr64(MSR_IA32_PERF_CONTROL);
484wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
485intel_waitforsts();
486}
487
488if (minimum.VID == maximum.VID)
489{
490uint64_t msr;
491uint8_t i;
492// Probe for lowest vid
493for (i = maximum.VID; i > 0xA; i--)
494{
495msr = rdmsr64(MSR_IA32_PERF_CONTROL);
496wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (minimum.FID << 8) | i);
497intel_waitforsts();
498minimum.VID = rdmsr64(MSR_IA32_PERF_STATUS) & 0x3F;
499delay(1);
500}
501
502msr = rdmsr64(MSR_IA32_PERF_CONTROL);
503wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
504intel_waitforsts();
505}
506
507minimum.CID = ((minimum.FID & 0x1F) << 1) >> cpu_dynamic_fsb;
508
509// Sanity check
510if (maximum.CID < minimum.CID) {
511DBG("P-States: Insane FID values!");
512p_states_count = 0;
513} else {
514uint8_t vidstep;
515uint8_t u, invalid = 0;
516// Finalize P-States
517// Find how many P-States machine supports
518p_states_count = (uint8_t)(maximum.CID - minimum.CID + 1);
519
520if (p_states_count > 32) {
521p_states_count = 32;
522}
523
524vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);
525
526for (u = 0; u < p_states_count; u++) {
527uint8_t i = u - invalid;
528
529p_states[i].CID = maximum.CID - u;
530p_states[i].FID = (uint8_t)(p_states[i].CID >> 1);
531
532if (p_states[i].FID < 0x6) {
533if (cpu_dynamic_fsb) {
534p_states[i].FID = (p_states[i].FID << 1) | 0x80;
535}
536} else if (cpu_noninteger_bus_ratio) {
537p_states[i].FID = p_states[i].FID | (0x40 * (p_states[i].CID & 0x1));
538}
539
540if (i && p_states[i].FID == p_states[i-1].FID) {
541invalid++;
542}
543p_states[i].VID = ((maximum.VID << 2) - (vidstep * u)) >> 2;
544uint32_t multiplier = p_states[i].FID & 0x1f;// = 0x08
545bool half = p_states[i].FID & 0x40;// = 0x01
546bool dfsb = p_states[i].FID & 0x80;// = 0x00
547uint32_t fsb = (uint32_t)(Platform.CPU.FSBFrequency / 1000000); // = 400
548uint32_t halffsb = (fsb + 1) >> 1;// = 200
549uint32_t frequency = (multiplier * fsb);// = 3200
550
551p_states[i].Frequency = (uint32_t)(frequency + (half * halffsb)) >> dfsb;// = 3200 + 200 = 3400
552}
553
554p_states_count -= invalid;
555}
556
557break;
558}
559case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
560case CPU_MODEL_DALES:
561case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
562case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
563case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
564case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
565case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
566case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
567case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
568case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
569case CPU_MODEL_HASWELL://
570case CPU_MODEL_IVYBRIDGE_XEON: //
571//case CPU_MODEL_HASWELL_H://
572case CPU_MODEL_HASWELL_SVR://
573case CPU_MODEL_HASWELL_ULT://
574case CPU_MODEL_CRYSTALWELL://
575
576{
577if ((Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_JAKETOWN) ||
578(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_HASWELL) ||
579(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE_XEON) || (Platform.CPU.Model == CPU_MODEL_HASWELL_SVR) ||
580(Platform.CPU.Model == CPU_MODEL_HASWELL_ULT) || (Platform.CPU.Model == CPU_MODEL_CRYSTALWELL))
581{
582maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;
583} else {
584maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff;
585}
586
587minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
588
589DBG("P-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);
590
591// Sanity check
592if (maximum.Control < minimum.Control) {
593DBG("Insane control values!");
594p_states_count = 0;
595} else {
596uint8_t i;
597p_states_count = 0;
598
599for (i = maximum.Control; i >= minimum.Control; i--) {
600p_states[p_states_count].Control = i;
601p_states[p_states_count].CID = p_states[p_states_count].Control << 1;
602p_states[p_states_count].Frequency = (Platform.CPU.FSBFrequency / 1000000) * i;
603p_states_count++;
604}
605}
606
607break;
608}
609default:
610DBG("Unsupported CPU (0x%X): P-States not generated !!!\n", Platform.CPU.Family);
611break;
612}
613}
614}
615
616// Generating SSDT
617if (p_states_count > 0) {
618int i;
619
620AML_CHUNK* root = aml_create_node(NULL);
621aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
622AML_CHUNK* scop = aml_add_scope(root, "\\_PR_");
623AML_CHUNK* name = aml_add_name(scop, "PSS_");
624AML_CHUNK* pack = aml_add_package(name);
625
626for (i = 0; i < p_states_count; i++) {
627AML_CHUNK* pstt = aml_add_package(pack);
628
629aml_add_dword(pstt, p_states[i].Frequency);
630aml_add_dword(pstt, 0x00000000); // Power
631aml_add_dword(pstt, 0x0000000A); // Latency
632aml_add_dword(pstt, 0x0000000A); // Latency
633aml_add_dword(pstt, p_states[i].Control);
634aml_add_dword(pstt, i+1); // Status
635}
636
637// Add aliaces
638for (i = 0; i < acpi_cpu_count; i++) {
639char name[9];
640sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
641
642scop = aml_add_scope(root, name);
643aml_add_alias(scop, "PSS_", "_PSS");
644}
645
646aml_calculate_size(root);
647
648struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
649
650aml_write_node(root, (void*)ssdt, 0);
651
652ssdt->Length = root->Size;
653ssdt->Checksum = 0;
654ssdt->Checksum = 256 - (uint8_t)(checksum8(ssdt, ssdt->Length));
655
656aml_destroy_node(root);
657
658//dumpPhysAddr("P-States SSDT content: ", ssdt, ssdt->Length);
659
660DBG("SSDT with CPU P-States generated successfully\n");
661
662return ssdt;
663}
664} else {
665DBG("ACPI CPUs not found: P-States not generated !!!\n");
666}
667
668return NULL;
669}
670
671struct acpi_2_fadt *patch_fadt(struct acpi_2_fadt *fadt, struct acpi_2_dsdt *new_dsdt)
672{
673extern void setupSystemType();
674
675struct acpi_2_fadt *fadt_mod = NULL;
676bool fadt_rev2_needed = false;
677bool fix_restart;
678bool fix_restart_ps2;
679const char * value;
680
681// Restart Fix
682if (Platform.CPU.Vendor == 0x756E6547) { /* Intel */
683fix_restart = true;
684fix_restart_ps2 = false;
685if ( getBoolForKey(kPS2RestartFix, &fix_restart_ps2, &bootInfo->chameleonConfig) && fix_restart_ps2) {
686fix_restart = true;
687} else {
688getBoolForKey(kRestartFix, &fix_restart, &bootInfo->chameleonConfig);
689}
690} else {
691DBG("Not an Intel platform: Restart Fix not applied !!!\n");
692fix_restart = false;
693}
694
695if (fix_restart) {
696fadt_rev2_needed = true;
697}
698
699// Allocate new fadt table
700if (fadt->Length < 0x84 && fadt_rev2_needed)
701{
702fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(0x84);
703memcpy(fadt_mod, fadt, fadt->Length);
704fadt_mod->Length = 0x84;
705fadt_mod->Revision = 0x02; // FADT rev 2 (ACPI 1.0B MS extensions)
706} else {
707fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(fadt->Length);
708memcpy(fadt_mod, fadt, fadt->Length);
709}
710// Determine system type / PM_Model
711if ( (value=getStringForKey(kSystemType, &bootInfo->chameleonConfig))!=NULL)
712{
713if (Platform.Type > 6) {
714if(fadt_mod->PM_Profile<=6) {
715Platform.Type = fadt_mod->PM_Profile; // get the fadt if correct
716} else {
717Platform.Type = 1;/* Set a fixed value (Desktop) */
718}
719DBG("Error: system-type must be 0..6. Defaulting to %d !\n", Platform.Type);
720} else {
721Platform.Type = (unsigned char) strtoul(value, NULL, 10);
722}
723}
724// Set PM_Profile from System-type if only user wanted this value to be forced
725if (fadt_mod->PM_Profile != Platform.Type) {
726if (value) {
727// user has overriden the SystemType so take care of it in FACP
728DBG("FADT: changing PM_Profile from 0x%02x to 0x%02x\n", fadt_mod->PM_Profile, Platform.Type);
729fadt_mod->PM_Profile = Platform.Type;
730} else {
731// PM_Profile has a different value and no override has been set, so reflect the user value to ioregs
732Platform.Type = fadt_mod->PM_Profile <= 6 ? fadt_mod->PM_Profile : 1;
733}
734}
735// We now have to write the systemm-type in ioregs: we cannot do it before in setupDeviceTree()
736// because we need to take care of FACP original content, if it is correct.
737setupSystemType();
738
739// Patch FADT to fix restart
740if (fix_restart) {
741if (fix_restart_ps2) {
742fadt_mod->Flags|= 0x400;
743fadt_mod->Reset_SpaceID= 0x01; // System I/O
744fadt_mod->Reset_BitWidth= 0x08; // 1 byte
745fadt_mod->Reset_BitOffset= 0x00; // Offset 0
746fadt_mod->Reset_AccessWidth= 0x01; // Byte access
747fadt_mod->Reset_Address= 0x64; // Address of the register
748fadt_mod->Reset_Value= 0xfe; // Value to write to reset the system
749DBG("FADT: PS2 Restart Fix applied!\n");
750} else {
751fadt_mod->Flags|= 0x400;
752fadt_mod->Reset_SpaceID= 0x01; // System I/O
753fadt_mod->Reset_BitWidth= 0x08; // 1 byte
754fadt_mod->Reset_BitOffset= 0x00; // Offset 0
755fadt_mod->Reset_AccessWidth= 0x01; // Byte access
756fadt_mod->Reset_Address= 0x0cf9; // Address of the register
757fadt_mod->Reset_Value= 0x06; // Value to write to reset the system
758DBG("FADT: ACPI Restart Fix applied!\n");
759}
760
761}
762
763// Patch DSDT Address if we have loaded DSDT.aml
764if(new_dsdt) {
765DBG("DSDT: Old @%x,%x, ",fadt_mod->DSDT,fadt_mod->X_DSDT);
766
767fadt_mod->DSDT=(uint32_t)new_dsdt;
768if ((uint32_t)(&(fadt_mod->X_DSDT))-(uint32_t)fadt_mod+8<=fadt_mod->Length) {
769fadt_mod->X_DSDT=(uint32_t)new_dsdt;
770}
771
772DBG("New @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);
773
774DBG("FADT: Using custom DSDT!\n");
775}
776
777// Correct the checksum
778fadt_mod->Checksum=0;
779fadt_mod->Checksum=256-checksum8(fadt_mod,fadt_mod->Length);
780
781return fadt_mod;
782}
783
784/* Setup ACPI without replacing DSDT. */
785int setupAcpiNoMod()
786{
787//addConfigurationTable(&gEfiAcpiTableGuid, getAddressOfAcpiTable(), "ACPI");
788//addConfigurationTable(&gEfiAcpi20TableGuid, getAddressOfAcpi20Table(), "ACPI_20");
789/* XXX aserebln why uint32 cast if pointer is uint64 ? */
790acpi10_p = (uint64_t)(uint32_t)getAddressOfAcpiTable();
791acpi20_p = (uint64_t)(uint32_t)getAddressOfAcpi20Table();
792addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
793if(acpi20_p) {
794addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
795} else {
796DBG("No ACPI 2.\n");
797}
798return 1;
799}
800
801/* Setup ACPI. Replace DSDT if DSDT.aml is found */
802int setupAcpi(void)
803{
804int version;
805void *new_dsdt = NULL;
806
807
808const char *filename;
809char dirSpec[128];
810int len = 0;
811
812// always reset cpu count to 0 when injecting new acpi
813acpi_cpu_count = 0;
814
815/* Try using the file specified with the DSDT option */
816if (getValueForKey(kDSDT, &filename, &len, &bootInfo->chameleonConfig)) {
817snprintf(dirSpec, sizeof(dirSpec), filename);
818} else {
819sprintf(dirSpec, "DSDT.aml");
820//verbose("dirSpec, DSDT.aml");
821}
822
823// Load replacement DSDT
824new_dsdt = loadACPITable(dirSpec);
825
826// Mozodojo: going to patch FACP and load SSDT's even if DSDT.aml is not present
827/*if (!new_dsdt)
828 {
829 return setupAcpiNoMod();
830 }*/
831
832// Mozodojo: Load additional SSDTs
833struct acpi_2_ssdt *new_ssdt[32]; // 30 + 2 additional tables for pss & cst
834int ssdt_count=0;
835
836// SSDT Options
837bool drop_ssdt=false, generate_pstates=false, generate_cstates=false;
838
839getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);
840getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);
841getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->chameleonConfig);
842
843DBG("Generating P-States config: %s\n", generate_pstates ? "YES" : "NO");
844DBG("Generating C-States config: %s\n", generate_cstates ? "YES" : "NO");
845
846{
847int i;
848
849for (i = 0; i < 30; i++) {
850char filename[512];
851
852sprintf(filename, i > 0 ? "SSDT-%d.aml" : "SSDT.aml", i);
853
854if ( (new_ssdt[ssdt_count] = loadACPITable(filename)) ) {
855ssdt_count++;
856} else {
857break;
858}
859}
860}
861
862// Do the same procedure for both versions of ACPI
863for (version = 0; version < 2; version++) {
864struct acpi_2_rsdp *rsdp, *rsdp_mod;
865struct acpi_2_rsdt *rsdt, *rsdt_mod;
866int rsdplength;
867
868// Find original rsdp
869rsdp=(struct acpi_2_rsdp *)(version ? getAddressOfAcpi20Table() : getAddressOfAcpiTable());
870if (!rsdp) {
871DBG("No ACPI version %d found. Ignoring\n", version+1);
872if (version) {
873addConfigurationTable(&gEfiAcpi20TableGuid, NULL, "ACPI_20");
874} else {
875addConfigurationTable(&gEfiAcpiTableGuid, NULL, "ACPI");
876}
877continue;
878}
879rsdplength=version ? rsdp->Length : 20;
880
881DBG("RSDP version %d found @%x. Length=%d\n",version+1,rsdp,rsdplength);
882
883/* FIXME: no check that memory allocation succeeded
884 * Copy and patch RSDP,RSDT, XSDT and FADT
885 * For more info see ACPI Specification pages 110 and following
886 */
887
888rsdp_mod=(struct acpi_2_rsdp *) AllocateKernelMemory(rsdplength);
889memcpy(rsdp_mod, rsdp, rsdplength);
890
891rsdt=(struct acpi_2_rsdt *)(rsdp->RsdtAddress);
892
893DBG("RSDT @%x, Length %d\n",rsdt, rsdt ? rsdt->Length : 0);
894
895if (rsdt && (uint32_t)rsdt !=0xffffffff && rsdt->Length<0x10000) {
896uint32_t *rsdt_entries;
897int rsdt_entries_num;
898int dropoffset=0, i;
899
900// mozo: using malloc cos I didn't found how to free already allocated kernel memory
901rsdt_mod=(struct acpi_2_rsdt *)malloc(rsdt->Length);
902memcpy (rsdt_mod, rsdt, rsdt->Length);
903rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
904rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
905rsdt_entries=(uint32_t *)(rsdt_mod+1);
906for (i=0;i<rsdt_entries_num;i++) {
907char *table=(char *)(rsdt_entries[i]);
908if (!table) {
909continue;
910}
911
912DBG("TABLE %c%c%c%c,",table[0],table[1],table[2],table[3]);
913
914rsdt_entries[i-dropoffset]=rsdt_entries[i];
915
916if (drop_ssdt && tableSign(table, "SSDT")) {
917DBG("OEM SSDT tables was dropped\n");
918dropoffset++;
919continue;
920}
921
922if (tableSign(table, "DSDT")) {
923DBG("DSDT found\n");
924verbose("Custom DSDT table was found\n");
925if(new_dsdt) {
926rsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
927}
928continue;
929}
930
931if (tableSign(table, "FACP")) {
932struct acpi_2_fadt *fadt, *fadt_mod;
933fadt=(struct acpi_2_fadt *)rsdt_entries[i];
934
935DBG("FADT found @%x, Length %d\n",fadt, fadt->Length);
936
937if (!fadt || (uint32_t)fadt == 0xffffffff || fadt->Length>0x10000) {
938DBG("FADT incorrect. Not modified\n");
939continue;
940}
941
942fadt_mod = patch_fadt(fadt, new_dsdt);
943rsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
944
945// Generate _CST SSDT
946if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod))) {
947DBG("C-States generated\n");
948generate_cstates = false; // Generate SSDT only once!
949ssdt_count++;
950}
951
952// Generating _PSS SSDT
953if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT))) {
954DBG("P-States generated\n");
955generate_pstates = false; // Generate SSDT only once!
956ssdt_count++;
957}
958continue;
959}
960}
961DBG("\n");
962
963// Allocate rsdt in Kernel memory area
964rsdt_mod->Length += 4*ssdt_count - 4*dropoffset;
965struct acpi_2_rsdt *rsdt_copy = (struct acpi_2_rsdt *)AllocateKernelMemory(rsdt_mod->Length);
966memcpy (rsdt_copy, rsdt_mod, rsdt_mod->Length);
967free(rsdt_mod); rsdt_mod = rsdt_copy;
968rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
969rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
970rsdt_entries=(uint32_t *)(rsdt_mod+1);
971
972// Mozodojo: Insert additional SSDTs into RSDT
973if(ssdt_count > 0) {
974int j;
975
976for (j=0; j<ssdt_count; j++) {
977rsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
978}
979DBG("RSDT: Added %d SSDT table(s)\n", ssdt_count);
980
981}
982
983// Correct the checksum of RSDT
984DBG("RSDT: Original checksum %d, ", rsdt_mod->Checksum);
985
986rsdt_mod->Checksum=0;
987rsdt_mod->Checksum=256-checksum8(rsdt_mod,rsdt_mod->Length);
988
989DBG("New checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);
990} else {
991rsdp_mod->RsdtAddress=0;
992DBG("RSDT not found or RSDT incorrect\n");
993}
994DBG("\n");
995
996if (version) {
997struct acpi_2_xsdt *xsdt, *xsdt_mod;
998
999// FIXME: handle 64-bit address correctly
1000
1001xsdt=(struct acpi_2_xsdt*) ((uint32_t)rsdp->XsdtAddress);
1002DBG("XSDT @%x;%x, Length=%d\n", (uint32_t)(rsdp->XsdtAddress>>32),(uint32_t)rsdp->XsdtAddress, xsdt ? xsdt->Length : 0);
1003
1004if (xsdt && (uint64_t)rsdp->XsdtAddress<0xffffffff && xsdt->Length<0x10000) {
1005uint64_t *xsdt_entries;
1006int xsdt_entries_num, i;
1007int dropoffset=0;
1008
1009// mozo: using malloc cos I didn't found how to free already allocated kernel memory
1010xsdt_mod=(struct acpi_2_xsdt*)malloc(xsdt->Length);
1011memcpy(xsdt_mod, xsdt, xsdt->Length);
1012
1013rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1014xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1015xsdt_entries=(uint64_t *)(xsdt_mod+1);
1016for (i=0;i<xsdt_entries_num;i++) {
1017char *table=(char *)((uint32_t)(xsdt_entries[i]));
1018if (!table) {
1019continue;
1020}
1021xsdt_entries[i-dropoffset]=xsdt_entries[i];
1022
1023if (drop_ssdt && tableSign(table, "SSDT")) {
1024DBG("dropped (OEM)\n");
1025dropoffset++;
1026continue;
1027}
1028if (tableSign(table, "DSDT")) {
1029DBG("DSDT found\n");
1030
1031if (new_dsdt) {
1032xsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
1033DBG("custom table added\n");
1034}
1035
1036DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1037
1038continue;
1039}
1040if (tableSign(table, "FACP")) {
1041struct acpi_2_fadt *fadt, *fadt_mod;
1042fadt=(struct acpi_2_fadt *)(uint32_t)xsdt_entries[i];
1043
1044DBG("FADT found @%x%x, Length %d\n",(uint32_t)(xsdt_entries[i]>>32),fadt,
1045fadt->Length);
1046
1047if (!fadt || (uint64_t)xsdt_entries[i] >= 0xffffffff || fadt->Length>0x10000) {
1048DBG("FADT incorrect or after 4GB. Dropping XSDT\n");
1049goto drop_xsdt;
1050}
1051
1052fadt_mod = patch_fadt(fadt, new_dsdt);
1053xsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
1054
1055// DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1056
1057// Generate _CST SSDT
1058if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod))) {
1059DBG("C-States generated\n");
1060generate_cstates = false; // Generate SSDT only once!
1061ssdt_count++;
1062}
1063
1064// Generating _PSS SSDT
1065if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT))) {
1066DBG("P-States generated\n");
1067generate_pstates = false; // Generate SSDT only once!
1068ssdt_count++;
1069}
1070
1071continue;
1072}
1073DBG("copied (OEM)\n");
1074// DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1075}
1076
1077// Allocate xsdt in Kernel memory area
1078xsdt_mod->Length += 8*ssdt_count - 8*dropoffset;
1079struct acpi_2_xsdt *xsdt_copy = (struct acpi_2_xsdt *)AllocateKernelMemory(xsdt_mod->Length);
1080memcpy(xsdt_copy, xsdt_mod, xsdt_mod->Length);
1081free(xsdt_mod); xsdt_mod = xsdt_copy;
1082rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1083xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1084xsdt_entries=(uint64_t *)(xsdt_mod+1);
1085
1086// Mozodojo: Insert additional SSDTs into XSDT
1087if(ssdt_count > 0) {
1088int j;
1089
1090for (j=0; j<ssdt_count; j++) {
1091xsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
1092}
1093
1094verbose("Added %d SSDT table(s) into XSDT\n", ssdt_count);
1095}
1096
1097// Correct the checksum of XSDT
1098xsdt_mod->Checksum=0;
1099xsdt_mod->Checksum=256-checksum8(xsdt_mod,xsdt_mod->Length);
1100} else {
1101drop_xsdt:
1102
1103DBG("About to drop XSDT\n");
1104
1105/*FIXME: Now we just hope that if MacOS doesn't find XSDT it reverts to RSDT.
1106 * A Better strategy would be to generate
1107 */
1108
1109rsdp_mod->XsdtAddress=0xffffffffffffffffLL;
1110verbose("XSDT not found or XSDT incorrect\n");
1111}
1112}
1113DBG("\n");
1114
1115// Correct the checksum of RSDP
1116
1117DBG("RSDP: Original checksum %d, ", rsdp_mod->Checksum);
1118rsdp_mod->Checksum=0;
1119rsdp_mod->Checksum=256-checksum8(rsdp_mod,20);
1120DBG("New checksum %d\n", rsdp_mod->Checksum);
1121
1122if (version) {
1123DBG("RSDP: Original extended checksum %d, ", rsdp_mod->ExtendedChecksum);
1124rsdp_mod->ExtendedChecksum=0;
1125rsdp_mod->ExtendedChecksum=256-checksum8(rsdp_mod,rsdp_mod->Length);
1126DBG("New extended checksum %d\n", rsdp_mod->ExtendedChecksum);
1127}
1128
1129if (version) {
1130/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1131acpi20_p = (uint64_t)(uint32_t)rsdp_mod;
1132addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
1133} else {
1134/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1135acpi10_p = (uint64_t)(uint32_t)rsdp_mod;
1136addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
1137}
1138DBG("ACPI version %d patching finished\n\n", version+1);
1139}
1140#if DEBUG_ACPI
1141printf("Press a key to continue... (DEBUG_ACPI)\n");
1142getchar();
1143#endif
1144return 1;
1145}
1146

Archive Download this file

Revision: 2454