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1/*
2 * Copyright 2008 mackerintel
3 * 2010 mojodojo, 2012 slice
4 */
5
6#include "libsaio.h"
7#include "boot.h"
8#include "bootstruct.h"
9#include "acpi.h"
10#include "efi_tables.h"
11#include "fake_efi.h"
12#include "acpi_patcher.h"
13#include "platform.h"
14#include "cpu.h"
15#include "aml_generator.h"
16
17#ifndef DEBUG_ACPI
18#define DEBUG_ACPI 0
19#endif
20
21#if DEBUG_ACPI==2
22#define DBG(x...) {printf(x); sleep(1);}
23#elif DEBUG_ACPI==1
24#define DBG(x...) printf(x)
25#else
26#define DBG(x...) msglog(x)
27#endif
28
29// Slice: New signature compare function
30boolean_t tableSign(char *table, const char *sgn)
31{
32int i;
33for (i = 0; i < 4; i++)
34{
35if ((table[i] &~0x20) != (sgn[i] &~0x20))
36{
37return false;
38}
39}
40return true;
41}
42
43/* Gets the ACPI 1.0 RSDP address */
44static struct acpi_2_rsdp* getAddressOfAcpiTable()
45{
46/* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
47
48void *acpi_addr = (void*)ACPI_RANGE_START;
49
50for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
51{
52if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
53{
54uint8_t csum = checksum8(acpi_addr, 20);
55if(csum == 0)
56{
57// Only return the table if it is a true version 1.0 table (Revision 0)
58if(((struct acpi_2_rsdp*)acpi_addr)->Revision == 0)
59return acpi_addr;
60}
61}
62}
63return NULL;
64}
65
66/* Gets the ACPI 2.0 RSDP address */
67static struct acpi_2_rsdp* getAddressOfAcpi20Table()
68{
69/* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
70
71void *acpi_addr = (void*)ACPI_RANGE_START;
72
73for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
74{
75if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
76{
77uint8_t csum = checksum8(acpi_addr, 20);
78
79/* Only assume this is a 2.0 or better table if the revision is greater than 0
80 * NOTE: ACPI 3.0 spec only seems to say that 1.0 tables have revision 1
81 * and that the current revision is 2.. I am going to assume that rev > 0 is 2.0.
82 */
83
84if(csum == 0 && (((struct acpi_2_rsdp*)acpi_addr)->Revision > 0))
85{
86uint8_t csum2 = checksum8(acpi_addr, sizeof(struct acpi_2_rsdp));
87if(csum2 == 0)
88{
89return acpi_addr;
90}
91}
92}
93}
94return NULL;
95}
96
97/* The folowing ACPI Table search algo. should be reused anywhere needed:*/
98/* WARNING: outDirspec string will be overwritten by subsequent calls! */
99int search_and_get_acpi_fd(const char * filename, const char ** outDirspec)
100{
101int fd = 0;
102static char dirSpec[512];
103
104// Try finding 'filename' in the usual places
105// Start searching any potential location for ACPI Table
106snprintf(dirSpec, sizeof(dirSpec), "%s", filename);
107fd = open(dirSpec, 0);
108if (fd < 0) {
109snprintf(dirSpec, sizeof(dirSpec), "/Extra/%s", filename);
110fd = open(dirSpec, 0);
111if (fd < 0)
112{
113snprintf(dirSpec, sizeof(dirSpec), "bt(0,0)/Extra/%s", filename);
114fd = open(dirSpec, 0);
115if (fd < 0) {
116// NOT FOUND:
117DBG("ACPI Table not found: %s\n", filename);
118*dirSpec = '\0';
119}
120}
121}
122
123if (outDirspec) *outDirspec = dirSpec;
124return fd;
125}
126
127void *loadACPITable (const char * filename)
128{
129void *tableAddr;
130const char * dirspec=NULL;
131
132int fd = search_and_get_acpi_fd(filename, &dirspec);
133
134if (fd>=0)
135{
136tableAddr=(void*)AllocateKernelMemory(file_size (fd));
137if (tableAddr)
138{
139if (read (fd, tableAddr, file_size (fd))!=file_size (fd))
140{
141DBG("Couldn't read table %s\n",dirspec);
142free (tableAddr);
143close (fd);
144return NULL;
145}
146
147DBG("Table %s read and stored at: %x\n", dirspec, tableAddr);
148close (fd);
149return tableAddr;
150}
151close (fd);
152DBG("Couldn't allocate memory for table \n", dirspec);
153}
154//printf("Couldn't find table %s\n", filename);
155return NULL;
156}
157
158uint8_tacpi_cpu_count = 0;
159char* acpi_cpu_name[32];
160uint32_t acpi_cpu_p_blk = 0;
161
162void get_acpi_cpu_names(unsigned char* dsdt, uint32_t length)
163{
164uint32_t i;
165
166DBG("Start finding cpu names. length %d\n", length);
167
168for (i=0; i<length-7; i++)
169{
170if (dsdt[i] == 0x5B && dsdt[i+1] == 0x83) // ProcessorOP
171{
172DBG("DSDT: %x%x\n", dsdt[i], dsdt[i+1]);
173
174uint32_t offset = i + 3 + (dsdt[i+2] >> 6);
175
176bool add_name = true;
177
178uint8_t j;
179
180for (j=0; j<4; j++)
181{
182char c = dsdt[offset+j];
183
184if (!aml_isvalidchar(c))
185{
186add_name = false;
187DBG("Invalid character found in ProcessorOP 0x%x!\n", c);
188break;
189}
190}
191
192if (add_name)
193{
194acpi_cpu_name[acpi_cpu_count] = malloc(4);
195memcpy(acpi_cpu_name[acpi_cpu_count], dsdt+offset, 4);
196i = offset + 5;
197
198if (acpi_cpu_count == 0)
199acpi_cpu_p_blk = dsdt[i] | (dsdt[i+1] << 8);
200
201DBG("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
202
203if (++acpi_cpu_count == 32) {
204return;
205}
206}
207}
208}
209
210DBG("End finding cpu names: cpu names found: %d\n", acpi_cpu_count);
211}
212
213struct acpi_2_ssdt *generate_cst_ssdt(struct acpi_2_fadt* fadt)
214{
215char ssdt_header[] = // cst_ssdt_header
216{
2170x53, 0x53, 0x44, 0x54, 0xE7, 0x00, 0x00, 0x00, /* SSDT.... */
2180x01, 0x17, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x41, /* ..PmRefA */
2190x43, 0x70, 0x75, 0x43, 0x73, 0x74, 0x00, 0x00, /* CpuCst.. */
2200x00, 0x10, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* ....INTL */
2210x31, 0x03, 0x10, 0x20/* 1.._*/
222};
223
224char resource_template_register_fixedhw[] =
225{
2260x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
2270x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2280x00, 0x00, 0x01, 0x79, 0x00
229};
230
231char resource_template_register_systemio[] =
232{
2330x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
2340x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
2350x00, 0x00, 0x00, 0x79, 0x00,
236};
237
238if (Platform.CPU.Vendor != 0x756E6547) {
239DBG("Not an Intel platform: C-States will not be generated !!!\n");
240return NULL;
241}
242
243if (fadt == NULL) {
244DBG("FACP not exists: C-States will not be generated !!!\n");
245return NULL;
246}
247
248struct acpi_2_dsdt* dsdt = (void*)fadt->DSDT;
249
250if (dsdt == NULL) {
251DBG("DSDT not found: C-States will not be generated !!!\n");
252return NULL;
253}
254
255if (acpi_cpu_count == 0)
256get_acpi_cpu_names((void*)dsdt, dsdt->Length);
257
258if (acpi_cpu_count > 0)
259{
260bool c2_enabled = false;
261bool c3_enabled = false;
262bool c4_enabled = false;
263bool cst_using_systemio = false;
264
265getBoolForKey(kEnableC2State, &c2_enabled, &bootInfo->chameleonConfig);
266getBoolForKey(kEnableC3State, &c3_enabled, &bootInfo->chameleonConfig);
267getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->chameleonConfig);
268getBoolForKey(kCSTUsingSystemIO, &cst_using_systemio, &bootInfo->chameleonConfig);
269
270c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
271c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
272
273unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + (c3_enabled ? 1 : 0);
274
275AML_CHUNK* root = aml_create_node(NULL);
276aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
277AML_CHUNK* scop = aml_add_scope(root, "\\_PR_");
278AML_CHUNK* name = aml_add_name(scop, "CST_");
279AML_CHUNK* pack = aml_add_package(name);
280aml_add_byte(pack, cstates_count);
281
282AML_CHUNK* tmpl = aml_add_package(pack);
283if (cst_using_systemio) {
284// C1
285resource_template_register_fixedhw[8] = 0x00;
286resource_template_register_fixedhw[9] = 0x00;
287resource_template_register_fixedhw[18] = 0x00;
288aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
289aml_add_byte(tmpl, 0x01);// C1
290aml_add_word(tmpl, 0x0001);// Latency
291aml_add_dword(tmpl, 0x000003e8);// Power
292
293uint8_t p_blk_lo, p_blk_hi;
294
295if (c2_enabled) // C2
296{
297p_blk_lo = acpi_cpu_p_blk + 4;
298p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
299
300tmpl = aml_add_package(pack);
301resource_template_register_systemio[11] = p_blk_lo; // C2
302resource_template_register_systemio[12] = p_blk_hi; // C2
303aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
304aml_add_byte(tmpl, 0x02);// C2
305aml_add_word(tmpl, 0x0040);// Latency
306aml_add_dword(tmpl, 0x000001f4);// Power
307}
308
309if (c4_enabled) // C4
310{
311p_blk_lo = acpi_cpu_p_blk + 5;
312p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
313
314tmpl = aml_add_package(pack);
315resource_template_register_systemio[11] = p_blk_lo; // C4
316resource_template_register_systemio[12] = p_blk_hi; // C4
317aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
318aml_add_byte(tmpl, 0x04);// C4
319aml_add_word(tmpl, 0x0080);// Latency
320aml_add_dword(tmpl, 0x000000C8);// Power
321}
322else if (c3_enabled) // C3
323{
324p_blk_lo = acpi_cpu_p_blk + 5;
325p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
326
327tmpl = aml_add_package(pack);
328resource_template_register_systemio[11] = p_blk_lo; // C3
329resource_template_register_systemio[12] = p_blk_hi; // C3
330aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
331aml_add_byte(tmpl, 0x03);// C3
332aml_add_word(tmpl, 0x0060);// Latency
333aml_add_dword(tmpl, 0x0000015e);// Power
334}
335}
336else
337{
338// C1
339resource_template_register_fixedhw[8] = 0x01;
340resource_template_register_fixedhw[9] = 0x02;
341resource_template_register_fixedhw[18] = 0x01;
342
343resource_template_register_fixedhw[11] = 0x00; // C1
344aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
345aml_add_byte(tmpl, 0x01);// C1
346aml_add_word(tmpl, 0x0001);// Latency
347aml_add_dword(tmpl, 0x000003e8);// Power
348
349resource_template_register_fixedhw[18] = 0x03;
350
351if (c2_enabled) // C2
352{
353tmpl = aml_add_package(pack);
354resource_template_register_fixedhw[11] = 0x10; // C2
355aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
356aml_add_byte(tmpl, 0x02);// C2
357aml_add_word(tmpl, 0x0040);// Latency
358aml_add_dword(tmpl, 0x000001f4);// Power
359}
360
361if (c4_enabled) // C4
362{
363tmpl = aml_add_package(pack);
364resource_template_register_fixedhw[11] = 0x30; // C4
365aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
366aml_add_byte(tmpl, 0x04);// C4
367aml_add_word(tmpl, 0x0080);// Latency
368aml_add_dword(tmpl, 0x000000C8);// Power
369}
370else if (c3_enabled)
371{
372tmpl = aml_add_package(pack);
373resource_template_register_fixedhw[11] = 0x20; // C3
374aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
375aml_add_byte(tmpl, 0x03);// C3
376aml_add_word(tmpl, 0x0060);// Latency
377aml_add_dword(tmpl, 0x0000015e);// Power
378}
379}
380
381// Aliaces
382int i;
383for (i = 0; i < acpi_cpu_count; i++)
384{
385char name[9];
386sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
387
388scop = aml_add_scope(root, name);
389aml_add_alias(scop, "CST_", "_CST");
390}
391
392aml_calculate_size(root);
393
394struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
395
396aml_write_node(root, (void*)ssdt, 0);
397
398ssdt->Length = root->Size;
399ssdt->Checksum = 0;
400ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
401
402aml_destroy_node(root);
403
404// dumpPhysAddr("C-States SSDT content: ", ssdt, ssdt->Length);
405
406DBG("SSDT with CPU C-States generated successfully\n");
407
408return ssdt;
409} else {
410DBG("ACPI CPUs not found: C-States not generated !!!\n");
411}
412
413return NULL;
414}
415
416struct acpi_2_ssdt *generate_pss_ssdt(struct acpi_2_dsdt* dsdt)
417{
418char ssdt_header[] = // pss_ssdt_header
419{
4200x53, 0x53, 0x44, 0x54, 0x7E, 0x00, 0x00, 0x00, /* SSDT.... */
4210x01, 0x6A, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x00, /* ..PmRef. */
4220x43, 0x70, 0x75, 0x50, 0x6D, 0x00, 0x00, 0x00, /* CpuPm... */
4230x00, 0x30, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* .0..INTL */
4240x31, 0x03, 0x10, 0x20,/* 1.._*/
425};
426
427if (Platform.CPU.Vendor != 0x756E6547) {
428DBG("Not an Intel platform: P-States will not be generated !!!\n");
429return NULL;
430}
431
432if (!(Platform.CPU.Features & CPU_FEATURE_MSR)) {
433DBG("Unsupported CPU: P-States will not be generated !!! No MSR support\n");
434return NULL;
435}
436
437if (acpi_cpu_count == 0)
438get_acpi_cpu_names((void*)dsdt, dsdt->Length);
439
440if (acpi_cpu_count > 0)
441{
442struct p_state initial, maximum, minimum, p_states[32];
443uint8_t p_states_count = 0;
444
445// Retrieving P-States, ported from code by superhai (c)
446switch (Platform.CPU.Family) {
447case 0x06:
448{
449switch (Platform.CPU.Model)
450{
451case CPU_MODEL_DOTHAN:// Intel Pentium M
452case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
453case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
454case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
455case CPU_MODEL_ATOM:// Intel Atom (45nm)
456{
457bool cpu_dynamic_fsb = false;
458
459if (rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 27))
460{
461wrmsr64(MSR_IA32_EXT_CONFIG, (rdmsr64(MSR_IA32_EXT_CONFIG) | (1 << 28)));
462delay(1);
463cpu_dynamic_fsb = rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 28);
464}
465
466bool cpu_noninteger_bus_ratio = (rdmsr64(MSR_IA32_PERF_STATUS) & (1ULL << 46));
467
468initial.Control = rdmsr64(MSR_IA32_PERF_STATUS);
469
470maximum.Control = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 32) & 0x1F3F) | (0x4000 * cpu_noninteger_bus_ratio);
471maximum.CID = ((maximum.FID & 0x1F) << 1) | cpu_noninteger_bus_ratio;
472
473minimum.FID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 24) & 0x1F) | (0x80 * cpu_dynamic_fsb);
474minimum.VID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 48) & 0x3F);
475
476if (minimum.FID == 0)
477{
478uint64_t msr;
479uint8_t i;
480// Probe for lowest fid
481for (i = maximum.FID; i >= 0x6; i--)
482{
483msr = rdmsr64(MSR_IA32_PERF_CONTROL);
484wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (i << 8) | minimum.VID);
485intel_waitforsts();
486minimum.FID = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0x1F;
487delay(1);
488}
489
490msr = rdmsr64(MSR_IA32_PERF_CONTROL);
491wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
492intel_waitforsts();
493}
494
495if (minimum.VID == maximum.VID)
496{
497uint64_t msr;
498uint8_t i;
499// Probe for lowest vid
500for (i = maximum.VID; i > 0xA; i--)
501{
502msr = rdmsr64(MSR_IA32_PERF_CONTROL);
503wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (minimum.FID << 8) | i);
504intel_waitforsts();
505minimum.VID = rdmsr64(MSR_IA32_PERF_STATUS) & 0x3F;
506delay(1);
507}
508
509msr = rdmsr64(MSR_IA32_PERF_CONTROL);
510wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
511intel_waitforsts();
512}
513
514minimum.CID = ((minimum.FID & 0x1F) << 1) >> cpu_dynamic_fsb;
515
516// Sanity check
517if (maximum.CID < minimum.CID) {
518DBG("P-States: Insane FID values!");
519p_states_count = 0;
520} else {
521uint8_t vidstep;
522uint8_t i = 0, u, invalid = 0;
523// Finalize P-States
524// Find how many P-States machine supports
525p_states_count = (uint8_t)(maximum.CID - minimum.CID + 1);
526
527if (p_states_count > 32) {
528p_states_count = 32;
529}
530
531vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);
532
533for (u = 0; u < p_states_count; u++) {
534i = u - invalid;
535
536p_states[i].CID = maximum.CID - u;
537p_states[i].FID = (uint8_t)(p_states[i].CID >> 1);
538
539if (p_states[i].FID < 0x6) {
540if (cpu_dynamic_fsb) {
541p_states[i].FID = (p_states[i].FID << 1) | 0x80;
542}
543} else if (cpu_noninteger_bus_ratio) {
544p_states[i].FID = p_states[i].FID | (0x40 * (p_states[i].CID & 0x1));
545}
546
547if (i && p_states[i].FID == p_states[i-1].FID) {
548invalid++;
549}
550p_states[i].VID = ((maximum.VID << 2) - (vidstep * u)) >> 2;
551uint32_t multiplier = p_states[i].FID & 0x1f;// = 0x08
552bool half = p_states[i].FID & 0x40;// = 0x01
553bool dfsb = p_states[i].FID & 0x80;// = 0x00
554uint32_t fsb = (uint32_t)(Platform.CPU.FSBFrequency / 1000000); // = 400
555uint32_t halffsb = (fsb + 1) >> 1;// = 200
556uint32_t frequency = (multiplier * fsb);// = 3200
557
558p_states[i].Frequency = (uint32_t)(frequency + (half * halffsb)) >> dfsb;// = 3200 + 200 = 3400
559}
560
561p_states_count -= invalid;
562}
563
564break;
565}
566case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
567case CPU_MODEL_DALES:
568case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
569case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
570case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
571case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
572case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
573case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
574case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
575case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
576case CPU_MODEL_HASWELL://
577case CPU_MODEL_IVYBRIDGE_XEON: //
578//case CPU_MODEL_HASWELL_H://
579case CPU_MODEL_HASWELL_SVR://
580case CPU_MODEL_HASWELL_ULT://
581case CPU_MODEL_CRYSTALWELL://
582
583{
584if ((Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_JAKETOWN) ||
585(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_HASWELL) ||
586(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE_XEON) || (Platform.CPU.Model == CPU_MODEL_HASWELL_SVR) ||
587(Platform.CPU.Model == CPU_MODEL_HASWELL_ULT) || (Platform.CPU.Model == CPU_MODEL_CRYSTALWELL))
588{
589maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;
590} else {
591maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff;
592}
593
594minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
595
596DBG("P-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);
597
598// Sanity check
599if (maximum.Control < minimum.Control) {
600DBG("Insane control values!");
601p_states_count = 0;
602} else {
603uint8_t i;
604p_states_count = 0;
605
606for (i = maximum.Control; i >= minimum.Control; i--) {
607p_states[p_states_count].Control = i;
608p_states[p_states_count].CID = p_states[p_states_count].Control << 1;
609p_states[p_states_count].Frequency = (Platform.CPU.FSBFrequency / 1000000) * i;
610p_states_count++;
611}
612}
613
614break;
615}
616default:
617DBG("Unsupported CPU (0x%X): P-States not generated !!!\n", Platform.CPU.Family);
618break;
619}
620}
621}
622
623// Generating SSDT
624if (p_states_count > 0) {
625int i;
626
627AML_CHUNK* root = aml_create_node(NULL);
628aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
629AML_CHUNK* scop = aml_add_scope(root, "\\_PR_");
630AML_CHUNK* name = aml_add_name(scop, "PSS_");
631AML_CHUNK* pack = aml_add_package(name);
632
633for (i = 0; i < p_states_count; i++) {
634AML_CHUNK* pstt = aml_add_package(pack);
635
636aml_add_dword(pstt, p_states[i].Frequency);
637aml_add_dword(pstt, 0x00000000); // Power
638aml_add_dword(pstt, 0x0000000A); // Latency
639aml_add_dword(pstt, 0x0000000A); // Latency
640aml_add_dword(pstt, p_states[i].Control);
641aml_add_dword(pstt, i+1); // Status
642}
643
644// Add aliaces
645for (i = 0; i < acpi_cpu_count; i++) {
646char name[9];
647sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
648
649scop = aml_add_scope(root, name);
650aml_add_alias(scop, "PSS_", "_PSS");
651}
652
653aml_calculate_size(root);
654
655struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
656
657aml_write_node(root, (void*)ssdt, 0);
658
659ssdt->Length = root->Size;
660ssdt->Checksum = 0;
661ssdt->Checksum = 256 - (uint8_t)(checksum8(ssdt, ssdt->Length));
662
663aml_destroy_node(root);
664
665//dumpPhysAddr("P-States SSDT content: ", ssdt, ssdt->Length);
666
667DBG("SSDT with CPU P-States generated successfully\n");
668
669return ssdt;
670}
671} else {
672DBG("ACPI CPUs not found: P-States not generated !!!\n");
673}
674
675return NULL;
676}
677
678struct acpi_2_fadt *patch_fadt(struct acpi_2_fadt *fadt, struct acpi_2_dsdt *new_dsdt)
679{
680extern void setupSystemType();
681
682struct acpi_2_fadt *fadt_mod = NULL;
683bool fadt_rev2_needed = false;
684bool fix_restart;
685bool fix_restart_ps2;
686const char * value;
687
688// Restart Fix
689if (Platform.CPU.Vendor == 0x756E6547) { /* Intel */
690fix_restart = true;
691fix_restart_ps2 = false;
692if ( getBoolForKey(kPS2RestartFix, &fix_restart_ps2, &bootInfo->chameleonConfig) && fix_restart_ps2) {
693fix_restart = true;
694} else {
695getBoolForKey(kRestartFix, &fix_restart, &bootInfo->chameleonConfig);
696}
697} else {
698DBG("Not an Intel platform: Restart Fix not applied !!!\n");
699fix_restart = false;
700}
701
702if (fix_restart) {
703fadt_rev2_needed = true;
704}
705
706// Allocate new fadt table
707if (fadt->Length < 0x84 && fadt_rev2_needed)
708{
709fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(0x84);
710memcpy(fadt_mod, fadt, fadt->Length);
711fadt_mod->Length = 0x84;
712fadt_mod->Revision = 0x02; // FADT rev 2 (ACPI 1.0B MS extensions)
713} else {
714fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(fadt->Length);
715memcpy(fadt_mod, fadt, fadt->Length);
716}
717// Determine system type / PM_Model
718if ( (value=getStringForKey(kSystemType, &bootInfo->chameleonConfig))!=NULL)
719{
720if (Platform.Type > 6) {
721if(fadt_mod->PM_Profile<=6) {
722Platform.Type = fadt_mod->PM_Profile; // get the fadt if correct
723} else {
724Platform.Type = 1;/* Set a fixed value (Desktop) */
725}
726DBG("Error: system-type must be 0..6. Defaulting to %d !\n", Platform.Type);
727} else {
728Platform.Type = (unsigned char) strtoul(value, NULL, 10);
729}
730}
731// Set PM_Profile from System-type if only user wanted this value to be forced
732if (fadt_mod->PM_Profile != Platform.Type) {
733if (value) {
734// user has overriden the SystemType so take care of it in FACP
735DBG("FADT: changing PM_Profile from 0x%02x to 0x%02x\n", fadt_mod->PM_Profile, Platform.Type);
736fadt_mod->PM_Profile = Platform.Type;
737} else {
738// PM_Profile has a different value and no override has been set, so reflect the user value to ioregs
739Platform.Type = fadt_mod->PM_Profile <= 6 ? fadt_mod->PM_Profile : 1;
740}
741}
742// We now have to write the systemm-type in ioregs: we cannot do it before in setupDeviceTree()
743// because we need to take care of FACP original content, if it is correct.
744setupSystemType();
745
746// Patch FADT to fix restart
747if (fix_restart) {
748if (fix_restart_ps2) {
749fadt_mod->Flags|= 0x400;
750fadt_mod->Reset_SpaceID= 0x01; // System I/O
751fadt_mod->Reset_BitWidth= 0x08; // 1 byte
752fadt_mod->Reset_BitOffset= 0x00; // Offset 0
753fadt_mod->Reset_AccessWidth= 0x01; // Byte access
754fadt_mod->Reset_Address= 0x64; // Address of the register
755fadt_mod->Reset_Value= 0xfe; // Value to write to reset the system
756DBG("FADT: PS2 Restart Fix applied!\n");
757} else {
758fadt_mod->Flags|= 0x400;
759fadt_mod->Reset_SpaceID= 0x01; // System I/O
760fadt_mod->Reset_BitWidth= 0x08; // 1 byte
761fadt_mod->Reset_BitOffset= 0x00; // Offset 0
762fadt_mod->Reset_AccessWidth= 0x01; // Byte access
763fadt_mod->Reset_Address= 0x0cf9; // Address of the register
764fadt_mod->Reset_Value= 0x06; // Value to write to reset the system
765DBG("FADT: ACPI Restart Fix applied!\n");
766}
767
768}
769
770// Patch DSDT Address if we have loaded DSDT.aml
771if(new_dsdt) {
772DBG("DSDT: Old @%x,%x, ",fadt_mod->DSDT,fadt_mod->X_DSDT);
773
774fadt_mod->DSDT=(uint32_t)new_dsdt;
775if ((uint32_t)(&(fadt_mod->X_DSDT))-(uint32_t)fadt_mod+8<=fadt_mod->Length) {
776fadt_mod->X_DSDT=(uint32_t)new_dsdt;
777}
778
779DBG("New @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);
780
781DBG("FADT: Using custom DSDT!\n");
782}
783
784// Correct the checksum
785fadt_mod->Checksum=0;
786fadt_mod->Checksum=256-checksum8(fadt_mod,fadt_mod->Length);
787
788return fadt_mod;
789}
790
791/* Setup ACPI without replacing DSDT. */
792int setupAcpiNoMod()
793{
794//addConfigurationTable(&gEfiAcpiTableGuid, getAddressOfAcpiTable(), "ACPI");
795//addConfigurationTable(&gEfiAcpi20TableGuid, getAddressOfAcpi20Table(), "ACPI_20");
796/* XXX aserebln why uint32 cast if pointer is uint64 ? */
797acpi10_p = (uint64_t)(uint32_t)getAddressOfAcpiTable();
798acpi20_p = (uint64_t)(uint32_t)getAddressOfAcpi20Table();
799addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
800if(acpi20_p) {
801addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
802} else {
803DBG("No ACPI 2.\n");
804}
805return 1;
806}
807
808/* Setup ACPI. Replace DSDT if DSDT.aml is found */
809int setupAcpi(void)
810{
811int version;
812void *new_dsdt = NULL; // DSDT.aml DSDT
813void *new_hpet = NULL; // HPET.aml HPET
814void *new_sbst = NULL; // SBST.aml SBST
815void *new_ecdt = NULL; // ECDT.aml ECDT
816void *new_asft = NULL; // ASFT.aml ASF!
817void *new_dmar = NULL; // DMAR.aml DMAR
818void *new_apic = NULL; // APIC.aml APIC
819void *new_mcfg = NULL; // MCFG.aml MCFG
820
821const char *filename;
822char dirSpec[128];
823int len = 0;
824
825// always reset cpu count to 0 when injecting new acpi
826acpi_cpu_count = 0;
827
828/* Try using the file specified with the DSDT option */
829if (getValueForKey(kDSDT, &filename, &len, &bootInfo->chameleonConfig)) {
830snprintf(dirSpec, sizeof(dirSpec), filename);
831} else {
832sprintf(dirSpec, "DSDT.aml");
833//verbose("dirSpec, DSDT.aml");
834}
835
836// Load replacement DSDT
837new_dsdt = loadACPITable(dirSpec);
838
839/* Try using the file specified with the HPET option */
840if (getValueForKey(kHPET, &filename, &len, &bootInfo->chameleonConfig)) {
841snprintf(dirSpec, sizeof(dirSpec), filename);
842} else {
843sprintf(dirSpec, "HPET.aml");
844}
845// Load replacement HPET
846new_hpet = loadACPITable(dirSpec);
847
848/* Try using the file specified with the SBST option */
849if (getValueForKey(kSBST, &filename, &len, &bootInfo->chameleonConfig)) {
850snprintf(dirSpec, sizeof(dirSpec), filename);
851} else {
852sprintf(dirSpec, "SBST.aml");
853}
854// Load replacement SBST
855new_sbst = loadACPITable(dirSpec);
856
857/* Try using the file specified with the ECDT option */
858if (getValueForKey(kECDT, &filename, &len, &bootInfo->chameleonConfig)) {
859snprintf(dirSpec, sizeof(dirSpec), filename);
860} else {
861sprintf(dirSpec, "ECDT.aml");
862}
863// Load replacement ECDT
864new_ecdt = loadACPITable(dirSpec);
865
866/* Try using the file specified with the ASF! option */
867if (getValueForKey(kASFT, &filename, &len, &bootInfo->chameleonConfig)) {
868snprintf(dirSpec, sizeof(dirSpec), filename);
869} else {
870sprintf(dirSpec, "ASFT.aml");
871}
872// Load replacement ASF!
873new_asft = loadACPITable(dirSpec);
874
875/* Try using the file specified with the DMAR option */
876if (getValueForKey(kDMAR, &filename, &len, &bootInfo->chameleonConfig)) {
877snprintf(dirSpec, sizeof(dirSpec), filename);
878} else {
879sprintf(dirSpec, "DMAR.aml");
880}
881// Load replacement DMAR
882new_dmar = loadACPITable(dirSpec);
883
884/* Try using the file specified with the APIC option */
885if (getValueForKey(kAPIC, &filename, &len, &bootInfo->chameleonConfig)) {
886snprintf(dirSpec, sizeof(dirSpec), filename);
887} else {
888sprintf(dirSpec, "APIC.aml");
889}
890// Load replacement APIC
891new_apic = loadACPITable(dirSpec);
892
893// Try using the file specified with the MCFG option */
894if (getValueForKey(kMCFG, &filename, &len, &bootInfo->chameleonConfig)) {
895snprintf(dirSpec, sizeof(dirSpec), filename);
896} else {
897sprintf(dirSpec, "MCFG.aml");
898}
899// Load replacement MCFG
900new_mcfg = loadACPITable(dirSpec);
901
902// Mozodojo: going to patch FACP and load SSDT's even if DSDT.aml is not present
903/*if (!new_dsdt)
904 {
905 return setupAcpiNoMod();
906 }*/
907
908// Mozodojo: Load additional SSDTs
909struct acpi_2_ssdt *new_ssdt[32]; // 30 + 2 additional tables for pss & cst
910int ssdt_count=0;
911
912// SSDT Options
913bool drop_ssdt=false, generate_pstates=false, generate_cstates=false;
914
915
916// ACPI Tables
917bool drop_dmar = getBoolForKey(kDropDMAR, &drop_dmar, &bootInfo->chameleonConfig);
918bool drop_hpet = getBoolForKey(kDropHPET, &drop_hpet, &bootInfo->chameleonConfig);
919bool drop_slic = getBoolForKey(kDropSLIC, &drop_slic, &bootInfo->chameleonConfig);
920bool drop_sbst = getBoolForKey(kDropSBST, &drop_sbst, &bootInfo->chameleonConfig);
921bool drop_ecdt = getBoolForKey(kDropECDT, &drop_ecdt, &bootInfo->chameleonConfig);
922bool drop_asft = getBoolForKey(kDropASFT, &drop_asft, &bootInfo->chameleonConfig);
923getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);
924getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);
925getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->chameleonConfig);
926//getBoolForKey(kGenerateTStates, &generate_tstates, &bootInfo->chameleonConfig);
927
928DBG("Generating P-States config: %s\n", generate_pstates ? "YES" : "NO");
929DBG("Generating C-States config: %s\n", generate_cstates ? "YES" : "NO");
930//DBG("Generating T-States config: %s\n", generate_tstates ? "YES" : "NO");
931
932{
933int i;
934
935for (i = 0; i < 30; i++)
936{
937char filename[512];
938
939sprintf(filename, i > 0 ? "SSDT-%d.aml" : "SSDT.aml", i);
940
941if ( (new_ssdt[ssdt_count] = loadACPITable(filename)) ) {
942ssdt_count++;
943} else {
944break;
945}
946}
947}
948
949// Do the same procedure for both versions of ACPI
950for (version = 0; version < 2; version++) {
951struct acpi_2_rsdp *rsdp, *rsdp_mod;
952struct acpi_2_rsdt *rsdt, *rsdt_mod;
953int rsdplength;
954
955// Find original rsdp
956rsdp=(struct acpi_2_rsdp *)(version ? getAddressOfAcpi20Table() : getAddressOfAcpiTable());
957if (!rsdp) {
958DBG("No ACPI version %d found. Ignoring\n", version+1);
959if (version) {
960addConfigurationTable(&gEfiAcpi20TableGuid, NULL, "ACPI_20");
961} else {
962addConfigurationTable(&gEfiAcpiTableGuid, NULL, "ACPI");
963}
964continue;
965}
966rsdplength=version ? rsdp->Length : 20;
967
968DBG("RSDP version %d found @%x. Length=%d\n",version+1,rsdp,rsdplength);
969
970/* FIXME: no check that memory allocation succeeded
971 * Copy and patch RSDP,RSDT, XSDT and FADT
972 * For more info see ACPI Specification pages 110 and following
973 */
974
975rsdp_mod=(struct acpi_2_rsdp *) AllocateKernelMemory(rsdplength);
976memcpy(rsdp_mod, rsdp, rsdplength);
977
978rsdt=(struct acpi_2_rsdt *)(rsdp->RsdtAddress);
979
980DBG("RSDT @%x, Length %d\n",rsdt, rsdt->Length);
981
982if (rsdt && (uint32_t)rsdt !=0xffffffff && rsdt->Length<0x10000) {
983uint32_t *rsdt_entries;
984int rsdt_entries_num;
985int dropoffset=0, i;
986
987// mozo: using malloc cos I didn't found how to free already allocated kernel memory
988rsdt_mod=(struct acpi_2_rsdt *)malloc(rsdt->Length);
989memcpy (rsdt_mod, rsdt, rsdt->Length);
990rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
991rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
992rsdt_entries=(uint32_t *)(rsdt_mod+1);
993for (i=0;i<rsdt_entries_num;i++) {
994char *table=(char *)(rsdt_entries[i]);
995if (!table) {
996continue;
997}
998
999DBG("TABLE %c%c%c%c,",table[0],table[1],table[2],table[3]);
1000
1001rsdt_entries[i-dropoffset]=rsdt_entries[i];
1002
1003if (drop_ssdt && tableSign(table, "SSDT")) {
1004DBG("OEM SSDT tables was dropped\n");
1005dropoffset++;
1006continue;
1007}
1008
1009if (drop_hpet && tableSign(table, "HPET")) {
1010DBG("OEM HPET table was dropped\n");
1011dropoffset++;
1012continue;
1013}
1014
1015if (drop_slic && tableSign(table, "SLIC")) {
1016DBG("OEM SLIC table was dropped\n");
1017dropoffset++;
1018continue;
1019}
1020
1021if (drop_sbst && tableSign(table, "SBST")) {
1022DBG("OEM SBST table was dropped\n");
1023dropoffset++;
1024continue;
1025}
1026
1027if (drop_ecdt && tableSign(table, "ECDT")) {
1028DBG("OEM ECDT table was dropped\n");
1029dropoffset++;
1030continue;
1031}
1032
1033if (drop_asft && tableSign(table, "ASF!")) {
1034DBG("OEM ASF! table was dropped\n");
1035dropoffset++;
1036continue;
1037}
1038
1039if (drop_dmar && tableSign(table, "DMAR")) {
1040DBG("OEM DMAR table was dropped\n");
1041dropoffset++;
1042continue;
1043}
1044
1045if (tableSign(table, "HPET")) {
1046DBG("HPET found\n");
1047DBG("Custom HPET table was found\n");
1048if(new_hpet) {
1049rsdt_entries[i-dropoffset]=(uint32_t)new_hpet;
1050}
1051continue;
1052}
1053
1054if (tableSign(table, "SBST")) {
1055DBG("SBST found\n");
1056DBG("Custom SBST table was found\n");
1057if(new_sbst) {
1058rsdt_entries[i-dropoffset]=(uint32_t)new_sbst;
1059}
1060continue;
1061}
1062
1063if (tableSign(table, "ECDT")) {
1064DBG("ECDT found\n");
1065DBG("Custom ECDT table was found\n");
1066if(new_ecdt) {
1067rsdt_entries[i-dropoffset]=(uint32_t)new_ecdt;
1068}
1069continue;
1070}
1071
1072if (tableSign(table, "ASF!")) {
1073DBG("ASF! found\n");
1074DBG("Custom ASF! table was found\n");
1075if(new_asft) {
1076rsdt_entries[i-dropoffset]=(uint32_t)new_asft;
1077}
1078continue;
1079}
1080
1081if (tableSign(table, "DMAR")) {
1082DBG("DMAR found\n");
1083DBG("Custom DMAR table was found\n");
1084if(new_dmar) {
1085rsdt_entries[i-dropoffset]=(uint32_t)new_dmar;
1086}
1087continue;
1088}
1089
1090if (tableSign(table, "APIC")) {
1091DBG("APIC found\n");
1092DBG("Custom APIC table was found\n");
1093if(new_apic) {
1094rsdt_entries[i-dropoffset]=(uint32_t)new_apic;
1095}
1096continue;
1097}
1098
1099if (tableSign(table, "MCFG")) {
1100DBG("MCFG found\n");
1101DBG("Custom MCFG table was found\n");
1102if(new_mcfg) {
1103rsdt_entries[i-dropoffset]=(uint32_t)new_mcfg;
1104}
1105
1106continue;
1107}
1108if (tableSign(table, "DSDT")) {
1109DBG("DSDT found\n");
1110DBG("Custom DSDT table was found\n");
1111if(new_dsdt) {
1112rsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
1113}
1114continue;
1115}
1116
1117if (tableSign(table, "FACP")) {
1118struct acpi_2_fadt *fadt, *fadt_mod;
1119fadt=(struct acpi_2_fadt *)rsdt_entries[i];
1120
1121DBG("FADT found @%x, Length %d\n",fadt, fadt->Length);
1122
1123if (!fadt || (uint32_t)fadt == 0xffffffff || fadt->Length>0x10000) {
1124DBG("FADT incorrect. Not modified\n");
1125continue;
1126}
1127
1128fadt_mod = patch_fadt(fadt, new_dsdt);
1129rsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
1130
1131// Generate _CST SSDT
1132if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod))) {
1133DBG("C-States generated\n");
1134generate_cstates = false; // Generate SSDT only once!
1135ssdt_count++;
1136}
1137
1138// Generating _PSS SSDT
1139if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT))) {
1140DBG("P-States generated\n");
1141generate_pstates = false; // Generate SSDT only once!
1142ssdt_count++;
1143}
1144continue;
1145}
1146}
1147DBG("\n");
1148
1149// Allocate rsdt in Kernel memory area
1150rsdt_mod->Length += 4*ssdt_count - 4*dropoffset;
1151struct acpi_2_rsdt *rsdt_copy = (struct acpi_2_rsdt *)AllocateKernelMemory(rsdt_mod->Length);
1152memcpy (rsdt_copy, rsdt_mod, rsdt_mod->Length);
1153free(rsdt_mod); rsdt_mod = rsdt_copy;
1154rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
1155rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
1156rsdt_entries=(uint32_t *)(rsdt_mod+1);
1157
1158// Mozodojo: Insert additional SSDTs into RSDT
1159if(ssdt_count > 0) {
1160int j;
1161
1162for (j=0; j<ssdt_count; j++) {
1163rsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
1164}
1165DBG("RSDT: Added %d SSDT table(s)\n", ssdt_count);
1166
1167}
1168
1169// Correct the checksum of RSDT
1170DBG("RSDT: Original checksum %d, ", rsdt_mod->Checksum);
1171
1172rsdt_mod->Checksum=0;
1173rsdt_mod->Checksum=256-checksum8(rsdt_mod,rsdt_mod->Length);
1174
1175DBG("New checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);
1176} else {
1177rsdp_mod->RsdtAddress=0;
1178DBG("RSDT not found or RSDT incorrect\n");
1179}
1180DBG("\n");
1181
1182if (version) {
1183struct acpi_2_xsdt *xsdt, *xsdt_mod;
1184
1185// FIXME: handle 64-bit address correctly
1186
1187xsdt=(struct acpi_2_xsdt*) ((uint32_t)rsdp->XsdtAddress);
1188DBG("XSDT @%x;%x, Length=%d Sign=%c%c%c%c\n", (uint32_t)(rsdp->XsdtAddress>>32),
1189(uint32_t)rsdp->XsdtAddress, xsdt->Length, xsdt[0], xsdt[1], xsdt[2], xsdt[3]);
1190if (xsdt && (uint64_t)rsdp->XsdtAddress<0xffffffff && xsdt->Length<0x10000) {
1191uint64_t *xsdt_entries;
1192int xsdt_entries_num, i;
1193int dropoffset=0;
1194
1195// mozo: using malloc cos I didn't found how to free already allocated kernel memory
1196xsdt_mod=(struct acpi_2_xsdt*)malloc(xsdt->Length);
1197memcpy(xsdt_mod, xsdt, xsdt->Length);
1198
1199rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1200xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1201xsdt_entries=(uint64_t *)(xsdt_mod+1);
1202for (i=0;i<xsdt_entries_num;i++) {
1203char *table=(char *)((uint32_t)(xsdt_entries[i]));
1204if (!table) {
1205continue;
1206}
1207xsdt_entries[i-dropoffset]=xsdt_entries[i];
1208
1209if (drop_ssdt && tableSign(table, "SSDT")) {
1210verbose("OEM SSDT tables was dropped\n");
1211dropoffset++;
1212continue;
1213}
1214
1215if (drop_hpet && tableSign(table, "HPET")) {
1216verbose("OEM HPET table was dropped\n");
1217dropoffset++;
1218continue;
1219}
1220
1221if (drop_slic && tableSign(table, "SLIC")) {
1222verbose("OEM SLIC table was dropped\n");
1223dropoffset++;
1224continue;
1225}
1226
1227if (drop_sbst && tableSign(table, "SBST")) {
1228verbose("OEM SBST table was dropped\n");
1229dropoffset++;
1230continue;
1231}
1232
1233if (drop_ecdt && tableSign(table, "ECDT")) {
1234verbose("OEM ECDT table was dropped\n");
1235dropoffset++;
1236continue;
1237}
1238
1239if (drop_asft && tableSign(table, "ASF!")) {
1240verbose("OEM ASF! table was dropped\n");
1241dropoffset++;
1242continue;
1243}
1244
1245if (drop_dmar && tableSign(table, "DMAR")) {
1246verbose("OEM DMAR table was dropped\n");
1247dropoffset++;
1248continue;
1249}
1250
1251if (tableSign(table, "DSDT")) {
1252DBG("DSDT found\n");
1253
1254if (new_dsdt) {
1255xsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
1256}
1257
1258DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1259
1260continue;
1261}
1262
1263if (tableSign(table, "HPET")) {
1264DBG("HPET found\n");
1265
1266if (new_hpet) {
1267xsdt_entries[i-dropoffset]=(uint32_t)new_hpet;
1268}
1269
1270DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1271
1272continue;
1273}
1274
1275if (tableSign(table, "SBST")) {
1276DBG("SBST found\n");
1277
1278if (new_sbst) {
1279xsdt_entries[i-dropoffset]=(uint32_t)new_sbst;
1280}
1281
1282DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1283
1284continue;
1285}
1286
1287if (tableSign(table, "ECDT")) {
1288DBG("ECDT found\n");
1289
1290if (new_ecdt) {
1291xsdt_entries[i-dropoffset]=(uint32_t)new_ecdt;
1292}
1293
1294DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1295
1296continue;
1297}
1298
1299if (tableSign(table, "ASF!")) {
1300DBG("ASF! found\n");
1301
1302if (new_asft) {
1303xsdt_entries[i-dropoffset]=(uint32_t)new_asft;
1304}
1305
1306DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1307
1308continue;
1309}
1310
1311if (tableSign(table, "DMAR")) {
1312DBG("DMAR found\n");
1313
1314if (new_dmar) {
1315xsdt_entries[i-dropoffset]=(uint32_t)new_dmar;
1316}
1317
1318DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1319
1320continue;
1321}
1322
1323if (tableSign(table, "APIC")) {
1324DBG("APIC found\n");
1325
1326if (new_apic) {
1327xsdt_entries[i-dropoffset]=(uint32_t)new_apic;
1328}
1329
1330DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1331
1332continue;
1333}
1334
1335if (tableSign(table, "MCFG")) {
1336DBG("MCFG found\n");
1337
1338if (new_mcfg) {
1339xsdt_entries[i-dropoffset]=(uint32_t)new_mcfg;
1340}
1341
1342DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1343
1344continue;
1345}
1346
1347if (tableSign(table, "FACP")) {
1348struct acpi_2_fadt *fadt, *fadt_mod;
1349fadt=(struct acpi_2_fadt *)(uint32_t)xsdt_entries[i];
1350
1351DBG("FADT found @%x%x, Length %d\n",(uint32_t)(xsdt_entries[i]>>32),fadt,
1352fadt->Length);
1353
1354if (!fadt || (uint64_t)xsdt_entries[i] >= 0xffffffff || fadt->Length>0x10000) {
1355DBG("FADT incorrect or after 4GB. Dropping XSDT\n");
1356goto drop_xsdt;
1357}
1358
1359fadt_mod = patch_fadt(fadt, new_dsdt);
1360xsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
1361
1362// DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1363
1364// Generate _CST SSDT
1365if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod))) {
1366DBG("C-States generated\n");
1367generate_cstates = false; // Generate SSDT only once!
1368ssdt_count++;
1369}
1370
1371// Generating _PSS SSDT
1372if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT))) {
1373DBG("P-States generated\n");
1374generate_pstates = false; // Generate SSDT only once!
1375ssdt_count++;
1376}
1377
1378// Generating _TSS SSDT
1379/*if (generate_tstates && (new_ssdt[ssdt_count] = generate_tss_ssdt((void*)fadt_mod->DSDT)))
1380{
1381generate_tstates = false; // Generate SSDT only once!
1382ssdt_count++;
1383}*/
1384continue;
1385}
1386
1387DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1388
1389}
1390
1391// Allocate xsdt in Kernel memory area
1392xsdt_mod->Length += 8*ssdt_count - 8*dropoffset;
1393struct acpi_2_xsdt *xsdt_copy = (struct acpi_2_xsdt *)AllocateKernelMemory(xsdt_mod->Length);
1394memcpy(xsdt_copy, xsdt_mod, xsdt_mod->Length);
1395free(xsdt_mod); xsdt_mod = xsdt_copy;
1396rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1397xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1398xsdt_entries=(uint64_t *)(xsdt_mod+1);
1399
1400// Mozodojo: Insert additional SSDTs into XSDT
1401if(ssdt_count > 0) {
1402int j;
1403
1404for (j=0; j<ssdt_count; j++) {
1405xsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
1406}
1407
1408verbose("Added %d SSDT table(s) into XSDT\n", ssdt_count);
1409}
1410
1411// Correct the checksum of XSDT
1412xsdt_mod->Checksum=0;
1413xsdt_mod->Checksum=256-checksum8(xsdt_mod,xsdt_mod->Length);
1414} else {
1415drop_xsdt:
1416
1417DBG("About to drop XSDT\n");
1418
1419/*FIXME: Now we just hope that if MacOS doesn't find XSDT it reverts to RSDT.
1420 * A Better strategy would be to generate
1421 */
1422
1423rsdp_mod->XsdtAddress=0xffffffffffffffffLL;
1424verbose("XSDT not found or XSDT incorrect\n");
1425}
1426}
1427DBG("\n");
1428
1429// Correct the checksum of RSDP
1430
1431DBG("RSDP: Original checksum %d, ", rsdp_mod->Checksum);
1432rsdp_mod->Checksum=0;
1433rsdp_mod->Checksum=256-checksum8(rsdp_mod,20);
1434DBG("New checksum %d\n", rsdp_mod->Checksum);
1435
1436if (version) {
1437DBG("RSDP: Original extended checksum %d, ", rsdp_mod->ExtendedChecksum);
1438rsdp_mod->ExtendedChecksum=0;
1439rsdp_mod->ExtendedChecksum=256-checksum8(rsdp_mod,rsdp_mod->Length);
1440DBG("New extended checksum %d\n", rsdp_mod->ExtendedChecksum);
1441}
1442
1443if (version)
1444{
1445/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1446acpi20_p = (uint64_t)(uint32_t)rsdp_mod;
1447addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
1448}
1449else
1450{
1451/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1452acpi10_p = (uint64_t)(uint32_t)rsdp_mod;
1453addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
1454}
1455DBG("ACPI version %d patching finished\n\n", version+1);
1456}
1457#if DEBUG_ACPI
1458printf("Press a key to continue... (DEBUG_ACPI)\n");
1459getchar();
1460#endif
1461return 1;
1462}
1463

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