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Root/trunk/i386/libsaio/acpi_patcher.c

1/*
2 * Copyright 2008 mackerintel
3 * 2010 mojodojo, 2012 slice
4 */
5
6#include "libsaio.h"
7#include "boot.h"
8#include "bootstruct.h"
9#include "acpi.h"
10#include "efi_tables.h"
11#include "fake_efi.h"
12#include "acpi_patcher.h"
13#include "platform.h"
14#include "cpu.h"
15#include "aml_generator.h"
16
17#ifndef DEBUG_ACPI
18#define DEBUG_ACPI 0
19#endif
20
21#if DEBUG_ACPI==2
22#define DBG(x...) {printf(x); sleep(1);}
23#elif DEBUG_ACPI==1
24#define DBG(x...) printf(x)
25#else
26#define DBG(x...) msglog(x)
27#endif
28
29// Slice: New signature compare function
30boolean_t tableSign(char *table, const char *sgn)
31{
32int i;
33for (i = 0; i < 4; i++)
34{
35if ((table[i] &~0x20) != (sgn[i] &~0x20))
36{
37return false;
38}
39}
40return true;
41}
42
43/* Gets the ACPI 1.0 RSDP address */
44static struct acpi_2_rsdp* getAddressOfAcpiTable()
45{
46/* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
47
48void *acpi_addr = (void*)ACPI_RANGE_START;
49
50for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
51{
52if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
53{
54uint8_t csum = checksum8(acpi_addr, 20);
55if(csum == 0)
56{
57// Only return the table if it is a true version 1.0 table (Revision 0)
58if(((struct acpi_2_rsdp*)acpi_addr)->Revision == 0)
59return acpi_addr;
60}
61}
62}
63return NULL;
64}
65
66/* Gets the ACPI 2.0 RSDP address */
67static struct acpi_2_rsdp* getAddressOfAcpi20Table()
68{
69/* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
70
71void *acpi_addr = (void*)ACPI_RANGE_START;
72
73for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
74{
75if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
76{
77uint8_t csum = checksum8(acpi_addr, 20);
78
79/* Only assume this is a 2.0 or better table if the revision is greater than 0
80 * NOTE: ACPI 3.0 spec only seems to say that 1.0 tables have revision 1
81 * and that the current revision is 2.. I am going to assume that rev > 0 is 2.0.
82 */
83
84if(csum == 0 && (((struct acpi_2_rsdp*)acpi_addr)->Revision > 0))
85{
86uint8_t csum2 = checksum8(acpi_addr, sizeof(struct acpi_2_rsdp));
87if(csum2 == 0)
88{
89return acpi_addr;
90}
91}
92}
93}
94return NULL;
95}
96
97/* The folowing ACPI Table search algo. should be reused anywhere needed:*/
98/* WARNING: outDirspec string will be overwritten by subsequent calls! */
99int search_and_get_acpi_fd(const char * filename, const char ** outDirspec)
100{
101int fd = 0;
102static char dirSpec[512];
103
104// Try finding 'filename' in the usual places
105// Start searching any potential location for ACPI Table
106snprintf(dirSpec, sizeof(dirSpec), "%s", filename);
107fd = open(dirSpec, 0);
108if (fd < 0)
109{
110snprintf(dirSpec, sizeof(dirSpec), "/Extra/%s", filename);
111fd = open(dirSpec, 0);
112if (fd < 0)
113{
114snprintf(dirSpec, sizeof(dirSpec), "bt(0,0)/Extra/%s", filename);
115fd = open(dirSpec, 0);
116if (fd < 0)
117{
118// NOT FOUND:
119DBG("ACPI Table not found: %s\n", filename);
120*dirSpec = '\0';
121}
122}
123}
124
125if (outDirspec) *outDirspec = dirSpec;
126return fd;
127}
128
129void *loadACPITable (const char * filename)
130{
131const char * dirspec=NULL;
132
133int fd = search_and_get_acpi_fd(filename, &dirspec);
134
135if (fd >= 0)
136{
137void *tableAddr = (void*)AllocateKernelMemory(file_size (fd));
138if (tableAddr)
139{
140if (read (fd, tableAddr, file_size (fd))!=file_size (fd))
141{
142DBG("Couldn't read table %s\n",dirspec);
143free (tableAddr);
144close (fd);
145return NULL;
146}
147
148DBG("Table %s read and stored at: %x\n", dirspec, tableAddr);
149close (fd);
150return tableAddr;
151}
152close (fd);
153DBG("Couldn't allocate memory for table \n", dirspec);
154}
155//printf("Couldn't find table %s\n", filename);
156return NULL;
157}
158
159uint8_tacpi_cpu_count = 0;
160char* acpi_cpu_name[32];
161uint32_t acpi_cpu_p_blk = 0;
162
163void get_acpi_cpu_names(unsigned char* dsdt, uint32_t length)
164{
165uint32_t i;
166
167DBG("Start finding cpu names. length %d\n", length);
168
169for (i=0; i<length-7; i++)
170{
171if (dsdt[i] == 0x5B && dsdt[i+1] == 0x83) // ProcessorOP
172{
173DBG("DSDT: %x%x\n", dsdt[i], dsdt[i+1]);
174
175uint32_t offset = i + 3 + (dsdt[i+2] >> 6);
176
177bool add_name = true;
178
179uint8_t j;
180
181for (j=0; j<4; j++)
182{
183char c = dsdt[offset+j];
184
185if (!aml_isvalidchar(c))
186{
187add_name = false;
188DBG("Invalid character found in ProcessorOP 0x%x!\n", c);
189break;
190}
191}
192
193if (add_name)
194{
195acpi_cpu_name[acpi_cpu_count] = malloc(4);
196memcpy(acpi_cpu_name[acpi_cpu_count], dsdt+offset, 4);
197i = offset + 5;
198
199if (acpi_cpu_count == 0)
200{
201acpi_cpu_p_blk = dsdt[i] | (dsdt[i+1] << 8);
202}
203
204DBG("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
205
206if (++acpi_cpu_count == 32)
207{
208return;
209}
210}
211}
212}
213
214DBG("End finding cpu names: cpu names found: %d\n", acpi_cpu_count);
215}
216
217struct acpi_2_ssdt *generate_cst_ssdt(struct acpi_2_fadt* fadt)
218{
219static char const ssdt_header[] = // cst_ssdt_header
220{
2210x53, 0x53, 0x44, 0x54, 0xE7, 0x00, 0x00, 0x00, /* SSDT.... */
2220x01, 0x17, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x41, /* ..PmRefA */
2230x43, 0x70, 0x75, 0x43, 0x73, 0x74, 0x00, 0x00, /* CpuCst.. */
2240x00, 0x10, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* ....INTL */
2250x31, 0x03, 0x10, 0x20/* 1.._*/
226};
227
228char resource_template_register_fixedhw[] =
229{
2300x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
2310x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2320x00, 0x00, 0x01, 0x79, 0x00
233};
234
235char resource_template_register_systemio[] =
236{
2370x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
2380x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
2390x00, 0x00, 0x00, 0x79, 0x00,
240};
241
242if (Platform.CPU.Vendor != 0x756E6547) {
243DBG("Not an Intel platform: C-States will not be generated !!!\n");
244return NULL;
245}
246
247if (fadt == NULL) {
248DBG("FACP not exists: C-States will not be generated !!!\n");
249return NULL;
250}
251
252struct acpi_2_dsdt* dsdt = (void*)fadt->DSDT;
253
254if (dsdt == NULL) {
255DBG("DSDT not found: C-States will not be generated !!!\n");
256return NULL;
257}
258
259if (acpi_cpu_count == 0)
260get_acpi_cpu_names((void*)dsdt, dsdt->Length);
261
262if (acpi_cpu_count > 0)
263{
264bool c2_enabled = false;
265bool c3_enabled = false;
266bool c4_enabled = false;
267bool cst_using_systemio = false;
268
269getBoolForKey(kEnableC2State, &c2_enabled, &bootInfo->chameleonConfig);
270getBoolForKey(kEnableC3State, &c3_enabled, &bootInfo->chameleonConfig);
271getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->chameleonConfig);
272getBoolForKey(kCSTUsingSystemIO, &cst_using_systemio, &bootInfo->chameleonConfig);
273
274c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
275c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
276
277unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + (c3_enabled ? 1 : 0);
278
279AML_CHUNK* root = aml_create_node(NULL);
280aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
281AML_CHUNK* scop = aml_add_scope(root, "\\_PR_");
282AML_CHUNK* name = aml_add_name(scop, "CST_");
283AML_CHUNK* pack = aml_add_package(name);
284aml_add_byte(pack, cstates_count);
285
286AML_CHUNK* tmpl = aml_add_package(pack);
287if (cst_using_systemio) {
288// C1
289resource_template_register_fixedhw[8] = 0x00;
290resource_template_register_fixedhw[9] = 0x00;
291resource_template_register_fixedhw[18] = 0x00;
292aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
293aml_add_byte(tmpl, 0x01);// C1
294aml_add_word(tmpl, 0x0001);// Latency
295aml_add_dword(tmpl, 0x000003e8);// Power
296
297uint8_t p_blk_lo, p_blk_hi;
298
299if (c2_enabled) // C2
300{
301p_blk_lo = acpi_cpu_p_blk + 4;
302p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
303
304tmpl = aml_add_package(pack);
305resource_template_register_systemio[11] = p_blk_lo; // C2
306resource_template_register_systemio[12] = p_blk_hi; // C2
307aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
308aml_add_byte(tmpl, 0x02);// C2
309aml_add_word(tmpl, 0x0040);// Latency
310aml_add_dword(tmpl, 0x000001f4);// Power
311}
312
313if (c4_enabled) // C4
314{
315p_blk_lo = acpi_cpu_p_blk + 5;
316p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
317
318tmpl = aml_add_package(pack);
319resource_template_register_systemio[11] = p_blk_lo; // C4
320resource_template_register_systemio[12] = p_blk_hi; // C4
321aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
322aml_add_byte(tmpl, 0x04);// C4
323aml_add_word(tmpl, 0x0080);// Latency
324aml_add_dword(tmpl, 0x000000C8);// Power
325}
326else if (c3_enabled) // C3
327{
328p_blk_lo = acpi_cpu_p_blk + 5;
329p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
330
331tmpl = aml_add_package(pack);
332resource_template_register_systemio[11] = p_blk_lo; // C3
333resource_template_register_systemio[12] = p_blk_hi; // C3
334aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
335aml_add_byte(tmpl, 0x03);// C3
336aml_add_word(tmpl, 0x0060);// Latency
337aml_add_dword(tmpl, 0x0000015e);// Power
338}
339}
340else
341{
342// C1
343resource_template_register_fixedhw[11] = 0x00; // C1
344aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
345aml_add_byte(tmpl, 0x01);// C1
346aml_add_word(tmpl, 0x0001);// Latency
347aml_add_dword(tmpl, 0x000003e8);// Power
348
349resource_template_register_fixedhw[18] = 0x03;
350
351if (c2_enabled) // C2
352{
353tmpl = aml_add_package(pack);
354resource_template_register_fixedhw[11] = 0x10; // C2
355aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
356aml_add_byte(tmpl, 0x02);// C2
357aml_add_word(tmpl, 0x0040);// Latency
358aml_add_dword(tmpl, 0x000001f4);// Power
359}
360
361if (c4_enabled) // C4
362{
363tmpl = aml_add_package(pack);
364resource_template_register_fixedhw[11] = 0x30; // C4
365aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
366aml_add_byte(tmpl, 0x04);// C4
367aml_add_word(tmpl, 0x0080);// Latency
368aml_add_dword(tmpl, 0x000000C8);// Power
369}
370else if (c3_enabled)
371{
372tmpl = aml_add_package(pack);
373resource_template_register_fixedhw[11] = 0x20; // C3
374aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
375aml_add_byte(tmpl, 0x03);// C3
376aml_add_word(tmpl, 0x0060);// Latency
377aml_add_dword(tmpl, 0x0000015e);// Power
378}
379}
380
381// Aliaces
382int i;
383for (i = 0; i < acpi_cpu_count; i++)
384{
385char name[9];
386sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
387
388scop = aml_add_scope(root, name);
389aml_add_alias(scop, "CST_", "_CST");
390}
391
392aml_calculate_size(root);
393
394struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
395
396aml_write_node(root, (void*)ssdt, 0);
397
398ssdt->Length = root->Size;
399ssdt->Checksum = 0;
400ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
401
402aml_destroy_node(root);
403
404// dumpPhysAddr("C-States SSDT content: ", ssdt, ssdt->Length);
405
406DBG("SSDT with CPU C-States generated successfully\n");
407
408return ssdt;
409} else {
410DBG("ACPI CPUs not found: C-States not generated !!!\n");
411}
412
413return NULL;
414}
415
416struct acpi_2_ssdt *generate_pss_ssdt(struct acpi_2_dsdt* dsdt)
417{
418static char const ssdt_header[] = // pss_ssdt_header
419{
4200x53, 0x53, 0x44, 0x54, 0x7E, 0x00, 0x00, 0x00, /* SSDT.... */
4210x01, 0x6A, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x00, /* ..PmRef. */
4220x43, 0x70, 0x75, 0x50, 0x6D, 0x00, 0x00, 0x00, /* CpuPm... */
4230x00, 0x30, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* .0..INTL */
4240x31, 0x03, 0x10, 0x20,/* 1.._*/
425};
426
427if (Platform.CPU.Vendor != 0x756E6547) {
428DBG("Not an Intel platform: P-States will not be generated !!!\n");
429return NULL;
430}
431
432if (!(Platform.CPU.Features & CPU_FEATURE_MSR)) {
433DBG("Unsupported CPU: P-States will not be generated !!! No MSR support\n");
434return NULL;
435}
436
437if (acpi_cpu_count == 0)
438get_acpi_cpu_names((void*)dsdt, dsdt->Length);
439
440if (acpi_cpu_count > 0)
441{
442struct p_state initial, maximum, minimum, p_states[32];
443uint8_t p_states_count = 0;
444
445// Retrieving P-States, ported from code by superhai (c)
446switch (Platform.CPU.Family) {
447case 0x06:
448{
449switch (Platform.CPU.Model)
450{
451case CPU_MODEL_DOTHAN:// Intel Pentium M
452case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
453case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
454case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
455case CPU_MODEL_ATOM:// Intel Atom (45nm)
456{
457bool cpu_dynamic_fsb = false;
458
459if (rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 27))
460{
461wrmsr64(MSR_IA32_EXT_CONFIG, (rdmsr64(MSR_IA32_EXT_CONFIG) | (1 << 28)));
462delay(1);
463cpu_dynamic_fsb = rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 28);
464}
465
466bool cpu_noninteger_bus_ratio = (rdmsr64(MSR_IA32_PERF_STATUS) & (1ULL << 46));
467
468initial.Control = rdmsr64(MSR_IA32_PERF_STATUS);
469
470maximum.Control = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 32) & 0x1F3F) | (0x4000 * cpu_noninteger_bus_ratio);
471maximum.CID = ((maximum.FID & 0x1F) << 1) | cpu_noninteger_bus_ratio;
472
473minimum.FID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 24) & 0x1F) | (0x80 * cpu_dynamic_fsb);
474minimum.VID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 48) & 0x3F);
475
476if (minimum.FID == 0)
477{
478uint64_t msr;
479uint8_t i;
480// Probe for lowest fid
481for (i = maximum.FID; i >= 0x6; i--)
482{
483msr = rdmsr64(MSR_IA32_PERF_CONTROL);
484wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (i << 8) | minimum.VID);
485intel_waitforsts();
486minimum.FID = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0x1F;
487delay(1);
488}
489
490msr = rdmsr64(MSR_IA32_PERF_CONTROL);
491wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
492intel_waitforsts();
493}
494
495if (minimum.VID == maximum.VID)
496{
497uint64_t msr;
498uint8_t i;
499// Probe for lowest vid
500for (i = maximum.VID; i > 0xA; i--)
501{
502msr = rdmsr64(MSR_IA32_PERF_CONTROL);
503wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (minimum.FID << 8) | i);
504intel_waitforsts();
505minimum.VID = rdmsr64(MSR_IA32_PERF_STATUS) & 0x3F;
506delay(1);
507}
508
509msr = rdmsr64(MSR_IA32_PERF_CONTROL);
510wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
511intel_waitforsts();
512}
513
514minimum.CID = ((minimum.FID & 0x1F) << 1) >> cpu_dynamic_fsb;
515
516// Sanity check
517if (maximum.CID < minimum.CID) {
518DBG("P-States: Insane FID values!");
519p_states_count = 0;
520} else {
521uint8_t vidstep;
522uint8_t u, invalid = 0;
523// Finalize P-States
524// Find how many P-States machine supports
525p_states_count = (uint8_t)(maximum.CID - minimum.CID + 1);
526
527if (p_states_count > 32) {
528p_states_count = 32;
529}
530
531vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);
532
533for (u = 0; u < p_states_count; u++)
534{
535uint8_t i = u - invalid;
536
537p_states[i].CID = maximum.CID - u;
538p_states[i].FID = (uint8_t)(p_states[i].CID >> 1);
539
540if (p_states[i].FID < 0x6)
541{
542if (cpu_dynamic_fsb)
543{
544p_states[i].FID = (p_states[i].FID << 1) | 0x80;
545}
546}
547else if (cpu_noninteger_bus_ratio)
548{
549p_states[i].FID = p_states[i].FID | (0x40 * (p_states[i].CID & 0x1));
550}
551
552if (i && p_states[i].FID == p_states[i-1].FID)
553{
554invalid++;
555}
556p_states[i].VID = ((maximum.VID << 2) - (vidstep * u)) >> 2;
557uint32_t multiplier = p_states[i].FID & 0x1f;// = 0x08
558bool half = p_states[i].FID & 0x40;// = 0x01
559bool dfsb = p_states[i].FID & 0x80;// = 0x00
560uint32_t fsb = (uint32_t)(Platform.CPU.FSBFrequency / 1000000); // = 400
561uint32_t halffsb = (fsb + 1) >> 1;// = 200
562uint32_t frequency = (multiplier * fsb);// = 3200
563
564p_states[i].Frequency = (uint32_t)(frequency + (half * halffsb)) >> dfsb;// = 3200 + 200 = 3400
565}
566
567p_states_count -= invalid;
568}
569
570break;
571}
572case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
573case CPU_MODEL_DALES:
574case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
575case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
576case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
577case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
578case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
579case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
580case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
581case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
582case CPU_MODEL_HASWELL://
583case CPU_MODEL_IVYBRIDGE_XEON: //
584//case CPU_MODEL_HASWELL_H://
585case CPU_MODEL_HASWELL_SVR://
586case CPU_MODEL_HASWELL_ULT://
587case CPU_MODEL_CRYSTALWELL://
588
589{
590if ((Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_JAKETOWN) ||
591(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_HASWELL) ||
592(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE_XEON) || (Platform.CPU.Model == CPU_MODEL_HASWELL_SVR) ||
593(Platform.CPU.Model == CPU_MODEL_HASWELL_ULT) || (Platform.CPU.Model == CPU_MODEL_CRYSTALWELL))
594{
595maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;
596}
597else
598{
599maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff;
600}
601
602minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
603
604DBG("P-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);
605
606// Sanity check
607if (maximum.Control < minimum.Control)
608{
609DBG("Insane control values!");
610p_states_count = 0;
611}
612else
613{
614uint8_t i;
615p_states_count = 0;
616
617for (i = maximum.Control; i >= minimum.Control; i--)
618{
619p_states[p_states_count].Control = i;
620p_states[p_states_count].CID = p_states[p_states_count].Control << 1;
621p_states[p_states_count].Frequency = (Platform.CPU.FSBFrequency / 1000000) * i;
622p_states_count++;
623}
624}
625
626break;
627}
628default:
629DBG("Unsupported CPU (0x%X): P-States not generated !!!\n", Platform.CPU.Family);
630break;
631}
632}
633}
634
635// Generating SSDT
636if (p_states_count > 0)
637{
638int i;
639
640AML_CHUNK* root = aml_create_node(NULL);
641aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
642AML_CHUNK* scop = aml_add_scope(root, "\\_PR_");
643AML_CHUNK* name = aml_add_name(scop, "PSS_");
644AML_CHUNK* pack = aml_add_package(name);
645
646for (i = 0; i < p_states_count; i++)
647{
648AML_CHUNK* pstt = aml_add_package(pack);
649
650aml_add_dword(pstt, p_states[i].Frequency);
651aml_add_dword(pstt, 0x00000000); // Power
652aml_add_dword(pstt, 0x0000000A); // Latency
653aml_add_dword(pstt, 0x0000000A); // Latency
654aml_add_dword(pstt, p_states[i].Control);
655aml_add_dword(pstt, i+1); // Status
656}
657
658// Add aliaces
659for (i = 0; i < acpi_cpu_count; i++)
660{
661char name[9];
662sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
663
664scop = aml_add_scope(root, name);
665aml_add_alias(scop, "PSS_", "_PSS");
666}
667
668aml_calculate_size(root);
669
670struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
671
672aml_write_node(root, (void*)ssdt, 0);
673
674ssdt->Length = root->Size;
675ssdt->Checksum = 0;
676ssdt->Checksum = 256 - (uint8_t)(checksum8(ssdt, ssdt->Length));
677
678aml_destroy_node(root);
679
680//dumpPhysAddr("P-States SSDT content: ", ssdt, ssdt->Length);
681
682DBG("SSDT with CPU P-States generated successfully\n");
683
684return ssdt;
685}
686}
687else
688{
689DBG("ACPI CPUs not found: P-States not generated !!!\n");
690}
691
692return NULL;
693}
694
695struct acpi_2_fadt *patch_fadt(struct acpi_2_fadt *fadt, struct acpi_2_dsdt *new_dsdt)
696{
697extern void setupSystemType();
698
699struct acpi_2_fadt *fadt_mod = NULL;
700bool fadt_rev2_needed = false;
701bool fix_restart;
702bool fix_restart_ps2;
703const char * value;
704
705// Restart Fix
706if (Platform.CPU.Vendor == 0x756E6547)
707{/* Intel */
708fix_restart = true;
709fix_restart_ps2 = false;
710if ( getBoolForKey(kPS2RestartFix, &fix_restart_ps2, &bootInfo->chameleonConfig) && fix_restart_ps2)
711{
712fix_restart = true;
713}
714else
715{
716getBoolForKey(kRestartFix, &fix_restart, &bootInfo->chameleonConfig);
717}
718}
719else
720{
721DBG("Not an Intel platform: Restart Fix not applied !!!\n");
722fix_restart = false;
723}
724
725if (fix_restart)
726{
727fadt_rev2_needed = true;
728}
729
730// Allocate new fadt table
731if (fadt->Length < 0x84 && fadt_rev2_needed)
732{
733fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(0x84);
734memcpy(fadt_mod, fadt, fadt->Length);
735fadt_mod->Length = 0x84;
736fadt_mod->Revision = 0x02; // FADT rev 2 (ACPI 1.0B MS extensions)
737}
738else
739{
740fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(fadt->Length);
741memcpy(fadt_mod, fadt, fadt->Length);
742}
743// Determine system type / PM_Model
744if ( (value=getStringForKey(kSystemType, &bootInfo->chameleonConfig))!=NULL)
745{
746if (Platform.Type > 6)
747{
748if(fadt_mod->PM_Profile<=6)
749{
750Platform.Type = fadt_mod->PM_Profile; // get the fadt if correct
751}
752else
753{
754Platform.Type = 1;/* Set a fixed value (Desktop) */
755}
756DBG("Error: system-type must be 0..6. Defaulting to %d !\n", Platform.Type);
757}
758else
759{
760Platform.Type = (unsigned char) strtoul(value, NULL, 10);
761}
762}
763// Set PM_Profile from System-type if only user wanted this value to be forced
764if (fadt_mod->PM_Profile != Platform.Type)
765{
766if (value)
767{
768// user has overriden the SystemType so take care of it in FACP
769DBG("FADT: changing PM_Profile from 0x%02x to 0x%02x\n", fadt_mod->PM_Profile, Platform.Type);
770fadt_mod->PM_Profile = Platform.Type;
771}
772else
773{
774// PM_Profile has a different value and no override has been set, so reflect the user value to ioregs
775Platform.Type = fadt_mod->PM_Profile <= 6 ? fadt_mod->PM_Profile : 1;
776}
777}
778// We now have to write the systemm-type in ioregs: we cannot do it before in setupDeviceTree()
779// because we need to take care of FACP original content, if it is correct.
780setupSystemType();
781
782// Patch FADT to fix restart
783if (fix_restart)
784{
785if (fix_restart_ps2)
786{
787fadt_mod->Flags|= 0x400;
788fadt_mod->Reset_SpaceID= 0x01; // System I/O
789fadt_mod->Reset_BitWidth= 0x08; // 1 byte
790fadt_mod->Reset_BitOffset= 0x00; // Offset 0
791fadt_mod->Reset_AccessWidth= 0x01; // Byte access
792fadt_mod->Reset_Address= 0x64; // Address of the register
793fadt_mod->Reset_Value= 0xfe; // Value to write to reset the system
794DBG("FADT: PS2 Restart Fix applied!\n");
795}
796else
797{
798fadt_mod->Flags|= 0x400;
799fadt_mod->Reset_SpaceID= 0x01; // System I/O
800fadt_mod->Reset_BitWidth= 0x08; // 1 byte
801fadt_mod->Reset_BitOffset= 0x00; // Offset 0
802fadt_mod->Reset_AccessWidth= 0x01; // Byte access
803fadt_mod->Reset_Address= 0x0cf9; // Address of the register
804fadt_mod->Reset_Value= 0x06; // Value to write to reset the system
805DBG("FADT: ACPI Restart Fix applied!\n");
806}
807
808}
809
810// Patch DSDT Address if we have loaded DSDT.aml
811if(new_dsdt)
812{
813DBG("DSDT: Old @%x,%x, ",fadt_mod->DSDT,fadt_mod->X_DSDT);
814
815fadt_mod->DSDT=(uint32_t)new_dsdt;
816if ((uint32_t)(&(fadt_mod->X_DSDT))-(uint32_t)fadt_mod+8<=fadt_mod->Length)
817{
818fadt_mod->X_DSDT=(uint32_t)new_dsdt;
819}
820
821DBG("New @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);
822
823DBG("FADT: Using custom DSDT!\n");
824}
825
826// Correct the checksum
827fadt_mod->Checksum=0;
828fadt_mod->Checksum=256-checksum8(fadt_mod,fadt_mod->Length);
829
830return fadt_mod;
831}
832
833/* Setup ACPI without replacing DSDT. */
834int setupAcpiNoMod()
835{
836//addConfigurationTable(&gEfiAcpiTableGuid, getAddressOfAcpiTable(), "ACPI");
837//addConfigurationTable(&gEfiAcpi20TableGuid, getAddressOfAcpi20Table(), "ACPI_20");
838/* XXX aserebln why uint32 cast if pointer is uint64 ? */
839acpi10_p = (uint64_t)(uint32_t)getAddressOfAcpiTable();
840acpi20_p = (uint64_t)(uint32_t)getAddressOfAcpi20Table();
841addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
842if(acpi20_p)
843{
844addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
845}
846else
847{
848DBG("No ACPI 2.\n");
849}
850return 1;
851}
852
853/* Setup ACPI. Replace DSDT if DSDT.aml is found */
854int setupAcpi(void)
855{
856int version;
857void *new_dsdt = NULL;
858
859
860const char *filename;
861char dirSpec[128];
862int len = 0;
863
864// always reset cpu count to 0 when injecting new acpi
865acpi_cpu_count = 0;
866
867/* Try using the file specified with the DSDT option */
868if (getValueForKey(kDSDT, &filename, &len, &bootInfo->chameleonConfig))
869{
870snprintf(dirSpec, sizeof(dirSpec), filename);
871}
872else
873{
874sprintf(dirSpec, "DSDT.aml");
875//verbose("dirSpec, DSDT.aml");
876}
877
878// Load replacement DSDT
879new_dsdt = loadACPITable(dirSpec);
880
881// Mozodojo: going to patch FACP and load SSDT's even if DSDT.aml is not present
882/*if (!new_dsdt)
883 {
884 return setupAcpiNoMod();
885 }*/
886
887// Mozodojo: Load additional SSDTs
888struct acpi_2_ssdt *new_ssdt[32]; // 30 + 2 additional tables for pss & cst
889int ssdt_count=0;
890
891// SSDT Options
892bool drop_ssdt=false, generate_pstates=false, generate_cstates=false;
893
894getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);
895getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);
896getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->chameleonConfig);
897
898DBG("Generating P-States config: %s\n", generate_pstates ? "YES" : "NO");
899DBG("Generating C-States config: %s\n", generate_cstates ? "YES" : "NO");
900
901{
902int i;
903
904for (i = 0; i < 30; i++)
905{
906char filename[512];
907
908sprintf(filename, i > 0 ? "SSDT-%d.aml" : "SSDT.aml", i);
909
910if ( (new_ssdt[ssdt_count] = loadACPITable(filename)) )
911{
912ssdt_count++;
913}
914else
915{
916break;
917}
918}
919}
920
921// Do the same procedure for both versions of ACPI
922for (version = 0; version < 2; version++)
923{
924struct acpi_2_rsdp *rsdp, *rsdp_mod;
925struct acpi_2_rsdt *rsdt, *rsdt_mod;
926int rsdplength;
927
928// Find original rsdp
929rsdp=(struct acpi_2_rsdp *)(version ? getAddressOfAcpi20Table() : getAddressOfAcpiTable());
930if (!rsdp)
931{
932DBG("No ACPI version %d found. Ignoring\n", version+1);
933if (version)
934{
935addConfigurationTable(&gEfiAcpi20TableGuid, NULL, "ACPI_20");
936}
937else
938{
939addConfigurationTable(&gEfiAcpiTableGuid, NULL, "ACPI");
940}
941continue;
942}
943rsdplength=version ? rsdp->Length : 20;
944
945DBG("RSDP version %d found @%x. Length=%d\n",version+1,rsdp,rsdplength);
946
947/* FIXME: no check that memory allocation succeeded
948 * Copy and patch RSDP,RSDT, XSDT and FADT
949 * For more info see ACPI Specification pages 110 and following
950 */
951
952rsdp_mod=(struct acpi_2_rsdp *) AllocateKernelMemory(rsdplength);
953memcpy(rsdp_mod, rsdp, rsdplength);
954
955rsdt=(struct acpi_2_rsdt *)(rsdp->RsdtAddress);
956
957DBG("RSDT @%x, Length %d\n",rsdt, rsdt ? rsdt->Length : 0);
958
959if (rsdt && (uint32_t)rsdt !=0xffffffff && rsdt->Length<0x10000)
960{
961uint32_t *rsdt_entries;
962int rsdt_entries_num;
963int dropoffset=0, i;
964
965// mozo: using malloc cos I didn't found how to free already allocated kernel memory
966rsdt_mod=(struct acpi_2_rsdt *)malloc(rsdt->Length);
967memcpy (rsdt_mod, rsdt, rsdt->Length);
968rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
969rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
970rsdt_entries=(uint32_t *)(rsdt_mod+1);
971for (i=0;i<rsdt_entries_num;i++)
972{
973char *table=(char *)(rsdt_entries[i]);
974if (!table)
975{
976continue;
977}
978
979DBG("TABLE %c%c%c%c,",table[0],table[1],table[2],table[3]);
980
981rsdt_entries[i-dropoffset]=rsdt_entries[i];
982
983if (drop_ssdt && tableSign(table, "SSDT"))
984{
985DBG("OEM SSDT tables was dropped\n");
986dropoffset++;
987continue;
988}
989
990if (tableSign(table, "DSDT"))
991{
992DBG("DSDT found\n");
993verbose("Custom DSDT table was found\n");
994if(new_dsdt)
995{
996rsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
997}
998
999continue;
1000}
1001
1002if (tableSign(table, "FACP"))
1003{
1004struct acpi_2_fadt *fadt, *fadt_mod;
1005fadt=(struct acpi_2_fadt *)rsdt_entries[i];
1006
1007DBG("FADT found @%x, Length %d\n",fadt, fadt->Length);
1008
1009if (!fadt || (uint32_t)fadt == 0xffffffff || fadt->Length>0x10000)
1010{
1011DBG("FADT incorrect. Not modified\n");
1012continue;
1013}
1014
1015fadt_mod = patch_fadt(fadt, new_dsdt);
1016rsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
1017
1018// Generate _CST SSDT
1019if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
1020{
1021DBG("C-States generated\n");
1022generate_cstates = false; // Generate SSDT only once!
1023ssdt_count++;
1024}
1025
1026// Generating _PSS SSDT
1027if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
1028{
1029DBG("P-States generated\n");
1030generate_pstates = false; // Generate SSDT only once!
1031ssdt_count++;
1032}
1033continue;
1034}
1035}
1036DBG("\n");
1037
1038// Allocate rsdt in Kernel memory area
1039rsdt_mod->Length += 4*ssdt_count - 4*dropoffset;
1040struct acpi_2_rsdt *rsdt_copy = (struct acpi_2_rsdt *)AllocateKernelMemory(rsdt_mod->Length);
1041memcpy (rsdt_copy, rsdt_mod, rsdt_mod->Length);
1042free(rsdt_mod); rsdt_mod = rsdt_copy;
1043rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
1044rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
1045rsdt_entries=(uint32_t *)(rsdt_mod+1);
1046
1047// Mozodojo: Insert additional SSDTs into RSDT
1048if(ssdt_count > 0)
1049{
1050int j;
1051
1052for (j=0; j<ssdt_count; j++)
1053{
1054rsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
1055}
1056
1057DBG("RSDT: Added %d SSDT table(s)\n", ssdt_count);
1058
1059}
1060
1061// Correct the checksum of RSDT
1062DBG("RSDT: Original checksum %d, ", rsdt_mod->Checksum);
1063
1064rsdt_mod->Checksum=0;
1065rsdt_mod->Checksum=256-checksum8(rsdt_mod,rsdt_mod->Length);
1066
1067DBG("New checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);
1068}
1069else
1070{
1071rsdp_mod->RsdtAddress=0;
1072DBG("RSDT not found or RSDT incorrect\n");
1073}
1074DBG("\n");
1075
1076if (version)
1077{
1078struct acpi_2_xsdt *xsdt, *xsdt_mod;
1079
1080// FIXME: handle 64-bit address correctly
1081
1082xsdt=(struct acpi_2_xsdt*) ((uint32_t)rsdp->XsdtAddress);
1083DBG("XSDT @%x;%x, Length=%d\n", (uint32_t)(rsdp->XsdtAddress>>32),(uint32_t)rsdp->XsdtAddress, xsdt->Length);
1084
1085if (xsdt && (uint64_t)rsdp->XsdtAddress<0xffffffff && xsdt->Length<0x10000)
1086{
1087uint64_t *xsdt_entries;
1088int xsdt_entries_num, i;
1089int dropoffset=0;
1090
1091// mozo: using malloc cos I didn't found how to free already allocated kernel memory
1092xsdt_mod=(struct acpi_2_xsdt*)malloc(xsdt->Length);
1093memcpy(xsdt_mod, xsdt, xsdt->Length);
1094
1095rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1096xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1097xsdt_entries=(uint64_t *)(xsdt_mod+1);
1098for (i=0;i<xsdt_entries_num;i++)
1099{
1100char *table=(char *)((uint32_t)(xsdt_entries[i]));
1101if (!table)
1102{
1103continue;
1104}
1105xsdt_entries[i-dropoffset]=xsdt_entries[i];
1106
1107if (drop_ssdt && tableSign(table, "SSDT"))
1108{
1109DBG("dropped (OEM)\n");
1110dropoffset++;
1111continue;
1112}
1113if (tableSign(table, "DSDT"))
1114{
1115DBG("DSDT found\n");
1116
1117if (new_dsdt)
1118{
1119xsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
1120DBG("custom table added\n");
1121}
1122
1123DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1124
1125continue;
1126}
1127if (tableSign(table, "FACP"))
1128{
1129struct acpi_2_fadt *fadt, *fadt_mod;
1130fadt=(struct acpi_2_fadt *)(uint32_t)xsdt_entries[i];
1131
1132DBG("FADT found @%x%x, Length %d\n",(uint32_t)(xsdt_entries[i]>>32),fadt,
1133fadt->Length);
1134
1135if (!fadt || (uint64_t)xsdt_entries[i] >= 0xffffffff || fadt->Length>0x10000)
1136{
1137DBG("FADT incorrect or after 4GB. Dropping XSDT\n");
1138goto drop_xsdt;
1139}
1140
1141fadt_mod = patch_fadt(fadt, new_dsdt);
1142xsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
1143
1144// DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1145
1146// Generate _CST SSDT
1147if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
1148{
1149DBG("C-States generated\n");
1150generate_cstates = false; // Generate SSDT only once!
1151ssdt_count++;
1152}
1153
1154// Generating _PSS SSDT
1155if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
1156{
1157DBG("P-States generated\n");
1158generate_pstates = false; // Generate SSDT only once!
1159ssdt_count++;
1160}
1161
1162continue;
1163}
1164DBG("copied (OEM)\n");
1165// DBG("TABLE %c%c%c%c@%x \n", table[0],table[1],table[2],table[3],xsdt_entries[i]);
1166}
1167
1168// Allocate xsdt in Kernel memory area
1169xsdt_mod->Length += 8*ssdt_count - 8*dropoffset;
1170struct acpi_2_xsdt *xsdt_copy = (struct acpi_2_xsdt *)AllocateKernelMemory(xsdt_mod->Length);
1171memcpy(xsdt_copy, xsdt_mod, xsdt_mod->Length);
1172free(xsdt_mod); xsdt_mod = xsdt_copy;
1173rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1174xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1175xsdt_entries=(uint64_t *)(xsdt_mod+1);
1176
1177// Mozodojo: Insert additional SSDTs into XSDT
1178if(ssdt_count > 0)
1179{
1180int j;
1181
1182for (j=0; j<ssdt_count; j++)
1183{
1184xsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
1185}
1186
1187verbose("Added %d SSDT table(s) into XSDT\n", ssdt_count);
1188
1189}
1190
1191// Correct the checksum of XSDT
1192xsdt_mod->Checksum=0;
1193xsdt_mod->Checksum=256-checksum8(xsdt_mod,xsdt_mod->Length);
1194}
1195else
1196{
1197drop_xsdt:
1198
1199DBG("About to drop XSDT\n");
1200
1201/*FIXME: Now we just hope that if MacOS doesn't find XSDT it reverts to RSDT.
1202 * A Better strategy would be to generate
1203 */
1204
1205rsdp_mod->XsdtAddress=0xffffffffffffffffLL;
1206verbose("XSDT not found or XSDT incorrect\n");
1207}
1208}
1209DBG("\n");
1210
1211// Correct the checksum of RSDP
1212
1213DBG("RSDP: Original checksum %d, ", rsdp_mod->Checksum);
1214
1215rsdp_mod->Checksum=0;
1216rsdp_mod->Checksum=256-checksum8(rsdp_mod,20);
1217
1218DBG("New checksum %d\n", rsdp_mod->Checksum);
1219
1220if (version)
1221{
1222DBG("RSDP: Original extended checksum %d, ", rsdp_mod->ExtendedChecksum);
1223
1224rsdp_mod->ExtendedChecksum=0;
1225rsdp_mod->ExtendedChecksum=256-checksum8(rsdp_mod,rsdp_mod->Length);
1226
1227DBG("New extended checksum %d\n", rsdp_mod->ExtendedChecksum);
1228
1229}
1230
1231if (version)
1232{
1233/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1234acpi20_p = (uint64_t)(uint32_t)rsdp_mod;
1235addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
1236}
1237else
1238{
1239/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1240acpi10_p = (uint64_t)(uint32_t)rsdp_mod;
1241addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
1242}
1243DBG("ACPI version %d patching finished\n\n", version+1);
1244}
1245#if DEBUG_ACPI
1246printf("Press a key to continue... (DEBUG_ACPI)\n");
1247getchar();
1248#endif
1249return 1;
1250}
1251

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