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1/*
2 * Add (c) here
3 *
4 * Copyright .... All rights reserved.
5 *
6 */
7
8#include "smbios_getters.h"
9#include "bootstruct.h"
10
11#ifndef DEBUG_SMBIOS
12#define DEBUG_SMBIOS 0
13#endif
14
15#if DEBUG_SMBIOS
16#define DBG(x...)printf(x)
17#else
18#define DBG(x...)msglog(x)
19#endif
20
21
22bool getProcessorInformationExternalClock(returnType *value)
23{
24if (Platform.CPU.Vendor == CPUID_VENDOR_INTEL) { // Intel
25switch (Platform.CPU.Family) {
26case 0x06:
27switch (Platform.CPU.Model) {
28// set external clock to 0 for SANDY
29// removes FSB info from system profiler as on real mac's.
30case CPUID_MODEL_SANDYBRIDGE:
31case CPUID_MODEL_JAKETOWN:
32case CPUID_MODEL_IVYBRIDGE_EP:
33case CPUID_MODEL_IVYBRIDGE:
34case CPUID_MODEL_HASWELL:
35case CPUID_MODEL_HASWELL_SVR:
36case CPUID_MODEL_HASWELL_ULT:
37case CPUID_MODEL_CRYSTALWELL:
38value->word = 0;
39break;
40default:
41value->word = (uint16_t)(Platform.CPU.FSBFrequency/1000000LL);
42 break;
43}
44break;
45
46default:
47value->word = (uint16_t)(Platform.CPU.FSBFrequency/1000000LL);
48 break;
49}
50} else {
51value->word = (uint16_t)(Platform.CPU.FSBFrequency/1000000LL);
52}
53
54return true;
55}
56
57bool getProcessorInformationMaximumClock(returnType *value)
58{
59value->word = (uint16_t)(Platform.CPU.CPUFrequency/1000000LL);
60return true;
61}
62
63bool getSMBOemProcessorBusSpeed(returnType *value)
64{
65if (Platform.CPU.Vendor == CPUID_VENDOR_INTEL) { // Intel
66switch (Platform.CPU.Family) {
67case 0x06:
68switch (Platform.CPU.Model) {
69 /*
70case CPUID_MODEL_PENTIUM_M:
71case CPUID_MODEL_DOTHAN:// Intel Pentium M
72case CPUID_MODEL_YONAH:// Intel Mobile Core Solo, Duo
73case CPUID_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
74case CPUID_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
75case CPUID_MODEL_ATOM:// Intel Atom (45nm)
76return false;
77 */
78case 0x19:
79case CPUID_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
80case CPUID_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
81case CPUID_MODEL_DALES:
82 case CPUID_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
83case CPUID_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
84case CPUID_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
85case CPUID_MODEL_WESTMERE_EX:// Intel Xeon E7
86case CPUID_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
87case CPUID_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
88case CPUID_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
89case CPUID_MODEL_IVYBRIDGE_EP:
90case CPUID_MODEL_HASWELL:
91 {
92 // thanks to dgobe for i3/i5/i7 bus speed detection
93 int nhm_bus = 0x3F;
94 static long possible_nhm_bus[] = {0xFF, 0x7F, 0x3F};
95 unsigned long did, vid;
96 unsigned int i;
97
98 // Nehalem supports Scrubbing
99 // First, locate the PCI bus where the MCH is located
100 for(i = 0; i < (sizeof(possible_nhm_bus)/sizeof(possible_nhm_bus[0])); i++) {
101 vid = pci_config_read16(PCIADDR(possible_nhm_bus[i], 3, 4), 0x00);
102 did = pci_config_read16(PCIADDR(possible_nhm_bus[i], 3, 4), 0x02);
103 vid &= 0xFFFF;
104 did &= 0xFF00;
105
106 if(vid == 0x8086 && did >= 0x2C00) {
107 nhm_bus = possible_nhm_bus[i];
108 }
109 }
110
111 unsigned long qpimult, qpibusspeed;
112 qpimult = pci_config_read32(PCIADDR(nhm_bus, 2, 1), 0x50);
113 qpimult &= 0x7F;
114 verbose("qpimult %d\n", qpimult);
115 qpibusspeed = (qpimult * 2 * (Platform.CPU.FSBFrequency/1000000LL));
116 // Rek: rounding decimals to match original mac profile info
117 if (qpibusspeed%100 != 0) {
118 qpibusspeed = ((qpibusspeed+50)/100)*100;
119 }
120 verbose("qpibusspeed %d\n", qpibusspeed);
121 value->word = qpibusspeed;
122 return true;
123 }
124 break;
125
126default:
127break;
128}
129 break;
130
131default:
132break;
133}
134}
135
136return false; //Unsupported CPU type
137}
138
139uint16_t simpleGetSMBOemProcessorType(void)
140{
141if (Platform.CPU.NoCores >= 4) {
142return 0x402;// 1026 - Quad-Core Xeon
143} else if (Platform.CPU.NoCores == 2) {
144return 0x301;// 513 - Core 2 Duo
145}
146
147return 0x201;// 769 - Core Duo
148}
149
150bool getSMBOemProcessorType(returnType *value)
151{
152static bool done = false;
153
154value->word = simpleGetSMBOemProcessorType();
155
156if (Platform.CPU.Vendor == CPUID_VENDOR_INTEL) { // Intel
157if (!done) {
158//DBG("CPU is %s, family 0x%x, model 0x%x\n", Platform.CPU.BrandString, (uint32_t)Platform.CPU.Family, (uint32_t)Platform.CPU.Model);
159done = true;
160}
161// Bungo: fixes Oem Processor Type - better matching IMHO, needs testing
162switch (Platform.CPU.Family) {
163case 0x06:
164case 0x0F:
165switch (Platform.CPU.Model) {
166case CPUID_MODEL_PENTIUM_M:
167case CPUID_MODEL_DOTHAN:// 0x0D - Intel Pentium M model D
168 case CPUID_MODEL_NOCONA:
169case CPUID_MODEL_IRWINDALE:
170if (strstr(Platform.CPU.BrandString, "Xeon"))
171{
172value->word = 0x402;// 1026 - Xeon
173}
174return true;
175
176case CPUID_MODEL_PRESLER:
177case CPUID_MODEL_CELERON:
178case CPUID_MODEL_YONAH:// 0x0E - Intel Mobile Core Solo, Duo
179value->word = 0x201;// 513
180return true;
181
182case CPUID_MODEL_MEROM:// 0x0F - Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
183case CPUID_MODEL_XEON_MP:// 0x1D - Six-Core Xeon 7400, "Dunnington", 45nm
184case CPUID_MODEL_PENRYN:// 0x17 - Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
185if (strstr(Platform.CPU.BrandString, "Xeon"))
186{
187value->word = 0x402;// 1026 - Xeon
188 return true;
189}
190if (Platform.CPU.NoCores <= 2) {
191value->word = 0x301;// 769 - Core 2 Duo , Pentium Dual Core etc.
192} else {
193value->word = 0x402;// 1026 - Core 2 Quad as Xeon
194}
195return true;
196
197case CPUID_MODEL_LINCROFT:// 0x27 - Intel Atom, "Lincroft", 45nm
198case CPUID_MODEL_ATOM:// 0x1C - Intel Atom (45nm)
199return true;
200
201case CPUID_MODEL_NEHALEM_EX:// 0x2E - Nehalem-ex, "Beckton", 45nm
202case CPUID_MODEL_NEHALEM:// 0x1A - Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
203case CPUID_MODEL_FIELDS:// 0x1E - Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
204case CPUID_MODEL_DALES:// 0x1F - Intel Core i5, i7 LGA1156 (45nm) (Havendale, Auburndale)
205if (strstr(Platform.CPU.BrandString, "Xeon"))
206{
207value->word = 0x501;// 1281 - Lynnfiled Quad-Core Xeon
208return true;
209}
210if (strstr(Platform.CPU.BrandString, "Core(TM) i3")) {
211value->word = 0x901;// 2305 - Core i3
212return true;
213}
214if (strstr(Platform.CPU.BrandString, "Core(TM) i5")) {
215value->word = 0x601;// Core i5
216return true;
217}
218if (strstr(Platform.CPU.BrandString, "Core(TM) i7")) {
219value->word = 0x701;// 1793 - Core i7
220return true;
221}
222if (Platform.CPU.NoCores <= 2) {
223value->word = 0x901;// - Pentium Dual Core as Core i3
224}
225return true;
226
227case CPUID_MODEL_DALES_32NM:// 0x25 - Intel Core i3, i5 LGA1156 (32nm) (Clarkdale, Arrandale)
228case CPUID_MODEL_WESTMERE:// 0x2C - Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
229case CPUID_MODEL_WESTMERE_EX:// 0x2F - Intel Xeon E7
230if (strstr(Platform.CPU.BrandString, "Xeon"))
231{
232value->word = 0x501;// 1281 - Xeon
233return true;
234}
235if (strstr(Platform.CPU.BrandString, "Core(TM) i3")) {
236value->word = 0x901;// 2305 - Core i3
237return true;
238}
239if (strstr(Platform.CPU.BrandString, "Core(TM) i5")) {
240value->word = 0x602;// 1538 - Core i5
241return true;
242}
243if (strstr(Platform.CPU.BrandString, "Core(TM) i7")) {
244value->word = 0x702;// 1794 -Core i7
245return true;
246}
247if (Platform.CPU.NoCores <= 2) {
248value->word = 0x901;// - Pentium Dual Core as Core i3
249}
250return true;
251
252case CPUID_MODEL_JAKETOWN:// 0x2D - Intel Core i7, Xeon E5-xxxx LGA2011 (32nm)
253case CPUID_MODEL_SANDYBRIDGE:// 0x2A - Intel Core i3, i5, i7 LGA1155 (32nm)
254if (strstr(Platform.CPU.BrandString, "Xeon"))
255{
256value->word = 0x501;// 1281 - Xeon
257return true;
258}
259if (strstr(Platform.CPU.BrandString, "Core(TM) i3")) {
260value->word = 0x902;// 2306 -Core i3
261return true;
262}
263if (strstr(Platform.CPU.BrandString, "Core(TM) i5")) {
264value->word = 0x603;// 1539 - Core i5
265return true;
266}
267if (strstr(Platform.CPU.BrandString, "Core(TM) i7")) {
268value->word = 0x703;// 1795 - Core i7
269return true;
270}
271if (Platform.CPU.NoCores <= 2) {
272value->word = 0x902;// - Pentium Dual Core as Core i3
273}
274return true;
275
276case CPUID_MODEL_IVYBRIDGE:// 0x3A - Intel Core i3, i5, i7 LGA1155 (22nm)
277if (strstr(Platform.CPU.BrandString, "Xeon"))
278{
279value->word = 0xA01;// 2561 - Xeon
280return true;
281}
282if (strstr(Platform.CPU.BrandString, "Core(TM) i3")) {
283value->word = 0x903;// 2307 - Core i3 - Apple doesn't use it
284return true;
285}
286if (strstr(Platform.CPU.BrandString, "Core(TM) i5")) {
287value->word = 0x604;// 1540 - Core i5
288return true;
289}
290if (strstr(Platform.CPU.BrandString, "Core(TM) i7")) {
291value->word = 0x704;// 1796 - Core i7
292return true;
293}
294if (Platform.CPU.NoCores <= 2) {
295value->word = 0x903;// - Pentium Dual Core as Core i3
296}
297return true;
298
299case CPUID_MODEL_IVYBRIDGE_EP:// 0x3E - Mac Pro 6,1
300value->word = 0xA01;// 2561 - Xeon
301return true;
302
303case CPUID_MODEL_HASWELL:// 0x3C -
304case CPUID_MODEL_HASWELL_SVR:// 0x3F -
305case CPUID_MODEL_HASWELL_ULT:// 0x45 -
306case CPUID_MODEL_CRYSTALWELL:// 0x46
307if (strstr(Platform.CPU.BrandString, "Xeon")) {
308value->word = 0xA01;// 2561 - Xeon
309return true;
310}
311if (strstr(Platform.CPU.BrandString, "Core(TM) i3")) {
312value->word = 0x904;// 2308 - Core i3 - Apple doesn't use it - but we yes:-)
313return true;
314}
315if (strstr(Platform.CPU.BrandString, "Core(TM) i5")) {
316value->word = 0x605;// 1541 - Core i5
317return true;
318}
319if (strstr(Platform.CPU.BrandString, "Core(TM) i7")) {
320value->word = 0x705;// 1797 - Core i7
321return true;
322}
323if (Platform.CPU.NoCores <= 2) {
324value->word = 0x904;// - Pentium Dual Core as Core i3
325}
326return true;
327
328case 0x15:// EP80579 integrated processor
329value->word = 0x301;// 769
330return true;
331
332case 0x13:// Core i5, Xeon MP, "Havendale", "Auburndale", 45nm
333case 0x19:// Intel Core i5 650 @3.20 Ghz
334value->word = 0x601;// 1537 - Core i5
335return true;
336default:
337break;
338}
339 break;
340
341 default:
342break;
343}
344}
345
346return false;
347}
348
349bool getSMBMemoryDeviceMemoryType(returnType *value)
350{
351static int idx = -1;
352intmap;
353
354if (!bootInfo->memDetect) {
355return false;
356}
357
358idx++;
359if (idx < MAX_RAM_SLOTS) {
360map = Platform.DMI.DIMM[idx];
361if (Platform.RAM.DIMM[map].InUse && Platform.RAM.DIMM[map].Type != 0) {
362verbose("RAM Detected Type = %d\n", Platform.RAM.DIMM[map].Type);
363value->byte = Platform.RAM.DIMM[map].Type;
364return true;
365}
366}
367
368value->byte = 2; // means Unknown
369return true;
370//value->byte = SMB_MEM_TYPE_DDR2;
371//return true;
372}
373
374bool getSMBMemoryDeviceMemoryErrorHandle(returnType *value)
375{
376value->word = 0xFFFF;
377return true;
378}
379
380bool getSMBMemoryDeviceMemorySpeed(returnType *value)
381{
382static int idx = -1;
383intmap;
384
385if (!bootInfo->memDetect) {
386return false;
387}
388
389idx++;
390if (idx < MAX_RAM_SLOTS) {
391map = Platform.DMI.DIMM[idx];
392if (Platform.RAM.DIMM[map].InUse && Platform.RAM.DIMM[map].Frequency != 0) {
393verbose("RAM Detected Freq = %d Mhz\n", Platform.RAM.DIMM[map].Frequency);
394value->dword = Platform.RAM.DIMM[map].Frequency;
395return true;
396}
397}
398
399value->dword = 0; // means Unknown
400return true;
401//value->dword = 800;
402//return true;
403}
404
405bool getSMBMemoryDeviceManufacturer(returnType *value)
406{
407static int idx = -1;
408intmap;
409
410if (!bootInfo->memDetect) {
411return false;
412}
413
414idx++;
415if (idx < MAX_RAM_SLOTS) {
416map = Platform.DMI.DIMM[idx];
417if (Platform.RAM.DIMM[map].InUse && strlen(Platform.RAM.DIMM[map].Vendor) > 0) {
418verbose("RAM Detected Vendor[%d]='%s'\n", idx, Platform.RAM.DIMM[map].Vendor);
419value->string = Platform.RAM.DIMM[map].Vendor;
420return true;
421}
422}
423
424value->string = NOT_AVAILABLE;
425return true;
426}
427
428bool getSMBMemoryDeviceSerialNumber(returnType *value)
429{
430static int idx = -1;
431intmap;
432
433if (!bootInfo->memDetect) {
434return false;
435}
436
437idx++;
438
439//DBG("getSMBMemoryDeviceSerialNumber index: %d, MAX_RAM_SLOTS: %d\n",idx,MAX_RAM_SLOTS);
440
441if (idx < MAX_RAM_SLOTS) {
442map = Platform.DMI.DIMM[idx];
443if (Platform.RAM.DIMM[map].InUse && strlen(Platform.RAM.DIMM[map].SerialNo) > 0) {
444verbose("map=%d, RAM Detected SerialNo[%d]='%s'\n", map, idx, Platform.RAM.DIMM[map].SerialNo);
445value->string = Platform.RAM.DIMM[map].SerialNo;
446return true;
447}
448}
449
450value->string = NOT_AVAILABLE;
451return true;
452}
453
454bool getSMBMemoryDevicePartNumber(returnType *value)
455{
456static int idx = -1;
457intmap;
458
459if (!bootInfo->memDetect) {
460return false;
461}
462
463idx++;
464if (idx < MAX_RAM_SLOTS) {
465map = Platform.DMI.DIMM[idx];
466if (Platform.RAM.DIMM[map].InUse && strlen(Platform.RAM.DIMM[map].PartNo) > 0) {
467verbose("map=%d, RAM Detected PartNo[%d]='%s'\n", map, idx, Platform.RAM.DIMM[map].PartNo);
468value->string = Platform.RAM.DIMM[map].PartNo;
469return true;
470}
471}
472
473value->string = NOT_AVAILABLE;
474return true;
475}
476
477
478// getting smbios addr with fast compare ops, late checksum testing ...
479#define COMPARE_DWORD(a,b) ( *((uint32_t *) a) == *((uint32_t *) b) )
480static const char * const SMTAG = "_SM_";
481static const char* const DMITAG = "_DMI_";
482
483SMBEntryPoint *getAddressOfSmbiosTable(void)
484{
485SMBEntryPoint*smbios;
486/*
487 * The logic is to start at 0xf0000 and end at 0xfffff iterating 16 bytes at a time looking
488 * for the SMBIOS entry-point structure anchor (literal ASCII "_SM_").
489 */
490smbios = (SMBEntryPoint*)SMBIOS_RANGE_START;
491while (smbios <= (SMBEntryPoint *)SMBIOS_RANGE_END) {
492if (COMPARE_DWORD(smbios->anchor, SMTAG) &&
493COMPARE_DWORD(smbios->dmi.anchor, DMITAG) &&
494smbios->dmi.anchor[4] == DMITAG[4] &&
495checksum8(smbios, sizeof(SMBEntryPoint)) == 0) {
496return smbios;
497 }
498smbios = (SMBEntryPoint*)(((char*)smbios) + 16);
499}
500error("ERROR: Unable to find SMBIOS!\n");
501pause("");
502return NULL;
503}
504
505

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