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1/*␊
2 * usb.c␊
3 * ␊
4 *␊
5 * Created by mackerintel on 12/20/08.␊
6 * Copyright 2008 mackerintel. All rights reserved.␊
7 *␊
8 */␊
9␊
10#include "libsaio.h"␊
11#include "boot.h"␊
12#include "bootstruct.h"␊
13#include "pci.h"␊
14␊
15#ifndef DEBUG_USB␊
16#define DEBUG_USB 0␊
17#endif␊
18␊
19#if DEBUG_USB␊
20#define DBG(x...)␉printf(x)␊
21#else␊
22#define DBG(x...)␊
23#endif␊
24␊
25␊
26struct pciList␊
27{␊
28␉pci_dt_t* pciDev;␊
29␉struct pciList* next;␊
30};␊
31␊
32struct pciList* usbList = NULL;␊
33␊
34static int legacy_off (pci_dt_t *pci_dev);␊
35static int ehci_acquire (pci_dt_t *pci_dev);␊
36static int uhci_reset (pci_dt_t *pci_dev);␊
37static int xhci_legacy_off(pci_dt_t *pci_dev);␊
38␊
39// Add usb device to the list␊
40void notify_usb_dev(pci_dt_t *pci_dev)␊
41{␊
42␉struct pciList* current = usbList;␊
43␉if(!usbList)␊
44␉{␊
45␉␉usbList = (struct pciList*)malloc(sizeof(struct pciList));␊
46␉␉usbList->next = NULL;␊
47␉␉usbList->pciDev = pci_dev;␊
48␉␉␊
49␉}␊
50␉else␊
51␉{␊
52␉␉while(current != NULL && current->next != NULL)␊
53␉␉{␊
54␉␉␉current = current->next;␊
55␉␉}␊
56␉␉current->next = (struct pciList*)malloc(sizeof(struct pciList));␊
57␉␉current = current->next;␊
58␉␉␊
59␉␉current->pciDev = pci_dev;␊
60␉␉current->next = NULL;␊
61␉}␊
62}␊
63␊
64// Loop through the list and call the apropriate patch function␊
65int usb_loop()␊
66{␊
67␉int retVal = 1;␊
68␉bool fix_xhci, fix_ehci, fix_uhci, fix_usb, fix_legacy;␊
69␉fix_xhci = fix_ehci = fix_uhci = fix_usb = fix_legacy = false;␊
70␉␊
71␉if (getBoolForKey(kUSBBusFix, &fix_usb, &bootInfo->chameleonConfig))␊
72␉{␊
73␉␉fix_xhci = fix_ehci = fix_uhci = fix_legacy = fix_usb;␉// Disable all if none set␊
74␉}␊
75␉else ␊
76␉{␊
77␉␉getBoolForKey(kXHCILegacyOff, &fix_xhci, &bootInfo->chameleonConfig);␊
78␉␉getBoolForKey(kEHCIacquire, &fix_ehci, &bootInfo->chameleonConfig);␊
79␉␉getBoolForKey(kUHCIreset, &fix_uhci, &bootInfo->chameleonConfig);␊
80␉␉getBoolForKey(kLegacyOff, &fix_legacy, &bootInfo->chameleonConfig);␊
81␉}␊
82␉␊
83␉struct pciList* current = usbList;␊
84␉␊
85␉while(current)␊
86␉{␊
87␉␉switch (pci_config_read8(current->pciDev->dev.addr, PCI_CLASS_PROG))␊
88␉␉{␊
89␉␉␉// XHCI␊
90␉␉␉case PCI_IF_XHCI:␊
91␉␉␉␉if(fix_xhci || fix_legacy) retVal &= xhci_legacy_off(current->pciDev);␊
92␉␉␉␉break;␊
93␊
94␉␉␉// EHCI␊
95␉␉␉case PCI_IF_EHCI:␊
96␉␉ ␉if(fix_ehci) retVal &= ehci_acquire(current->pciDev);␊
97␉␉ ␉if(fix_legacy) retVal &= legacy_off(current->pciDev);␊
98␉␉␉␉␊
99␉␉␉␉break;␊
100␉␉␉␉␊
101␉␉␉// UHCI␊
102␉␉␉case PCI_IF_UHCI:␊
103␉␉␉␉if (fix_uhci) retVal &= uhci_reset(current->pciDev);␊
104␊
105␉␉␉␉break;␊
106␉␉}␊
107␉␉␊
108␉␉current = current->next;␊
109␉}␊
110␉return retVal;␊
111}␊
112␊
113static int legacy_off (pci_dt_t *pci_dev)␊
114{␊
115␉// Set usb legacy off modification by Signal64␊
116␉// NOTE: This *must* be called after the last file is loaded from the drive in the event that we are booting form usb.␊
117␉// NOTE2: This should be called after any getc()/getchar() call. (aka, after the Wait=y keyworkd is used)␊
118␉// AKA: Make this run immediatly before the kernel is called␊
119␉uint32_t␉capaddr, opaddr; ␉␉␊
120␉uint8_t␉␉eecp;␉␉␉␊
121␉uint32_t␉usbcmd, usbsts, usbintr;␉␉␉␊
122␉uint32_t␉usblegsup, usblegctlsts;␉␉␊
123␉␊
124␉int isOSowned;␊
125␉int isBIOSowned;␊
126␉␊
127␉verbose("Setting Legacy USB Off on controller [%04x:%04x] at %02x:%2x.%x\n", ␊
128␉␉␉pci_dev->vendor_id, pci_dev->device_id,␊
129␉␉␉pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func);␊
130␉␊
131␉␊
132␉// capaddr = Capability Registers = dev.addr + offset stored in dev.addr + 0x10 (USBBASE)␊
133␉capaddr = pci_config_read32(pci_dev->dev.addr, 0x10);␉␊
134␉␊
135␉// opaddr = Operational Registers = capaddr + offset (8bit CAPLENGTH in Capability Registers + offset 0)␊
136␉opaddr = capaddr + *((unsigned char*)(capaddr)); ␉␉␊
137␉␊
138␉// eecp = EHCI Extended Capabilities offset = capaddr HCCPARAMS bits 15:8␊
139␉eecp=*((unsigned char*)(capaddr + 9));␊
140␉␊
141␉DBG("capaddr=%x opaddr=%x eecp=%x\n", capaddr, opaddr, eecp);␊
142␉␊
143␉usbcmd = *((unsigned int*)(opaddr));␉␉␉// Command Register␊
144␉usbsts = *((unsigned int*)(opaddr + 4));␉␉// Status Register␊
145␉usbintr = *((unsigned int*)(opaddr + 8));␉␉// Interrupt Enable Register␊
146␉␊
147␉DBG("usbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);␊
148␉␊
149␉// read PCI Config 32bit USBLEGSUP (eecp+0) ␊
150␉usblegsup = pci_config_read32(pci_dev->dev.addr, eecp);␊
151␉␊
152␉// informational only␊
153␉isBIOSowned = !!((usblegsup) & (1 << (16)));␊
154␉isOSowned = !!((usblegsup) & (1 << (24)));␊
155␉␊
156␉// read PCI Config 32bit USBLEGCTLSTS (eecp+4) ␊
157␉usblegctlsts = pci_config_read32(pci_dev->dev.addr, eecp + 4);␊
158␉␊
159␉DBG("usblegsup=%08x isOSowned=%d isBIOSowned=%d usblegctlsts=%08x\n", usblegsup, isOSowned, isBIOSowned, usblegctlsts);␊
160␉␊
161␉// Reset registers to Legacy OFF␊
162␉DBG("Clearing USBLEGCTLSTS\n");␊
163␉pci_config_write32(pci_dev->dev.addr, eecp + 4, 0);␉//usblegctlsts␊
164␉␊
165␉// if delay value is in milliseconds it doesn't appear to work. ␊
166␉// setting value to anything up to 65535 does not add the expected delay here.␊
167␉delay(100);␊
168␉␊
169␉usbcmd = *((unsigned int*)(opaddr));␊
170␉usbsts = *((unsigned int*)(opaddr + 4));␊
171␉usbintr = *((unsigned int*)(opaddr + 8));␊
172␉␊
173␉DBG("usbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);␊
174␉␊
175␉DBG("Clearing Registers\n");␊
176␉␊
177␉// clear registers to default␊
178␉usbcmd = (usbcmd & 0xffffff00);␊
179␉*((unsigned int*)(opaddr)) = usbcmd;␊
180␉*((unsigned int*)(opaddr + 8)) = 0;␉␉␉␉␉//usbintr - clear interrupt registers␊
181␉*((unsigned int*)(opaddr + 4)) = 0x1000;␉␉␉//usbsts - clear status registers ␉␊
182␉pci_config_write32(pci_dev->dev.addr, eecp, 1);␉␉//usblegsup␊
183␉␊
184␉// get the results␊
185␉usbcmd = *((unsigned int*)(opaddr));␊
186␉usbsts = *((unsigned int*)(opaddr + 4));␊
187␉usbintr = *((unsigned int*)(opaddr + 8));␊
188␉␊
189␉DBG("usbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);␊
190␉␊
191␉// read 32bit USBLEGSUP (eecp+0) ␊
192␉usblegsup = pci_config_read32(pci_dev->dev.addr, eecp);␊
193␉␊
194␉// informational only␊
195␉isBIOSowned = !!((usblegsup) & (1 << (16)));␊
196␉isOSowned = !!((usblegsup) & (1 << (24)));␊
197␉␊
198␉// read 32bit USBLEGCTLSTS (eecp+4) ␊
199␉usblegctlsts = pci_config_read32(pci_dev->dev.addr, eecp + 4);␊
200␉␊
201␉DBG("usblegsup=%08x isOSowned=%d isBIOSowned=%d usblegctlsts=%08x\n", usblegsup, isOSowned, isBIOSowned, usblegctlsts);␊
202␉␊
203␉verbose("Legacy USB Off Done\n");␉␊
204␉return 1;␊
205}␊
206␊
207static int ehci_acquire (pci_dt_t *pci_dev)␊
208{␊
209␉int␉␉j, k;␊
210␉uint32_t␉base;␊
211␉uint8_t␉␉eecp;␊
212␉uint8_t␉␉legacy[8];␊
213␉bool␉␉isOwnershipConflict;␉␊
214␉bool␉␉alwaysHardBIOSReset;␊
215␊
216␉alwaysHardBIOSReset = false;␉␊
217␉if (!getBoolForKey(kEHCIhard, &alwaysHardBIOSReset, &bootInfo->chameleonConfig)) {␊
218␉␉alwaysHardBIOSReset = true;␊
219␉}␊
220␊
221␉pci_config_write16(pci_dev->dev.addr, 0x04, 0x0002);␊
222␉base = pci_config_read32(pci_dev->dev.addr, 0x10);␊
223␊
224␉verbose("EHCI controller [%04x:%04x] at %02x:%2x.%x DMA @%x\n", ␊
225␉␉pci_dev->vendor_id, pci_dev->device_id,␊
226␉␉pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func, ␊
227␉␉base);␊
228␊
229␉if (*((unsigned char*)base) < 0xc)␊
230␉{␊
231␉␉DBG("Config space too small: no legacy implementation\n");␊
232␉␉return 1;␊
233␉}␊
234␉eecp = *((unsigned char*)(base + 9));␊
235␉if (!eecp) {␊
236␉␉DBG("No extended capabilities: no legacy implementation\n");␊
237␉␉return 1;␊
238␉}␊
239␊
240␉DBG("eecp=%x\n",eecp);␊
241␊
242␉// bad way to do it␊
243␉// pci_conf_write(pci_dev->dev.addr, eecp, 4, 0x01000001);␊
244␉for (j = 0; j < 8; j++) {␊
245␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
246␉␉DBG("%02x ", legacy[j]);␊
247␉}␊
248␉DBG("\n");␊
249␊
250␉//Real Job: based on orByte's AppleUSBEHCI.cpp␊
251␉//We try soft reset first - some systems hang on reboot with hard reset␊
252␉// Definitely needed during reboot on 10.4.6␊
253␊
254␉isOwnershipConflict = (((legacy[3] & 1) != 0) && ((legacy[2] & 1) != 0));␊
255␉if (!alwaysHardBIOSReset && isOwnershipConflict) {␊
256␉␉DBG("EHCI - Ownership conflict - attempting soft reset ...\n");␊
257␉␉DBG("EHCI - toggle OS Ownership to 0\n");␊
258␉␉pci_config_write8(pci_dev->dev.addr, eecp + 3, 0);␊
259␉␉for (k = 0; k < 25; k++) {␊
260␉␉␉for (j = 0; j < 8; j++) {␊
261␉␉␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
262␉␉␉}␊
263␉␉␉if (legacy[3] == 0) {␊
264␉␉␉␉break;␊
265␉␉␉}␊
266␉␉␉delay(10);␊
267␉␉}␊
268␉}␉␊
269␊
270␉DBG("Found USBLEGSUP_ID - value %x:%x - writing OSOwned\n", legacy[3],legacy[2]);␊
271␉pci_config_write8(pci_dev->dev.addr, eecp + 3, 1);␊
272␊
273␉// wait for kEHCI_USBLEGSUP_BIOSOwned bit to clear␊
274␉for (k = 0; k < 25; k++) {␊
275␉␉for (j = 0;j < 8; j++) {␊
276␉␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
277␉␉}␊
278␉␉DBG ("%x:%x,",legacy[3],legacy[2]);␊
279␉␉if (legacy[2] == 0) {␊
280␉␉␉break;␊
281␉␉}␊
282␉␉delay(10);␊
283␉}␊
284␊
285␉for (j = 0;j < 8; j++) {␊
286␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
287␉}␊
288␉isOwnershipConflict = ((legacy[2]) != 0);␊
289␉if (isOwnershipConflict) {␊
290␉␉// Soft reset has failed. Assume SMI being ignored␊
291␉␉// Hard reset␊
292␉␉// Force Clear BIOS BIT␊
293␉␉DBG("EHCI - Ownership conflict - attempting hard reset ...\n");␉␉␉␊
294␉␉DBG ("%x:%x\n",legacy[3],legacy[2]);␊
295␉␉DBG("EHCI - Force BIOS Ownership to 0\n");␊
296␊
297␉␉pci_config_write8(pci_dev->dev.addr, eecp + 2, 0);␊
298␉␉for (k = 0; k < 25; k++) {␊
299␉␉␉for (j = 0; j < 8; j++) {␊
300␉␉␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
301␉␉␉}␊
302␉␉␉DBG ("%x:%x,",legacy[3],legacy[2]);␊
303␊
304␉␉␉if ((legacy[2]) == 0) {␊
305␉␉␉␉break;␊
306␉␉␉}␊
307␉␉␉delay(10);␉␊
308␉␉}␉␉␊
309␉␉// Disable further SMI events␊
310␉␉for (j = 4; j < 8; j++) {␊
311␉␉␉pci_config_write8(pci_dev->dev.addr, eecp + j, 0);␊
312␉␉}␊
313␉}␊
314␊
315␉for (j = 0; j < 8; j++) {␊
316␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
317␉}␊
318␊
319␉DBG ("%x:%x\n",legacy[3],legacy[2]);␊
320␊
321␉// Final Ownership Resolution Check...␊
322␉if (legacy[2] & 1) {␉␉␉␉␉␊
323␉␉DBG("EHCI controller unable to take control from BIOS\n");␊
324␉␉return 0;␊
325␉}␊
326␊
327␉DBG("EHCI Acquire OS Ownership done\n");␉␊
328␉return 1;␊
329}␊
330␊
331static int uhci_reset (pci_dt_t *pci_dev)␊
332{␊
333␉uint32_t base, port_base;␊
334␉␊
335␉base = pci_config_read32(pci_dev->dev.addr, 0x20);␊
336␉port_base = (base >> 5) & 0x07ff;␊
337␊
338␉verbose("UHCI controller [%04x:%04x] at %02x:%2x.%x base %x(%x)\n", ␊
339␉␉pci_dev->vendor_id, pci_dev->device_id,␊
340␉␉pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func, ␊
341␉␉port_base, base);␊
342␉␊
343␉pci_config_write16(pci_dev->dev.addr, 0xc0, 0x8f00);␊
344␊
345␉outw (port_base, 0x0002);␊
346␉delay(10);␊
347␉outw (port_base+4,0);␊
348␉delay(10);␊
349␉outw (port_base,0);␊
350␉return 1;␊
351}␊
352␊
353static int xhci_legacy_off(pci_dt_t *pci_dev)␊
354{␊
355␉uint32_t bar0, hccparams1, extendCap, value;␊
356␉int32_t timeOut;␊
357␊
358␉verbose("Setting Legacy USB Off on xHC [%04x:%04x] at %02x:%2x.%x\n",␊
359␉␉␉pci_dev->vendor_id, pci_dev->device_id,␊
360␉␉␉pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func);␊
361␊
362␉bar0 = pci_config_read32(pci_dev->dev.addr, 16);␊
363␉/*␊
364␉ * Check if memory bar␊
365␉ */␊
366␉if (bar0 & 1)␊
367␉{␊
368␉␉DBG("%s: BAR0 not a memory range\n", __FUNCTION__);␊
369␉␉return 0;␊
370␉}␊
371␉/*␊
372␉ * Check if outside 32-bit physical address space␊
373␉ */␊
374␉if (((bar0 & 6) == 4) &&␊
375␉␉pci_config_read32(pci_dev->dev.addr, 20))␊
376␉{␊
377␉␉DBG("%s: BAR0 outside 32-bit physical address space\n", __FUNCTION__);␊
378␉␉return 0;␊
379␉}␊
380␉bar0 &= ~15;␊
381␊
382␉hccparams1 = *(uint32_t const volatile*) (bar0 + 16);␊
383␉if (hccparams1 == ~0)␊
384␉{␊
385␉␉DBG("%s: hccparams1 invalid 0x%x\n", __FUNCTION__, hccparams1);␊
386␉␉return 0;␊
387␉}␊
388␉extendCap = (hccparams1 >> 14) & 0x3fffc;␊
389␉while (extendCap) {␊
390␉␉value = *(uint32_t const volatile*) (bar0 + extendCap);␊
391␉␉if (value == ~0)␊
392␉␉{␊
393␉␉␉break;␊
394␉␉}␊
395␉␉if ((value & 0xff) == 1) {␊
396#if DEBUG_USB␊
397␉␉␉verbose("%s: Found USBLEGSUP 0x%x, USBLEGCTLSTS 0x%x\n", __FUNCTION__,␊
398␉␉␉␉␉value, *(uint32_t const volatile*) (bar0 + extendCap + 4));␊
399#endif␊
400␉␉␉value |= (1 << 24);␊
401␉␉␉*(uint32_t volatile*) (bar0 + extendCap) = value;␊
402␉␉␉timeOut = 40;␊
403␉␉␉while (timeOut--)␊
404␉␉␉{␊
405␉␉␉␉delay(1);␊
406␉␉␉␉value = *(uint32_t const volatile*) (bar0 + extendCap);␊
407␉␉␉␉if (value == ~0)␊
408␉␉␉␉{␊
409␉␉␉␉␉timeOut = -1;␊
410␉␉␉␉␉break;␊
411␉␉␉␉}␊
412␉␉␉␉if ((value & 0x01010000) == 0x01000000)␊
413␉␉␉␉{␊
414␉␉␉␉␉timeOut = -1;␉/* Optional - always disable the SMI */␊
415␉␉␉␉␉break;␊
416␉␉␉␉}␊
417␉␉␉}␊
418#if DEBUG_USB␊
419␉␉␉verbose("%s: USBLEGSUP 0x%x, USBLEGCTLSTS 0x%x\n", __FUNCTION__,␊
420␉␉␉␉␉value, *(uint32_t const volatile*) (bar0 + extendCap + 4));␊
421#endif␊
422␉␉␉if (timeOut >= 0)␊
423␉␉␉{␊
424␉␉␉␉break;␊
425␉␉␉}␊
426␉␉␉/*␊
427␉␉␉ * Disable the SMI in USBLEGCTLSTS if BIOS doesn't respond␊
428␉␉␉ */␊
429␉␉␉value = *(uint32_t const volatile*) (bar0 + extendCap + 4);␊
430␉␉␉if (value == ~0)␊
431␉␉␉{␊
432␉␉␉␉break;␊
433␉␉␉}␊
434␉␉␉value &= 0x1f1fee;␊
435␉␉␉value |= 0xe0000000;␊
436␉␉␉*(uint32_t volatile*) (bar0 + extendCap + 4) = value;␊
437␉␉␉break;␊
438␉␉}␊
439␉␉if (!(value & 0xff00))␊
440␉␉␉break;␊
441␉␉extendCap += ((value >> 6) & 0x3fc);␊
442␉}␊
443␉verbose("XHCI Legacy Off Done\n");␊
444␉return 1;␊
445}␊
446

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