| 1 | /*␊ |
| 2 | *␉HDA injector / Audio Enabler␊ |
| 3 | *␊ |
| 4 | *␉Copyright (C) 2012␉Chameleon Team␊ |
| 5 | *␉Edit by Fabio (ErmaC)␊ |
| 6 | *␊ |
| 7 | *␉HDA injector is free software: you can redistribute it and/or modify␊ |
| 8 | *␉it under the terms of the GNU General Public License as published by␊ |
| 9 | *␉the Free Software Foundation, either version 3 of the License, or␊ |
| 10 | *␉(at your option) any later version.␊ |
| 11 | *␊ |
| 12 | *␉HDA injector is distributed in the hope that it will be useful,␊ |
| 13 | *␉but WITHOUT ANY WARRANTY; without even the implied warranty of␊ |
| 14 | *␉MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the␊ |
| 15 | *␉GNU General Public License for more details.␊ |
| 16 | *␊ |
| 17 | *␉Alternatively you can choose to comply with APSL␊ |
| 18 | *␊ |
| 19 | *␉Permission is hereby granted, free of charge, to any person obtaining a␊ |
| 20 | *␉copy of this software and associated documentation files (the "Software"),␊ |
| 21 | *␉to deal in the Software without restriction, including without limitation␊ |
| 22 | *␉the rights to use, copy, modify, merge, publish, distribute, sublicense,␊ |
| 23 | *␉and/or sell copies of the Software, and to permit persons to whom the␊ |
| 24 | *␉Software is furnished to do so, subject to the following conditions:␊ |
| 25 | *␊ |
| 26 | *␉The above copyright notice and this permission notice shall be included in␊ |
| 27 | *␉all copies or substantial portions of the Software.␊ |
| 28 | *␊ |
| 29 | ******************************************************************************␊ |
| 30 | * http://www.leidinger.net/FreeBSD/dox/dev_sound/html/df/d54/hdac_8c_source.html␊ |
| 31 | *␊ |
| 32 | * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>␊ |
| 33 | * Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org>␊ |
| 34 | * Copyright (c) 2008-2012 Alexander Motin <mav@FreeBSD.org>␊ |
| 35 | * All rights reserved.␊ |
| 36 | *␊ |
| 37 | * Redistribution and use in source and binary forms, with or without␊ |
| 38 | * modification, are permitted provided that the following conditions␊ |
| 39 | * are met:␊ |
| 40 | * 1. Redistributions of source code must retain the above copyright␊ |
| 41 | * notice, this list of conditions and the following disclaimer.␊ |
| 42 | * 2. Redistributions in binary form must reproduce the above copyright␊ |
| 43 | * notice, this list of conditions and the following disclaimer in the␊ |
| 44 | * documentation and/or other materials provided with the distribution.␊ |
| 45 | *␊ |
| 46 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND␊ |
| 47 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE␊ |
| 48 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE␊ |
| 49 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE␊ |
| 50 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL␊ |
| 51 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS␊ |
| 52 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)␊ |
| 53 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT␊ |
| 54 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY␊ |
| 55 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF␊ |
| 56 | * SUCH DAMAGE.␊ |
| 57 | *␊ |
| 58 | * Intel High Definition Audio (Controller) driver for FreeBSD.␊ |
| 59 | *␊ |
| 60 | ******************************************************************************/␊ |
| 61 | ␊ |
| 62 | #include "boot.h"␊ |
| 63 | #include "bootstruct.h"␊ |
| 64 | #include "pci.h"␊ |
| 65 | #include "pci_root.h"␊ |
| 66 | #include "platform.h"␊ |
| 67 | #include "device_inject.h"␊ |
| 68 | #include "hda.h"␊ |
| 69 | #include "aml_generator.h"␊ |
| 70 | ␊ |
| 71 | #ifndef DEBUG_HDA␊ |
| 72 | #define DEBUG_HDA 0␊ |
| 73 | #endif␊ |
| 74 | ␊ |
| 75 | #if DEBUG_HDA␊ |
| 76 | #define DBG(x...) verbose(x)␊ |
| 77 | #else␊ |
| 78 | #define DBG(x...)␊ |
| 79 | #endif␊ |
| 80 | ␊ |
| 81 | extern uint32_t devices_number;␊ |
| 82 | ␊ |
| 83 | const char *hda_slot_name[]␉␉=␉{ "AAPL,slot-name", "Built In" };␊ |
| 84 | ␊ |
| 85 | uint8_t default_HDEF_layout_id[]␉␉=␉{0x0C, 0x00, 0x00, 0x00};␊ |
| 86 | #define HDEF_LEN ( sizeof(default_HDEF_layout_id) / sizeof(uint8_t) )␊ |
| 87 | uint8_t default_HDAU_layout_id[]␉␉=␉{0x01, 0x00, 0x00, 0x00};␊ |
| 88 | #define HDAU_LEN ( sizeof(default_HDAU_layout_id) / sizeof(uint8_t) )␊ |
| 89 | uint8_t connector_type_value[] =␉{0x00, 0x08, 0x00, 0x00};␊ |
| 90 | ␊ |
| 91 | /* Structures */␊ |
| 92 | ␊ |
| 93 | static hda_controller_devices know_hda_controller[] = {␊ |
| 94 | ␉//8086 Intel Corporation␊ |
| 95 | ␉{ HDA_INTEL_OAK,␉"Oaktrail"␉/*, 0, 0 */ },␊ |
| 96 | ␉{ HDA_INTEL_BAY,␉"BayTrail"␉/*, 0, 0 */ },␊ |
| 97 | ␉{ HDA_INTEL_HSW1,␉"Haswell"␉/*, 0, 0 */ },␊ |
| 98 | ␉{ HDA_INTEL_HSW2,␉"Haswell"␉/*, 0, 0 */ },␊ |
| 99 | ␉{ HDA_INTEL_HSW3,␉"Haswell"␉/*, 0, 0 */ },␊ |
| 100 | ␉{ HDA_INTEL_CPT,␉"Cougar Point"␉/*, 0, 0 */ },␊ |
| 101 | ␉{ HDA_INTEL_PATSBURG,␉"Patsburg"␉/*, 0, 0 */ },␊ |
| 102 | ␉{ HDA_INTEL_PPT1,␉"Panther Point"␉/*, 0, 0 */ },␊ |
| 103 | ␉{ HDA_INTEL_LPT1,␉"Lynx Point"␉/*, 0, 0 */ },␊ |
| 104 | ␉{ HDA_INTEL_LPT2,␉"Lynx Point"␉/*, 0, 0 */ },␊ |
| 105 | ␉{ HDA_INTEL_WCPT,␉"Wildcat Point"␉/*, 0, 0 */ },␊ |
| 106 | ␉{ HDA_INTEL_WELLS1,␉"Wellsburg"␉/*, 0, 0 */ },␊ |
| 107 | ␉{ HDA_INTEL_WELLS2,␉"Wellsburg"␉/*, 0, 0 */ },␊ |
| 108 | ␉{ HDA_INTEL_LPTLP1,␉"Lynx Point-LP"␉/*, 0, 0 */ },␊ |
| 109 | ␉{ HDA_INTEL_LPTLP2,␉"Lynx Point-LP"␉/*, 0, 0 */ },␊ |
| 110 | ␉{ HDA_INTEL_82801F,␉"82801F"␉/*, 0, 0 */ },␊ |
| 111 | ␉{ HDA_INTEL_63XXESB,␉"631x/632xESB"␉/*, 0, 0 */ },␊ |
| 112 | ␉{ HDA_INTEL_82801G,␉"82801G"␉/*, 0, 0 */ },␊ |
| 113 | ␉{ HDA_INTEL_82801H,␉"82801H"␉/*, 0, 0 */ },␊ |
| 114 | ␉{ HDA_INTEL_82801I,␉"82801I"␉/*, 0, 0 */ },␊ |
| 115 | ␉{ HDA_INTEL_82801JI,␉"82801JI"␉/*, 0, 0 */ },␊ |
| 116 | ␉{ HDA_INTEL_82801JD,␉"82801JD"␉/*, 0, 0 */ },␊ |
| 117 | ␉{ HDA_INTEL_PCH,␉"5 Series/3400 Series" /*, 0, 0 */ },␊ |
| 118 | ␉{ HDA_INTEL_PCH2,␉"5 Series/3400 Series" /*, 0, 0 */ },␊ |
| 119 | ␉{ HDA_INTEL_SCH,␉"SCH"␉␉/*, 0, 0 */ },␊ |
| 120 | ␉//10de NVIDIA Corporation␊ |
| 121 | ␉{ HDA_NVIDIA_MCP51,␉"MCP51" /*, 0, HDAC_QUIRK_MSI */ },␊ |
| 122 | ␉{ HDA_NVIDIA_MCP55,␉"MCP55" /*, 0, HDAC_QUIRK_MSI */ },␊ |
| 123 | ␉{ HDA_NVIDIA_MCP61_1,␉"MCP61" /*, 0, 0 */ },␊ |
| 124 | ␉{ HDA_NVIDIA_MCP61_2,␉"MCP61" /*, 0, 0 */ },␊ |
| 125 | ␉{ HDA_NVIDIA_MCP65_1,␉"MCP65" /*, 0, 0 */ },␊ |
| 126 | ␉{ HDA_NVIDIA_MCP65_2,␉"MCP65" /*, 0, 0 */ },␊ |
| 127 | ␉{ HDA_NVIDIA_MCP67_1,␉"MCP67" /*, 0, 0 */ },␊ |
| 128 | ␉{ HDA_NVIDIA_MCP67_2,␉"MCP67" /*, 0, 0 */ },␊ |
| 129 | ␉{ HDA_NVIDIA_MCP73_1,␉"MCP73" /*, 0, 0 */ },␊ |
| 130 | ␉{ HDA_NVIDIA_MCP73_2,␉"MCP73" /*, 0, 0 */ },␊ |
| 131 | ␉{ HDA_NVIDIA_MCP78_1,␉"MCP78" /*, 0, HDAC_QUIRK_64BIT */ },␊ |
| 132 | ␉{ HDA_NVIDIA_MCP78_2,␉"MCP78" /*, 0, HDAC_QUIRK_64BIT */ },␊ |
| 133 | ␉{ HDA_NVIDIA_MCP78_3,␉"MCP78" /*, 0, HDAC_QUIRK_64BIT */ },␊ |
| 134 | ␉{ HDA_NVIDIA_MCP78_4,␉"MCP78" /*, 0, HDAC_QUIRK_64BIT */ },␊ |
| 135 | ␉{ HDA_NVIDIA_MCP79_1,␉"MCP79" /*, 0, 0 */ },␊ |
| 136 | ␉{ HDA_NVIDIA_MCP79_2,␉"MCP79" /*, 0, 0 */ },␊ |
| 137 | ␉{ HDA_NVIDIA_MCP79_3,␉"MCP79" /*, 0, 0 */ },␊ |
| 138 | ␉{ HDA_NVIDIA_MCP79_4,␉"MCP79" /*, 0, 0 */ },␊ |
| 139 | ␉{ HDA_NVIDIA_MCP89_1,␉"MCP89" /*, 0, 0 */ },␊ |
| 140 | ␉{ HDA_NVIDIA_MCP89_2,␉"MCP89" /*, 0, 0 */ },␊ |
| 141 | ␉{ HDA_NVIDIA_MCP89_3,␉"MCP89" /*, 0, 0 */ },␊ |
| 142 | ␉{ HDA_NVIDIA_MCP89_4,␉"MCP89" /*, 0, 0 */ },␊ |
| 143 | ␉{ HDA_NVIDIA_0BE2,␉"(0x0be2)" /*, 0, HDAC_QUIRK_MSI */ },␊ |
| 144 | ␉{ HDA_NVIDIA_0BE3,␉"(0x0be3)" /*, 0, HDAC_QUIRK_MSI */ },␊ |
| 145 | ␉{ HDA_NVIDIA_0BE4,␉"(0x0be4)" /*, 0, HDAC_QUIRK_MSI */ },␊ |
| 146 | ␉{ HDA_NVIDIA_GT100,␉"GT100" /*, 0, HDAC_QUIRK_MSI */ },␊ |
| 147 | ␉{ HDA_NVIDIA_GT104,␉"GT104" /*, 0, HDAC_QUIRK_MSI */ },␊ |
| 148 | ␉{ HDA_NVIDIA_GT106,␉"GT106" /*, 0, HDAC_QUIRK_MSI */ },␊ |
| 149 | ␉{ HDA_NVIDIA_GT108,␉"GT108" /*, 0, HDAC_QUIRK_MSI */ },␊ |
| 150 | ␉{ HDA_NVIDIA_GT116,␉"GT116" /*, 0, HDAC_QUIRK_MSI */ },␊ |
| 151 | ␉{ HDA_NVIDIA_GF119,␉"GF119" /*, 0, 0 */ },␊ |
| 152 | ␉{ HDA_NVIDIA_GF110_1,␉"GF110" /*, 0, HDAC_QUIRK_MSI */ },␊ |
| 153 | ␉{ HDA_NVIDIA_GF110_2,␉"GF110" /*, 0, HDAC_QUIRK_MSI */ },␊ |
| 154 | ␉{ HDA_NVIDIA_GK110,␉"GK110" /*, 0, ? */ },␊ |
| 155 | ␉{ HDA_NVIDIA_GK106,␉"GK106" /*, 0, ? */ },␊ |
| 156 | ␉{ HDA_NVIDIA_GK107,␉"GK107" /*, 0, ? */ },␊ |
| 157 | ␉{ HDA_NVIDIA_GK104,␉"GK104" /*, 0, ? */ },␊ |
| 158 | ␉//1002 Advanced Micro Devices [AMD] nee ATI Technologies Inc␊ |
| 159 | ␉{ HDA_ATI_SB450,␉"SB4x0" /*, 0, 0 */ },␊ |
| 160 | ␉{ HDA_ATI_SB600,␉"SB600" /*, 0, 0 */ },␊ |
| 161 | ␉{ HDA_ATI_RS600,␉"RS600" /*, 0, 0 */ },␊ |
| 162 | ␉{ HDA_ATI_RS690,␉"RS690" /*, 0, 0 */ },␊ |
| 163 | ␉{ HDA_ATI_RS780,␉"RS780" /*, 0, 0 */ },␊ |
| 164 | ␉{ HDA_ATI_RS880,␉"RS880" /*, 0, 0 */ },␊ |
| 165 | ␉{ HDA_ATI_TRINITY,␉"Trinity" /*, 0, ? */ },␊ |
| 166 | ␉{ HDA_ATI_R600,␉␉"R600" /*, 0, 0 */ },␊ |
| 167 | ␉{ HDA_ATI_RV610,␉"RV610" /*, 0, 0 */ },␊ |
| 168 | ␉{ HDA_ATI_RV620,␉"RV620" /*, 0, 0 */ },␊ |
| 169 | ␉{ HDA_ATI_RV630,␉"RV630" /*, 0, 0 */ },␊ |
| 170 | ␉{ HDA_ATI_RV635,␉"RV635" /*, 0, 0 */ },␊ |
| 171 | ␉{ HDA_ATI_RV710,␉"RV710" /*, 0, 0 */ },␊ |
| 172 | ␉{ HDA_ATI_RV730,␉"RV730" /*, 0, 0 */ },␊ |
| 173 | ␉{ HDA_ATI_RV740,␉"RV740" /*, 0, 0 */ },␊ |
| 174 | ␉{ HDA_ATI_RV770,␉"RV770" /*, 0, 0 */ },␊ |
| 175 | ␉{ HDA_ATI_RV810,␉"RV810" /*, 0, 0 */ },␊ |
| 176 | ␉{ HDA_ATI_RV830,␉"RV830" /*, 0, 0 */ },␊ |
| 177 | ␉{ HDA_ATI_RV840,␉"RV840" /*, 0, 0 */ },␊ |
| 178 | ␉{ HDA_ATI_RV870,␉"RV870" /*, 0, 0 */ },␊ |
| 179 | ␉{ HDA_ATI_RV910,␉"RV910" /*, 0, 0 */ },␊ |
| 180 | ␉{ HDA_ATI_RV930,␉"RV930" /*, 0, 0 */ },␊ |
| 181 | ␉{ HDA_ATI_RV940,␉"RV940" /*, 0, 0 */ },␊ |
| 182 | ␉{ HDA_ATI_RV970,␉"RV970" /*, 0, 0 */ },␊ |
| 183 | ␉{ HDA_ATI_R1000,␉"R1000" /*, 0, 0 */ }, // HDMi␊ |
| 184 | ␉{ HDA_ATI_VERDE,␉"Cape Verde" /*, 0, ? */ }, // HDMi␊ |
| 185 | ␉//17f3 RDC Semiconductor, Inc.␊ |
| 186 | ␉{ HDA_RDC_M3010,␉"M3010" /*, 0, 0 */ },␊ |
| 187 | ␉//1106 VIA Technologies, Inc.␊ |
| 188 | ␉{ HDA_VIA_VT82XX,␉"VT8251/8237A" /*, 0, 0 */ },␊ |
| 189 | ␉//1039 Silicon Integrated Systems [SiS]␊ |
| 190 | ␉{ HDA_SIS_966,␉␉"966" /*, 0, 0 */ },␊ |
| 191 | ␉//10b9 ULi Electronics Inc.(Split off ALi Corporation in 2003)␊ |
| 192 | ␉{ HDA_ULI_M5461,␉"M5461" /*, 0, 0 */ },␊ |
| 193 | ␉/* Unknown */␊ |
| 194 | ␉{ HDA_INTEL_ALL,␉"Unknown Intel device" /*, 0, 0 */ },␊ |
| 195 | ␉{ HDA_NVIDIA_ALL,␉"Unknown NVIDIA device" /*, 0, 0 */ },␊ |
| 196 | ␉{ HDA_ATI_ALL,␉␉"Unknown ATI device" /*, 0, 0 */ },␊ |
| 197 | ␉{ HDA_VIA_ALL,␉␉"Unknown VIA device" /*, 0, 0 */ },␊ |
| 198 | ␉{ HDA_SIS_ALL,␉␉"Unknown SiS device" /*, 0, 0 */ },␊ |
| 199 | ␉{ HDA_ULI_ALL,␉␉"Unknown ULI device" /*, 0, 0 */ },␊ |
| 200 | };␊ |
| 201 | #define HDAC_DEVICES_LEN (sizeof(know_hda_controller) / sizeof(know_hda_controller[0]))␊ |
| 202 | ␊ |
| 203 | /* CODECs */␊ |
| 204 | ␊ |
| 205 | // ErmaC: TODO build function to probe the codecID␊ |
| 206 | /*␊ |
| 207 | static hdacc_codecs know_codecs[] = {␊ |
| 208 | ␉{ HDA_CODEC_CS4206, 0, "Cirrus Logic CS4206" },␊ |
| 209 | ␉{ HDA_CODEC_CS4207, 0, "Cirrus Logic CS4207" },␊ |
| 210 | ␉{ HDA_CODEC_CS4210, 0, "Cirrus Logic CS4210" },␊ |
| 211 | ␉{ HDA_CODEC_ALC221, 0, "Realtek ALC221" },␊ |
| 212 | ␉{ HDA_CODEC_ALC260, 0, "Realtek ALC260" },␊ |
| 213 | ␉{ HDA_CODEC_ALC262, 0, "Realtek ALC262" },␊ |
| 214 | ␉{ HDA_CODEC_ALC267, 0, "Realtek ALC267" },␊ |
| 215 | ␉{ HDA_CODEC_ALC268, 0, "Realtek ALC268" },␊ |
| 216 | ␉{ HDA_CODEC_ALC269, 0, "Realtek ALC269" },␊ |
| 217 | ␉{ HDA_CODEC_ALC270, 0, "Realtek ALC270" },␊ |
| 218 | ␉{ HDA_CODEC_ALC272, 0, "Realtek ALC272" },␊ |
| 219 | ␉{ HDA_CODEC_ALC273, 0, "Realtek ALC273" },␊ |
| 220 | ␉{ HDA_CODEC_ALC275, 0, "Realtek ALC275" },␊ |
| 221 | ␉{ HDA_CODEC_ALC276, 0, "Realtek ALC276" },␊ |
| 222 | ␉{ HDA_CODEC_ALC660, 0, "Realtek ALC660-VD" },␊ |
| 223 | ␉{ HDA_CODEC_ALC662, 0x0002, "Realtek ALC662 rev2" },␊ |
| 224 | ␉{ HDA_CODEC_ALC662, 0, "Realtek ALC662" },␊ |
| 225 | ␉{ HDA_CODEC_ALC663, 0, "Realtek ALC663" },␊ |
| 226 | ␉{ HDA_CODEC_ALC665, 0, "Realtek ALC665" },␊ |
| 227 | ␉{ HDA_CODEC_ALC670, 0, "Realtek ALC670" },␊ |
| 228 | ␉{ HDA_CODEC_ALC680, 0, "Realtek ALC680" },␊ |
| 229 | ␉{ HDA_CODEC_ALC861, 0x0340, "Realtek ALC660" },␊ |
| 230 | ␉{ HDA_CODEC_ALC861, 0, "Realtek ALC861" },␊ |
| 231 | ␉{ HDA_CODEC_ALC861VD, 0, "Realtek ALC861-VD" },␊ |
| 232 | ␉{ HDA_CODEC_ALC880, 0, "Realtek ALC880" },␊ |
| 233 | ␉{ HDA_CODEC_ALC882, 0, "Realtek ALC882" },␊ |
| 234 | ␉{ HDA_CODEC_ALC883, 0, "Realtek ALC883" },␊ |
| 235 | ␉{ HDA_CODEC_ALC885, 0x0101, "Realtek ALC889A" },␊ |
| 236 | ␉{ HDA_CODEC_ALC885, 0x0103, "Realtek ALC889A" },␊ |
| 237 | ␉{ HDA_CODEC_ALC885, 0, "Realtek ALC885" },␊ |
| 238 | ␉{ HDA_CODEC_ALC887, 0, "Realtek ALC887" },␊ |
| 239 | ␉{ HDA_CODEC_ALC888, 0x0101, "Realtek ALC1200" },␊ |
| 240 | ␉{ HDA_CODEC_ALC888, 0, "Realtek ALC888" },␊ |
| 241 | ␉{ HDA_CODEC_ALC889, 0, "Realtek ALC889" },␊ |
| 242 | ␉{ HDA_CODEC_ALC892, 0, "Realtek ALC892" },␊ |
| 243 | ␉{ HDA_CODEC_ALC898, 0, "Realtek ALC898" },␊ |
| 244 | ␉{ HDA_CODEC_ALC899, 0,␉␉"Realtek ALC899" },␊ |
| 245 | ␉{ HDA_CODEC_ALC900, 0, "Realtek ALC1150" },␊ |
| 246 | ␊ |
| 247 | ␉{ HDA_CODEC_AD1882, 0, "Analog Devices AD1882" },␊ |
| 248 | ␉{ HDA_CODEC_AD1882A, 0, "Analog Devices AD1882A" },␊ |
| 249 | ␉{ HDA_CODEC_AD1883, 0, "Analog Devices AD1883" },␊ |
| 250 | ␉{ HDA_CODEC_AD1884, 0, "Analog Devices AD1884" },␊ |
| 251 | ␉{ HDA_CODEC_AD1884A, 0, "Analog Devices AD1884A" },␊ |
| 252 | ␉{ HDA_CODEC_AD1981HD, 0, "Analog Devices AD1981HD" },␊ |
| 253 | ␉{ HDA_CODEC_AD1983, 0, "Analog Devices AD1983" },␊ |
| 254 | ␉{ HDA_CODEC_AD1984, 0, "Analog Devices AD1984" },␊ |
| 255 | ␉{ HDA_CODEC_AD1984A, 0, "Analog Devices AD1984A" },␊ |
| 256 | ␉{ HDA_CODEC_AD1984B, 0, "Analog Devices AD1984B" },␊ |
| 257 | ␉{ HDA_CODEC_AD1986A, 0, "Analog Devices AD1986A" },␊ |
| 258 | ␉{ HDA_CODEC_AD1987, 0, "Analog Devices AD1987" },␊ |
| 259 | ␉{ HDA_CODEC_AD1988, 0, "Analog Devices AD1988A" },␊ |
| 260 | ␉{ HDA_CODEC_AD1988B, 0, "Analog Devices AD1988B" },␊ |
| 261 | ␉{ HDA_CODEC_AD1989A, 0, "Analog Devices AD1989A" },␊ |
| 262 | ␉{ HDA_CODEC_AD1989B, 0, "Analog Devices AD1989B" },␊ |
| 263 | ␉{ HDA_CODEC_CA0110, 0, "Creative CA0110-IBG" },␊ |
| 264 | ␉{ HDA_CODEC_CA0110_2, 0, "Creative CA0110-IBG" },␊ |
| 265 | ␉{ HDA_CODEC_CA0132, 0, "Creative CA0132" },␊ |
| 266 | ␉{ HDA_CODEC_SB0880, 0, "Creative SB0880 X-Fi" },␊ |
| 267 | ␉{ HDA_CODEC_CMI9880, 0, "CMedia CMI9880" },␊ |
| 268 | ␉{ HDA_CODEC_CMI98802, 0, "CMedia CMI9880" },␊ |
| 269 | ␉{ HDA_CODEC_CXD9872RDK, 0, "Sigmatel CXD9872RD/K" },␊ |
| 270 | ␉{ HDA_CODEC_CXD9872AKD, 0, "Sigmatel CXD9872AKD" },␊ |
| 271 | ␉{ HDA_CODEC_STAC9200D, 0, "Sigmatel STAC9200D" },␊ |
| 272 | ␉{ HDA_CODEC_STAC9204X, 0, "Sigmatel STAC9204X" },␊ |
| 273 | ␉{ HDA_CODEC_STAC9204D, 0, "Sigmatel STAC9204D" },␊ |
| 274 | ␉{ HDA_CODEC_STAC9205X, 0, "Sigmatel STAC9205X" },␊ |
| 275 | ␉{ HDA_CODEC_STAC9205D, 0, "Sigmatel STAC9205D" },␊ |
| 276 | ␉{ HDA_CODEC_STAC9220, 0, "Sigmatel STAC9220" },␊ |
| 277 | ␉{ HDA_CODEC_STAC9220_A1, 0, "Sigmatel STAC9220_A1" },␊ |
| 278 | ␉{ HDA_CODEC_STAC9220_A2, 0, "Sigmatel STAC9220_A2" },␊ |
| 279 | ␉{ HDA_CODEC_STAC9221, 0, "Sigmatel STAC9221" },␊ |
| 280 | ␉{ HDA_CODEC_STAC9221_A2, 0, "Sigmatel STAC9221_A2" },␊ |
| 281 | ␉{ HDA_CODEC_STAC9221D, 0, "Sigmatel STAC9221D" },␊ |
| 282 | ␉{ HDA_CODEC_STAC922XD, 0, "Sigmatel STAC9220D/9223D" },␊ |
| 283 | ␉{ HDA_CODEC_STAC9227X, 0, "Sigmatel STAC9227X" },␊ |
| 284 | ␉{ HDA_CODEC_STAC9227D, 0, "Sigmatel STAC9227D" },␊ |
| 285 | ␉{ HDA_CODEC_STAC9228X, 0, "Sigmatel STAC9228X" },␊ |
| 286 | ␉{ HDA_CODEC_STAC9228D, 0, "Sigmatel STAC9228D" },␊ |
| 287 | ␉{ HDA_CODEC_STAC9229X, 0, "Sigmatel STAC9229X" },␊ |
| 288 | ␉{ HDA_CODEC_STAC9229D, 0, "Sigmatel STAC9229D" },␊ |
| 289 | ␉{ HDA_CODEC_STAC9230X, 0, "Sigmatel STAC9230X" },␊ |
| 290 | ␉{ HDA_CODEC_STAC9230D, 0, "Sigmatel STAC9230D" },␊ |
| 291 | ␉{ HDA_CODEC_STAC9250, 0, "Sigmatel STAC9250" },␊ |
| 292 | ␉{ HDA_CODEC_STAC9251, 0, "Sigmatel STAC9251" },␊ |
| 293 | ␉{ HDA_CODEC_STAC9255, 0, "Sigmatel STAC9255" },␊ |
| 294 | ␉{ HDA_CODEC_STAC9255D, 0, "Sigmatel STAC9255D" },␊ |
| 295 | ␉{ HDA_CODEC_STAC9254, 0, "Sigmatel STAC9254" },␊ |
| 296 | ␉{ HDA_CODEC_STAC9254D, 0, "Sigmatel STAC9254D" },␊ |
| 297 | ␉{ HDA_CODEC_STAC9271X, 0, "Sigmatel STAC9271X" },␊ |
| 298 | ␉{ HDA_CODEC_STAC9271D, 0, "Sigmatel STAC9271D" },␊ |
| 299 | ␉{ HDA_CODEC_STAC9272X, 0, "Sigmatel STAC9272X" },␊ |
| 300 | ␉{ HDA_CODEC_STAC9272D, 0, "Sigmatel STAC9272D" },␊ |
| 301 | ␉{ HDA_CODEC_STAC9273X, 0, "Sigmatel STAC9273X" },␊ |
| 302 | ␉{ HDA_CODEC_STAC9273D, 0, "Sigmatel STAC9273D" },␊ |
| 303 | ␉{ HDA_CODEC_STAC9274, 0, "Sigmatel STAC9274" },␊ |
| 304 | ␉{ HDA_CODEC_STAC9274D, 0, "Sigmatel STAC9274D" },␊ |
| 305 | ␉{ HDA_CODEC_STAC9274X5NH, 0, "Sigmatel STAC9274X5NH" },␊ |
| 306 | ␉{ HDA_CODEC_STAC9274D5NH, 0, "Sigmatel STAC9274D5NH" },␊ |
| 307 | ␉{ HDA_CODEC_STAC9872AK, 0, "Sigmatel STAC9872AK" },␊ |
| 308 | ␉{ HDA_CODEC_IDT92HD005, 0, "IDT 92HD005" },␊ |
| 309 | ␉{ HDA_CODEC_IDT92HD005D, 0, "IDT 92HD005D" },␊ |
| 310 | ␉{ HDA_CODEC_IDT92HD206X, 0, "IDT 92HD206X" },␊ |
| 311 | ␉{ HDA_CODEC_IDT92HD206D, 0, "IDT 92HD206D" },␊ |
| 312 | ␉{ HDA_CODEC_IDT92HD66B1X5, 0, "IDT 92HD66B1X5" },␊ |
| 313 | ␉{ HDA_CODEC_IDT92HD66B2X5, 0, "IDT 92HD66B2X5" },␊ |
| 314 | ␉{ HDA_CODEC_IDT92HD66B3X5, 0, "IDT 92HD66B3X5" },␊ |
| 315 | ␉{ HDA_CODEC_IDT92HD66C1X5, 0, "IDT 92HD66C1X5" },␊ |
| 316 | ␉{ HDA_CODEC_IDT92HD66C2X5, 0, "IDT 92HD66C2X5" },␊ |
| 317 | ␉{ HDA_CODEC_IDT92HD66C3X5, 0, "IDT 92HD66C3X5" },␊ |
| 318 | ␉{ HDA_CODEC_IDT92HD66B1X3, 0, "IDT 92HD66B1X3" },␊ |
| 319 | ␉{ HDA_CODEC_IDT92HD66B2X3, 0, "IDT 92HD66B2X3" },␊ |
| 320 | ␉{ HDA_CODEC_IDT92HD66B3X3, 0, "IDT 92HD66B3X3" },␊ |
| 321 | ␉{ HDA_CODEC_IDT92HD66C1X3, 0, "IDT 92HD66C1X3" },␊ |
| 322 | ␉{ HDA_CODEC_IDT92HD66C2X3, 0, "IDT 92HD66C2X3" },␊ |
| 323 | ␉{ HDA_CODEC_IDT92HD66C3_65, 0, "IDT 92HD66C3_65" },␊ |
| 324 | ␉{ HDA_CODEC_IDT92HD700X, 0, "IDT 92HD700X" },␊ |
| 325 | ␉{ HDA_CODEC_IDT92HD700D, 0, "IDT 92HD700D" },␊ |
| 326 | ␉{ HDA_CODEC_IDT92HD71B5, 0, "IDT 92HD71B5" },␊ |
| 327 | ␉{ HDA_CODEC_IDT92HD71B5_2, 0, "IDT 92HD71B5" },␊ |
| 328 | ␉{ HDA_CODEC_IDT92HD71B6, 0, "IDT 92HD71B6" },␊ |
| 329 | ␉{ HDA_CODEC_IDT92HD71B6_2, 0, "IDT 92HD71B6" },␊ |
| 330 | ␉{ HDA_CODEC_IDT92HD71B7, 0, "IDT 92HD71B7" },␊ |
| 331 | ␉{ HDA_CODEC_IDT92HD71B7_2, 0, "IDT 92HD71B7" },␊ |
| 332 | ␉{ HDA_CODEC_IDT92HD71B8, 0, "IDT 92HD71B8" },␊ |
| 333 | ␉{ HDA_CODEC_IDT92HD71B8_2, 0, "IDT 92HD71B8" },␊ |
| 334 | ␉{ HDA_CODEC_IDT92HD73C1, 0, "IDT 92HD73C1" },␊ |
| 335 | ␉{ HDA_CODEC_IDT92HD73D1, 0, "IDT 92HD73D1" },␊ |
| 336 | ␉{ HDA_CODEC_IDT92HD73E1, 0, "IDT 92HD73E1" },␊ |
| 337 | ␉{ HDA_CODEC_IDT92HD75B3, 0, "IDT 92HD75B3" },␊ |
| 338 | ␉{ HDA_CODEC_IDT92HD75BX, 0, "IDT 92HD75BX" },␊ |
| 339 | ␉{ HDA_CODEC_IDT92HD81B1C, 0, "IDT 92HD81B1C" },␊ |
| 340 | ␉{ HDA_CODEC_IDT92HD81B1X, 0, "IDT 92HD81B1X" },␊ |
| 341 | ␉{ HDA_CODEC_IDT92HD83C1C, 0, "IDT 92HD83C1C" },␊ |
| 342 | ␉{ HDA_CODEC_IDT92HD83C1X, 0, "IDT 92HD83C1X" },␊ |
| 343 | ␉{ HDA_CODEC_IDT92HD87B1_3, 0, "IDT 92HD87B1/3" },␊ |
| 344 | ␉{ HDA_CODEC_IDT92HD87B2_4, 0, "IDT 92HD87B2/4" },␊ |
| 345 | ␉{ HDA_CODEC_IDT92HD89C3, 0, "IDT 92HD89C3" },␊ |
| 346 | ␉{ HDA_CODEC_IDT92HD89C2, 0, "IDT 92HD89C2" },␊ |
| 347 | ␉{ HDA_CODEC_IDT92HD89C1, 0, "IDT 92HD89C1" },␊ |
| 348 | ␉{ HDA_CODEC_IDT92HD89B3, 0, "IDT 92HD89B3" },␊ |
| 349 | ␉{ HDA_CODEC_IDT92HD89B2, 0, "IDT 92HD89B2" },␊ |
| 350 | ␉{ HDA_CODEC_IDT92HD89B1, 0, "IDT 92HD89B1" },␊ |
| 351 | ␉{ HDA_CODEC_IDT92HD89E3, 0, "IDT 92HD89E3" },␊ |
| 352 | ␉{ HDA_CODEC_IDT92HD89E2, 0, "IDT 92HD89E2" },␊ |
| 353 | ␉{ HDA_CODEC_IDT92HD89E1, 0, "IDT 92HD89E1" },␊ |
| 354 | ␉{ HDA_CODEC_IDT92HD89D3, 0, "IDT 92HD89D3" },␊ |
| 355 | ␉{ HDA_CODEC_IDT92HD89D2, 0, "IDT 92HD89D2" },␊ |
| 356 | ␉{ HDA_CODEC_IDT92HD89D1, 0, "IDT 92HD89D1" },␊ |
| 357 | ␉{ HDA_CODEC_IDT92HD89F3, 0, "IDT 92HD89F3" },␊ |
| 358 | ␉{ HDA_CODEC_IDT92HD89F2, 0, "IDT 92HD89F2" },␊ |
| 359 | ␉{ HDA_CODEC_IDT92HD89F1, 0, "IDT 92HD89F1" },␊ |
| 360 | ␉{ HDA_CODEC_IDT92HD90BXX, 0, "IDT 92HD90BXX" },␊ |
| 361 | ␉{ HDA_CODEC_IDT92HD91BXX, 0, "IDT 92HD91BXX" },␊ |
| 362 | ␉{ HDA_CODEC_IDT92HD93BXX, 0, "IDT 92HD93BXX" },␊ |
| 363 | ␉{ HDA_CODEC_IDT92HD98BXX, 0, "IDT 92HD98BXX" },␊ |
| 364 | ␉{ HDA_CODEC_IDT92HD99BXX, 0, "IDT 92HD99BXX" },␊ |
| 365 | ␉{ HDA_CODEC_CX20549, 0, "Conexant CX20549 (Venice)" },␊ |
| 366 | ␉{ HDA_CODEC_CX20551, 0, "Conexant CX20551 (Waikiki)" },␊ |
| 367 | ␉{ HDA_CODEC_CX20561, 0, "Conexant CX20561 (Hermosa)" },␊ |
| 368 | ␉{ HDA_CODEC_CX20582, 0, "Conexant CX20582 (Pebble)" },␊ |
| 369 | ␉{ HDA_CODEC_CX20583, 0, "Conexant CX20583 (Pebble HSF)" },␊ |
| 370 | ␉{ HDA_CODEC_CX20584, 0, "Conexant CX20584" },␊ |
| 371 | ␉{ HDA_CODEC_CX20585, 0, "Conexant CX20585" },␊ |
| 372 | ␉{ HDA_CODEC_CX20588, 0, "Conexant CX20588" },␊ |
| 373 | ␉{ HDA_CODEC_CX20590, 0, "Conexant CX20590" },␊ |
| 374 | ␉{ HDA_CODEC_CX20631, 0, "Conexant CX20631" },␊ |
| 375 | ␉{ HDA_CODEC_CX20632, 0, "Conexant CX20632" },␊ |
| 376 | ␉{ HDA_CODEC_CX20641, 0, "Conexant CX20641" },␊ |
| 377 | ␉{ HDA_CODEC_CX20642, 0, "Conexant CX20642" },␊ |
| 378 | ␉{ HDA_CODEC_CX20651, 0, "Conexant CX20651" },␊ |
| 379 | ␉{ HDA_CODEC_CX20652, 0, "Conexant CX20652" },␊ |
| 380 | ␉{ HDA_CODEC_CX20664, 0, "Conexant CX20664" },␊ |
| 381 | ␉{ HDA_CODEC_CX20665, 0, "Conexant CX20665" },␊ |
| 382 | ␉{ HDA_CODEC_VT1708_8, 0, "VIA VT1708_8" },␊ |
| 383 | ␉{ HDA_CODEC_VT1708_9, 0, "VIA VT1708_9" },␊ |
| 384 | ␉{ HDA_CODEC_VT1708_A, 0, "VIA VT1708_A" },␊ |
| 385 | ␉{ HDA_CODEC_VT1708_B, 0, "VIA VT1708_B" },␊ |
| 386 | ␉{ HDA_CODEC_VT1709_0, 0, "VIA VT1709_0" },␊ |
| 387 | ␉{ HDA_CODEC_VT1709_1, 0, "VIA VT1709_1" },␊ |
| 388 | ␉{ HDA_CODEC_VT1709_2, 0, "VIA VT1709_2" },␊ |
| 389 | ␉{ HDA_CODEC_VT1709_3, 0, "VIA VT1709_3" },␊ |
| 390 | ␉{ HDA_CODEC_VT1709_4, 0, "VIA VT1709_4" },␊ |
| 391 | ␉{ HDA_CODEC_VT1709_5, 0, "VIA VT1709_5" },␊ |
| 392 | ␉{ HDA_CODEC_VT1709_6, 0, "VIA VT1709_6" },␊ |
| 393 | ␉{ HDA_CODEC_VT1709_7, 0, "VIA VT1709_7" },␊ |
| 394 | ␉{ HDA_CODEC_VT1708B_0, 0, "VIA VT1708B_0" },␊ |
| 395 | ␉{ HDA_CODEC_VT1708B_1, 0, "VIA VT1708B_1" },␊ |
| 396 | ␉{ HDA_CODEC_VT1708B_2, 0, "VIA VT1708B_2" },␊ |
| 397 | ␉{ HDA_CODEC_VT1708B_3, 0, "VIA VT1708B_3" },␊ |
| 398 | ␉{ HDA_CODEC_VT1708B_4, 0, "VIA VT1708B_4" },␊ |
| 399 | ␉{ HDA_CODEC_VT1708B_5, 0, "VIA VT1708B_5" },␊ |
| 400 | ␉{ HDA_CODEC_VT1708B_6, 0, "VIA VT1708B_6" },␊ |
| 401 | ␉{ HDA_CODEC_VT1708B_7, 0, "VIA VT1708B_7" },␊ |
| 402 | ␉{ HDA_CODEC_VT1708S_0, 0, "VIA VT1708S_0" },␊ |
| 403 | ␉{ HDA_CODEC_VT1708S_1, 0, "VIA VT1708S_1" },␊ |
| 404 | ␉{ HDA_CODEC_VT1708S_2, 0, "VIA VT1708S_2" },␊ |
| 405 | ␉{ HDA_CODEC_VT1708S_3, 0, "VIA VT1708S_3" },␊ |
| 406 | ␉{ HDA_CODEC_VT1708S_4, 0, "VIA VT1708S_4" },␊ |
| 407 | ␉{ HDA_CODEC_VT1708S_5, 0, "VIA VT1708S_5" },␊ |
| 408 | ␉{ HDA_CODEC_VT1708S_6, 0, "VIA VT1708S_6" },␊ |
| 409 | ␉{ HDA_CODEC_VT1708S_7, 0, "VIA VT1708S_7" },␊ |
| 410 | ␉{ HDA_CODEC_VT1702_0, 0, "VIA VT1702_0" },␊ |
| 411 | ␉{ HDA_CODEC_VT1702_1, 0, "VIA VT1702_1" },␊ |
| 412 | ␉{ HDA_CODEC_VT1702_2, 0, "VIA VT1702_2" },␊ |
| 413 | ␉{ HDA_CODEC_VT1702_3, 0, "VIA VT1702_3" },␊ |
| 414 | ␉{ HDA_CODEC_VT1702_4, 0, "VIA VT1702_4" },␊ |
| 415 | ␉{ HDA_CODEC_VT1702_5, 0, "VIA VT1702_5" },␊ |
| 416 | ␉{ HDA_CODEC_VT1702_6, 0, "VIA VT1702_6" },␊ |
| 417 | ␉{ HDA_CODEC_VT1702_7, 0, "VIA VT1702_7" },␊ |
| 418 | ␉{ HDA_CODEC_VT1716S_0, 0, "VIA VT1716S_0" },␊ |
| 419 | ␉{ HDA_CODEC_VT1716S_1, 0, "VIA VT1716S_1" },␊ |
| 420 | ␉{ HDA_CODEC_VT1718S_0, 0, "VIA VT1718S_0" },␊ |
| 421 | ␉{ HDA_CODEC_VT1718S_1, 0, "VIA VT1718S_1" },␊ |
| 422 | ␉{ HDA_CODEC_VT1802_0, 0, "VIA VT1802_0" },␊ |
| 423 | ␉{ HDA_CODEC_VT1802_1, 0, "VIA VT1802_1" },␊ |
| 424 | ␉{ HDA_CODEC_VT1812, 0, "VIA VT1812" },␊ |
| 425 | ␉{ HDA_CODEC_VT1818S, 0, "VIA VT1818S" },␊ |
| 426 | ␉{ HDA_CODEC_VT1828S, 0, "VIA VT1828S" },␊ |
| 427 | ␉{ HDA_CODEC_VT2002P_0, 0, "VIA VT2002P_0" },␊ |
| 428 | ␉{ HDA_CODEC_VT2002P_1, 0, "VIA VT2002P_1" },␊ |
| 429 | ␉{ HDA_CODEC_VT2020, 0, "VIA VT2020" },␊ |
| 430 | ␉{ HDA_CODEC_ATIRS600_1, 0, "ATI RS600" },␊ |
| 431 | ␉{ HDA_CODEC_ATIRS600_2, 0, "ATI RS600" },␊ |
| 432 | ␉{ HDA_CODEC_ATIRS690, 0, "ATI RS690/780" },␊ |
| 433 | ␉{ HDA_CODEC_ATIR6XX, 0, "ATI R6xx" },␊ |
| 434 | ␉{ HDA_CODEC_NVIDIAMCP67, 0, "NVIDIA MCP67" },␊ |
| 435 | ␉{ HDA_CODEC_NVIDIAMCP73, 0, "NVIDIA MCP73" },␊ |
| 436 | ␉{ HDA_CODEC_NVIDIAMCP78, 0, "NVIDIA MCP78" },␊ |
| 437 | ␉{ HDA_CODEC_NVIDIAMCP78_2, 0, "NVIDIA MCP78" },␊ |
| 438 | ␉{ HDA_CODEC_NVIDIAMCP78_3, 0, "NVIDIA MCP78" },␊ |
| 439 | ␉{ HDA_CODEC_NVIDIAMCP78_4, 0, "NVIDIA MCP78" },␊ |
| 440 | ␉{ HDA_CODEC_NVIDIAMCP7A, 0, "NVIDIA MCP7A" },␊ |
| 441 | ␉{ HDA_CODEC_NVIDIAGT220, 0, "NVIDIA GT220" },␊ |
| 442 | ␉{ HDA_CODEC_NVIDIAGT21X, 0, "NVIDIA GT21x" },␊ |
| 443 | ␉{ HDA_CODEC_NVIDIAMCP89, 0, "NVIDIA MCP89" },␊ |
| 444 | ␉{ HDA_CODEC_NVIDIAGT240, 0, "NVIDIA GT240" },␊ |
| 445 | ␉{ HDA_CODEC_NVIDIAGTS450, 0, "NVIDIA GTS450" },␊ |
| 446 | ␉{ HDA_CODEC_NVIDIAGT440, 0, "NVIDIA GT440" },␊ |
| 447 | ␉{ HDA_CODEC_NVIDIAGTX550, 0, "NVIDIA GTX550" },␊ |
| 448 | ␉{ HDA_CODEC_NVIDIAGTX570, 0, "NVIDIA GTX570" },␊ |
| 449 | ␉{ HDA_CODEC_INTELIP, 0, "Intel Ibex Peak" },␊ |
| 450 | ␉{ HDA_CODEC_INTELBL, 0, "Intel Bearlake" },␊ |
| 451 | ␉{ HDA_CODEC_INTELCA, 0, "Intel Cantiga" },␊ |
| 452 | ␉{ HDA_CODEC_INTELEL, 0, "Intel Eaglelake" },␊ |
| 453 | ␉{ HDA_CODEC_INTELIP2, 0, "Intel Ibex Peak" },␊ |
| 454 | ␉{ HDA_CODEC_INTELCPT, 0, "Intel Cougar Point" },␊ |
| 455 | ␉{ HDA_CODEC_INTELPPT, 0, "Intel Panther Point" },␊ |
| 456 | ␉{ HDA_CODEC_INTELHSW, 0,␉"Intel Haswell" },␊ |
| 457 | ␉{ HDA_CODEC_INTELCL, 0, "Intel Crestline" },␊ |
| 458 | ␉{ HDA_CODEC_SII1390, 0, "Silicon Image SiI1390" },␊ |
| 459 | ␉{ HDA_CODEC_SII1392, 0, "Silicon Image SiI1392" },␊ |
| 460 | ␉// Unknown CODECs␊ |
| 461 | ␉{ HDA_CODEC_ADXXXX, 0, "Analog Devices" },␊ |
| 462 | ␉{ HDA_CODEC_AGEREXXXX, 0, "Lucent/Agere Systems" },␊ |
| 463 | ␉{ HDA_CODEC_ALCXXXX, 0, "Realtek" },␊ |
| 464 | ␉{ HDA_CODEC_ATIXXXX, 0, "ATI" },␊ |
| 465 | ␉{ HDA_CODEC_CAXXXX, 0, "Creative" },␊ |
| 466 | ␉{ HDA_CODEC_CMIXXXX, 0, "CMedia" },␊ |
| 467 | ␉{ HDA_CODEC_CMIXXXX2, 0, "CMedia" },␊ |
| 468 | ␉{ HDA_CODEC_CSXXXX, 0, "Cirrus Logic" },␊ |
| 469 | ␉{ HDA_CODEC_CXXXXX, 0, "Conexant" },␊ |
| 470 | ␉{ HDA_CODEC_CHXXXX, 0, "Chrontel" },␊ |
| 471 | ␉{ HDA_CODEC_IDTXXXX, 0, "IDT" },␊ |
| 472 | ␉{ HDA_CODEC_INTELXXXX, 0, "Intel" },␊ |
| 473 | ␉{ HDA_CODEC_MOTOXXXX, 0, "Motorola" },␊ |
| 474 | ␉{ HDA_CODEC_NVIDIAXXXX, 0, "NVIDIA" },␊ |
| 475 | ␉{ HDA_CODEC_SIIXXXX, 0, "Silicon Image" },␊ |
| 476 | ␉{ HDA_CODEC_STACXXXX, 0, "Sigmatel" },␊ |
| 477 | ␉{ HDA_CODEC_VTXXXX, 0, "VIA" },␊ |
| 478 | };␊ |
| 479 | ␊ |
| 480 | #define HDACC_CODECS_LEN (sizeof(know_codecs) / sizeof(know_codecs[0]))␊ |
| 481 | */␊ |
| 482 | ␊ |
| 483 | /*****************␊ |
| 484 | * Device Methods␊ |
| 485 | *****************/␊ |
| 486 | ␊ |
| 487 | /* get HDA device name */␊ |
| 488 | static char *get_hda_controller_name(uint16_t controller_device_id, uint16_t controller_vendor_id)␊ |
| 489 | {␊ |
| 490 | ␉static char desc[128];␊ |
| 491 | ␊ |
| 492 | ␉const char* name_format = "Unknown HD Audio device %s";␊ |
| 493 | ␉uint32_t controller_model = ((controller_device_id << 16) | controller_vendor_id);␊ |
| 494 | ␉int i;␊ |
| 495 | ␊ |
| 496 | ␉/* Get format for vendor ID */␊ |
| 497 | ␉switch (controller_vendor_id)␊ |
| 498 | ␉{␊ |
| 499 | ␉␉case ATI_VENDORID:␊ |
| 500 | ␉␉␉name_format = "ATI %s HDA Controller (HDMi)"; break;␊ |
| 501 | ␊ |
| 502 | ␉␉case INTEL_VENDORID:␊ |
| 503 | ␉␉␉name_format = "Intel %s High Definition Audio Controller"; break;␊ |
| 504 | ␊ |
| 505 | ␉␉case NVIDIA_VENDORID:␊ |
| 506 | ␉␉␉name_format = "nVidia %s HDA Controller (HDMi)"; break;␊ |
| 507 | ␊ |
| 508 | ␉␉case RDC_VENDORID:␊ |
| 509 | ␉␉␉name_format = "RDC %s High Definition Audio Controller"; break;␊ |
| 510 | ␊ |
| 511 | ␉␉case SIS_VENDORID:␊ |
| 512 | ␉␉␉name_format = "SiS %s HDA Controller"; break;␊ |
| 513 | ␊ |
| 514 | ␉␉case ULI_VENDORID:␊ |
| 515 | ␉␉␉name_format = "ULI %s HDA Controller"; break;␊ |
| 516 | ␊ |
| 517 | ␉␉case VIA_VENDORID:␊ |
| 518 | ␉␉␉name_format = "VIA %s HDA Controller"; break;␊ |
| 519 | ␊ |
| 520 | ␉␉default:␊ |
| 521 | ␉␉␉break;␊ |
| 522 | ␉}␊ |
| 523 | ␊ |
| 524 | ␉for (i = 0; i < HDAC_DEVICES_LEN; i++)␊ |
| 525 | ␉{␊ |
| 526 | ␉␉if (know_hda_controller[i].model == controller_model)␊ |
| 527 | ␉␉{␊ |
| 528 | ␉␉␉snprintf(desc, sizeof(desc), name_format, know_hda_controller[i].desc);␊ |
| 529 | ␉␉␉return desc;␊ |
| 530 | ␉␉}␊ |
| 531 | ␉}␊ |
| 532 | ␊ |
| 533 | ␉/* Not in table */␊ |
| 534 | ␉snprintf(desc, sizeof(desc),␊ |
| 535 | ␉␉"Unknown HD Audio device, vendor %04x, model %04x",␊ |
| 536 | ␉␉controller_vendor_id, controller_device_id);␊ |
| 537 | ␉return desc;␊ |
| 538 | }␊ |
| 539 | ␊ |
| 540 | static int devprop_add_hda_template(struct DevPropDevice *device)␊ |
| 541 | {␊ |
| 542 | ␉if (!device)␊ |
| 543 | ␉{␊ |
| 544 | ␉␉return 0;␊ |
| 545 | ␉}␊ |
| 546 | ␉devices_number++;␊ |
| 547 | ␊ |
| 548 | ␉return 1;␊ |
| 549 | }␊ |
| 550 | ␊ |
| 551 | bool setup_hda_devprop(pci_dt_t *hda_dev)␊ |
| 552 | {␊ |
| 553 | ␉struct␉␉DevPropDevice␉*device = NULL;␊ |
| 554 | ␉char␉␉*devicepath = NULL;␊ |
| 555 | ␉char␉␉*controller_name = NULL;␊ |
| 556 | ␉int len;␊ |
| 557 | ␉uint8_t␉␉BuiltIn = 0x00;␊ |
| 558 | ␉uint16_t␉controller_vendor_id = hda_dev->vendor_id;␊ |
| 559 | ␉uint16_t␉controller_device_id = hda_dev->device_id;␊ |
| 560 | ␉const char␉*value;␊ |
| 561 | ␊ |
| 562 | ␉devicepath = get_pci_dev_path(hda_dev);␊ |
| 563 | ␉controller_name = get_hda_controller_name(controller_device_id, controller_vendor_id);␊ |
| 564 | ␊ |
| 565 | ␉if (!string)␊ |
| 566 | ␉{␊ |
| 567 | ␉␉string = devprop_create_string();␊ |
| 568 | ␉␉if (!string)␊ |
| 569 | ␉␉{␊ |
| 570 | ␉␉␉return 0;␊ |
| 571 | ␉␉}␊ |
| 572 | ␉}␊ |
| 573 | ␊ |
| 574 | ␉if (!devicepath)␊ |
| 575 | ␉{␊ |
| 576 | ␉␉return 0;␊ |
| 577 | ␉}␊ |
| 578 | ␊ |
| 579 | ␉device = devprop_add_device(string, devicepath);␊ |
| 580 | ␉if (!device)␊ |
| 581 | ␉{␊ |
| 582 | ␉␉return 0;␊ |
| 583 | ␉}␊ |
| 584 | ␉devprop_add_hda_template(device);␊ |
| 585 | ␊ |
| 586 | ␉verbose("\n--------------------------------\n");␊ |
| 587 | ␉verbose("- AUDIO DEVICE INFO -\n");␊ |
| 588 | ␉verbose("--------------------------------\n");␊ |
| 589 | ␊ |
| 590 | ␉switch ((controller_device_id << 16) | controller_vendor_id)␊ |
| 591 | ␉{␊ |
| 592 | ␊ |
| 593 | ␉/***********************************************************************␊ |
| 594 | ␉* The above case are intended as for HDEF device at address 0x001B0000␊ |
| 595 | ␉***********************************************************************/␊ |
| 596 | ␉␉case HDA_INTEL_OAK:␊ |
| 597 | ␉␉case HDA_INTEL_BAY:␊ |
| 598 | ␉␉case HDA_INTEL_HSW1:␊ |
| 599 | ␉␉case HDA_INTEL_HSW2:␊ |
| 600 | ␉␉case HDA_INTEL_HSW3:␊ |
| 601 | ␉␉case HDA_INTEL_CPT:␊ |
| 602 | ␉␉case HDA_INTEL_PATSBURG:␊ |
| 603 | ␉␉case HDA_INTEL_PPT1:␊ |
| 604 | ␉␉case HDA_INTEL_LPT1:␊ |
| 605 | ␉␉case HDA_INTEL_LPT2:␊ |
| 606 | ␉␉case HDA_INTEL_WCPT:␊ |
| 607 | ␉␉case HDA_INTEL_WELLS1:␊ |
| 608 | ␉␉case HDA_INTEL_WELLS2:␊ |
| 609 | ␉␉case HDA_INTEL_LPTLP1:␊ |
| 610 | ␉␉case HDA_INTEL_LPTLP2:␊ |
| 611 | ␉␉case HDA_INTEL_82801F:␊ |
| 612 | ␉␉case HDA_INTEL_63XXESB:␊ |
| 613 | ␉␉case HDA_INTEL_82801G:␊ |
| 614 | ␉␉case HDA_INTEL_82801H:␊ |
| 615 | ␉␉case HDA_INTEL_82801I:␊ |
| 616 | ␉␉case HDA_INTEL_82801JI:␊ |
| 617 | ␉␉case HDA_INTEL_82801JD:␊ |
| 618 | ␉␉case HDA_INTEL_PCH:␊ |
| 619 | ␉␉case HDA_INTEL_PCH2:␊ |
| 620 | ␉␉case HDA_INTEL_SCH:␊ |
| 621 | ␊ |
| 622 | ␉/* if the key value kHDEFLayoutID as a value set that value, if not will assign a default layout */␊ |
| 623 | ␉if (getValueForKey(kHDEFLayoutID, &value, &len, &bootInfo->chameleonConfig) && len == HDEF_LEN * 2)␊ |
| 624 | ␉{␊ |
| 625 | ␉␉uint8_t new_HDEF_layout_id[HDEF_LEN];␊ |
| 626 | ␉␉if (hex2bin(value, new_HDEF_layout_id, HDEF_LEN) == 0)␊ |
| 627 | ␉␉{␊ |
| 628 | ␉␉␉memcpy(default_HDEF_layout_id, new_HDEF_layout_id, HDEF_LEN);␊ |
| 629 | ␉␉␉verbose("Using user supplied HDEF layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n", ␊ |
| 630 | ␉␉␉␉default_HDEF_layout_id[0], default_HDEF_layout_id[1], default_HDEF_layout_id[2], default_HDEF_layout_id[3]);␊ |
| 631 | ␉␉}␊ |
| 632 | ␉}␊ |
| 633 | ␉else␊ |
| 634 | ␉{␊ |
| 635 | ␉␉verbose("Using default HDEF layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",␊ |
| 636 | default_HDEF_layout_id[0], default_HDEF_layout_id[1], default_HDEF_layout_id[2], default_HDEF_layout_id[3]);␊ |
| 637 | ␉}␊ |
| 638 | ␉devprop_add_value(device, "layout-id", default_HDEF_layout_id, HDEF_LEN);␊ |
| 639 | ␉devprop_add_value(device, "AAPL,slot-name", (uint8_t *)"Built-in", 9); // 0x09␊ |
| 640 | ␉devprop_add_value(device, "name", (uint8_t *)"audio", 6); // 0x06␊ |
| 641 | ␉devprop_add_value(device, "device_type", (uint8_t *)"High Definition Audio", 22); // 0x16␊ |
| 642 | ␉devprop_add_value(device, "built-in", &BuiltIn, 1);␊ |
| 643 | ␉devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-1", 10); // 0x0a␊ |
| 644 | ␉// "AFGLowPowerState" = <03000000>␊ |
| 645 | ␉break;␊ |
| 646 | ␊ |
| 647 | ␉/****************************************************************************************************************␊ |
| 648 | ␉* The above case are intended as for HDAU (NVIDIA) device onboard audio for GFX card with Audio controller HDMi␊ |
| 649 | ␉****************************************************************************************************************/␊ |
| 650 | ␉case HDA_NVIDIA_GK107:␊ |
| 651 | ␉case HDA_NVIDIA_GF110_1:␊ |
| 652 | ␉case HDA_NVIDIA_GF110_2:␊ |
| 653 | ␉case HDA_NVIDIA_GK106:␊ |
| 654 | ␉case HDA_NVIDIA_GK104:␊ |
| 655 | ␉case HDA_NVIDIA_GF119:␊ |
| 656 | ␉case HDA_NVIDIA_GT116:␊ |
| 657 | ␉case HDA_NVIDIA_GT104:␊ |
| 658 | ␉case HDA_NVIDIA_GT108:␊ |
| 659 | ␉case HDA_NVIDIA_GT106:␊ |
| 660 | ␉case HDA_NVIDIA_GT100:␊ |
| 661 | ␉case HDA_NVIDIA_0BE4:␊ |
| 662 | ␉case HDA_NVIDIA_0BE3:␊ |
| 663 | ␉case HDA_NVIDIA_0BE2:␊ |
| 664 | ␊ |
| 665 | ␉/* if the key value kHDAULayoutID as a value set that value, if not will assign a default layout */␊ |
| 666 | ␉if (getValueForKey(kHDAULayoutID, &value, &len, &bootInfo->chameleonConfig) && len == HDAU_LEN * 2)␊ |
| 667 | ␉{␊ |
| 668 | ␉␉uint8_t new_HDAU_layout_id[HDAU_LEN];␊ |
| 669 | ␉␉if (hex2bin(value, new_HDAU_layout_id, HDAU_LEN) == 0)␊ |
| 670 | ␉␉{␊ |
| 671 | ␉␉␉memcpy(default_HDAU_layout_id, new_HDAU_layout_id, HDAU_LEN);␊ |
| 672 | ␉␉␉verbose("Using user supplied HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",␊ |
| 673 | default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);␊ |
| 674 | ␉␉}␊ |
| 675 | ␉}␊ |
| 676 | ␉else␊ |
| 677 | ␉{␊ |
| 678 | ␉␉verbose("Using default HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",␊ |
| 679 | default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);␊ |
| 680 | ␉}␊ |
| 681 | ␊ |
| 682 | devprop_add_value(device, "layout-id", default_HDAU_layout_id, HDAU_LEN); /*FIX ME*/␊ |
| 683 | devprop_add_value(device, "@0,connector-type", connector_type_value, 4);␊ |
| 684 | devprop_add_value(device, "@1,connector-type", connector_type_value, 4);␊ |
| 685 | devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-2", 10);␊ |
| 686 | devprop_add_value(device, "built-in", &BuiltIn, 1);␊ |
| 687 | break;␊ |
| 688 | ␊ |
| 689 | ␉/*************************************************************************************************************␊ |
| 690 | ␉* The above case are intended as for HDAU (ATi) device onboard audio for GFX card with Audio controller HDMi␊ |
| 691 | ␉*************************************************************************************************************/␊ |
| 692 | ␉case HDA_ATI_SB450:␊ |
| 693 | ␉case HDA_ATI_SB600:␊ |
| 694 | ␉case HDA_ATI_RS600:␊ |
| 695 | ␉case HDA_ATI_RS690:␊ |
| 696 | ␉case HDA_ATI_RS780:␊ |
| 697 | ␉case HDA_ATI_R600:␊ |
| 698 | ␉case HDA_ATI_RV630:␊ |
| 699 | ␉case HDA_ATI_RV610:␊ |
| 700 | ␉case HDA_ATI_RV670:␊ |
| 701 | ␉case HDA_ATI_RV635:␊ |
| 702 | ␉case HDA_ATI_RV620:␊ |
| 703 | ␉case HDA_ATI_RV770:␊ |
| 704 | ␉case HDA_ATI_RV730:␊ |
| 705 | ␉case HDA_ATI_RV710:␊ |
| 706 | ␉case HDA_ATI_RV740:␊ |
| 707 | ␉case HDA_ATI_RV870:␊ |
| 708 | ␉case HDA_ATI_RV840:␊ |
| 709 | ␉case HDA_ATI_RV830:␊ |
| 710 | ␉case HDA_ATI_RV810:␊ |
| 711 | ␉case HDA_ATI_RV970:␊ |
| 712 | ␉case HDA_ATI_RV940:␊ |
| 713 | ␉case HDA_ATI_RV930:␊ |
| 714 | ␉case HDA_ATI_RV910:␊ |
| 715 | ␉case HDA_ATI_R1000:␊ |
| 716 | ␉case HDA_ATI_VERDE:␊ |
| 717 | ␊ |
| 718 | /* if the key value kHDAULayoutID as a value set that value, if not will assign a default layout */␊ |
| 719 | if (getValueForKey(kHDAULayoutID, &value, &len, &bootInfo->chameleonConfig) && len == HDAU_LEN * 2)␊ |
| 720 | {␊ |
| 721 | uint8_t new_HDAU_layout_id[HDAU_LEN];␊ |
| 722 | if (hex2bin(value, new_HDAU_layout_id, HDAU_LEN) == 0)␊ |
| 723 | {␊ |
| 724 | memcpy(default_HDAU_layout_id, new_HDAU_layout_id, HDAU_LEN);␊ |
| 725 | verbose("Using user supplied HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",␊ |
| 726 | default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);␊ |
| 727 | }␊ |
| 728 | ␉␉␉}␊ |
| 729 | ␉␉␉else␊ |
| 730 | ␉␉␉{␊ |
| 731 | ␉␉␉␉verbose("Using default HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",␊ |
| 732 | default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);␊ |
| 733 | }␊ |
| 734 | ␊ |
| 735 | devprop_add_value(device, "layout-id", default_HDAU_layout_id, HDAU_LEN); /*FIX ME*/␊ |
| 736 | devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-2", 10);␊ |
| 737 | devprop_add_value(device, "built-in", &BuiltIn, 1);␊ |
| 738 | break;␊ |
| 739 | ␊ |
| 740 | default:␊ |
| 741 | break;␊ |
| 742 | ␉}␊ |
| 743 | ␊ |
| 744 | ␉verbose("Class code: [%04x]\nModel name: %s [%04x:%04x] (rev %02x)\nSubsystem: [%04x:%04x]\n%s\ndevice number: %d\n",␊ |
| 745 | ␉hda_dev->class_id, controller_name, hda_dev->vendor_id, hda_dev->device_id, hda_dev->revision_id,␊ |
| 746 | ␉hda_dev->subsys_id.subsys.vendor_id, hda_dev->subsys_id.subsys.device_id, devicepath, devices_number);␊ |
| 747 | ␊ |
| 748 | ␉verbose("--------------------------------\n");␊ |
| 749 | ␊ |
| 750 | ␉stringdata = malloc(sizeof(uint8_t) * string->length);␊ |
| 751 | ␉memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);␊ |
| 752 | ␉stringlength = string->length;␊ |
| 753 | ␊ |
| 754 | ␉return true;␊ |
| 755 | }␊ |
| 756 | |
