Chameleon

Chameleon Svn Source Tree

Root/trunk/i386/libsaio/usb.c

1/*␊
2 * usb.c␊
3 * ␊
4 *␊
5 * Created by mackerintel on 12/20/08.␊
6 * Copyright 2008 mackerintel. All rights reserved.␊
7 *␊
8 */␊
9␊
10#include "libsaio.h"␊
11#include "boot.h"␊
12#include "bootstruct.h"␊
13#include "pci.h"␊
14␊
15#ifndef DEBUG_USB␊
16#define DEBUG_USB 0␊
17#endif␊
18␊
19#if DEBUG_USB␊
20#define DBG(x...)␉printf(x)␊
21#else␊
22#define DBG(x...)␊
23#endif␊
24␊
25␊
26struct pciList␊
27{␊
28␉pci_dt_t* pciDev;␊
29␉struct pciList* next;␊
30};␊
31␊
32struct pciList* usbList = NULL;␊
33␊
34static int legacy_off (pci_dt_t *pci_dev);␊
35static int ehci_acquire (pci_dt_t *pci_dev);␊
36static int uhci_reset (pci_dt_t *pci_dev);␊
37static int xhci_legacy_off(pci_dt_t *pci_dev);␊
38␊
39// Add usb device to the list␊
40void notify_usb_dev(pci_dt_t *pci_dev)␊
41{␊
42␉struct pciList* current = usbList;␊
43␉if(!usbList)␊
44␉{␊
45␉␉usbList = (struct pciList*)malloc(sizeof(struct pciList));␊
46␉␉usbList->next = NULL;␊
47␉␉usbList->pciDev = pci_dev;␊
48␉␉␊
49␉}␊
50␉else␊
51␉{␊
52␉␉while(current != NULL && current->next != NULL)␊
53␉␉{␊
54␉␉␉current = current->next;␊
55␉␉}␊
56␉␉current->next = (struct pciList*)malloc(sizeof(struct pciList));␊
57␉␉current = current->next;␊
58␉␉␊
59␉␉current->pciDev = pci_dev;␊
60␉␉current->next = NULL;␊
61␉}␊
62}␊
63␊
64// Loop through the list and call the apropriate patch function␊
65int usb_loop()␊
66{␊
67␉int retVal = 1;␊
68␉bool fix_xhci, fix_ehci, fix_uhci, fix_usb, fix_legacy;␊
69␉fix_xhci = fix_ehci = fix_uhci = fix_usb = fix_legacy = false;␊
70␉␊
71␉if (getBoolForKey(kUSBBusFix, &fix_usb, &bootInfo->chameleonConfig))␊
72␉{␊
73␉␉fix_xhci = fix_ehci = fix_uhci = fix_legacy = fix_usb;␉// Disable all if none set␊
74␉}␊
75␉else ␊
76␉{␊
77␉␉getBoolForKey(kXHCILegacyOff, &fix_xhci, &bootInfo->chameleonConfig);␊
78␉␉getBoolForKey(kEHCIacquire, &fix_ehci, &bootInfo->chameleonConfig);␊
79␉␉getBoolForKey(kUHCIreset, &fix_uhci, &bootInfo->chameleonConfig);␊
80␉␉getBoolForKey(kLegacyOff, &fix_legacy, &bootInfo->chameleonConfig);␊
81␉}␊
82␉␊
83␉struct pciList* current = usbList;␊
84␉␊
85␉while(current)␊
86␉{␊
87␉␉switch (pci_config_read8(current->pciDev->dev.addr, PCI_CLASS_PROG))␊
88␉␉{␊
89␉␉␉// XHCI␊
90␉␉␉case PCI_IF_XHCI:␊
91␉␉␉␉if(fix_xhci || fix_legacy) retVal &= xhci_legacy_off(current->pciDev);␊
92␉␉␉␉break;␊
93␊
94␉␉␉// EHCI␊
95␉␉␉case PCI_IF_EHCI:␊
96␉␉ ␉if(fix_ehci) retVal &= ehci_acquire(current->pciDev);␊
97␉␉ ␉if(fix_legacy) retVal &= legacy_off(current->pciDev);␊
98␉␉␉␉␊
99␉␉␉␉break;␊
100␉␉␉␉␊
101␉␉␉// UHCI␊
102␉␉␉case PCI_IF_UHCI:␊
103␉␉␉␉if (fix_uhci) retVal &= uhci_reset(current->pciDev);␊
104␊
105␉␉␉␉break;␊
106␉␉}␊
107␉␉␊
108␉␉current = current->next;␊
109␉}␊
110␉return retVal;␊
111}␊
112␊
113static int legacy_off (pci_dt_t *pci_dev)␊
114{␊
115␉// Set usb legacy off modification by Signal64␊
116␉// NOTE: This *must* be called after the last file is loaded from the drive in the event that we are booting form usb.␊
117␉// NOTE2: This should be called after any getc()/getchar() call. (aka, after the Wait=y keyworkd is used)␊
118␉// AKA: Make this run immediatly before the kernel is called␊
119␉uint32_t␉capaddr, opaddr; ␉␉␊
120␉uint8_t␉␉eecp;␉␉␉␊
121␉uint32_t␉usbcmd, usbsts, usbintr;␉␉␉␊
122␉uint32_t␉usblegsup, usblegctlsts;␉␉␊
123␉␊
124␉int isOSowned;␊
125␉int isBIOSowned;␊
126␉␊
127␉verbose("Setting Legacy USB Off on controller [%04x:%04x] at %02x:%2x.%x\n", ␊
128␉␉␉pci_dev->vendor_id, pci_dev->device_id,␊
129␉␉␉pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func);␊
130␉␊
131␉␊
132␉// capaddr = Capability Registers = dev.addr + offset stored in dev.addr + 0x10 (USBBASE)␊
133␉capaddr = pci_config_read32(pci_dev->dev.addr, 0x10);␉␊
134␉␊
135␉// opaddr = Operational Registers = capaddr + offset (8bit CAPLENGTH in Capability Registers + offset 0)␊
136␉opaddr = capaddr + *((unsigned char*)(capaddr)); ␉␉␊
137␉␊
138␉// eecp = EHCI Extended Capabilities offset = capaddr HCCPARAMS bits 15:8␊
139␉eecp=*((unsigned char*)(capaddr + 9));␊
140␉␊
141␉DBG("capaddr=%x opaddr=%x eecp=%x\n", capaddr, opaddr, eecp);␊
142␉␊
143␉usbcmd = *((unsigned int*)(opaddr));␉␉␉// Command Register␊
144␉usbsts = *((unsigned int*)(opaddr + 4));␉␉// Status Register␊
145␉usbintr = *((unsigned int*)(opaddr + 8));␉␉// Interrupt Enable Register␊
146␉␊
147␉DBG("usbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);␊
148␉␊
149␉// read PCI Config 32bit USBLEGSUP (eecp+0) ␊
150␉usblegsup = pci_config_read32(pci_dev->dev.addr, eecp);␊
151␉␊
152␉// informational only␊
153␉isBIOSowned = !!((usblegsup) & (1 << (16)));␊
154␉isOSowned = !!((usblegsup) & (1 << (24)));␊
155␉␊
156␉// read PCI Config 32bit USBLEGCTLSTS (eecp+4) ␊
157␉usblegctlsts = pci_config_read32(pci_dev->dev.addr, eecp + 4);␊
158␉␊
159␉DBG("usblegsup=%08x isOSowned=%d isBIOSowned=%d usblegctlsts=%08x\n", usblegsup, isOSowned, isBIOSowned, usblegctlsts);␊
160␉␊
161␉// Reset registers to Legacy OFF␊
162␉DBG("Clearing USBLEGCTLSTS\n");␊
163␉pci_config_write32(pci_dev->dev.addr, eecp + 4, 0);␉//usblegctlsts␊
164␉␊
165␉delay(100000);␊
166␉␊
167␉usbcmd = *((unsigned int*)(opaddr));␊
168␉usbsts = *((unsigned int*)(opaddr + 4));␊
169␉usbintr = *((unsigned int*)(opaddr + 8));␊
170␉␊
171␉DBG("usbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);␊
172␉␊
173␉DBG("Clearing Registers\n");␊
174␉␊
175␉// clear registers to default␊
176␉usbcmd = (usbcmd & 0xffffff00);␊
177␉*((unsigned int*)(opaddr)) = usbcmd;␊
178␉*((unsigned int*)(opaddr + 8)) = 0;␉␉␉␉␉//usbintr - clear interrupt registers␊
179␉*((unsigned int*)(opaddr + 4)) = 0x1000;␉␉␉//usbsts - clear status registers ␉␊
180␉pci_config_write32(pci_dev->dev.addr, eecp, 1);␉␉//usblegsup␊
181␉␊
182␉// get the results␊
183␉usbcmd = *((unsigned int*)(opaddr));␊
184␉usbsts = *((unsigned int*)(opaddr + 4));␊
185␉usbintr = *((unsigned int*)(opaddr + 8));␊
186␉␊
187␉DBG("usbcmd=%08x usbsts=%08x usbintr=%08x\n", usbcmd, usbsts, usbintr);␊
188␉␊
189␉// read 32bit USBLEGSUP (eecp+0) ␊
190␉usblegsup = pci_config_read32(pci_dev->dev.addr, eecp);␊
191␉␊
192␉// informational only␊
193␉isBIOSowned = !!((usblegsup) & (1 << (16)));␊
194␉isOSowned = !!((usblegsup) & (1 << (24)));␊
195␉␊
196␉// read 32bit USBLEGCTLSTS (eecp+4) ␊
197␉usblegctlsts = pci_config_read32(pci_dev->dev.addr, eecp + 4);␊
198␉␊
199␉DBG("usblegsup=%08x isOSowned=%d isBIOSowned=%d usblegctlsts=%08x\n", usblegsup, isOSowned, isBIOSowned, usblegctlsts);␊
200␉␊
201␉verbose("Legacy USB Off Done\n");␉␊
202␉return 1;␊
203}␊
204␊
205static int ehci_acquire (pci_dt_t *pci_dev)␊
206{␊
207␉int␉␉j, k;␊
208␉uint32_t␉base;␊
209␉uint8_t␉␉eecp;␊
210␉uint8_t␉␉legacy[8];␊
211␉bool␉␉isOwnershipConflict;␉␊
212␉bool␉␉alwaysHardBIOSReset;␊
213␊
214␉alwaysHardBIOSReset = false;␉␊
215␉if (!getBoolForKey(kEHCIhard, &alwaysHardBIOSReset, &bootInfo->chameleonConfig)) {␊
216␉␉alwaysHardBIOSReset = true;␊
217␉}␊
218␊
219␉pci_config_write16(pci_dev->dev.addr, 0x04, 0x0002);␊
220␉base = pci_config_read32(pci_dev->dev.addr, 0x10);␊
221␊
222␉verbose("EHCI controller [%04x:%04x] at %02x:%2x.%x DMA @%x\n", ␊
223␉␉pci_dev->vendor_id, pci_dev->device_id,␊
224␉␉pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func, ␊
225␉␉base);␊
226␊
227␉if (*((unsigned char*)base) < 0xc)␊
228␉{␊
229␉␉DBG("Config space too small: no legacy implementation\n");␊
230␉␉return 1;␊
231␉}␊
232␉eecp = *((unsigned char*)(base + 9));␊
233␉if (!eecp) {␊
234␉␉DBG("No extended capabilities: no legacy implementation\n");␊
235␉␉return 1;␊
236␉}␊
237␊
238␉DBG("eecp=%x\n",eecp);␊
239␊
240␉// bad way to do it␊
241␉// pci_conf_write(pci_dev->dev.addr, eecp, 4, 0x01000001);␊
242␉for (j = 0; j < 8; j++) {␊
243␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
244␉␉DBG("%02x ", legacy[j]);␊
245␉}␊
246␉DBG("\n");␊
247␊
248␉//Real Job: based on orByte's AppleUSBEHCI.cpp␊
249␉//We try soft reset first - some systems hang on reboot with hard reset␊
250␉// Definitely needed during reboot on 10.4.6␊
251␊
252␉isOwnershipConflict = (((legacy[3] & 1) != 0) && ((legacy[2] & 1) != 0));␊
253␉if (!alwaysHardBIOSReset && isOwnershipConflict) {␊
254␉␉DBG("EHCI - Ownership conflict - attempting soft reset ...\n");␊
255␉␉DBG("EHCI - toggle OS Ownership to 0\n");␊
256␉␉pci_config_write8(pci_dev->dev.addr, eecp + 3, 0);␊
257␉␉for (k = 0; k < 25; k++) {␊
258␉␉␉for (j = 0; j < 8; j++) {␊
259␉␉␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
260␉␉␉}␊
261␉␉␉if (legacy[3] == 0) {␊
262␉␉␉␉break;␊
263␉␉␉}␊
264␉␉␉delay(10);␊
265␉␉}␊
266␉}␉␊
267␊
268␉DBG("Found USBLEGSUP_ID - value %x:%x - writing OSOwned\n", legacy[3],legacy[2]);␊
269␉pci_config_write8(pci_dev->dev.addr, eecp + 3, 1);␊
270␊
271␉// wait for kEHCI_USBLEGSUP_BIOSOwned bit to clear␊
272␉for (k = 0; k < 25; k++) {␊
273␉␉for (j = 0;j < 8; j++) {␊
274␉␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
275␉␉}␊
276␉␉DBG ("%x:%x,",legacy[3],legacy[2]);␊
277␉␉if (legacy[2] == 0) {␊
278␉␉␉break;␊
279␉␉}␊
280␉␉delay(10);␊
281␉}␊
282␊
283␉for (j = 0;j < 8; j++) {␊
284␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
285␉}␊
286␉isOwnershipConflict = ((legacy[2]) != 0);␊
287␉if (isOwnershipConflict) {␊
288␉␉// Soft reset has failed. Assume SMI being ignored␊
289␉␉// Hard reset␊
290␉␉// Force Clear BIOS BIT␊
291␉␉DBG("EHCI - Ownership conflict - attempting hard reset ...\n");␉␉␉␊
292␉␉DBG ("%x:%x\n",legacy[3],legacy[2]);␊
293␉␉DBG("EHCI - Force BIOS Ownership to 0\n");␊
294␊
295␉␉pci_config_write8(pci_dev->dev.addr, eecp + 2, 0);␊
296␉␉for (k = 0; k < 25; k++) {␊
297␉␉␉for (j = 0; j < 8; j++) {␊
298␉␉␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
299␉␉␉}␊
300␉␉␉DBG ("%x:%x,",legacy[3],legacy[2]);␊
301␊
302␉␉␉if ((legacy[2]) == 0) {␊
303␉␉␉␉break;␊
304␉␉␉}␊
305␉␉␉delay(10);␉␊
306␉␉}␉␉␊
307␉␉// Disable further SMI events␊
308␉␉for (j = 4; j < 8; j++) {␊
309␉␉␉pci_config_write8(pci_dev->dev.addr, eecp + j, 0);␊
310␉␉}␊
311␉}␊
312␊
313␉for (j = 0; j < 8; j++) {␊
314␉␉legacy[j] = pci_config_read8(pci_dev->dev.addr, eecp + j);␊
315␉}␊
316␊
317␉DBG ("%x:%x\n",legacy[3],legacy[2]);␊
318␊
319␉// Final Ownership Resolution Check...␊
320␉if (legacy[2] & 1) {␉␉␉␉␉␊
321␉␉DBG("EHCI controller unable to take control from BIOS\n");␊
322␉␉return 0;␊
323␉}␊
324␊
325␉DBG("EHCI Acquire OS Ownership done\n");␉␊
326␉return 1;␊
327}␊
328␊
329static int uhci_reset (pci_dt_t *pci_dev)␊
330{␊
331␉uint32_t base, port_base;␊
332␉␊
333␉base = pci_config_read32(pci_dev->dev.addr, 0x20);␊
334␉port_base = (base >> 5) & 0x07ff;␊
335␊
336␉verbose("UHCI controller [%04x:%04x] at %02x:%2x.%x base %x(%x)\n", ␊
337␉␉pci_dev->vendor_id, pci_dev->device_id,␊
338␉␉pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func, ␊
339␉␉port_base, base);␊
340␉␊
341␉pci_config_write16(pci_dev->dev.addr, 0xc0, 0x8f00);␊
342␊
343␉outw (port_base, 0x0002);␊
344␉delay(10);␊
345␉outw (port_base+4,0);␊
346␉delay(10);␊
347␉outw (port_base,0);␊
348␉return 1;␊
349}␊
350␊
351static int xhci_legacy_off(pci_dt_t *pci_dev)␊
352{␊
353␉uint32_t bar0, hccparams1, extendCap, value;␊
354␉int32_t timeOut;␊
355␊
356␉verbose("Setting Legacy USB Off on xHC [%04x:%04x] at %02x:%2x.%x\n",␊
357␉␉␉pci_dev->vendor_id, pci_dev->device_id,␊
358␉␉␉pci_dev->dev.bits.bus, pci_dev->dev.bits.dev, pci_dev->dev.bits.func);␊
359␊
360␉bar0 = pci_config_read32(pci_dev->dev.addr, 16);␊
361␉/*␊
362␉ * Check if memory bar␊
363␉ */␊
364␉if (bar0 & 1)␊
365␉{␊
366␉␉DBG("%s: BAR0 not a memory range\n", __FUNCTION__);␊
367␉␉return 0;␊
368␉}␊
369␉/*␊
370␉ * Check if outside 32-bit physical address space␊
371␉ */␊
372␉if (((bar0 & 6) == 4) &&␊
373␉␉pci_config_read32(pci_dev->dev.addr, 20))␊
374␉{␊
375␉␉DBG("%s: BAR0 outside 32-bit physical address space\n", __FUNCTION__);␊
376␉␉return 0;␊
377␉}␊
378␉bar0 &= ~15;␊
379␊
380␉hccparams1 = *(uint32_t const volatile*) (bar0 + 16);␊
381␉if (hccparams1 == ~0)␊
382␉{␊
383␉␉DBG("%s: hccparams1 invalid 0x%x\n", __FUNCTION__, hccparams1);␊
384␉␉return 0;␊
385␉}␊
386␉extendCap = (hccparams1 >> 14) & 0x3fffc;␊
387␉while (extendCap) {␊
388␉␉value = *(uint32_t const volatile*) (bar0 + extendCap);␊
389␉␉if (value == ~0)␊
390␉␉{␊
391␉␉␉break;␊
392␉␉}␊
393␉␉if ((value & 0xff) == 1) {␊
394#if DEBUG_USB␊
395␉␉␉verbose("%s: Found USBLEGSUP 0x%x, USBLEGCTLSTS 0x%x\n", __FUNCTION__,␊
396␉␉␉␉␉value, *(uint32_t const volatile*) (bar0 + extendCap + 4));␊
397#endif␊
398␉␉␉value |= (1 << 24);␊
399␉␉␉*(uint32_t volatile*) (bar0 + extendCap) = value;␊
400␉␉␉timeOut = 40;␊
401␉␉␉while (timeOut--)␊
402␉␉␉{␊
403␉␉␉␉delay(500);␊
404␉␉␉␉value = *(uint32_t const volatile*) (bar0 + extendCap);␊
405␉␉␉␉if (value == ~0)␊
406␉␉␉␉{␊
407␉␉␉␉␉timeOut = -1;␊
408␉␉␉␉␉break;␊
409␉␉␉␉}␊
410␉␉␉␉if ((value & 0x01010000) == 0x01000000)␊
411␉␉␉␉{␊
412␉␉␉␉␉timeOut = -1;␉/* Optional - always disable the SMI */␊
413␉␉␉␉␉break;␊
414␉␉␉␉}␊
415␉␉␉}␊
416#if DEBUG_USB␊
417␉␉␉verbose("%s: USBLEGSUP 0x%x, USBLEGCTLSTS 0x%x\n", __FUNCTION__,␊
418␉␉␉␉␉value, *(uint32_t const volatile*) (bar0 + extendCap + 4));␊
419#endif␊
420␉␉␉if (timeOut >= 0)␊
421␉␉␉{␊
422␉␉␉␉break;␊
423␉␉␉}␊
424␉␉␉/*␊
425␉␉␉ * Disable the SMI in USBLEGCTLSTS if BIOS doesn't respond␊
426␉␉␉ */␊
427␉␉␉value = *(uint32_t const volatile*) (bar0 + extendCap + 4);␊
428␉␉␉if (value == ~0)␊
429␉␉␉{␊
430␉␉␉␉break;␊
431␉␉␉}␊
432␉␉␉value &= 0x1f1fee;␊
433␉␉␉value |= 0xe0000000;␊
434␉␉␉*(uint32_t volatile*) (bar0 + extendCap + 4) = value;␊
435␉␉␉break;␊
436␉␉}␊
437␉␉if (!(value & 0xff00))␊
438␉␉␉break;␊
439␉␉extendCap += ((value >> 6) & 0x3fc);␊
440␉}␊
441␉verbose("XHCI Legacy Off Done\n");␊
442␉return 1;␊
443}␊
444

Archive Download this file

Revision: 2571