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1/*
2 * Copyright 2013 Intel Corporation
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial portions
15 * of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 */
25
26/*
27 Original patch by Nawcom
28 http://forum.voodooprojects.org/index.php/topic,1029.0.html
29
30 Original Intel HDx000 code from valv
31 Intel HD4xx and HD5xx code by ErmaC http://www.insanelymac.com/forum/topic/288241-intel-hd4000-inject-aaplig-platform-id/
32 */
33
34#ifndef __LIBSAIO_GMA_H
35#define __LIBSAIO_GMA_H
36
37bool setup_gma_devprop(pci_dt_t *gma_dev);
38
39struct intel_gfx_info_t;
40typedef struct{
41 uint32_tmodel;
42char*label_info;
43}intel_gfx_info_t;
44
45#define REG8(reg)((volatile uint8_t *)regs)[(reg)]
46#define REG16(reg)((volatile uint16_t *)regs)[(reg) >> 1]
47#define REG32(reg)((volatile uint32_t *)regs)[(reg) >> 2]
48
49/****************************************************************************
50 * Miscellanious defines
51 ****************************************************************************/
52
53/* Intel gfx Controller models */
54#define GFX_MODEL_CONSTRUCT(vendor, model) (((uint32_t)(model) << 16) | ((vendor##_VENDORID) & 0xffff))
55
56/* Intel */
57#define INTEL_NAME "Intel"
58#define HD_GRAPHICS "HD Graphics"
59#define HD_GRAPHICS_2000 "HD Graphics 2000"
60#define HD_GRAPHICS_2500 "HD Graphics 2500"
61#define HD_GRAPHICS_3000 "HD Graphics 3000"
62#define HD_GRAPHICS_4000 "HD Graphics 4000"
63#define HD_GRAPHICS_4200 "HD Graphics 4200"
64#define HD_GRAPHICS_4400 "HD Graphics 4400"
65#define HD_GRAPHICS_4600 "HD Graphics 4600"
66#define HD_GRAPHICS_5000 "HD Graphics 5000"
67#define IRIS_5100 "Iris(TM) Graphics 5100"
68#define IRIS_5200 "Iris(TM) Pro Graphics 5200"
69#define HD_GRAPHICS_5300 "HD Graphics 5300"
70#define HD_GRAPHICS_5500 "HD Graphics 5500"
71#define HD_GRAPHICS_5600 "HD Graphics 5600"
72#define HD_GRAPHICS_6000 "HD Graphics 6000"
73#define IRIS_6100 "Iris graphics 6100"
74#define IRIS_6200 "Iris Pro Graphics 6200"
75#define IRIS_6300 "Iris Pro Graphics P6300"
76#define INTEL_VENDORID0x8086
77
78/* http://cgit.freedesktop.org/xorg/driver/xf86-video-intel/tree/src/intel_driver.h */
79/* http://people.redhat.com/agk/patches/linux/patches-3.6/git-update1.patch */
80
81#define GMA_I810 GFX_MODEL_CONSTRUCT(INTEL, 0x7121)
82#define GMA_I810_DC100 GFX_MODEL_CONSTRUCT(INTEL, 0x7123)
83#define GMA_I810_E GFX_MODEL_CONSTRUCT(INTEL, 0x7125)
84#define GMA_I815 GFX_MODEL_CONSTRUCT(INTEL, 0x1132)
85/* ==================================== */
86
87#define GMA_I830_M GFX_MODEL_CONSTRUCT(INTEL, 0x3577)
88#define GMA_845_G GFX_MODEL_CONSTRUCT(INTEL, 0x2562)
89#define GMA_I854 GFX_MODEL_CONSTRUCT(INTEL, 0x358E)
90#define GMA_I855_GM GFX_MODEL_CONSTRUCT(INTEL, 0x3582)
91#define GMA_I865_G GFX_MODEL_CONSTRUCT(INTEL, 0x2572)
92/* ==================================== */
93
94#define GMA_I915_G GFX_MODEL_CONSTRUCT(INTEL, 0x2582) // GMA 915
95#define GMA_I915_GM GFX_MODEL_CONSTRUCT(INTEL, 0x2592) // GMA 915
96#define GMA_E7221_G GFX_MODEL_CONSTRUCT(INTEL, 0x258A)
97#define GMA_I945_G GFX_MODEL_CONSTRUCT(INTEL, 0x2772) // Desktop GMA950
98//#define GMA_82945G GFX_MODEL_CONSTRUCT(INTEL, 0x2776) // Desktop GMA950
99//#define GMA_82915G GFX_MODEL_CONSTRUCT(INTEL, 0x2782) // GMA 915
100//#define GMA_038000 GFX_MODEL_CONSTRUCT(INTEL, 0x2792) // Mobile GMA915
101#define GMA_I945_GM GFX_MODEL_CONSTRUCT(INTEL, 0x27A2) // Mobile GMA950
102#define GMA_I945_GME GFX_MODEL_CONSTRUCT(INTEL, 0x27AE) // Mobile GMA950
103//#define GMA_945GM GFX_MODEL_CONSTRUCT(INTEL, 0x27A6) // Mobile GMA950
104//#define GMA_PINEVIEW_M_HB GFX_MODEL_CONSTRUCT(INTEL, 0xA010)
105#define GMA_PINEVIEW_M GFX_MODEL_CONSTRUCT(INTEL, 0xA011) // Mobile GMA3150
106#define GMA_GMA3150_M GFX_MODEL_CONSTRUCT(INTEL, 0xA012) // Mobile GMA3150
107//#define GMA_PINEVIEW_HB GFX_MODEL_CONSTRUCT(INTEL, 0xA000)
108#define GMA_PINEVIEW_G GFX_MODEL_CONSTRUCT(INTEL, 0xA001) // Mobile GMA3150
109#define GMA_GMA3150_D GFX_MODEL_CONSTRUCT(INTEL, 0xA002) // Desktop GMA3150
110#define GMA_Q35_G GFX_MODEL_CONSTRUCT(INTEL, 0x29B2)
111#define GMA_G33_G GFX_MODEL_CONSTRUCT(INTEL, 0x29C2) // Desktop GMA3100
112// 29C3 // Desktop GMA3100
113#define GMA_Q33_G GFX_MODEL_CONSTRUCT(INTEL, 0x29D2)
114/* ==================================== */
115
116#define GMA_G35_G GFX_MODEL_CONSTRUCT(INTEL, 0x2982)
117#define GMA_I965_Q GFX_MODEL_CONSTRUCT(INTEL, 0x2992)
118#define GMA_I965_G GFX_MODEL_CONSTRUCT(INTEL, 0x29A2)
119#define GMA_I946_GZ GFX_MODEL_CONSTRUCT(INTEL, 0x2972)
120#define GMA_I965_GM GFX_MODEL_CONSTRUCT(INTEL, 0x2A02) // GMAX3100
121#define GMA_I965_GME GFX_MODEL_CONSTRUCT(INTEL, 0x2A12) // GMAX3100
122#define GMA_GM45_GM GFX_MODEL_CONSTRUCT(INTEL, 0x2A42) // GMAX3100
123//#define GMA_GM45_GM2 GFX_MODEL_CONSTRUCT(INTEL, 0x2A43) // GMAX3100
124#define GMA_G45_E_G GFX_MODEL_CONSTRUCT(INTEL, 0x2E02)
125#define GMA_G45_G GFX_MODEL_CONSTRUCT(INTEL, 0x2E22)
126#define GMA_Q45_G GFX_MODEL_CONSTRUCT(INTEL, 0x2E12)
127#define GMA_G41_G GFX_MODEL_CONSTRUCT(INTEL, 0x2E32)
128#define GMA_B43_G GFX_MODEL_CONSTRUCT(INTEL, 0x2E42)
129#define GMA_B43_G1 GFX_MODEL_CONSTRUCT(INTEL, 0x2E92)
130
131#define GMA_IRONLAKE_D_G GFX_MODEL_CONSTRUCT(INTEL, 0x0042) // HD2000
132#define GMA_IRONLAKE_M_G GFX_MODEL_CONSTRUCT(INTEL, 0x0046) // HD2000
133/*
134#define GMA_IRONLAKE_D_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0040)
135#define GMA_IRONLAKE_D2_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0069)
136#define GMA_IRONLAKE_M_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0044)
137#define GMA_IRONLAKE_MA_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0062)
138#define GMA_IRONLAKE_MC2_HB GFX_MODEL_CONSTRUCT(INTEL, 0x006a)
139*/
140// 004A // HD2000
141/* ==================================== */
142
143/* ========== Sandy Bridge ============ */
144//#define GMA_SANDYBRIDGE_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0100) /* Desktop */
145#define GMA_SANDYBRIDGE_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0102) // HD Graphics 2000
146//#define GMA_SANDYBRIDGE_M_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0104) /* Mobile */
147#define GMA_SANDYBRIDGE_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0112) // HD Graphics 3000
148#define GMA_SANDYBRIDGE_GT2_PLUSGFX_MODEL_CONSTRUCT(INTEL, 0x0122) // HD Graphics 3000
149#define GMA_SANDYBRIDGE_M_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0106) // HD Graphics 2000 Mobile
150#define GMA_SANDYBRIDGE_M_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0116) // HD Graphics 3000 Mobile
151#define GMA_SANDYBRIDGE_M_GT2_PLUSGFX_MODEL_CONSTRUCT(INTEL, 0x0126) // HD Graphics 3000 Mobile
152//#define GMA_SANDYBRIDGE_S_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0108) /* Server */
153#define GMA_SANDYBRIDGE_S_GT GFX_MODEL_CONSTRUCT(INTEL, 0x010A) // HD Graphics
154// 010B // ??
155// 010E // ??
156/* ==================================== */
157
158/* ========== Ivy Bridge ============== */
159//#define GMA_IVYBRIDGE_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0150) /* Desktop */
160//#define GMA_IVYBRIDGE_M_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0154) /* Mobile */
161#define GMA_IVYBRIDGE_M_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0156) // HD Graphics 2500 Mobile
162#define GMA_IVYBRIDGE_M_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0166) // HD Graphics 4000 Mobile
163#define GMA_IVYBRIDGE_D_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0152) // HD Graphics 2500
164#define GMA_IVYBRIDGE_D_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0162) // HD Graphics 4000
165//#define GMA_IVYBRIDGE_S_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0158) /* Server */
166#define GMA_IVYBRIDGE_S_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x015A) // HD Graphics 4000
167#define GMA_IVYBRIDGE_S_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x016A) // HD Graphics P4000
168#define GMA_IVYBRIDGE_S_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x015E) // Xeon E3-1200 v2/3rd Gen Core processor Graphics Controller
169#define GMA_IVYBRIDGE_S_GT4 GFX_MODEL_CONSTRUCT(INTEL, 0x0172) // HD Graphics 2500 Mobile // Xeon E3-1200 v2/3rd Gen Core processor Graphics Controller
170#define GMA_IVYBRIDGE_S_GT5 GFX_MODEL_CONSTRUCT(INTEL, 0x0176) // HD Graphics 2500 Mobile // 3rd Gen Core processor Graphics Controller
171/* ==================================== */
172
173/* ====== Valleyview (Baytail) ======= */
174
175//#define GMA_VALLEYVIEW_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0F00) /* VLV1 */
176//#define GMA_VALLEYVIEW_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0F30) /* "HD Graphics" */
177//#define GMA_VALLEYVIEW_?? GFX_MODEL_CONSTRUCT(INTEL, 0x0F31) /* "HD Graphics" */
178//#define GMA_VALLEYVIEW_?? GFX_MODEL_CONSTRUCT(INTEL, 0x0F32) /* "HD Graphics" */
179//#define GMA_VALLEYVIEW_?? GFX_MODEL_CONSTRUCT(INTEL, 0x0F33) /* "HD Graphics" */
180//#define GMA_VALLEYVIEW_?? GFX_MODEL_CONSTRUCT(INTEL, 0x0155) /* "HD Graphics" */
181//#define GMA_VALLEYVIEW_?? GFX_MODEL_CONSTRUCT(INTEL, 0x0157) /* "HD Graphics" */
182/* ==================================== */
183
184/* ============ Haswell =============== */
185// 0090 // AppleIntelHD5000Graphics.kext
186// 0091 // AppleIntelHD5000Graphics.kext
187// 0092 // AppleIntelHD5000Graphics.kext
188//#define GMA_HASWELL_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0400) /* Desktop */
189#define GMA_HASWELL_D_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0402) // GT1 Desktop
190#define GMA_HASWELL_D_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0412) // Haswell GT2 Desktop
191#define GMA_HASWELL_D_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0422) // GT3 Desktop
192//#define GMA_HASWELL_M_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0404) /* Mobile */
193#define GMA_HASWELL_M_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0406) // Haswell Mobile GT1
194#define GMA_HASWELL_M_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0416) // Haswell Mobile GT2
195#define GMA_HASWELL_M_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0426) // Haswell Mobile GT3
196#define GMA_HASWELL_S_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x040A) // Intel(R) HD Graphics
197//#define GMA_HASWELL_S_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0408) /* Server */
198#define GMA_HASWELL_S_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x041A) // Intel(R) HD Graphics P4600/P4700
199#define GMA_HASWELL_S_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x042A) // GT3 Server
200#define GMA_HASWELL_B_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x040B)
201#define GMA_HASWELL_B_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x041B)
202#define GMA_HASWELL_B_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x042B)
203#define GMA_HASWELL_E_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x040E)
204#define GMA_HASWELL_E_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x041E)
205#define GMA_HASWELL_E_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x042E)
206
207#define GMA_HASWELL_ULT_D_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0A02)
208#define GMA_HASWELL_ULT_D_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0A12)
209#define GMA_HASWELL_ULT_D_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0A22) //
210#define GMA_HASWELL_ULT_M_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0A06) // GT1 ULT
211#define GMA_HASWELL_ULT_M_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0A16) // Haswell ULT Mobile GT2
212#define GMA_HASWELL_ULT_M_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0A26) // Haswell ULT Mobile GT3 - Intel(R) HD Graphics 5000
213#define GMA_HASWELL_ULT_S_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0A0A)
214#define GMA_HASWELL_ULT_S_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0A1A)
215#define GMA_HASWELL_ULT_S_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0A2A)
216#define GMA_HASWELL_ULT_B_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0A0B)
217#define GMA_HASWELL_ULT_B_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0A1B)
218#define GMA_HASWELL_ULT_B_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0A2B)
219#define GMA_HASWELL_ULT_E_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0A0E) // Intel(R) HD Graphics
220#define GMA_HASWELL_ULT_E_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0A1E) // Intel(R) HD Graphics 4400
221#define GMA_HASWELL_ULT_E_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0A2E) // Haswell ULT E GT3
222
223#define GMA_HASWELL_SDV_D_GT1_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0C02)
224//#define GMA_HASWELL_E_HB GFX_MODEL_CONSTRUCT(INTEL, 0x0C04) // DRAM Controller
225#define GMA_HASWELL_SDV_M_GT1_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0C06) // Haswell SDV Mobile GT1
226#define GMA_HASWELL_SDV_D_GT2_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0C12)
227#define GMA_HASWELL_SDV_M_GT2_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0C16) // Haswell SDV Mobile GT2
228#define GMA_HASWELL_SDV_D_GT2_PLUS_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0C22) // Haswell HD Graphics - GTH
229#define GMA_HASWELL_SDV_M_GT2_PLUS_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0C26) // Haswell SDV Mobile GT3
230//#define GMA_HASWELL_SDV_S_GT1_IGGFX_MODEL_CONSTRUCT(INTEL, 0x0C0A)
231//#define GMA_HASWELL_SDV_S_GT2_IGGFX_MODEL_CONSTRUCT(INTEL, 0x0C1A)
232//#define GMA_HASWELL_SDV_S_GT2_PLUS_IGGFX_MODEL_CONSTRUCT(INTEL, 0x0C2A)
233
234#define GMA_HASWELL_CRW_D_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0D02)
235#define GMA_HASWELL_CRW_D_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0D12) // Intel(R) HD Graphics 5200 Drivers
236#define GMA_HASWELL_CRW_D_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0D22) // Haswell CRW GT3 - Intel(R) Iris(TM) Pro Graphics 5200
237//#define GMA_HASWELL_CRW_D_GT2_PLUS_IGGFX_MODEL_CONSTRUCT(INTEL, 0x0D32)
238#define GMA_HASWELL_CRW_M_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0D06) // Intel(R) HD Graphics 5200
239#define GMA_HASWELL_CRW_M_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0D16) // Intel(R) HD Graphics 5200
240#define GMA_HASWELL_CRW_M_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0D26) // Haswell CRW Mobile GT3 - Intel(R) Iris(TM) Pro Graphics 5200 Drivers
241#define GMA_HASWELL_CRW_S_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0D0A)
242#define GMA_HASWELL_CRW_S_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0D1A)
243#define GMA_HASWELL_CRW_S_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0D2A)
244#define GMA_HASWELL_CRW_B_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0D0B)
245#define GMA_HASWELL_CRW_B_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0D1B)
246#define GMA_HASWELL_CRW_B_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0D2B)
247#define GMA_HASWELL_CRW_E_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x0D0E)
248#define GMA_HASWELL_CRW_E_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x0D1E)
249#define GMA_HASWELL_CRW_E_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x0D2E)
250#define GMA_HASWELL_CRW_M_GT2_PLUS_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0D36) // Crystal Well Integrated Graphics Controller
251#define GMA_HASWELL_CRW_S_GT2_PLUS_IG GFX_MODEL_CONSTRUCT(INTEL, 0x0D3A)
252
253/* Brodwell */
254#define GMA_BRODWELL_BDW_1602 GFX_MODEL_CONSTRUCT(INTEL, 0x1602) // Intel(R) HD Graphics Drivers
255#define GMA_BRODWELL_BDW_U_GT1 GFX_MODEL_CONSTRUCT(INTEL, 0x1606) // BDW U GT1
256#define GMA_BRODWELL_BDW_160A GFX_MODEL_CONSTRUCT(INTEL, 0x160A) // Broadwell-U Integrated Graphics
257#define GMA_BRODWELL_BDW_160B GFX_MODEL_CONSTRUCT(INTEL, 0x160B) // Broadwell-U Integrated Graphics
258#define GMA_BRODWELL_BDW_160D GFX_MODEL_CONSTRUCT(INTEL, 0x160D) // Broadwell-U Integrated Graphics
259#define GMA_BRODWELL_BDW_160E GFX_MODEL_CONSTRUCT(INTEL, 0x160E) // Intel(R) HD Graphics Drivers
260#define GMA_BRODWELL_BDW_1612 GFX_MODEL_CONSTRUCT(INTEL, 0x1612) // Intel(R) HD Graphics 5600 Drivers
261#define GMA_BRODWELL_BDW_U_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x1616) // BDW U GT2 Intel(R) HD Graphics 5500 Drivers
262#define GMA_BRODWELL_BDW_161B GFX_MODEL_CONSTRUCT(INTEL, 0x161B) // Broadwell-U Integrated Graphics
263#define GMA_BRODWELL_BDW_161A GFX_MODEL_CONSTRUCT(INTEL, 0x161A) // Broadwell-U Integrated Graphics
264#define GMA_BRODWELL_BDW_161D GFX_MODEL_CONSTRUCT(INTEL, 0x161D) // Broadwell-U Integrated Graphics
265#define GMA_BRODWELL_BDW_Y_GT2 GFX_MODEL_CONSTRUCT(INTEL, 0x161E) // BDW Y GT2 Intel(R) HD Graphics 5300 Drivers
266#define GMA_BRODWELL_BDW_1622 GFX_MODEL_CONSTRUCT(INTEL, 0x1622) // Intel(R) Iris(TM) Pro Graphics 6200 Drivers
267#define GMA_BRODWELL_BDW_162A GFX_MODEL_CONSTRUCT(INTEL, 0x162A) // Intel(R) Iris(TM) Pro Graphics 6300P Drivers
268#define GMA_BRODWELL_BDW_U_GT3 GFX_MODEL_CONSTRUCT(INTEL, 0x1626) // BDW U GT3 15W Intel(R) HD Graphics 6000 Drivers
269#define GMA_BRODWELL_BDW_U_GT3_2 GFX_MODEL_CONSTRUCT(INTEL, 0x162B) // BDW U GT3 28W Intel(R) Iris(TM) Pro Graphics 6100 Drivers
270#define GMA_BRODWELL_BDW_162D GFX_MODEL_CONSTRUCT(INTEL, 0x162D) // Intel(R) Iris(TM) Pro Graphics 6300P Drivers
271#define GMA_BRODWELL_BDW_162E GFX_MODEL_CONSTRUCT(INTEL, 0x162E) // Broadwell-U Integrated Graphics
272#define GMA_BRODWELL_BDW_1632 GFX_MODEL_CONSTRUCT(INTEL, 0x1632) // Broadwell-U Integrated Graphics
273#define GMA_BRODWELL_BDW_1636 GFX_MODEL_CONSTRUCT(INTEL, 0x1636) // Broadwell-U Integrated Graphics
274#define GMA_BRODWELL_BDW_163A GFX_MODEL_CONSTRUCT(INTEL, 0x163A) // Broadwell-U Integrated Graphics
275#define GMA_BRODWELL_BDW_163B GFX_MODEL_CONSTRUCT(INTEL, 0x163B) // Broadwell-U Integrated Graphics
276#define GMA_BRODWELL_BDW_163D GFX_MODEL_CONSTRUCT(INTEL, 0x163D) // Broadwell-U Integrated Graphics
277#define GMA_BRODWELL_BDW_163E GFX_MODEL_CONSTRUCT(INTEL, 0x163E) // Broadwell-U Integrated Graphics
278
279/*
280https://fossies.org/linux/MesaLib/include/pci_ids/i965_pci_ids.h
281CHIPSET(0x1602, bdw_gt1, "Intel(R) Broadwell GT1")
282CHIPSET(0x1606, bdw_gt1, "Intel(R) Broadwell GT1")
283CHIPSET(0x160A, bdw_gt1, "Intel(R) Broadwell GT1")
284CHIPSET(0x160B, bdw_gt1, "Intel(R) Broadwell GT1")
285CHIPSET(0x160D, bdw_gt1, "Intel(R) Broadwell GT1")
286CHIPSET(0x160E, bdw_gt1, "Intel(R) Broadwell GT1")
287
288CHIPSET(0x1612, bdw_gt2, "Intel(R) HD Graphics 5600 (Broadwell GT2)")
289CHIPSET(0x1616, bdw_gt2, "Intel(R) HD Graphics 5500 (Broadwell GT2)")
290CHIPSET(0x161A, bdw_gt2, "Intel(R) Broadwell GT2")
291CHIPSET(0x161B, bdw_gt2, "Intel(R) Broadwell GT2")
292CHIPSET(0x161D, bdw_gt2, "Intel(R) Broadwell GT2")
293CHIPSET(0x161E, bdw_gt2, "Intel(R) HD Graphics 5300 (Broadwell GT2)")
294
295CHIPSET(0x1622, bdw_gt3, "Intel(R) Iris Pro 6200 (Broadwell GT3e)")
296CHIPSET(0x1626, bdw_gt3, "Intel(R) HD Graphics 6000 (Broadwell GT3)")
297CHIPSET(0x162A, bdw_gt3, "Intel(R) Iris Pro P6300 (Broadwell GT3e)")
298CHIPSET(0x162B, bdw_gt3, "Intel(R) Iris 6100 (Broadwell GT3)")
299CHIPSET(0x162D, bdw_gt3, "Intel(R) Broadwell GT3")
300CHIPSET(0x162E, bdw_gt3, "Intel(R) Broadwell GT3")
301*/
302// 0x0bd0Intel Broadwell HD Graphics HAS GT0 Drivers
303// 0x0bd1Intel Broadwell HD Graphics HAS GT1 Drivers
304// 0x0bd2Intel Broadwell HD Graphics HAS GT2 Drivers
305// 0x0bd3Intel Broadwell HD Graphics HAS GT3 Drivers
306// 0x0bd4Intel Broadwell HD Graphics HAS GT4 Drivers
307
308/* END */
309
310#endif /* !__LIBSAIO_GMA_H */
311

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