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Root/tags/2.3/i386/include/mach/i386/fp_reg.h

Source at commit 2862 created 7 years 25 days ago.
By ifabio, Tag 2.3 release, bump svn to 2.4
1/*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28/*
29 * @OSF_COPYRIGHT@
30 */
31/*
32 * Mach Operating System
33 * Copyright (c) 1992-1989 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
49 * School of Computer Science
50 * Carnegie Mellon University
51 * Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56/*
57 */
58
59#ifndef_I386_FP_SAVE_H_
60#define_I386_FP_SAVE_H_
61
62
63/* note when allocating this data structure, it must be 16 byte aligned. */
64struct x86_fx_save {
65 unsigned short fx_control; /* control */
66 unsigned short fx_status; /* status */
67 unsigned char fx_tag; /* register tags */
68 unsigned charfx_bbz1;/* better be zero when calling fxrtstor */
69 unsigned short fx_opcode;
70 unsigned int fx_eip; /* eip instruction */
71 unsigned short fx_cs; /* cs instruction */
72 unsigned short fx_bbz2;/* better be zero when calling fxrtstor */
73 unsigned int fx_dp; /* data address */
74 unsigned short fx_ds; /* data segment */
75 unsigned short fx_bbz3;/* better be zero when calling fxrtstor */
76 unsigned int fx_MXCSR;
77 unsigned int fx_MXCSR_MASK;
78 unsigned short fx_reg_word[8][8]; /* STx/MMx registers */
79 unsigned short fx_XMM_reg[8][16];/* XMM0-XMM15 on 64 bit processors */
80 /* XMM0-XMM7 on 32 bit processors... unused storage reserved */
81 unsigned char fx_reserved[16*6];/* reserved by intel for future expansion */
82};
83
84
85/*
86 * Control register
87 */
88#defineFPC_IE0x0001/* enable invalid operation
89 exception */
90#define FPC_IMFPC_IE
91#defineFPC_DE0x0002/* enable denormalized operation
92 exception */
93#define FPC_DMFPC_DE
94#defineFPC_ZE0x0004/* enable zero-divide exception */
95#define FPC_ZMFPC_ZE
96#defineFPC_OE0x0008/* enable overflow exception */
97#define FPC_OMFPC_OE
98#defineFPC_UE0x0010/* enable underflow exception */
99#defineFPC_PE0x0020/* enable precision exception */
100#defineFPC_PC0x0300/* precision control: */
101#defineFPC_PC_240x0000/* 24 bits */
102#defineFPC_PC_530x0200/* 53 bits */
103#defineFPC_PC_640x0300/* 64 bits */
104#defineFPC_RC0x0c00/* rounding control: */
105#defineFPC_RC_RN0x0000/* round to nearest or even */
106#defineFPC_RC_RD0x0400/* round down */
107#defineFPC_RC_RU0x0800/* round up */
108#defineFPC_RC_CHOP0x0c00/* chop */
109#defineFPC_IC0x1000/* infinity control (obsolete) */
110#defineFPC_IC_PROJ0x0000/* projective infinity */
111#defineFPC_IC_AFF0x1000/* affine infinity (std) */
112
113/*
114 * Status register
115 */
116#defineFPS_IE0x0001/* invalid operation */
117#defineFPS_DE0x0002/* denormalized operand */
118#defineFPS_ZE0x0004/* divide by zero */
119#defineFPS_OE0x0008/* overflow */
120#defineFPS_UE0x0010/* underflow */
121#defineFPS_PE0x0020/* precision */
122#defineFPS_SF0x0040/* stack flag */
123#defineFPS_ES0x0080/* error summary */
124#defineFPS_C00x0100/* condition code bit 0 */
125#defineFPS_C10x0200/* condition code bit 1 */
126#defineFPS_C20x0400/* condition code bit 2 */
127#defineFPS_TOS0x3800/* top-of-stack pointer */
128#defineFPS_TOS_SHIFT11
129#defineFPS_C30x4000/* condition code bit 3 */
130#defineFPS_BUSY0x8000/* FPU busy */
131
132/*
133 * Kind of floating-point support provided by kernel.
134 */
135#defineFP_NO0/* no floating point */
136#defineFP_SOFT1/* software FP emulator */
137#defineFP_2872/* 80287 */
138#defineFP_3873/* 80387 or 80486 */
139#define FP_FXSR4/* Fast save/restore SIMD Extension */
140
141#endif/* _I386_FP_SAVE_H_ */
142

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