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1//********************************************************************␍␊
2// MINIMUM ATA LOW LEVEL I/O DRIVER -- MINDRVR.H␍␊
3//␍␊
4// by Hale Landis (hlandis@ata-atapi.com)␍␊
5//␍␊
6// There is no copyright and there are no restrictions on the use␍␊
7// of this ATA Low Level I/O Driver code. It is distributed to␍␊
8// help other programmers understand how the ATA device interface␍␊
9// works and it is distributed without any warranty. Use this␍␊
10// code at your own risk.␍␊
11//␍␊
12// Minimum ATA Driver (MINDRVR) is a subset of ATADRVR. MINDRVR␍␊
13// has a single header file and a single C file. MINDRVR can␍␊
14// be used as the starting point for an ATADRVR for an embedded␍␊
15// system. NOTE all the places in the MINDRVR.H and MINDRVR.C files␍␊
16// where there is a comment containing the string "!!!".␍␊
17//␍␊
18// Use the header file mindrvr.h in any C files that call MINDRVR␍␊
19// functions.␍␊
20//␍␊
21// This code is based on the ATA/ATAPI-4,-5 and -6 standards and␍␊
22// on interviews with various ATA controller and drive designers.␍␊
23//␍␊
24// Note that MINDRVR does not support ATA CHS addressing.␍␊
25//␍␊
26// Most of the MINDRVR code is standard C code and should compile␍␊
27// using any C compiler. It has been tested using Borland C/C++ 4.5.␍␊
28//␍␊
29// This C source file is the header file for the driver␍␊
30// and is used in the MINDRVR.C files and must also be used␍␊
31// by any program using the MINDRVR code/functions.␍␊
32//********************************************************************␍␊
33␍␊
34#define MIN_ATA_DRIVER_VERSION "0H"␍␊
35␍␊
36//********************************************************************␍␊
37//␍␊
38// !!! What parts of MINDRVR do you want in your build?␍␊
39//␍␊
40//********************************************************************␍␊
41␍␊
42#define INCLUDE_ATA_DMA 1 // not zero to include ATA_DMA␍␊
43␍␊
44#define INCLUDE_ATAPI_PIO 1 // not zero to include ATAPI PIO␍␊
45␍␊
46#define INCLUDE_ATAPI_DMA 1 // not zero to include ATAPI DMA␍␊
47␍␊
48//********************************************************************␍␊
49//␍␊
50// !!! System specific functions and data you must supply␍␊
51//␍␊
52//********************************************************************␍␊
53␍␊
54// You must supply a function that waits for an interrupt from the␍␊
55// ATA controller. This function should return 0 when the interrupt␍␊
56// is received and a non zero value if the interrupt is not received␍␊
57// within the time out period.␍␊
58/*␍␊
59long tmr_time_out = 20L;␍␊
60␍␊
61long tmr_cmd_start_time; ␍␊
62*/␍␊
63//extern int SYSTEM_WAIT_INTR_OR_TIMEOUT( void );␍␊
64␍␊
65extern unsigned int time18 ( void );␍␊
66␍␊
67//extern long SYSTEM_READ_TIMER (void);␍␊
68/*␍␊
69int tmr_chk_timeout( void )␍␊
70␍␊
71{␍␊
72 long curTime;␍␊
73␍␊
74 // get current time␍␊
75 curTime = time18();␍␊
76␍␊
77 // if we have passed midnight, restart␍␊
78 if ( curTime < tmr_cmd_start_time )␍␊
79 {␍␊
80 tmr_cmd_start_time = curTime;␍␊
81 return 0;␍␊
82 }␍␊
83␍␊
84 // timed out yet ?␍␊
85 if ( curTime >= ( tmr_cmd_start_time + ( tmr_time_out * 18L ) ) )␍␊
86 return 1; // yes␍␊
87␍␊
88 // no timeout yet␍␊
89 return 0;␍␊
90}␍␊
91␍␊
92void tmr_set_timeout( void )␍␊
93␍␊
94{␍␊
95␍␊
96 // get the command start time␍␊
97 tmr_cmd_start_time = time18();␍␊
98}␍␊
99*/␍␊
100// You must supply a function that returns a system timer value. This␍␊
101// should be a value that increments at some constant rate.␍␊
102␍␊
103␍␊
104␍␊
105// This defines the number of system timer ticks per second.␍␊
106␍␊
107#define SYSTEM_TIMER_TICKS_PER_SECOND 18L␍␊
108␍␊
109//********************************************************************␍␊
110//␍␊
111// !!! ATA controller hardware specific data␍␊
112//␍␊
113//********************************************************************␍␊
114␍␊
115// ATA Command Block base address␍␊
116// (the address of the ATA Data register)␍␊
117␍␊
118//values is for secondary port␍␊
119//#define PIO_BASE_ADDR1 ( (unsigned char *) 0x1f0 )␍␊
120//#define PIO_BASE_ADDR1 ( (unsigned char *) 0xd600 )␍␊
121// ATA Control Block base address␍␊
122// (the address of the ATA DevCtrl␍␊
123// and AltStatus registers)␍␊
124//#define PIO_BASE_ADDR2 ( (unsigned char *) 0x3f6 )␍␊
125//#define PIO_BASE_ADDR2 ( (unsigned char *) 0xd700 )␍␊
126␍␊
127// BMIDE base address (address of␍␊
128// the BMIDE Command register for␍␊
129// the Primary or Secondary side of␍␊
130// the PCI ATA controller)␍␊
131//#define PIO_BMIDE_BASE_ADDR ( (unsigned char *) 0x0000 )␍␊
132␍␊
133// Size of the ATA Data register - allowed values are 8, 16 and 32␍␊
134#define PIO_DEFAULT_XFER_WIDTH 16␍␊
135␍␊
136// Interrupts or polling mode - not zero to use interrrupts␍␊
137// Note: Interrupt mode is required for DMA␍␊
138#define INT_DEFAULT_INTERRUPT_MODE 0␍␊
139␍␊
140// Command time out in seconds␍␊
141#define TMR_TIME_OUT 20␍␊
142␍␊
143//**************************************************************␍␊
144//␍␊
145// Data that MINDRVR makes available.␍␊
146//␍␊
147//**************************************************************␍␊
148␍␊
149// public interrupt handler data␍␊
150␍␊
151extern unsigned char int_ata_status; // ATA status read by interrupt handler␍␊
152␍␊
153extern unsigned char int_bmide_status; // BMIDE status read by interrupt handler␍␊
154␍␊
155// Interrupt or Polling mode flag.␍␊
156␍␊
157extern unsigned char int_use_intr_flag; // not zero to use interrupts␍␊
158␍␊
159// ATA Data register width (8, 16 or 32)␍␊
160␍␊
161extern unsigned char pio_xfer_width;␍␊
162␍␊
163extern unsigned char pio_inbyte( unsigned char addr );␍␊
164␍␊
165extern void pio_outbyte( int addr, unsigned char data );␍␊
166␍␊
167// Command and extended error information returned by the␍␊
168// reg_reset(), reg_non_data_*(), reg_pio_data_in_*(),␍␊
169// reg_pio_data_out_*(), reg_packet() and dma_pci_*() functions.␍␊
170␍␊
171struct REG_CMD_INFO␍␊
172{␍␊
173 // command code␍␊
174 unsigned char cmd; // command code␍␊
175 // command parameters␍␊
176 unsigned int fr; // feature (8 or 16 bits)␍␊
177 unsigned int sc; // sec cnt (8 or 16 bits)␍␊
178 unsigned int sn; // sec num (8 or 16 bits)␍␊
179 unsigned int cl; // cyl low (8 or 16 bits)␍␊
180 unsigned int ch; // cyl high (8 or 16 bits)␍␊
181 unsigned char dh; // device head␍␊
182 unsigned char dc; // device control␍␊
183 long ns; // actual sector count␍␊
184 int mc; // current multiple block setting␍␊
185 unsigned char lbaSize; // size of LBA used␍␊
186 #define LBACHS 0 // last command used ATA CHS (not supported by MINDRVR)␍␊
187 // -or- last command was ATAPI PACKET command␍␊
188 #define LBA28 28 // last command used ATA 28-bit LBA␍␊
189 #define LBA48 48 // last command used ATA 48-bit LBA␍␊
190 unsigned long lbaLow; // lower 32-bits of ATA LBA␍␊
191 unsigned long lbaHigh; // upper 32-bits of ATA LBA␍␊
192 // status and error regs␍␊
193 unsigned char st; // status reg␍␊
194 unsigned char as; // alt status reg␍␊
195 unsigned char er ; // error reg␍␊
196 // driver error codes␍␊
197 unsigned char ec; // detailed error code␍␊
198 unsigned char to; // not zero if time out error␍␊
199 // additional result info␍␊
200 long totalBytesXfer; // total bytes transfered␍␊
201 long drqPackets; // number of PIO DRQ packets␍␊
202} ;␍␊
203␍␊
204extern struct REG_CMD_INFO reg_cmd_info;␍␊
205␍␊
206// Configuration data for device 0 and 1␍␊
207// returned by the reg_config() function.␍␊
208␍␊
209extern int reg_config_info[2];␍␊
210␍␊
211#define REG_CONFIG_TYPE_NONE 0␍␊
212#define REG_CONFIG_TYPE_UNKN 1␍␊
213#define REG_CONFIG_TYPE_ATA 2␍␊
214#define REG_CONFIG_TYPE_ATAPI 3␍␊
215␍␊
216//**************************************************************␍␊
217//␍␊
218// Global defines -- ATA register and register bits.␍␊
219// command block & control block regs␍␊
220//␍␊
221//**************************************************************␍␊
222␍␊
223// These are the offsets into pio_reg_addrs[]␍␊
224␍␊
225#define CB_DATA 0 // data reg in/out cmd_blk_base1+0␍␊
226#define CB_ERR 1 // error in cmd_blk_base1+1␍␊
227#define CB_FR 1 // feature reg out cmd_blk_base1+1␍␊
228#define CB_SC 2 // sector count in/out cmd_blk_base1+2␍␊
229#define CB_SN 3 // sector number in/out cmd_blk_base1+3␍␊
230#define CB_CL 4 // cylinder low in/out cmd_blk_base1+4␍␊
231#define CB_CH 5 // cylinder high in/out cmd_blk_base1+5␍␊
232#define CB_DH 6 // device head in/out cmd_blk_base1+6␍␊
233#define CB_STAT 7 // primary status in cmd_blk_base1+7␍␊
234#define CB_CMD 7 // command out cmd_blk_base1+7␍␊
235#define CB_ASTAT 8 // alternate status in ctrl_blk_base2+6␍␊
236#define CB_DC 8 // device control out ctrl_blk_base2+6␍␊
237␍␊
238// error reg (CB_ERR) bits␍␊
239␍␊
240#define CB_ER_ICRC 0x80 // ATA Ultra DMA bad CRC␍␊
241#define CB_ER_BBK 0x80 // ATA bad block␍␊
242#define CB_ER_UNC 0x40 // ATA uncorrected error␍␊
243#define CB_ER_MC 0x20 // ATA media change␍␊
244#define CB_ER_IDNF 0x10 // ATA id not found␍␊
245#define CB_ER_MCR 0x08 // ATA media change request␍␊
246#define CB_ER_ABRT 0x04 // ATA command aborted␍␊
247#define CB_ER_NTK0 0x02 // ATA track 0 not found␍␊
248#define CB_ER_NDAM 0x01 // ATA address mark not found␍␊
249␍␊
250#define CB_ER_P_SNSKEY 0xf0 // ATAPI sense key (mask)␍␊
251#define CB_ER_P_MCR 0x08 // ATAPI Media Change Request␍␊
252#define CB_ER_P_ABRT 0x04 // ATAPI command abort␍␊
253#define CB_ER_P_EOM 0x02 // ATAPI End of Media␍␊
254#define CB_ER_P_ILI 0x01 // ATAPI Illegal Length Indication␍␊
255␍␊
256// ATAPI Interrupt Reason bits in the Sector Count reg (CB_SC)␍␊
257␍␊
258#define CB_SC_P_TAG 0xf8 // ATAPI tag (mask)␍␊
259#define CB_SC_P_REL 0x04 // ATAPI release␍␊
260#define CB_SC_P_IO 0x02 // ATAPI I/O␍␊
261#define CB_SC_P_CD 0x01 // ATAPI C/D␍␊
262␍␊
263// bits 7-4 of the device/head (CB_DH) reg␍␊
264␍␊
265#define CB_DH_LBA 0x40 // LBA bit␍␊
266#define CB_DH_DEV0 0x00 // select device 0␍␊
267#define CB_DH_DEV1 0x10 // select device 1␍␊
268// #define CB_DH_DEV0 0xa0 // select device 0 (old definition)␍␊
269// #define CB_DH_DEV1 0xb0 // select device 1 (old definition)␍␊
270␍␊
271// status reg (CB_STAT and CB_ASTAT) bits␍␊
272␍␊
273#define CB_STAT_BSY 0x80 // busy␍␊
274#define CB_STAT_RDY 0x40 // ready␍␊
275#define CB_STAT_DF 0x20 // device fault␍␊
276#define CB_STAT_WFT 0x20 // write fault (old name)␍␊
277#define CB_STAT_SKC 0x10 // seek complete (only SEEK command)␍␊
278#define CB_STAT_SERV 0x10 // service (overlap/queued commands)␍␊
279#define CB_STAT_DRQ 0x08 // data request␍␊
280#define CB_STAT_CORR 0x04 // corrected (obsolete)␍␊
281#define CB_STAT_IDX 0x02 // index (obsolete)␍␊
282#define CB_STAT_ERR 0x01 // error (ATA)␍␊
283#define CB_STAT_CHK 0x01 // check (ATAPI)␍␊
284␍␊
285// device control reg (CB_DC) bits␍␊
286␍␊
287#define CB_DC_HOB 0x80 // High Order Byte (48-bit LBA)␍␊
288// #define CB_DC_HD15 0x00 // bit 3 is reserved␍␊
289// #define CB_DC_HD15 0x08 // (old definition of bit 3)␍␊
290#define CB_DC_SRST 0x04 // soft reset␍␊
291#define CB_DC_NIEN 0x02 // disable interrupts␍␊
292␍␊
293//**************************************************************␍␊
294//␍␊
295// Most mandtory and optional ATA commands␍␊
296//␍␊
297//**************************************************************␍␊
298␍␊
299#define CMD_CFA_ERASE_SECTORS 0xC0␍␊
300#define CMD_CFA_REQUEST_EXT_ERR_CODE 0x03␍␊
301#define CMD_CFA_TRANSLATE_SECTOR 0x87␍␊
302#define CMD_CFA_WRITE_MULTIPLE_WO_ERASE 0xCD␍␊
303#define CMD_CFA_WRITE_SECTORS_WO_ERASE 0x38␍␊
304#define CMD_CHECK_POWER_MODE1 0xE5␍␊
305#define CMD_CHECK_POWER_MODE2 0x98␍␊
306#define CMD_DEVICE_RESET 0x08␍␊
307#define CMD_EXECUTE_DEVICE_DIAGNOSTIC 0x90␍␊
308#define CMD_FLUSH_CACHE 0xE7␍␊
309#define CMD_FLUSH_CACHE_EXT 0xEA␍␊
310#define CMD_FORMAT_TRACK 0x50␍␊
311#define CMD_IDENTIFY_DEVICE 0xEC␍␊
312#define CMD_IDENTIFY_DEVICE_PACKET 0xA1␍␊
313#define CMD_IDENTIFY_PACKET_DEVICE 0xA1␍␊
314#define CMD_IDLE1 0xE3␍␊
315#define CMD_IDLE2 0x97␍␊
316#define CMD_IDLE_IMMEDIATE1 0xE1␍␊
317#define CMD_IDLE_IMMEDIATE2 0x95␍␊
318#define CMD_INITIALIZE_DRIVE_PARAMETERS 0x91␍␊
319#define CMD_INITIALIZE_DEVICE_PARAMETERS 0x91␍␊
320#define CMD_NOP 0x00␍␊
321#define CMD_PACKET 0xA0␍␊
322#define CMD_READ_BUFFER 0xE4␍␊
323#define CMD_READ_DMA 0xC8␍␊
324#define CMD_READ_DMA_EXT 0x25␍␊
325#define CMD_READ_DMA_QUEUED 0xC7␍␊
326#define CMD_READ_DMA_QUEUED_EXT 0x26␍␊
327#define CMD_READ_MULTIPLE 0xC4␍␊
328#define CMD_READ_MULTIPLE_EXT 0x29␍␊
329#define CMD_READ_SECTORS 0x20␍␊
330#define CMD_READ_SECTORS_EXT 0x24␍␊
331#define CMD_READ_VERIFY_SECTORS 0x40␍␊
332#define CMD_READ_VERIFY_SECTORS_EXT 0x42␍␊
333#define CMD_RECALIBRATE 0x10␍␊
334#define CMD_SEEK 0x70␍␊
335#define CMD_SET_FEATURES 0xEF␍␊
336#define CMD_SET_MULTIPLE_MODE 0xC6␍␊
337#define CMD_SLEEP1 0xE6␍␊
338#define CMD_SLEEP2 0x99␍␊
339#define CMD_SMART 0xB0␍␊
340#define CMD_STANDBY1 0xE2␍␊
341#define CMD_STANDBY2 0x96␍␊
342#define CMD_STANDBY_IMMEDIATE1 0xE0␍␊
343#define CMD_STANDBY_IMMEDIATE2 0x94␍␊
344#define CMD_WRITE_BUFFER 0xE8␍␊
345#define CMD_WRITE_DMA 0xCA␍␊
346#define CMD_WRITE_DMA_EXT 0x35␍␊
347#define CMD_WRITE_DMA_QUEUED 0xCC␍␊
348#define CMD_WRITE_DMA_QUEUED_EXT 0x36␍␊
349#define CMD_WRITE_MULTIPLE 0xC5␍␊
350#define CMD_WRITE_MULTIPLE_EXT 0x39␍␊
351#define CMD_WRITE_SECTORS 0x30␍␊
352#define CMD_WRITE_SECTORS_EXT 0x34␍␊
353#define CMD_WRITE_VERIFY 0x3C␍␊
354␍␊
355//**************************************************************␍␊
356//␍␊
357// ATA and ATAPI PIO support functions␍␊
358//␍␊
359//**************************************************************␍␊
360␍␊
361// config and reset funcitons␍␊
362␍␊
363extern void pio_set_iobase_addr( unsigned int base1,␍␊
364 unsigned int base2,␍␊
365␉␉␉␉␉␉unsigned int base3 );␍␊
366␍␊
367extern int reg_config( void );␍␊
368␍␊
369extern int reg_reset( unsigned char devRtrn );␍␊
370␍␊
371// ATA Non-Data command funnctions (for LBA28 and LBA48)␍␊
372␍␊
373extern int reg_non_data_lba28( unsigned char dev, unsigned char cmd,␍␊
374 unsigned int fr, unsigned int sc,␍␊
375 unsigned long lba );␍␊
376␍␊
377extern int reg_non_data_lba48( unsigned char dev, unsigned char cmd,␍␊
378 unsigned int fr, unsigned int sc,␍␊
379 unsigned long lbahi, unsigned long lbalo );␍␊
380␍␊
381// ATA PIO Data In command functions (for LBA28 and LBA48)␍␊
382␍␊
383extern int reg_pio_data_in_lba28( unsigned char dev, unsigned char cmd,␍␊
384 unsigned int fr, unsigned int sc,␍␊
385 unsigned long lba,␍␊
386 unsigned char * bufAddr,␍␊
387 long numSect, int multiCnt );␍␊
388␍␊
389extern int reg_pio_data_in_lba48( unsigned char dev, unsigned char cmd,␍␊
390 unsigned int fr, unsigned int sc,␍␊
391 unsigned long lbahi, unsigned long lbalo,␍␊
392 unsigned char * bufAddr,␍␊
393 long numSect, int multiCnt );␍␊
394␍␊
395// ATA PIO Data Out command functions (for LBA28 and LBA48)␍␊
396␍␊
397extern int reg_pio_data_out_lba28( unsigned char dev, unsigned char cmd,␍␊
398 unsigned int fr, unsigned int sc,␍␊
399 unsigned long lba,␍␊
400 unsigned char * bufAddr,␍␊
401 long numSect, int multiCnt );␍␊
402␍␊
403extern int reg_pio_data_out_lba48( unsigned char dev, unsigned char cmd,␍␊
404 unsigned int fr, unsigned int sc,␍␊
405 unsigned long lbahi, unsigned long lbalo,␍␊
406 unsigned char * bufAddr,␍␊
407 long numSect, int multiCnt );␍␊
408␍␊
409#if INCLUDE_ATAPI_PIO␍␊
410␍␊
411// ATAPI Packet PIO function␍␊
412␍␊
413extern int reg_packet( unsigned char dev,␍␊
414 unsigned int cpbc,␍␊
415 unsigned char * cdbBufAddr,␍␊
416 int dir,␍␊
417 long dpbc,␍␊
418 unsigned char * dataBufAddr );␍␊
419␍␊
420#endif // INCLUDE_ATAPI_PIO␍␊
421␍␊
422//**************************************************************␍␊
423//␍␊
424// ATA and ATAPI DMA support functions␍␊
425//␍␊
426//**************************************************************␍␊
427␍␊
428#if INCLUDE_ATA_DMA || INCLUDE_ATAPI_DMA␍␊
429␍␊
430// BMIDE registers and bits␍␊
431␍␊
432#define BM_COMMAND_REG 0 // offset to BM command reg␍␊
433#define BM_CR_MASK_READ 0x00 // read from memory␍␊
434#define BM_CR_MASK_WRITE 0x08 // write to memory␍␊
435#define BM_CR_MASK_START 0x01 // start transfer␍␊
436#define BM_CR_MASK_STOP 0x00 // stop transfer␍␊
437␍␊
438#define BM_STATUS_REG 2 // offset to BM status reg␍␊
439#define BM_SR_MASK_SIMPLEX 0x80 // simplex only␍␊
440#define BM_SR_MASK_DRV1 0x40 // drive 1 can do dma␍␊
441#define BM_SR_MASK_DRV0 0x20 // drive 0 can do dma␍␊
442#define BM_SR_MASK_INT 0x04 // INTRQ signal asserted␍␊
443#define BM_SR_MASK_ERR 0x02 // error␍␊
444#define BM_SR_MASK_ACT 0x01 // active␍␊
445␍␊
446#define BM_PRD_ADDR_LOW 4 // offset to BM prd addr reg low 16 bits␍␊
447#define BM_PRD_ADDR_HIGH 6 // offset to BM prd addr reg high 16 bits␍␊
448␍␊
449// PCI DMA setup function (usually called once).␍␊
450␍␊
451// !!! You may not need this function in your system - see the comments␍␊
452// !!! for this function in MINDRVR.C.␍␊
453␍␊
454extern int dma_pci_config( void );␍␊
455␍␊
456// ATA DMA functions␍␊
457␍␊
458extern int dma_pci_lba28( unsigned char dev, unsigned char cmd,␍␊
459 unsigned int fr, unsigned int sc,␍␊
460 unsigned long lba,␍␊
461 unsigned char * bufAddr,␍␊
462 long numSect );␍␊
463␍␊
464extern int dma_pci_lba48( unsigned char dev, unsigned char cmd,␍␊
465 unsigned int fr, unsigned int sc,␍␊
466 unsigned long lbahi, unsigned long lbalo,␍␊
467 unsigned char * bufAddr,␍␊
468 long numSect );␍␊
469␍␊
470#endif // INCLUDE_ATA_DMA or INCLUDE_ATAPI_DMA␍␊
471␍␊
472#if INCLUDE_ATAPI_DMA␍␊
473␍␊
474// ATA DMA function␍␊
475␍␊
476extern int dma_pci_packet( unsigned char dev,␍␊
477 unsigned int cpbc,␍␊
478 unsigned char * cdbBufAddr,␍␊
479 int dir,␍␊
480 long dpbc,␍␊
481 unsigned char * dataBufAddr );␍␊
482␍␊
483#endif // INCLUDE_ATAPI_DMA␍␊
484␍␊
485// end mindrvr.h␍␊
486␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀␀

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