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Root/branches/meklort/i386/modules/Memory/spd.c

Source at commit 540 created 13 years 6 months ago.
By meklort, Removed kernel patcher message. Added a timeout for spd detection, was looping indefinately on my dell mini 10v.
1/*␊
2 * spd.c - serial presence detect memory information␊
3 *␊
4 * Originally restored from pcefi10.5␊
5 * Dynamic mem detection original impl. by Rekursor␊
6 * System profiler fix and other fixes by Mozodojo.␊
7 */␊
8␊
9#include "libsaio.h"␊
10#include "pci.h"␊
11#include "platform.h"␊
12#include "spd.h"␊
13#include "saio_internal.h"␊
14#include "bootstruct.h"␊
15#include "memvendors.h"␊
16␊
17#ifndef DEBUG_SPD␊
18#define DEBUG_SPD 0␊
19#endif␊
20␊
21#if DEBUG_SPD␊
22#define DBG(x...)␉printf(x)␊
23#else␊
24#define DBG(x...)␊
25#endif␊
26␊
27static const char *spd_memory_types[] =␊
28{␊
29␉"RAM", /* 00h Undefined */␊
30␉"FPM", /* 01h FPM */␊
31␉"EDO", /* 02h EDO */␊
32␉"",␉␉␉␉/* 03h PIPELINE NIBBLE */␊
33␉"SDRAM", /* 04h SDRAM */␊
34␉"",␉␉␉␉/* 05h MULTIPLEXED ROM */␊
35␉"DDR SGRAM",␉/* 06h SGRAM DDR */␊
36␉"DDR SDRAM",␉/* 07h SDRAM DDR */␊
37␉"DDR2 SDRAM", /* 08h SDRAM DDR 2 */␊
38␉"",␉␉␉␉/* 09h Undefined */␊
39␉"",␉␉␉␉/* 0Ah Undefined */␊
40␉"DDR3 SDRAM" /* 0Bh SDRAM DDR 3 */␊
41};␊
42␊
43#define UNKNOWN_MEM_TYPE 2␊
44static uint8_t spd_mem_to_smbios[] =␊
45{␊
46␉UNKNOWN_MEM_TYPE, /* 00h Undefined */␊
47␉UNKNOWN_MEM_TYPE, /* 01h FPM */␊
48␉UNKNOWN_MEM_TYPE, /* 02h EDO */␊
49␉UNKNOWN_MEM_TYPE,␉ /* 03h PIPELINE NIBBLE */␊
50␉SMB_MEM_TYPE_SDRAM, /* 04h SDRAM */␊
51␉SMB_MEM_TYPE_ROM,␉ /* 05h MULTIPLEXED ROM */␊
52␉SMB_MEM_TYPE_SGRAM, /* 06h SGRAM DDR */␊
53␉SMB_MEM_TYPE_DDR, /* 07h SDRAM DDR */␊
54␉SMB_MEM_TYPE_DDR2, /* 08h SDRAM DDR 2 */␊
55␉UNKNOWN_MEM_TYPE, ␉ /* 09h Undefined */␊
56␉UNKNOWN_MEM_TYPE,␉ /* 0Ah Undefined */␊
57␉SMB_MEM_TYPE_DDR3 /* 0Bh SDRAM DDR 3 */␊
58};␊
59#define SPD_TO_SMBIOS_SIZE (sizeof(spd_mem_to_smbios)/sizeof(uint8_t))␊
60␊
61#define rdtsc(low,high) \␊
62__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))␊
63␊
64#define SMBHSTSTS 0␊
65#define SMBHSTCNT 2␊
66#define SMBHSTCMD 3␊
67#define SMBHSTADD 4␊
68#define SMBHSTDAT 5␊
69#define SBMBLKDAT 7␊
70␊
71/** Read one byte from the intel i2c, used for reading SPD on intel chipsets only. */␊
72unsigned char smb_read_byte_intel(uint32_t base, uint8_t adr, uint8_t cmd)␊
73{␊
74␉printf("smb_read_byte_intel\n");␊
75 int l1, h1, l2, h2;␊
76 unsigned long long t;␊
77␉␊
78 outb(base + SMBHSTSTS, 0x1f);␉␉␉␉␉// reset SMBus Controller␊
79 outb(base + SMBHSTDAT, 0xff);␊
80␉␊
81 while( inb(base + SMBHSTSTS) & 0x01)␊
82␉{␊
83␉␉rdtsc(l2, h2);␊
84␉␉t = ((h2 - h1) * 0xffffffff + (l2 - l1)) / (Platform.CPU.TSCFrequency / 100);␊
85␉␉if(t > 50) return 0xFF;␉// hack, exit if unresponsive.␊
86␉}␊
87␉␊
88 outb(base + SMBHSTCMD, cmd);␊
89 outb(base + SMBHSTADD, (adr << 1) | 0x01 );␊
90 outb(base + SMBHSTCNT, 0x48 );␊
91␉␊
92 rdtsc(l1, h1);␊
93␉␊
94 ␉while (!( inb(base + SMBHSTSTS) & 0x02))␉␉// wait til command finished␊
95␉{␉␊
96␉␉rdtsc(l2, h2);␊
97␉␉t = ((h2 - h1) * 0xffffffff + (l2 - l1)) / (Platform.CPU.TSCFrequency / 100);␊
98␉␉if (t > 5)␊
99␉␉␉break;␉␉␉␉␉␉␉␉␉// break after 5ms␊
100 }␊
101 return inb(base + SMBHSTDAT);␊
102}␊
103␊
104/* SPD i2c read optimization: prefetch only what we need, read non prefetcheable bytes on the fly */␊
105#define READ_SPD(spd, base, slot, x) spd[x] = smb_read_byte_intel(base, 0x50 + slot, x)␊
106␊
107int spd_indexes[] = {␊
108␉SPD_MEMORY_TYPE,␊
109␉SPD_DDR3_MEMORY_BANK,␊
110␉SPD_DDR3_MEMORY_CODE,␊
111␉SPD_NUM_ROWS,␊
112␉SPD_NUM_COLUMNS,␊
113␉SPD_NUM_DIMM_BANKS,␊
114␉SPD_NUM_BANKS_PER_SDRAM,␊
115␉4,7,8,9,12,64, /* TODO: give names to these values */␊
116␉95,96,97,98, 122,123,124,125 /* UIS */␊
117};␊
118#define SPD_INDEXES_SIZE (sizeof(spd_indexes) / sizeof(int))␊
119␊
120/** Read from spd *used* values only*/␊
121static void init_spd(char * spd, uint32_t base, int slot)␊
122{␊
123␉int i;␊
124␉for (i=0; i< SPD_INDEXES_SIZE; i++) {␊
125␉␉READ_SPD(spd, base, slot, spd_indexes[i]);␊
126␉}␊
127}␊
128␊
129/** Get Vendor Name from spd, 2 cases handled DDR3 and DDR2, ␊
130 have different formats, always return a valid ptr.*/␊
131const char * getVendorName(RamSlotInfo_t* slot, uint32_t base, int slot_num)␊
132{␊
133 uint8_t bank = 0;␊
134 uint8_t code = 0;␊
135 int i = 0;␊
136 uint8_t * spd = (uint8_t *) slot->spd;␊
137␊
138 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) { // DDR3␊
139 bank = (spd[SPD_DDR3_MEMORY_BANK] & 0x07f); // constructors like Patriot use b7=1␊
140 code = spd[SPD_DDR3_MEMORY_CODE];␊
141 for (i=0; i < VEN_MAP_SIZE; i++)␊
142 if (bank==vendorMap[i].bank && code==vendorMap[i].code)␊
143 return vendorMap[i].name;␊
144 }␊
145 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) {␊
146 if(spd[64]==0x7f) {␊
147 for (i=64; i<72 && spd[i]==0x7f;i++) {␊
148␉␉␉ bank++;␊
149␉␉␉ READ_SPD(spd, base, slot_num,i+1); // prefetch next spd byte to read for next loop␊
150␉␉␉}␊
151␉␉␉READ_SPD(spd, base, slot_num,i);␊
152 code = spd[i];␊
153 } else {␊
154 code = spd[64]; ␊
155 bank = 0;␊
156 }␊
157 for (i=0; i < VEN_MAP_SIZE; i++)␊
158 if (bank==vendorMap[i].bank && code==vendorMap[i].code)␊
159 return vendorMap[i].name;␊
160 }␊
161 /* OK there is no vendor id here lets try to match the partnum if it exists */␊
162 if (strstr(slot->PartNo,"GU332") == slot->PartNo) // Unifosa fingerprint␊
163 return "Unifosa";␊
164 return "NoName";␊
165}␊
166␊
167/** Get Default Memory Module Speed (no overclocking handled) */␊
168int getDDRspeedMhz(const char * spd)␊
169{␊
170 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) { ␊
171 switch(spd[12]) {␊
172 case 0x0f:␊
173 return 1066;␊
174 case 0x0c:␊
175 return 1333;␊
176 case 0x0a:␊
177 return 1600;␊
178 case 0x14:␊
179 default:␊
180 return 800;␊
181 }␊
182 } ␊
183 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) {␊
184 switch(spd[9]) {␊
185 case 0x50:␊
186 return 400;␊
187 case 0x3d:␊
188 return 533;␊
189 case 0x30:␊
190 return 667;␊
191 case 0x25:␊
192 default:␊
193 return 800;␊
194 }␊
195 }␊
196 return 800; // default freq for unknown types␊
197}␊
198␊
199#define SMST(a) ((uint8_t)((spd[a] & 0xf0) >> 4))␊
200#define SLST(a) ((uint8_t)(spd[a] & 0x0f))␊
201␊
202/** Get DDR3 or DDR2 serial number, 0 most of the times, always return a valid ptr */␊
203const char *getDDRSerial(const char* spd)␊
204{␊
205 static char asciiSerial[16];␊
206 ␊
207 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) // DDR3␊
208 {␊
209␉sprintf(asciiSerial, "%X%X%X%X%X%X%X%X", SMST(122) /*& 0x7*/, SLST(122), SMST(123), SLST(123), SMST(124), SLST(124), SMST(125), SLST(125));␊
210 }␊
211 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) // DDR2 or DDR␊
212 { ␊
213␉sprintf(asciiSerial, "%X%X%X%X%X%X%X%X", SMST(95) /*& 0x7*/, SLST(95), SMST(96), SLST(96), SMST(97), SLST(97), SMST(98), SLST(98));␊
214 }␊
215␊
216 return strdup(asciiSerial);␊
217}␊
218␊
219/** Get DDR3 or DDR2 Part Number, always return a valid ptr */␊
220const char * getDDRPartNum(char* spd, uint32_t base, int slot)␊
221{␊
222␉static char asciiPartNo[32];␊
223␉int i, start=0, index = 0;␊
224␊
225 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) {␊
226␉␉start = 128;␊
227␉}␊
228 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) {␊
229␉␉start = 73;␊
230␉}␊
231␉␊
232 // Check that the spd part name is zero terminated and that it is ascii:␊
233 bzero(asciiPartNo, sizeof(asciiPartNo));␊
234␉char c;␊
235␉for (i=start; i < start + sizeof(asciiPartNo); i++) {␊
236␉␉READ_SPD(spd, base, slot, i); // only read once the corresponding model part (ddr3 or ddr2)␊
237␉␉c = spd[i];␊
238␉␉if (isalpha(c) || isdigit(c) || ispunct(c)) // It seems that System Profiler likes only letters and digits...␊
239␉␉␉asciiPartNo[index++] = c;␊
240␉␉else if (!isascii(c))␊
241␉␉␉break;␊
242␉}␊
243␉␊
244␉return strdup(asciiPartNo);␊
245 return NULL;␊
246}␊
247␊
248int mapping []= {0,2,1,3,4,6,5,7,8,10,9,11};␊
249␊
250␊
251/** Read from smbus the SPD content and interpret it for detecting memory attributes */␊
252static void read_smb_intel(pci_dt_t *smbus_dev)␊
253{ ␊
254 int i, speed;␊
255 uint8_t spd_size, spd_type;␊
256 uint32_t base;␊
257 bool dump = false;␊
258 RamSlotInfo_t* slot;␊
259␊
260 base = pci_config_read16(smbus_dev->dev.addr, 0x20) & 0xFFFE;␊
261 DBG("Scanning smbus_dev <%04x, %04x> ...\n",smbus_dev->vendor_id, smbus_dev->device_id);␊
262␊
263 getBoolForKey("DumpSPD", &dump, &bootInfo->bootConfig);␊
264 bool fullBanks = // needed at least for laptops␊
265 Platform.DMI.MemoryModules == Platform.DMI.MaxMemorySlots;␊
266 // Search MAX_RAM_SLOTS slots␊
267␉char spdbuf[256];␊
268␊
269 for (i = 0; i < MAX_RAM_SLOTS; i++){␊
270␉␉DBG("Scanning slot %d\n", i);␊
271 slot = &Platform.RAM.DIMM[i];␊
272 spd_size = smb_read_byte_intel(base, 0x50 + i, 0);␊
273 // Check spd is present␊
274 if (spd_size && (spd_size != 0xff) ) {␊
275␉␉␉printf("SPD is present\n");␊
276␉␉␉slot->spd = spdbuf;␊
277 slot->InUse = true;␊
278␊
279 bzero(slot->spd, spd_size);␊
280 ␊
281 // Copy spd data into buffer␊
282 ␊
283␉␉␉//for (x = 0; x < spd_size; x++) slot->spd[x] = smb_read_byte_intel(base, 0x50 + i, x);␊
284 init_spd(slot->spd, base, i);␊
285␉␉␉␊
286 switch (slot->spd[SPD_MEMORY_TYPE]) {␊
287 case SPD_MEMORY_TYPE_SDRAM_DDR2:␊
288 ␊
289 slot->ModuleSize = ((1 << (slot->spd[SPD_NUM_ROWS] & 0x0f) + (slot->spd[SPD_NUM_COLUMNS] & 0x0f) - 17) * ␊
290 ((slot->spd[SPD_NUM_DIMM_BANKS] & 0x7) + 1) * slot->spd[SPD_NUM_BANKS_PER_SDRAM]);␊
291 break;␊
292 ␊
293 case SPD_MEMORY_TYPE_SDRAM_DDR3:␊
294 ␊
295 slot->ModuleSize = ((slot->spd[4] & 0x0f) + 28 ) + ((slot->spd[8] & 0x7) + 3 );␊
296 slot->ModuleSize -= (slot->spd[7] & 0x7) + 25;␊
297 slot->ModuleSize = ((1 << slot->ModuleSize) * (((slot->spd[7] >> 3) & 0x1f) + 1));␊
298 ␊
299 break;␊
300 }␊
301 ␊
302 spd_type = (slot->spd[SPD_MEMORY_TYPE] < ((char) 12) ? slot->spd[SPD_MEMORY_TYPE] : 0);␊
303 slot->Type = spd_mem_to_smbios[spd_type];␊
304 slot->PartNo = getDDRPartNum(slot->spd, base, i);␊
305 slot->Vendor = getVendorName(slot, base, i);␊
306 slot->SerialNo = getDDRSerial(slot->spd);␊
307␊
308 // determine spd speed␊
309 speed = getDDRspeedMhz(slot->spd);␊
310 if (slot->Frequency<speed) slot->Frequency = speed;␊
311␉␉␉␊
312␉␉␉// pci memory controller if available, is more reliable␊
313␉␉␉if (Platform.RAM.Frequency > 0) {␊
314␉␉␉␉uint32_t freq = (uint32_t)Platform.RAM.Frequency / 500000;␊
315␉␉␉␉// now round off special cases␊
316␉␉␉␉uint32_t fmod100 = freq %100;␊
317␉␉␉␉switch(fmod100) {␊
318␉␉␉␉␉case 1:␉freq--;␉break;␊
319␉␉␉␉␉case 32:␉freq++;␉break;␊
320␉␉␉␉␉case 65:␉freq++; break;␊
321␉␉␉␉␉case 98:␉freq+=2;break;␊
322␉␉␉␉␉case 99:␉freq++; break;␊
323␉␉␉␉}␊
324␉␉␉␉slot->Frequency = freq;␊
325␉␉␉}␊
326␉␉␉␊
327␉␉␉verbose("Slot: %d Type %d %dMB (%s) %dMHz Vendor=%s\n PartNo=%s SerialNo=%s\n", ␊
328 i, ␊
329 (int)slot->Type,␊
330 slot->ModuleSize, ␊
331 spd_memory_types[spd_type],␊
332 slot->Frequency,␊
333 slot->Vendor,␊
334 slot->PartNo,␊
335 slot->SerialNo); ␊
336␉␉␉if(DEBUG_SPD) {␊
337 dumpPhysAddr("spd content: ",slot->spd, spd_size);␊
338 getc();␊
339 }␊
340 }␊
341 // laptops sometimes show slot 0 and 2 with slot 1 empty when only 2 slots are presents so:␊
342 Platform.DMI.DIMM[i]= ␊
343 i>0 && Platform.RAM.DIMM[1].InUse==false && fullBanks && Platform.DMI.MaxMemorySlots==2 ? ␊
344 mapping[i] : i; // for laptops case, mapping setup would need to be more generic than this␊
345 ␊
346␉␉slot->spd = NULL;␊
347␊
348 } // for␊
349}␊
350␊
351static struct smbus_controllers_t smbus_controllers[] = {␊
352␊
353␉{0x8086, 0x269B, "ESB2", read_smb_intel },␊
354␉{0x8086, 0x25A4, "6300ESB", read_smb_intel },␊
355␉{0x8086, 0x24C3, "ICH4", read_smb_intel },␊
356␉{0x8086, 0x24D3, "ICH5", read_smb_intel },␊
357␉{0x8086, 0x266A, "ICH6", read_smb_intel },␊
358␉{0x8086, 0x27DA, "ICH7", read_smb_intel },␊
359␉{0x8086, 0x283E, "ICH8", read_smb_intel },␊
360␉{0x8086, 0x2930, "ICH9", read_smb_intel },␉␊
361␉{0x8086, 0x3A30, "ICH10R", read_smb_intel },␊
362␉{0x8086, 0x3A60, "ICH10B", read_smb_intel },␊
363␉{0x8086, 0x3B30, "P55", read_smb_intel },␊
364␉{0x8086, 0x5032, "EP80579", read_smb_intel }␊
365␊
366};␊
367␊
368// initial call : pci_dt = root_pci_dev;␊
369// find_and_read_smbus_controller(root_pci_dev);␊
370bool find_and_read_smbus_controller(pci_dt_t* pci_dt)␊
371{␊
372 pci_dt_t␉*current = pci_dt;␊
373 int i;␊
374␊
375 while (current) {␊
376#if DEBUG_SPD␊
377 printf("%02x:%02x.%x [%04x] [%04x:%04x] :: %s\n", ␊
378 current->dev.bits.bus, current->dev.bits.dev, current->dev.bits.func, ␊
379 current->class_id, current->vendor_id, current->device_id, ␊
380 get_pci_dev_path(current));␊
381#endif␊
382␉for ( i = 0; i < sizeof(smbus_controllers) / sizeof(smbus_controllers[0]); i++ )␊
383 {␊
384 if (current->vendor_id == smbus_controllers[i].vendor &&␊
385 current->device_id == smbus_controllers[i].device)␊
386 {␊
387 smbus_controllers[i].read_smb(current); // read smb␊
388 return true;␊
389 } ␊
390 }␊
391 find_and_read_smbus_controller(current->children);␊
392 current = current->next;␊
393 }␊
394 return false; // not found␊
395}␊
396␊
397void scan_spd(PlatformInfo_t *p)␊
398{␊
399 find_and_read_smbus_controller(root_pci_dev);␊
400}␊
401

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