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Root/branches/meklort/i386/modules/Memory/spd.c

Source at commit 543 created 13 years 6 months ago.
By meklort, Chameleon code shrinkage. Also moved a few things to modules.
1/*␊
2 * spd.c - serial presence detect memory information␊
3 *␊
4 * Originally restored from pcefi10.5␊
5 * Dynamic mem detection original impl. by Rekursor␊
6 * System profiler fix and other fixes by Mozodojo.␊
7 */␊
8␊
9#include "libsaio.h"␊
10#include "pci.h"␊
11#include "platform.h"␊
12#include "spd.h"␊
13#include "saio_internal.h"␊
14#include "bootstruct.h"␊
15#include "memvendors.h"␊
16␊
17#ifndef DEBUG_SPD␊
18#define DEBUG_SPD 0␊
19#endif␊
20␊
21#if DEBUG_SPD␊
22#define DBG(x...)␉printf(x)␊
23#else␊
24#define DBG(x...)␊
25#endif␊
26␊
27static const char *spd_memory_types[] =␊
28{␊
29␉"RAM", /* 00h Undefined */␊
30␉"FPM", /* 01h FPM */␊
31␉"EDO", /* 02h EDO */␊
32␉"",␉␉␉␉/* 03h PIPELINE NIBBLE */␊
33␉"SDRAM", /* 04h SDRAM */␊
34␉"",␉␉␉␉/* 05h MULTIPLEXED ROM */␊
35␉"DDR SGRAM",␉/* 06h SGRAM DDR */␊
36␉"DDR SDRAM",␉/* 07h SDRAM DDR */␊
37␉"DDR2 SDRAM", /* 08h SDRAM DDR 2 */␊
38␉"",␉␉␉␉/* 09h Undefined */␊
39␉"",␉␉␉␉/* 0Ah Undefined */␊
40␉"DDR3 SDRAM" /* 0Bh SDRAM DDR 3 */␊
41};␊
42␊
43#define UNKNOWN_MEM_TYPE 2␊
44static uint8_t spd_mem_to_smbios[] =␊
45{␊
46␉UNKNOWN_MEM_TYPE, /* 00h Undefined */␊
47␉UNKNOWN_MEM_TYPE, /* 01h FPM */␊
48␉UNKNOWN_MEM_TYPE, /* 02h EDO */␊
49␉UNKNOWN_MEM_TYPE,␉ /* 03h PIPELINE NIBBLE */␊
50␉SMB_MEM_TYPE_SDRAM, /* 04h SDRAM */␊
51␉SMB_MEM_TYPE_ROM,␉ /* 05h MULTIPLEXED ROM */␊
52␉SMB_MEM_TYPE_SGRAM, /* 06h SGRAM DDR */␊
53␉SMB_MEM_TYPE_DDR, /* 07h SDRAM DDR */␊
54␉SMB_MEM_TYPE_DDR2, /* 08h SDRAM DDR 2 */␊
55␉UNKNOWN_MEM_TYPE, ␉ /* 09h Undefined */␊
56␉UNKNOWN_MEM_TYPE,␉ /* 0Ah Undefined */␊
57␉SMB_MEM_TYPE_DDR3 /* 0Bh SDRAM DDR 3 */␊
58};␊
59#define SPD_TO_SMBIOS_SIZE (sizeof(spd_mem_to_smbios)/sizeof(uint8_t))␊
60␊
61#define rdtsc(low,high) \␊
62__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))␊
63␊
64#define SMBHSTSTS 0␊
65#define SMBHSTCNT 2␊
66#define SMBHSTCMD 3␊
67#define SMBHSTADD 4␊
68#define SMBHSTDAT 5␊
69#define SBMBLKDAT 7␊
70␊
71/** Read one byte from the intel i2c, used for reading SPD on intel chipsets only. */␊
72unsigned char smb_read_byte_intel(uint32_t base, uint8_t adr, uint8_t cmd)␊
73{␊
74 int l1, h1, l2, h2;␊
75 unsigned long long t;␊
76␉␊
77 outb(base + SMBHSTSTS, 0x1f);␉␉␉␉␉// reset SMBus Controller␊
78 outb(base + SMBHSTDAT, 0xff);␊
79␉␊
80 while( inb(base + SMBHSTSTS) & 0x01)␊
81␉{␊
82␉␉rdtsc(l2, h2);␊
83␉␉t = ((h2 - h1) * 0xffffffff + (l2 - l1)) / (Platform->CPU.TSCFrequency / 100);␊
84␉␉if(t > 50) return 0xFF;␉// hack, exit if unresponsive.␊
85␉}␊
86␉␊
87 outb(base + SMBHSTCMD, cmd);␊
88 outb(base + SMBHSTADD, (adr << 1) | 0x01 );␊
89 outb(base + SMBHSTCNT, 0x48 );␊
90␉␊
91 rdtsc(l1, h1);␊
92␉␊
93 ␉while (!( inb(base + SMBHSTSTS) & 0x02))␉␉// wait til command finished␊
94␉{␉␊
95␉␉rdtsc(l2, h2);␊
96␉␉t = ((h2 - h1) * 0xffffffff + (l2 - l1)) / (Platform->CPU.TSCFrequency / 100);␊
97␉␉if (t > 5)␊
98␉␉␉break;␉␉␉␉␉␉␉␉␉// break after 5ms␊
99 }␊
100 return inb(base + SMBHSTDAT);␊
101}␊
102␊
103/* SPD i2c read optimization: prefetch only what we need, read non prefetcheable bytes on the fly */␊
104#define READ_SPD(spd, base, slot, x) spd[x] = smb_read_byte_intel(base, 0x50 + slot, x)␊
105␊
106int spd_indexes[] = {␊
107␉SPD_MEMORY_TYPE,␊
108␉SPD_DDR3_MEMORY_BANK,␊
109␉SPD_DDR3_MEMORY_CODE,␊
110␉SPD_NUM_ROWS,␊
111␉SPD_NUM_COLUMNS,␊
112␉SPD_NUM_DIMM_BANKS,␊
113␉SPD_NUM_BANKS_PER_SDRAM,␊
114␉4,7,8,9,12,64, /* TODO: give names to these values */␊
115␉95,96,97,98, 122,123,124,125 /* UIS */␊
116};␊
117#define SPD_INDEXES_SIZE (sizeof(spd_indexes) / sizeof(int))␊
118␊
119/** Read from spd *used* values only*/␊
120static void init_spd(char * spd, uint32_t base, int slot)␊
121{␊
122␉int i;␊
123␉for (i=0; i< SPD_INDEXES_SIZE; i++) {␊
124␉␉READ_SPD(spd, base, slot, spd_indexes[i]);␊
125␉}␊
126}␊
127␊
128/** Get Vendor Name from spd, 2 cases handled DDR3 and DDR2, ␊
129 have different formats, always return a valid ptr.*/␊
130const char * getVendorName(RamSlotInfo_t* slot, uint32_t base, int slot_num)␊
131{␊
132 uint8_t bank = 0;␊
133 uint8_t code = 0;␊
134 int i = 0;␊
135 uint8_t * spd = (uint8_t *) slot->spd;␊
136␊
137 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) { // DDR3␊
138 bank = (spd[SPD_DDR3_MEMORY_BANK] & 0x07f); // constructors like Patriot use b7=1␊
139 code = spd[SPD_DDR3_MEMORY_CODE];␊
140 for (i=0; i < VEN_MAP_SIZE; i++)␊
141 if (bank==vendorMap[i].bank && code==vendorMap[i].code)␊
142 return vendorMap[i].name;␊
143 }␊
144 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) {␊
145 if(spd[64]==0x7f) {␊
146 for (i=64; i<72 && spd[i]==0x7f;i++) {␊
147␉␉␉ bank++;␊
148␉␉␉ READ_SPD(spd, base, slot_num,i+1); // prefetch next spd byte to read for next loop␊
149␉␉␉}␊
150␉␉␉READ_SPD(spd, base, slot_num,i);␊
151 code = spd[i];␊
152 } else {␊
153 code = spd[64]; ␊
154 bank = 0;␊
155 }␊
156 for (i=0; i < VEN_MAP_SIZE; i++)␊
157 if (bank==vendorMap[i].bank && code==vendorMap[i].code)␊
158 return vendorMap[i].name;␊
159 }␊
160 /* OK there is no vendor id here lets try to match the partnum if it exists */␊
161 if (strstr(slot->PartNo,"GU332") == slot->PartNo) // Unifosa fingerprint␊
162 return "Unifosa";␊
163 return "NoName";␊
164}␊
165␊
166/** Get Default Memory Module Speed (no overclocking handled) */␊
167int getDDRspeedMhz(const char * spd)␊
168{␊
169 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) { ␊
170 switch(spd[12]) {␊
171 case 0x0f:␊
172 return 1066;␊
173 case 0x0c:␊
174 return 1333;␊
175 case 0x0a:␊
176 return 1600;␊
177 case 0x14:␊
178 default:␊
179 return 800;␊
180 }␊
181 } ␊
182 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) {␊
183 switch(spd[9]) {␊
184 case 0x50:␊
185 return 400;␊
186 case 0x3d:␊
187 return 533;␊
188 case 0x30:␊
189 return 667;␊
190 case 0x25:␊
191 default:␊
192 return 800;␊
193 }␊
194 }␊
195 return 800; // default freq for unknown types␊
196}␊
197␊
198#define SMST(a) ((uint8_t)((spd[a] & 0xf0) >> 4))␊
199#define SLST(a) ((uint8_t)(spd[a] & 0x0f))␊
200␊
201/** Get DDR3 or DDR2 serial number, 0 most of the times, always return a valid ptr */␊
202const char *getDDRSerial(const char* spd)␊
203{␊
204 static char asciiSerial[16];␊
205 ␊
206 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) // DDR3␊
207 {␊
208␉sprintf(asciiSerial, "%X%X%X%X%X%X%X%X", SMST(122) /*& 0x7*/, SLST(122), SMST(123), SLST(123), SMST(124), SLST(124), SMST(125), SLST(125));␊
209 }␊
210 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) // DDR2 or DDR␊
211 { ␊
212␉sprintf(asciiSerial, "%X%X%X%X%X%X%X%X", SMST(95) /*& 0x7*/, SLST(95), SMST(96), SLST(96), SMST(97), SLST(97), SMST(98), SLST(98));␊
213 }␊
214␊
215 return strdup(asciiSerial);␊
216}␊
217␊
218/** Get DDR3 or DDR2 Part Number, always return a valid ptr */␊
219const char * getDDRPartNum(char* spd, uint32_t base, int slot)␊
220{␊
221␉static char asciiPartNo[32];␊
222␉int i, start=0, index = 0;␊
223␊
224 if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR3) {␊
225␉␉start = 128;␊
226␉}␊
227 else if (spd[SPD_MEMORY_TYPE]==SPD_MEMORY_TYPE_SDRAM_DDR2) {␊
228␉␉start = 73;␊
229␉}␊
230␉␊
231 // Check that the spd part name is zero terminated and that it is ascii:␊
232 bzero(asciiPartNo, sizeof(asciiPartNo));␊
233␉char c;␊
234␉for (i=start; i < start + sizeof(asciiPartNo); i++) {␊
235␉␉READ_SPD(spd, base, slot, i); // only read once the corresponding model part (ddr3 or ddr2)␊
236␉␉c = spd[i];␊
237␉␉if (isalpha(c) || isdigit(c) || ispunct(c)) // It seems that System Profiler likes only letters and digits...␊
238␉␉␉asciiPartNo[index++] = c;␊
239␉␉else if (!isascii(c))␊
240␉␉␉break;␊
241␉}␊
242␉␊
243␉return strdup(asciiPartNo);␊
244 return NULL;␊
245}␊
246␊
247int mapping []= {0,2,1,3,4,6,5,7,8,10,9,11};␊
248␊
249␊
250/** Read from smbus the SPD content and interpret it for detecting memory attributes */␊
251static void read_smb_intel(pci_dt_t *smbus_dev)␊
252{ ␊
253 int i, speed;␊
254 uint8_t spd_size, spd_type;␊
255 uint32_t base;␊
256 bool dump = false;␊
257 RamSlotInfo_t* slot;␊
258␊
259 base = pci_config_read16(smbus_dev->dev.addr, 0x20) & 0xFFFE;␊
260 DBG("Scanning smbus_dev <%04x, %04x> ...\n",smbus_dev->vendor_id, smbus_dev->device_id);␊
261␊
262 getBoolForKey("DumpSPD", &dump, &bootInfo->bootConfig);␊
263 bool fullBanks = // needed at least for laptops␊
264 Platform->DMI.MemoryModules == Platform->DMI.MaxMemorySlots;␊
265 // Search MAX_RAM_SLOTS slots␊
266␉char spdbuf[256];␊
267␊
268 for (i = 0; i < MAX_RAM_SLOTS; i++){␊
269␉␉DBG("Scanning slot %d\n", i);␊
270 slot = &Platform->RAM.DIMM[i];␊
271 spd_size = smb_read_byte_intel(base, 0x50 + i, 0);␊
272 // Check spd is present␊
273 if (spd_size && (spd_size != 0xff) ) {␊
274␉␉␉slot->spd = spdbuf;␊
275 slot->InUse = true;␊
276␊
277 bzero(slot->spd, spd_size);␊
278 ␊
279 // Copy spd data into buffer␊
280 ␊
281␉␉␉//for (x = 0; x < spd_size; x++) slot->spd[x] = smb_read_byte_intel(base, 0x50 + i, x);␊
282 init_spd(slot->spd, base, i);␊
283␉␉␉␊
284 switch (slot->spd[SPD_MEMORY_TYPE]) {␊
285 case SPD_MEMORY_TYPE_SDRAM_DDR2:␊
286 ␊
287 slot->ModuleSize = ((1 << (slot->spd[SPD_NUM_ROWS] & 0x0f) + (slot->spd[SPD_NUM_COLUMNS] & 0x0f) - 17) * ␊
288 ((slot->spd[SPD_NUM_DIMM_BANKS] & 0x7) + 1) * slot->spd[SPD_NUM_BANKS_PER_SDRAM]);␊
289 break;␊
290 ␊
291 case SPD_MEMORY_TYPE_SDRAM_DDR3:␊
292 ␊
293 slot->ModuleSize = ((slot->spd[4] & 0x0f) + 28 ) + ((slot->spd[8] & 0x7) + 3 );␊
294 slot->ModuleSize -= (slot->spd[7] & 0x7) + 25;␊
295 slot->ModuleSize = ((1 << slot->ModuleSize) * (((slot->spd[7] >> 3) & 0x1f) + 1));␊
296 ␊
297 break;␊
298 }␊
299 ␊
300 spd_type = (slot->spd[SPD_MEMORY_TYPE] < ((char) 12) ? slot->spd[SPD_MEMORY_TYPE] : 0);␊
301 slot->Type = spd_mem_to_smbios[spd_type];␊
302 slot->PartNo = getDDRPartNum(slot->spd, base, i);␊
303 slot->Vendor = getVendorName(slot, base, i);␊
304 slot->SerialNo = getDDRSerial(slot->spd);␊
305␊
306 // determine spd speed␊
307 speed = getDDRspeedMhz(slot->spd);␊
308 if (slot->Frequency<speed) slot->Frequency = speed;␊
309␉␉␉␊
310␉␉␉// pci memory controller if available, is more reliable␊
311␉␉␉if (Platform->RAM.Frequency > 0) {␊
312␉␉␉␉uint32_t freq = (uint32_t)Platform->RAM.Frequency / 500000;␊
313␉␉␉␉// now round off special cases␊
314␉␉␉␉uint32_t fmod100 = freq %100;␊
315␉␉␉␉switch(fmod100) {␊
316␉␉␉␉␉case 1:␉freq--;␉break;␊
317␉␉␉␉␉case 32:␉freq++;␉break;␊
318␉␉␉␉␉case 65:␉freq++; break;␊
319␉␉␉␉␉case 98:␉freq+=2;break;␊
320␉␉␉␉␉case 99:␉freq++; break;␊
321␉␉␉␉}␊
322␉␉␉␉slot->Frequency = freq;␊
323␉␉␉}␊
324␉␉␉␊
325␉␉␉verbose("Slot: %d Type %d %dMB (%s) %dMHz Vendor=%s\n PartNo=%s SerialNo=%s\n", ␊
326 i, ␊
327 (int)slot->Type,␊
328 slot->ModuleSize, ␊
329 spd_memory_types[spd_type],␊
330 slot->Frequency,␊
331 slot->Vendor,␊
332 slot->PartNo,␊
333 slot->SerialNo); ␊
334␉␉␉if(DEBUG_SPD) {␊
335 dumpPhysAddr("spd content: ",slot->spd, spd_size);␊
336 getc();␊
337 }␊
338 }␊
339 // laptops sometimes show slot 0 and 2 with slot 1 empty when only 2 slots are presents so:␊
340 Platform->DMI.DIMM[i]= ␊
341 i>0 && Platform->RAM.DIMM[1].InUse==false && fullBanks && Platform->DMI.MaxMemorySlots==2 ? ␊
342 mapping[i] : i; // for laptops case, mapping setup would need to be more generic than this␊
343 ␊
344␉␉slot->spd = NULL;␊
345␊
346 } // for␊
347}␊
348␊
349static struct smbus_controllers_t smbus_controllers[] = {␊
350␊
351␉{0x8086, 0x269B, "ESB2", read_smb_intel },␊
352␉{0x8086, 0x25A4, "6300ESB", read_smb_intel },␊
353␉{0x8086, 0x24C3, "ICH4", read_smb_intel },␊
354␉{0x8086, 0x24D3, "ICH5", read_smb_intel },␊
355␉{0x8086, 0x266A, "ICH6", read_smb_intel },␊
356␉{0x8086, 0x27DA, "ICH7", read_smb_intel },␊
357␉{0x8086, 0x283E, "ICH8", read_smb_intel },␊
358␉{0x8086, 0x2930, "ICH9", read_smb_intel },␉␊
359␉{0x8086, 0x3A30, "ICH10R", read_smb_intel },␊
360␉{0x8086, 0x3A60, "ICH10B", read_smb_intel },␊
361␉{0x8086, 0x3B30, "P55", read_smb_intel },␊
362␉{0x8086, 0x5032, "EP80579", read_smb_intel }␊
363␊
364};␊
365␊
366// initial call : pci_dt = root_pci_dev;␊
367// find_and_read_smbus_controller(root_pci_dev);␊
368bool find_and_read_smbus_controller(pci_dt_t* pci_dt)␊
369{␊
370 pci_dt_t␉*current = pci_dt;␊
371 int i;␊
372␊
373 while (current) {␊
374#if DEBUG_SPD␊
375 printf("%02x:%02x.%x [%04x] [%04x:%04x] :: %s\n", ␊
376 current->dev.bits.bus, current->dev.bits.dev, current->dev.bits.func, ␊
377 current->class_id, current->vendor_id, current->device_id, ␊
378 get_pci_dev_path(current));␊
379#endif␊
380␉for ( i = 0; i < sizeof(smbus_controllers) / sizeof(smbus_controllers[0]); i++ )␊
381 {␊
382 if (current->vendor_id == smbus_controllers[i].vendor &&␊
383 current->device_id == smbus_controllers[i].device)␊
384 {␊
385 smbus_controllers[i].read_smb(current); // read smb␊
386 return true;␊
387 } ␊
388 }␊
389 find_and_read_smbus_controller(current->children);␊
390 current = current->next;␊
391 }␊
392 return false; // not found␊
393}␊
394␊
395void scan_spd(PlatformInfo_t *p)␊
396{␊
397 find_and_read_smbus_controller(root_pci_dev);␊
398}␊
399

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