1 | /*␊ |
2 | * ATI Graphics Card Enabler, part of the Chameleon Boot Loader Project␊ |
3 | *␊ |
4 | * Copyright 2010 by Islam M. Ahmed Zaid. All rights reserved.␊ |
5 | *␊ |
6 | */␊ |
7 | ␊ |
8 | ␊ |
9 | #include "libsaio.h"␊ |
10 | #include "boot.h"␊ |
11 | #include "bootstruct.h"␊ |
12 | #include "pci.h"␊ |
13 | #include "platform.h"␊ |
14 | #include "device_inject.h"␊ |
15 | ␊ |
16 | #include "ati_reg.h"␊ |
17 | ␊ |
18 | #define Reg32(reg)␉␉␉␉␉(*(volatile uint32_t *)(card->mmio + reg))␊ |
19 | #define RegRead32(reg)␉␉␉␉(Reg32(reg))␊ |
20 | #define RegWrite32(reg, value)␉␉(Reg32(reg) = value)␊ |
21 | ␊ |
22 | typedef enum {␊ |
23 | ␉kNul,␊ |
24 | ␉kStr,␊ |
25 | ␉kPtr,␊ |
26 | ␉kCst␊ |
27 | } type_t;␊ |
28 | ␊ |
29 | typedef enum {␊ |
30 | ␉CHIP_FAMILY_UNKNOW,␊ |
31 | ␉CHIP_FAMILY_RS600,␊ |
32 | ␉CHIP_FAMILY_RS690,␊ |
33 | ␉CHIP_FAMILY_RS740,␊ |
34 | ␉CHIP_FAMILY_R600,␉/* r600 */␊ |
35 | ␉CHIP_FAMILY_RV610,␊ |
36 | ␉CHIP_FAMILY_RV630,␊ |
37 | ␉CHIP_FAMILY_RV670,␊ |
38 | ␉CHIP_FAMILY_RV620,␊ |
39 | ␉CHIP_FAMILY_RV635,␊ |
40 | ␉CHIP_FAMILY_RS780,␊ |
41 | ␉CHIP_FAMILY_RS880,␊ |
42 | ␉CHIP_FAMILY_RV770, /* r700 */␊ |
43 | ␉CHIP_FAMILY_RV730,␊ |
44 | ␉CHIP_FAMILY_RV710,␊ |
45 | ␉CHIP_FAMILY_RV740,␊ |
46 | ␉CHIP_FAMILY_CEDAR, /* evergreen */␊ |
47 | ␉CHIP_FAMILY_REDWOOD,␊ |
48 | ␉CHIP_FAMILY_JUNIPER,␊ |
49 | ␉CHIP_FAMILY_CYPRESS,␊ |
50 | ␉CHIP_FAMILY_HEMLOCK,␊ |
51 | ␉CHIP_FAMILY_LAST␊ |
52 | } chip_family_t;␊ |
53 | ␊ |
54 | static const char *chip_family_name[] = {␊ |
55 | ␉"UNKNOW",␊ |
56 | ␉"RS600",␊ |
57 | ␉"RS690",␊ |
58 | ␉"RS740",␊ |
59 | ␉/* r600 */␊ |
60 | ␉"R600",␊ |
61 | ␉"RV610",␊ |
62 | ␉"RV630",␊ |
63 | ␉"RV670",␊ |
64 | ␉"RV620",␊ |
65 | ␉"RV635",␊ |
66 | ␉"RS780",␊ |
67 | ␉"RS880",␊ |
68 | ␉/* r700 */␊ |
69 | ␉"RV770",␊ |
70 | ␉"RV730",␊ |
71 | ␉"RV710",␊ |
72 | ␉"RV740",␊ |
73 | ␉/* evergreen */␊ |
74 | ␉"Cedar",␉// RV810␊ |
75 | ␉"Redwood",␉// RV830␊ |
76 | ␉"Juniper",␉// RV840␊ |
77 | ␉"Cypress",␉// RV870␊ |
78 | ␉"Hemlock",␉␊ |
79 | };␊ |
80 | ␊ |
81 | typedef struct {␊ |
82 | ␉const char␉␉*name;␊ |
83 | ␉uint8_t␉␉␉ports;␊ |
84 | } card_config_t;␊ |
85 | ␊ |
86 | static card_config_t card_configs[] = {␊ |
87 | ␉{NULL,␉␉␉0},␊ |
88 | ␉{"Alopias",␉␉2},␊ |
89 | ␉{"Alouatta",␉4},␊ |
90 | ␉{"Baboon",␉␉3},␊ |
91 | ␉{"Cardinal",␉2},␊ |
92 | ␉{"Caretta",␉␉1},␊ |
93 | ␉{"Colobus",␉␉2},␊ |
94 | ␉{"Douc",␉␉2},␊ |
95 | ␉{"Eulemur",␉␉3},␊ |
96 | ␉{"Flicker",␉␉3},␊ |
97 | ␉{"Galago",␉␉2},␊ |
98 | ␉{"Gliff",␉␉3},␊ |
99 | ␉{"Hoolock",␉␉3},␊ |
100 | ␉{"Hypoprion",␉2},␊ |
101 | ␉{"Iago",␉␉2},␊ |
102 | ␉{"Kakapo",␉␉3},␊ |
103 | ␉{"Kipunji",␉␉4},␊ |
104 | ␉{"Lamna",␉␉2},␊ |
105 | ␉{"Langur",␉␉3},␊ |
106 | ␉{"Megalodon",␉3},␊ |
107 | ␉{"Motmot",␉␉2},␊ |
108 | ␉{"Peregrine",␉2},␊ |
109 | ␉{"Quail",␉␉3},␊ |
110 | ␉{"Raven",␉␉3},␊ |
111 | ␉{"Shrike",␉␉3},␊ |
112 | ␉{"Sphyrna",␉␉1},␊ |
113 | ␉{"Triakis",␉␉2},␊ |
114 | ␉{"Uakari",␉␉4},␊ |
115 | ␉{"Vervet",␉␉4},␊ |
116 | ␉{"Zonalis",␉␉6}␊ |
117 | };␊ |
118 | ␊ |
119 | typedef enum {␊ |
120 | ␉kNull,␊ |
121 | ␉kAlopias,␊ |
122 | ␉kAlouatta,␊ |
123 | ␉kBaboon,␊ |
124 | ␉kCardinal,␊ |
125 | ␉kCaretta,␊ |
126 | ␉kColobus,␊ |
127 | ␉kDouc,␊ |
128 | ␉kEulemur,␊ |
129 | ␉kFlicker,␊ |
130 | ␉kGalago,␊ |
131 | ␉kGliff,␊ |
132 | ␉kHoolock,␊ |
133 | ␉kHypoprion,␊ |
134 | ␉kIago,␊ |
135 | ␉kKakapo,␊ |
136 | ␉kKipunji,␊ |
137 | ␉kLamna,␊ |
138 | ␉kLangur,␊ |
139 | ␉kMegalodon,␊ |
140 | ␉kMotmot,␊ |
141 | ␉kPeregrine,␊ |
142 | ␉kQuail,␊ |
143 | ␉kRaven,␊ |
144 | ␉kShrike,␊ |
145 | ␉kSphyrna,␊ |
146 | ␉kTriakis,␊ |
147 | ␉kUakari,␊ |
148 | ␉kVervet,␊ |
149 | ␉kZonalis,␊ |
150 | ␉kCfgEnd␊ |
151 | } config_name_t;␊ |
152 | ␊ |
153 | typedef struct {␊ |
154 | ␉uint16_t␉␉device_id;␊ |
155 | ␉uint32_t␉␉subsys_id;␊ |
156 | ␉chip_family_t␉chip_family;␊ |
157 | ␉const char␉␉*model_name;␊ |
158 | ␉config_name_t␉cfg_name;␊ |
159 | } radeon_card_info_t;␊ |
160 | ␊ |
161 | static radeon_card_info_t radeon_cards[] = {␊ |
162 | ␉/* Earlier cards are not supported */␊ |
163 | ␉{ 0x9400,␉0x30001002,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 PRO",␉␉␉kNull␉␉},␊ |
164 | ␉{ 0x9400,␉0x25521002,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 XT",␉␉␉kNull␉␉},␊ |
165 | ␊ |
166 | ␉{ 0x9440,␉0x24401682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
167 | ␉{ 0x9440,␉0x24411682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
168 | ␉{ 0x9440,␉0x24441682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
169 | ␉{ 0x9440,␉0x24451682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
170 | ␊ |
171 | ␉{ 0x9441,␉0x24401682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870 X2",␉␉␉kMotmot␉␉},␊ |
172 | ␊ |
173 | ␉{ 0x9442,␉0x24701682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
174 | ␉{ 0x9442,␉0x24711682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
175 | ␉{ 0x9442,␉0x080110B0,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
176 | ␉{ 0x9442,␉0xE104174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
177 | ␊ |
178 | ␉{ 0x944A,␉0x30001682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
179 | ␉{ 0x944A,␉0x30001043,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
180 | ␉{ 0x944A,␉0x30001458,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
181 | ␉{ 0x944A,␉0x30001462,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
182 | ␉{ 0x944A,␉0x30001545,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
183 | ␉{ 0x944A,␉0x30001787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
184 | ␉{ 0x944A,␉0x3000174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
185 | ␉{ 0x944A,␉0x300017AF,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
186 | ␊ |
187 | ␉{ 0x944C,␉0x24801682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4830",␉␉␉␉kMotmot␉␉},␊ |
188 | ␉{ 0x944C,␉0x24811682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4830",␉␉␉␉kMotmot␉␉},␊ |
189 | ␊ |
190 | ␉{ 0x944E,␉0x3260174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4810 Series",␉␉kMotmot␉␉},␊ |
191 | ␉{ 0x944E,␉0x3261174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4810 series",␉␉kMotmot␉␉},␊ |
192 | ␉{ 0x944E,␉0x30001787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4730 Series",␉␉kMotmot␉␉},␊ |
193 | ␉{ 0x944E,␉0x30101787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4810 Series",␉␉kMotmot␉␉},␊ |
194 | ␉{ 0x944E,␉0x31001787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4820",␉␉␉␉kMotmot␉␉},␊ |
195 | ␊ |
196 | ␉{ 0x9490,␉0x30501787,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4710",␉␉␉␉kNull␉␉},␊ |
197 | ␉{ 0x9490,␉0x4710174B,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4710",␉␉␉␉kNull␉␉},␊ |
198 | ␉{ 0x9490,␉0x300017AF,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4710",␉␉␉␉kNull␉␉},␊ |
199 | ␊ |
200 | ␉{ 0x9498,␉0x30501787,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4700",␉␉␉␉kNull␉␉},␊ |
201 | ␉{ 0x9498,␉0x31001787,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4720",␉␉␉␉kNull␉␉},␊ |
202 | ␉{ 0x9498,␉0x24511682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4650",␉␉␉␉kNull␉␉},␊ |
203 | ␉{ 0x9498,␉0x24521682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4650",␉␉␉␉kNull␉␉},␊ |
204 | ␉{ 0x9498,␉0x24541682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4650",␉␉␉␉kNull␉␉},␊ |
205 | ␉{ 0x9498,␉0x29331682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4670",␉␉␉␉kNull␉␉},␊ |
206 | ␉{ 0x9498,␉0x29341682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4670",␉␉␉␉kNull␉␉},␊ |
207 | ␉{ 0x9498,␉0x21CF1458,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4600 Series",␉␉kNull␉␉},␊ |
208 | ␊ |
209 | ␉{ 0x94B3,␉0x29001682,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
210 | ␉{ 0x94B3,␉0x1170174B,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
211 | ␉{ 0x94B3,␉0x10020D00,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
212 | ␊ |
213 | ␉{ 0x94C1,␉0x10021002,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Pro",␉␉␉kNull␉␉},␊ |
214 | ␉{ 0x94C1,␉0x0D021002,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
215 | ␉{ 0x94C1,␉0x0D021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Pro",␉␉␉kNull␉␉},␊ |
216 | ␉{ 0x94C1,␉0x0D021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
217 | ␉{ 0x94C1,␉0x21741458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
218 | ␉{ 0x94C1,␉0x10401462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
219 | ␉{ 0x94C1,␉0x10331462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
220 | ␉{ 0x94C1,␉0x10331462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
221 | ␉{ 0x94C1,␉0x11101462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
222 | ␊ |
223 | ␉{ 0x94C3,␉0x37161642,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
224 | ␉{ 0x94C3,␉0x30001642,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 3410",␉␉␉␉kNull␉␉},␊ |
225 | ␉{ 0x94C3,␉0x03421002,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
226 | ␉{ 0x94C3,␉0x30001025,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
227 | ␉{ 0x94C3,␉0x04021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
228 | ␉{ 0x94C3,␉0x03021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
229 | ␉{ 0x94C3,␉0x04021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
230 | ␉{ 0x94C3,␉0x216A1458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
231 | ␉{ 0x94C3,␉0x21721458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
232 | ␉{ 0x94C3,␉0x30001458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 3410",␉␉␉␉kNull␉␉},␊ |
233 | ␉{ 0x94C3,␉0x11041462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
234 | ␉{ 0x94C3,␉0x10411462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
235 | ␉{ 0x94C3,␉0x11051462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
236 | ␉{ 0x94C3,␉0x10321462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
237 | ␉{ 0x94C3,␉0x30001462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 3410",␉␉␉␉kNull␉␉},␊ |
238 | ␉{ 0x94C3,␉0x3000148C,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
239 | ␉{ 0x94C3,␉0x2247148C,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 LE",␉␉␉kNull␉␉},␊ |
240 | ␉{ 0x94C3,␉0x3000174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
241 | ␉{ 0x94C3,␉0xE400174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
242 | ␉{ 0x94C3,␉0xE370174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
243 | ␉{ 0x94C3,␉0xE400174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
244 | ␉{ 0x94C3,␉0xE370174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
245 | ␉{ 0x94C3,␉0xE400174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
246 | ␉{ 0x94C3,␉0x203817AF,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
247 | ␉{ 0x94C3,␉0x30001787,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
248 | ␉{ 0x94C3,␉0x22471787,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 LE",␉␉␉kNull␉␉},␊ |
249 | ␉{ 0x94C3,␉0x01011A93,␉CHIP_FAMILY_RV610,␉␉"Qimonda Radeon HD 2400 PRO",␉␉kNull␉␉},␊ |
250 | ␊ |
251 | ␊ |
252 | ␉{ 0x9501,␉0x30001002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
253 | ␉{ 0x9501,␉0x25421002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3870",␉␉␉␉kNull␉␉},␊ |
254 | ␉{ 0x9501,␉0x4750174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
255 | ␉{ 0x9501,␉0x3000174B,␉CHIP_FAMILY_RV670,␉␉"Sapphire Radeon HD 3690",␉␉␉kNull␉␉},␊ |
256 | ␉{ 0x9501,␉0x30001787,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
257 | ␊ |
258 | ␉{ 0x9505,␉0x30001002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
259 | ␉{ 0x9505,␉0x25421002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3850",␉␉␉␉kNull␉␉},␊ |
260 | ␉{ 0x9505,␉0x30011043,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
261 | ␉{ 0x9505,␉0x3000148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3850",␉␉␉␉kNull␉␉},␊ |
262 | ␉{ 0x9505,␉0x3002148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
263 | ␉{ 0x9505,␉0x3001148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
264 | ␉{ 0x9505,␉0x3003148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
265 | ␉{ 0x9505,␉0x3004148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
266 | ␉{ 0x9505,␉0x4730174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
267 | ␉{ 0x9505,␉0x3010174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
268 | ␉{ 0x9505,␉0x3001174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
269 | ␉{ 0x9505,␉0x3000174B,␉CHIP_FAMILY_RV670,␉␉"Sapphire Radeon HD 3690",␉␉␉kNull␉␉},␊ |
270 | ␉{ 0x9505,␉0x30001787,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
271 | ␉{ 0x9505,␉0x301017AF,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
272 | ␊ |
273 | ␉{ 0x9540,␉0x4590174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4590",␉␉␉␉kNull␉␉},␊ |
274 | ␉{ 0x9540,␉0x30501787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4590",␉␉␉␉kNull␉␉},␊ |
275 | ␊ |
276 | ␉{ 0x954F,␉0x29201682,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4550",␉␉␉␉kNull␉␉},␊ |
277 | ␉{ 0x954F,␉0x29211682,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4550",␉␉␉␉kNull␉␉},␊ |
278 | ␉{ 0x954F,␉0x30901682,␉CHIP_FAMILY_RV710,␉␉"XFX Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
279 | ␉{ 0x954F,␉0x4450174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4450",␉␉␉␉kNull␉␉},␊ |
280 | ␉{ 0x954F,␉0x3000174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4520",␉␉␉␉kNull␉␉},␊ |
281 | ␉{ 0x954F,␉0x30501787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4450",␉␉␉␉kNull␉␉},␊ |
282 | ␉{ 0x954F,␉0x31001787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4520",␉␉␉␉kNull␉␉},␊ |
283 | ␉{ 0x954F,␉0x4570174B,␉CHIP_FAMILY_RV710,␉␉"Sapphire Radeon HD4570",␉␉␉kNull␉␉},␊ |
284 | ␉{ 0x954F,␉0x301017AF,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4450",␉␉␉␉kNull␉␉},␊ |
285 | ␊ |
286 | ␉{ 0x9552,␉0x3000148C,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
287 | ␉{ 0x9552,␉0x3000174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
288 | ␉{ 0x9552,␉0x30001787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
289 | ␉{ 0x9552,␉0x300017AF,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
290 | ␊ |
291 | ␉{ 0x9581,␉0x95811002,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
292 | ␉{ 0x9581,␉0x3000148C,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
293 | ␊ |
294 | ␉{ 0x9583,␉0x3000148C,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
295 | ␉{ 0x9588,␉0x01021A93,␉CHIP_FAMILY_RV630,␉␉"Qimonda Radeon HD 2600 XT",␉␉kNull␉␉},␊ |
296 | ␊ |
297 | ␉{ 0x9589,␉0x30001462,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3610",␉␉␉␉kNull␉␉},␊ |
298 | ␉{ 0x9589,␉0x30001642,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3610",␉␉␉␉kNull␉␉},␊ |
299 | ␉{ 0x9589,␉0x0E41174B,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
300 | ␉{ 0x9589,␉0x30001787,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
301 | ␉{ 0x9589,␉0x01001A93,␉CHIP_FAMILY_RV630,␉␉"Qimonda Radeon HD 2600 PRO",␉␉kNull␉␉},␊ |
302 | ␊ |
303 | ␉{ 0x9591,␉0x2303148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
304 | ␊ |
305 | ␉{ 0x9598,␉0xB3831002,␉CHIP_FAMILY_RV635,␉␉"ATI All-in-Wonder HD",␉␉␉␉kNull␉␉},␊ |
306 | ␉{ 0x9598,␉0x30011043,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
307 | ␉{ 0x9598,␉0x30001043,␉CHIP_FAMILY_RV635,␉␉"HD3730",␉␉␉␉␉␉␉kNull␉␉},␊ |
308 | ␉{ 0x9598,␉0x3000148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 3730",␉␉␉␉kNull␉␉},␊ |
309 | ␉{ 0x9598,␉0x3031148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
310 | ␉{ 0x9598,␉0x3001148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4580",␉␉␉␉kNull␉␉},␊ |
311 | ␉{ 0x9598,␉0x30011545,␉CHIP_FAMILY_RV635,␉␉"VisionTek Radeon HD 2600 Pro",␉␉kNull␉␉},␊ |
312 | ␉{ 0x9598,␉0x30001545,␉CHIP_FAMILY_RV635,␉␉"VisionTek Radeon HD 2600 XT",␉␉kNull␉␉},␊ |
313 | ␉{ 0x9598,␉0x4570174B,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
314 | ␉{ 0x9598,␉0x4580174B,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4580",␉␉␉␉kNull␉␉},␊ |
315 | ␉{ 0x9598,␉0x4610174B,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4610",␉␉␉␉kNull␉␉},␊ |
316 | ␉{ 0x9598,␉0x3000174B,␉CHIP_FAMILY_RV635,␉␉"Sapphire Radeon HD 3730",␉␉␉kNull␉␉},␊ |
317 | ␉{ 0x9598,␉0x3001174B,␉CHIP_FAMILY_RV635,␉␉"Sapphire Radeon HD 3750",␉␉␉kNull␉␉},␊ |
318 | ␉{ 0x9598,␉0x301017AF,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
319 | ␉{ 0x9598,␉0x301117AF,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4580",␉␉␉␉kNull␉␉},␊ |
320 | ␉{ 0x9598,␉0x300117AF,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD3750",␉␉␉␉kNull␉␉},␊ |
321 | ␉{ 0x9598,␉0x30501787,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4610",␉␉␉␉kNull␉␉},␊ |
322 | ␊ |
323 | ␉{ 0x95C0,␉0x3000148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3550",␉␉␉␉kNull␉␉},␊ |
324 | ␉{ 0x95C0,␉0xE3901745,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3550",␉␉␉␉kNull␉␉},␊ |
325 | ␉{ 0x95C0,␉0x3002174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3570",␉␉␉␉kNull␉␉},␊ |
326 | ␉{ 0x95C0,␉0x3020174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
327 | ␉{ 0x95C0,␉0x3000174B,␉CHIP_FAMILY_RV620,␉␉"Sapphire Radeon HD 3550",␉␉␉kNull␉␉},␊ |
328 | ␊ |
329 | ␉{ 0x95C5,␉0x3000148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3450",␉␉␉␉kNull␉␉},␊ |
330 | ␉{ 0x95C5,␉0x3001148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3550",␉␉␉␉kNull␉␉},␊ |
331 | ␉{ 0x95C5,␉0x3002148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4230",␉␉␉␉kNull␉␉},␊ |
332 | ␉{ 0x95C5,␉0x3033148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4230",␉␉␉␉kNull␉␉},␊ |
333 | ␉{ 0x95C5,␉0x3003148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
334 | ␉{ 0x95C5,␉0x3032148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
335 | ␉{ 0x95C5,␉0x3010174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
336 | ␉{ 0x95C5,␉0x4250174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
337 | ␉{ 0x95C5,␉0x30501787,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
338 | ␉{ 0x95C5,␉0x301017AF,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4230",␉␉␉␉kNull␉␉},␊ |
339 | ␉{ 0x95C5,␉0x01051A93,␉CHIP_FAMILY_RV620,␉␉"Qimonda Radeon HD 3450",␉␉␉kNull␉␉},␊ |
340 | ␉{ 0x95C5,␉0x01041A93,␉CHIP_FAMILY_RV620,␉␉"Qimonda Radeon HD 3450",␉␉␉kNull␉␉},␊ |
341 | ␊ |
342 | ␉/* Evergreen */␊ |
343 | ␉{ 0x6898,␉0x032E1043,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kUakari␉␉},␊ |
344 | ␉{ 0x6898,␉0xE140174B,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kUakari␉␉},␊ |
345 | ␉{ 0x6898,␉0x0B001002,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kZonalis␉},␊ |
346 | ␊ |
347 | ␉{ 0x6899,␉0x21E41458,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
348 | ␉{ 0x6899,␉0x200A1787,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
349 | ␉{ 0x6899,␉0x22901787,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
350 | ␉{ 0x6899,␉0xE140174B,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
351 | ␊ |
352 | ␉{ 0x689C,␉0x03521043,␉CHIP_FAMILY_HEMLOCK,␉"ASUS ARES",␉␉␉␉␉␉kUakari␉␉},␊ |
353 | ␉{ 0x689C,␉0x039E1043,␉CHIP_FAMILY_HEMLOCK,␉"ASUS EAH5870 Series",␉␉␉␉kUakari␉␉},␊ |
354 | ␉{ 0x689C,␉0x30201682,␉CHIP_FAMILY_HEMLOCK,␉"ATI Radeon HD 5970",␉␉␉␉kUakari␉␉},␊ |
355 | ␊ |
356 | ␉{ 0x68B8,␉0xE147174B,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
357 | ␉{ 0x68B8,␉0x21D71458,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
358 | ␉{ 0x68B8,␉0x1482174B,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
359 | ␉{ 0x68B8,␉0x29901682,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
360 | ␉{ 0x68B8,␉0x29911682,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
361 | ␉{ 0x68B8,␉0x200B1787,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
362 | ␉{ 0x68B8,␉0x22881787,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
363 | ␊ |
364 | ␉{ 0x68D8,␉0x301117AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5690",␉␉␉␉kNull␉␉},␊ |
365 | ␉{ 0x68D8,␉0x301017AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5730",␉␉␉␉kNull␉␉},␊ |
366 | ␉{ 0x68D8,␉0x30001787,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5730",␉␉␉␉kNull␉␉},␊ |
367 | ␉{ 0x68D8,␉0x5690174B,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5690",␉␉␉␉kNull␉␉},␊ |
368 | ␉{ 0x68D8,␉0x5730174B,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5730",␉␉␉␉kNull␉␉},␊ |
369 | ␉{ 0x68D8,␉0x21D91458,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5670",␉␉␉␉kBaboon␉␉},␊ |
370 | ␉{ 0x68D8,␉0x03561043,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5670",␉␉␉␉kBaboon␉␉},␊ |
371 | ␉{ 0x68D9,␉0x301017AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
372 | ␉{ 0x68DA,␉0x301017AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
373 | ␉{ 0x68DA,␉0x30001787,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
374 | ␉{ 0x68DA,␉0x5630174B,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
375 | ␊ |
376 | ␉{ 0x68F9,␉0x301317AF,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
377 | ␉{ 0x68F9,␉0x301117AF,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
378 | ␉{ 0x68F9,␉0x301217AF,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5490",␉␉␉␉kNull␉␉},␊ |
379 | ␉{ 0x68F9,␉0x30001787,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
380 | ␉{ 0x68F9,␉0x30021787,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5490",␉␉␉␉kNull␉␉},␊ |
381 | ␉{ 0x68F9,␉0x30011787,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5530",␉␉␉␉kNull␉␉},␊ |
382 | ␉{ 0x68F9,␉0x5470174B,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
383 | ␉{ 0x68F9,␉0x5490174B,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5490",␉␉␉␉kNull␉␉},␊ |
384 | ␉{ 0x68F9,␉0x5530174B,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5530",␉␉␉␉kNull␉␉},␊ |
385 | ␊ |
386 | ␉/* standard/default models */␊ |
387 | ␉{ 0x9400,␉0x00000000,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 XT",␉␉␉kNull␉␉},␊ |
388 | ␉{ 0x9405,␉0x00000000,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 GT",␉␉␉kNull␉␉},␊ |
389 | ␉{ 0x9440,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
390 | ␉{ 0x9441,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870 X2",␉␉␉kMotmot␉␉},␊ |
391 | ␉{ 0x9442,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
392 | ␉{ 0x9443,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850 X2",␉␉␉kMotmot␉␉},␊ |
393 | ␉{ 0x944C,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
394 | ␉{ 0x944E,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4700 Series",␉␉kMotmot␉␉},␊ |
395 | ␉{ 0x944E,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4700 Series",␉␉kMotmot␉␉},␊ |
396 | ␉{ 0x9450,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"AMD FireStream 9270",␉␉␉␉kMotmot␉␉},␊ |
397 | ␉{ 0x9452,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"AMD FireStream 9250",␉␉␉␉kMotmot␉␉},␊ |
398 | ␉{ 0x9460,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
399 | ␉{ 0x9462,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
400 | ␉{ 0x9490,␉0x00000000,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4600 Series",␉␉kFlicker␉},␊ |
401 | ␉{ 0x9498,␉0x00000000,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4600 Series",␉␉kFlicker␉},␊ |
402 | ␉{ 0x94B3,␉0x00000000,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
403 | ␉{ 0x94B4,␉0x00000000,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4700 Series",␉␉kFlicker␉},␊ |
404 | ␉{ 0x94B5,␉0x00000000,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
405 | ␉{ 0x94C1,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Series",␉␉kIago␉␉},␊ |
406 | ␉{ 0x94C3,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Series",␉␉kIago␉␉},␊ |
407 | ␉{ 0x94C7,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350",␉␉␉␉kIago␉␉},␊ |
408 | ␉{ 0x94CC,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Series",␉␉kIago␉␉},␊ |
409 | ␊ |
410 | ␉{ 0x9501,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3800 Series",␉␉kMegalodon␉},␊ |
411 | ␉{ 0x9505,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3800 Series",␉␉kMegalodon␉},␊ |
412 | ␉{ 0x9507,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3830",␉␉␉␉kMegalodon␉},␊ |
413 | ␉{ 0x950F,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3870 X2",␉␉␉kMegalodon␉},␊ |
414 | ␉{ 0x9513,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3850 X2",␉␉␉kMegalodon␉},␊ |
415 | ␉{ 0x9519,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"AMD FireStream 9170",␉␉␉␉kMegalodon␉},␊ |
416 | ␉{ 0x9540,␉0x00000000,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4550",␉␉␉␉kNull␉␉},␊ |
417 | ␉{ 0x954F,␉0x00000000,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
418 | ␉{ 0x9588,␉0x00000000,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 2600 XT",␉␉␉kLamna␉␉},␊ |
419 | ␉{ 0x9589,␉0x00000000,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 2600 PRO",␉␉␉kLamna␉␉},␊ |
420 | ␉{ 0x958A,␉0x00000000,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 2600 X2 Series",␉␉kLamna␉␉},␊ |
421 | ␉{ 0x9598,␉0x00000000,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 3600 Series",␉␉kMegalodon␉},␊ |
422 | ␉{ 0x95C0,␉0x00000000,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3400 Series",␉␉kIago␉␉},␊ |
423 | ␉{ 0x95C5,␉0x00000000,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3400 Series",␉␉kIago␉␉},␊ |
424 | ␊ |
425 | ␉{ 0x9610,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"ATI Radeon HD 3200 Graphics",␉␉kNull␉␉},␊ |
426 | ␉{ 0x9611,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"ATI Radeon 3100 Graphics",␉␉␉kNull␉␉},␊ |
427 | ␉{ 0x9614,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"ATI Radeon HD 3300 Graphics",␉␉kNull␉␉},␊ |
428 | ␉{ 0x9616,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"AMD 760G",␉␉␉␉␉␉␉kNull␉␉},␊ |
429 | ␊ |
430 | ␉{ 0x9710,␉0x00000000,␉CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4200",␉␉␉␉kNull␉␉},␊ |
431 | ␉{ 0x9715,␉0x00000000,␉CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
432 | ␉{ 0x9714,␉0x00000000,␉CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4290",␉␉␉␉kNull␉␉},␊ |
433 | ␊ |
434 | ␊ |
435 | ␉{ 0x688D,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"AMD FireStream 9350",␉␉␉␉kUakari␉␉},␊ |
436 | ␊ |
437 | ␉{ 0x6898,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5800 Series",␉␉kUakari␉␉},␊ |
438 | ␉{ 0x6899,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5800 Series",␉␉kUakari␉␉},␊ |
439 | ␉{ 0x689E,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5800 Series",␉␉kUakari␉␉},␊ |
440 | ␉{ 0x689C,␉0x00000000,␉CHIP_FAMILY_HEMLOCK,␉"ATI Radeon HD 5900 Series",␉␉kUakari␉␉},␊ |
441 | ␊ |
442 | ␉{ 0x68B9,␉0x00000000,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5600 Series",␉␉kVervet␉␉},␊ |
443 | ␉{ 0x68B8,␉0x00000000,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5700 Series",␉␉kVervet␉␉},␊ |
444 | ␉{ 0x68BE,␉0x00000000,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5700 Series",␉␉kVervet␉␉},␊ |
445 | ␊ |
446 | ␉{ 0x68D8,␉0x00000000,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5600 Series",␉␉kBaboon␉␉},␊ |
447 | ␉{ 0x68D9,␉0x00000000,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5500 Series",␉␉kBaboon␉␉},␊ |
448 | ␉{ 0x68DA,␉0x00000000,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5500 Series",␉␉kBaboon␉␉},␊ |
449 | ␊ |
450 | ␉{ 0x68F9,␉0x00000000,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5400 Series",␉␉kNull␉␉},␊ |
451 | ␊ |
452 | ␉{ 0x0000,␉0x00000000,␉CHIP_FAMILY_UNKNOW,␉␉NULL,␉␉␉␉␉␉␉␉kNull␉␉}␊ |
453 | };␊ |
454 | ␊ |
455 | ␊ |
456 | typedef struct {␊ |
457 | ␉struct DevPropDevice␉*device;␊ |
458 | ␉radeon_card_info_t␉␉*info;␊ |
459 | ␉pci_dt_t ␉␉␉␉*pci_dev;␊ |
460 | ␉uint8_t␉␉␉␉␉*fb;␊ |
461 | ␉uint8_t␉␉␉␉␉*mmio;␊ |
462 | ␉uint8_t␉␉␉␉␉*io;␊ |
463 | ␉uint8_t␉␉␉␉␉*rom;␊ |
464 | ␉uint32_t␉␉␉␉rom_size;␊ |
465 | ␉uint32_t␉␉␉␉vram_size;␊ |
466 | ␉uint8_t␉␉␉␉␉ports;␊ |
467 | ␉uint32_t␉␉␉␉flags;␊ |
468 | ␉bool␉␉␉␉␉posted;␊ |
469 | } card_t;␊ |
470 | card_t *card;␊ |
471 | ␊ |
472 | /* Flags */␊ |
473 | #define MKFLAG(n)␉␉(1 << n)␊ |
474 | #define FLAGTRUE␉␉MKFLAG(0)␊ |
475 | #define EVERGREEN␉␉MKFLAG(1)␊ |
476 | ␊ |
477 | static uint8_t atN = 0;␊ |
478 | ␊ |
479 | typedef struct {␊ |
480 | ␉type_t␉␉type;␊ |
481 | ␉uint32_t␉size;␊ |
482 | ␉uint8_t␉␉*data;␊ |
483 | } value_t;␊ |
484 | ␊ |
485 | static value_t aty_name;␊ |
486 | static value_t aty_nameparent;␊ |
487 | //static value_t aty_model;␊ |
488 | ␊ |
489 | #define DATVAL(x)␉␉{kPtr, sizeof(x), (uint8_t *)x}␊ |
490 | #define STRVAL(x)␉␉{kStr, sizeof(x), (uint8_t *)x}␊ |
491 | #define BYTVAL(x)␉␉{kCst, 1, (uint8_t *)x}␊ |
492 | #define WRDVAL(x)␉␉{kCst, 2, (uint8_t *)x}␊ |
493 | #define DWRVAL(x)␉␉{kCst, 4, (uint8_t *)x}␊ |
494 | #define QWRVAL(x)␉␉{kCst, 8, (uint8_t *)x}␊ |
495 | #define NULVAL␉␉␉{kNul, 0, (uint8_t *)NULL}␊ |
496 | ␊ |
497 | bool get_bootdisplay_val(value_t *val);␊ |
498 | bool get_vrammemory_val(value_t *val);␊ |
499 | bool get_name_val(value_t *val);␊ |
500 | bool get_nameparent_val(value_t *val);␊ |
501 | bool get_model_val(value_t *val);␊ |
502 | bool get_conntype_val(value_t *val);␊ |
503 | bool get_vrammemsize_val(value_t *val);␊ |
504 | bool get_binimage_val(value_t *val);␊ |
505 | bool get_deviceid_val(value_t *val);␊ |
506 | bool get_mclk_val(value_t *val);␊ |
507 | bool get_sclk_val(value_t *val);␊ |
508 | bool get_refclk_val(value_t *val);␊ |
509 | bool get_platforminfo_val(value_t *val);␊ |
510 | bool get_vramtotalsize_val(value_t *val);␊ |
511 | ␊ |
512 | typedef struct {␊ |
513 | ␉uint32_t␉flags;␊ |
514 | ␉bool␉␉all_ports;␊ |
515 | ␉char␉␉*name;␊ |
516 | ␉bool␉␉(*get_value)(value_t *val);␊ |
517 | ␉value_t␉␉default_val;␊ |
518 | } dev_prop_t;␊ |
519 | ␊ |
520 | dev_prop_t ati_devprop_list[] = {␊ |
521 | ␉{FLAGTRUE,␉false,␉"@0,AAPL,boot-display",␉␉get_bootdisplay_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
522 | //␉{FLAGTRUE,␉false,␉"@0,ATY,EFIDisplay",␉␉NULL,␉␉␉␉␉STRVAL("TMDSA")␉␉␉␉␉},␊ |
523 | ␊ |
524 | //␉{FLAGTRUE,␉true,␉"@0,AAPL,vram-memory",␉␉get_vrammemory_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
525 | //␉{FLAGTRUE,␉true,␉"@0,compatible",␉␉␉get_name_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
526 | //␉{FLAGTRUE,␉true,␉"@0,connector-type",␉␉get_conntype_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
527 | //␉{FLAGTRUE,␉true,␉"@0,device_type",␉␉␉NULL,␉␉␉␉␉STRVAL("display")␉␉␉␉},␊ |
528 | //␉{FLAGTRUE,␉false,␉"@0,display-connect-flags",␉NULL,␉␉␉␉␉DWRVAL((uint32_t)0)␉␉␉␉},␊ |
529 | //␉{FLAGTRUE,␉true,␉"@0,display-type",␉␉␉NULL,␉␉␉␉␉STRVAL("NONE")␉␉␉␉␉},␊ |
530 | ␉{FLAGTRUE,␉true,␉"@0,name",␉␉␉␉␉get_name_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
531 | //␉{FLAGTRUE,␉true,␉"@0,VRAM,memsize",␉␉␉get_vrammemsize_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
532 | ␊ |
533 | //␉{FLAGTRUE,␉false,␉"AAPL,aux-power-connected",␉NULL,␉␉␉␉␉DWRVAL((uint32_t)1)␉␉␉␉},␊ |
534 | //␉{FLAGTRUE,␉false,␉"AAPL,backlight-control",␉NULL,␉␉␉␉␉DWRVAL((uint32_t)0)␉␉␉␉},␊ |
535 | ␉{FLAGTRUE,␉false,␉"ATY,bin_image",␉␉␉get_binimage_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
536 | ␉{FLAGTRUE,␉false,␉"ATY,Copyright",␉␉␉NULL,␉STRVAL("Copyright AMD Inc. All Rights Reserved. 2005-2010")␉},␊ |
537 | ␉{FLAGTRUE,␉false,␉"ATY,VendorID",␉␉␉␉NULL,␉␉␉␉␉WRDVAL((uint16_t)0x1002)␉␉},␊ |
538 | ␉{FLAGTRUE,␉false,␉"ATY,DeviceID",␉␉␉␉get_deviceid_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
539 | ␊ |
540 | //␉{FLAGTRUE,␉false,␉"ATY,MCLK",␉␉␉␉␉get_mclk_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
541 | //␉{FLAGTRUE,␉false,␉"ATY,SCLK",␉␉␉␉␉get_sclk_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
542 | //␉{FLAGTRUE,␉false,␉"ATY,RefCLK",␉␉␉␉get_refclk_val,␉␉␉DWRVAL((uint32_t)0x0a8c)␉␉},␊ |
543 | ␊ |
544 | //␉{FLAGTRUE,␉false,␉"ATY,PlatformInfo",␉␉␉get_platforminfo_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
545 | ␊ |
546 | ␉{FLAGTRUE,␉false,␉"name",␉␉␉␉␉␉get_nameparent_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
547 | ␉{FLAGTRUE,␉false,␉"device_type",␉␉␉␉get_nameparent_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
548 | ␉{FLAGTRUE,␉false,␉"model",␉␉␉␉␉get_model_val,␉␉␉STRVAL("ATI Radeon")␉␉␉},␊ |
549 | //␉{FLAGTRUE,␉false,␉"VRAM,totalsize",␉␉␉get_vramtotalsize_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
550 | ␊ |
551 | ␉{FLAGTRUE,␉false,␉NULL,␉␉␉␉␉␉NULL,␉␉␉␉␉NULVAL␉␉␉␉␉␉␉}␊ |
552 | };␊ |
553 | ␊ |
554 | bool get_bootdisplay_val(value_t *val)␊ |
555 | {␊ |
556 | ␉static uint32_t v = 0;␊ |
557 | ␊ |
558 | ␉if (v)␊ |
559 | ␉␉return false;␊ |
560 | ␊ |
561 | ␉if (!card->posted)␊ |
562 | ␉␉return false;␊ |
563 | ␊ |
564 | ␉v = 1;␊ |
565 | ␉val->type = kCst;␊ |
566 | ␉val->size = 4;␊ |
567 | ␉val->data = (uint8_t *)&v;␊ |
568 | ␊ |
569 | ␉return true;␊ |
570 | }␊ |
571 | ␊ |
572 | bool get_vrammemory_val(value_t *val)␊ |
573 | {␊ |
574 | ␉return false;␊ |
575 | }␊ |
576 | ␊ |
577 | bool get_name_val(value_t *val)␊ |
578 | {␊ |
579 | ␉val->type = aty_name.type;␊ |
580 | ␉val->size = aty_name.size;␊ |
581 | ␉val->data = aty_name.data;␊ |
582 | ␊ |
583 | ␉return true;␊ |
584 | }␊ |
585 | ␊ |
586 | bool get_nameparent_val(value_t *val)␊ |
587 | {␊ |
588 | ␉val->type = aty_nameparent.type;␊ |
589 | ␉val->size = aty_nameparent.size;␊ |
590 | ␉val->data = aty_nameparent.data;␊ |
591 | ␊ |
592 | ␉return true;␊ |
593 | }␊ |
594 | ␊ |
595 | bool get_model_val(value_t *val)␊ |
596 | {␊ |
597 | ␉if (!card->info->model_name)␊ |
598 | ␉␉return false;␊ |
599 | ␊ |
600 | ␉val->type = kStr;␊ |
601 | ␉val->size = strlen(card->info->model_name) + 1;␊ |
602 | ␉val->data = (uint8_t *)card->info->model_name;␊ |
603 | ␊ |
604 | ␉return true;␊ |
605 | }␊ |
606 | ␊ |
607 | bool get_conntype_val(value_t *val)␊ |
608 | {␊ |
609 | /*␊ |
610 | Connector types:␊ |
611 | 0x4 : DisplayPort␊ |
612 | 0x400: DL DVI-I␊ |
613 | 0x800: HDMI␊ |
614 | */␊ |
615 | ␉return false;␊ |
616 | }␊ |
617 | ␊ |
618 | bool get_vrammemsize_val(value_t *val)␊ |
619 | {␊ |
620 | ␉static int idx = -1;␊ |
621 | ␉static uint64_t memsize;␊ |
622 | ␊ |
623 | ␉idx++;␊ |
624 | ␉memsize = ((uint64_t)card->vram_size << 32);␊ |
625 | ␉if (idx == 0)␊ |
626 | ␉␉memsize = memsize | (uint64_t)card->vram_size;␊ |
627 | ␊ |
628 | ␉val->type = kCst;␊ |
629 | ␉val->size = 8;␊ |
630 | ␉val->data = (uint8_t *)&memsize;␊ |
631 | ␊ |
632 | ␉return true;␊ |
633 | }␊ |
634 | ␊ |
635 | bool get_binimage_val(value_t *val)␊ |
636 | {␊ |
637 | ␉if (!card->rom)␊ |
638 | ␉␉return false;␊ |
639 | ␊ |
640 | ␉val->type = kPtr;␊ |
641 | ␉val->size = card->rom_size;␊ |
642 | ␉val->data = card->rom;␊ |
643 | ␊ |
644 | ␉return true;␊ |
645 | }␊ |
646 | ␊ |
647 | bool get_deviceid_val(value_t *val)␊ |
648 | {␊ |
649 | ␉val->type = kCst;␊ |
650 | ␉val->size = 2;␊ |
651 | ␉val->data = (uint8_t *)&card->pci_dev->device_id;␊ |
652 | ␊ |
653 | ␉return true;␊ |
654 | }␊ |
655 | ␊ |
656 | bool get_mclk_val(value_t *val)␊ |
657 | {␊ |
658 | ␉return false;␊ |
659 | }␊ |
660 | ␊ |
661 | bool get_sclk_val(value_t *val)␊ |
662 | {␊ |
663 | ␉return false;␊ |
664 | }␊ |
665 | ␊ |
666 | bool get_refclk_val(value_t *val)␊ |
667 | {␊ |
668 | ␉return false;␊ |
669 | }␊ |
670 | ␊ |
671 | bool get_platforminfo_val(value_t *val)␊ |
672 | {␊ |
673 | ␉val->data = malloc(0x80);␊ |
674 | ␉if (!val->data)␊ |
675 | ␉␉return false;␊ |
676 | ␊ |
677 | ␉bzero(val->data, 0x80);␊ |
678 | ␊ |
679 | ␉val->type␉␉= kPtr;␊ |
680 | ␉val->size␉␉= 0x80;␊ |
681 | ␉val->data[0]␉= 1;␊ |
682 | ␊ |
683 | ␉return true;␊ |
684 | }␊ |
685 | ␊ |
686 | bool get_vramtotalsize_val(value_t *val)␊ |
687 | {␊ |
688 | ␉val->type = kCst;␊ |
689 | ␉val->size = 4;␊ |
690 | ␉val->data = (uint8_t *)&card->vram_size;␊ |
691 | ␊ |
692 | ␉return true;␊ |
693 | }␊ |
694 | ␊ |
695 | void free_val(value_t *val)␊ |
696 | {␊ |
697 | ␉if (val->type == kPtr)␊ |
698 | ␉␉free(val->data);␊ |
699 | ␉bzero(val, sizeof(value_t));␊ |
700 | }␊ |
701 | ␊ |
702 | void devprop_add_list(dev_prop_t devprop_list[])␊ |
703 | {␊ |
704 | ␉value_t *val = malloc(sizeof(value_t));␊ |
705 | ␉int i, pnum;␊ |
706 | ␉for (i = 0; devprop_list[i].name != NULL; i++)␊ |
707 | ␉␉if ((devprop_list[i].flags == FLAGTRUE) || (devprop_list[i].flags | card->flags))␊ |
708 | ␉␉␉if (devprop_list[i].get_value && devprop_list[i].get_value(val))␊ |
709 | ␉␉␉{␊ |
710 | ␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);␊ |
711 | ␉␉␉␉free_val(val);␊ |
712 | ␉␉␉␉if (devprop_list[i].all_ports)␊ |
713 | ␉␉␉␉{␊ |
714 | ␉␉␉␉␉for (pnum = 1; pnum < card->ports; pnum++)␊ |
715 | ␉␉␉␉␉{␊ |
716 | ␉␉␉␉␉␉if (devprop_list[i].get_value(val))␊ |
717 | ␉␉␉␉␉␉{␊ |
718 | ␉␉␉␉␉␉␉devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii␊ |
719 | ␉␉␉␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);␊ |
720 | ␉␉␉␉␉␉␉free_val(val);␊ |
721 | ␉␉␉␉␉␉}␊ |
722 | ␉␉␉␉␉}␊ |
723 | ␉␉␉␉␉devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card␊ |
724 | ␉␉␉␉}␊ |
725 | ␉␉␉}␊ |
726 | ␉␉␉else␊ |
727 | ␉␉␉{␊ |
728 | ␉␉␉␉if (devprop_list[i].default_val.type != kNul)␊ |
729 | ␉␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, ␊ |
730 | ␉␉␉␉␉␉devprop_list[i].default_val.type == kCst ? ␊ |
731 | ␉␉␉␉␉␉(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data, ␊ |
732 | ␉␉␉␉␉␉devprop_list[i].default_val.size);␊ |
733 | ␊ |
734 | ␉␉␉␉if (devprop_list[i].all_ports)␊ |
735 | ␉␉␉␉{␊ |
736 | ␉␉␉␉␉for (pnum = 1; pnum < card->ports; pnum++)␊ |
737 | ␉␉␉␉␉{␊ |
738 | ␉␉␉␉␉␉if (devprop_list[i].default_val.type != kNul)␊ |
739 | ␉␉␉␉␉␉{␊ |
740 | ␉␉␉␉␉␉␉devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii␊ |
741 | ␉␉␉␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, ␊ |
742 | ␉␉␉␉␉␉␉␉devprop_list[i].default_val.type == kCst ? ␊ |
743 | ␉␉␉␉␉␉␉␉(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data, ␊ |
744 | ␉␉␉␉␉␉␉␉devprop_list[i].default_val.size);␊ |
745 | ␉␉␉␉␉␉}␊ |
746 | ␉␉␉␉␉}␊ |
747 | ␉␉␉␉␉devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card␊ |
748 | ␉␉␉␉}␊ |
749 | ␉␉␉}␊ |
750 | ␊ |
751 | ␉free(val);␊ |
752 | }␊ |
753 | ␊ |
754 | ␊ |
755 | bool validate_rom(option_rom_header_t *rom_header, pci_dt_t *pci_dev)␊ |
756 | {␊ |
757 | ␉option_rom_pci_header_t *rom_pci_header;␊ |
758 | ␉␊ |
759 | ␉if (rom_header->signature != 0xaa55)␊ |
760 | ␉␉return false;␊ |
761 | ␊ |
762 | ␉rom_pci_header = (option_rom_pci_header_t *)((uint8_t *)rom_header + rom_header->pci_header_offset);␊ |
763 | ␊ |
764 | ␉if (rom_pci_header->signature != 0x52494350)␊ |
765 | ␉␉return false;␊ |
766 | ␊ |
767 | ␉if (rom_pci_header->vendor_id != pci_dev->vendor_id || rom_pci_header->device_id != pci_dev->device_id)␊ |
768 | ␉␉return false;␊ |
769 | ␊ |
770 | ␉return true;␊ |
771 | }␊ |
772 | ␊ |
773 | bool load_vbios_file(const char *key, uint16_t vendor_id, uint16_t device_id, uint32_t subsys_id)␊ |
774 | {␊ |
775 | ␉int␉fd;␊ |
776 | ␉char file_name[24];␊ |
777 | ␉bool do_load = false;␊ |
778 | ␊ |
779 | ␉getBoolForKey(key, &do_load, &bootInfo->bootConfig);␊ |
780 | ␉if (!do_load)␊ |
781 | ␉␉return false;␊ |
782 | ␊ |
783 | ␉sprintf(file_name, "/Extra/%04x_%04x_%08x.rom", vendor_id, device_id, subsys_id);␊ |
784 | ␉if ((fd = open_bvdev("bt(0,0)", file_name, 0)) < 0)␊ |
785 | ␉␉return false;␊ |
786 | ␊ |
787 | ␉card->rom_size = file_size(fd);␊ |
788 | ␉card->rom = malloc(card->rom_size);␊ |
789 | ␉if (!card->rom)␊ |
790 | ␉␉return false;␊ |
791 | ␊ |
792 | ␉read(fd, (char *)card->rom, card->rom_size);␊ |
793 | ␉␊ |
794 | ␉if (!validate_rom((option_rom_header_t *)card->rom, card->pci_dev))␊ |
795 | ␉{␊ |
796 | ␉␉card->rom_size = 0;␊ |
797 | ␉␉card->rom = 0;␊ |
798 | ␉␉return false;␊ |
799 | ␉}␊ |
800 | ␊ |
801 | ␉card->rom_size = ((option_rom_header_t *)card->rom)->rom_size * 512;␊ |
802 | ␊ |
803 | ␉close(fd);␊ |
804 | ␊ |
805 | ␉return true;␊ |
806 | }␊ |
807 | ␊ |
808 | void get_vram_size(void)␊ |
809 | {␊ |
810 | ␉chip_family_t chip_family = card->info->chip_family;␊ |
811 | ␊ |
812 | ␉card->vram_size = 0;␊ |
813 | ␊ |
814 | ␉if (chip_family >= CHIP_FAMILY_CEDAR)␊ |
815 | ␉␉/* size in MB on evergreen */␊ |
816 | ␉␉/* XXX watch for overflow!!! */␊ |
817 | ␉␉card->vram_size = RegRead32(R600_CONFIG_MEMSIZE) * 1024 * 1024;␊ |
818 | ␉else␊ |
819 | ␉␉if (chip_family >= CHIP_FAMILY_R600)␊ |
820 | ␉␉␉card->vram_size = RegRead32(R600_CONFIG_MEMSIZE);␊ |
821 | }␊ |
822 | ␊ |
823 | bool read_vbios(bool from_pci)␊ |
824 | {␊ |
825 | ␉option_rom_header_t *rom_addr;␊ |
826 | ␊ |
827 | ␉if (from_pci)␊ |
828 | ␉{␊ |
829 | ␉␉rom_addr = (option_rom_header_t *)(pci_config_read32(card->pci_dev->dev.addr, PCI_ROM_ADDRESS) & ~0x7ff);␊ |
830 | ␉␉verbose(" @0x%x", rom_addr);␊ |
831 | ␉}␊ |
832 | ␉else␊ |
833 | ␉␉rom_addr = (option_rom_header_t *)0xc0000;␊ |
834 | ␊ |
835 | ␉if (!validate_rom(rom_addr, card->pci_dev))␊ |
836 | ␉␉return false;␊ |
837 | ␊ |
838 | ␉card->rom_size = rom_addr->rom_size * 512;␊ |
839 | ␉if (!card->rom_size)␊ |
840 | ␉␉return false;␊ |
841 | ␊ |
842 | ␉card->rom = malloc(card->rom_size);␊ |
843 | ␉if (!card->rom)␊ |
844 | ␉␉return false;␊ |
845 | ␊ |
846 | ␉memcpy(card->rom, (void *)rom_addr, card->rom_size);␊ |
847 | ␊ |
848 | ␉return true;␊ |
849 | }␊ |
850 | ␊ |
851 | bool read_disabled_vbios(void)␊ |
852 | {␊ |
853 | ␉bool ret = false;␊ |
854 | ␉chip_family_t chip_family = card->info->chip_family;␊ |
855 | ␊ |
856 | ␉if (chip_family >= CHIP_FAMILY_RV770)␊ |
857 | ␉{␊ |
858 | ␉␉uint32_t viph_control␉␉= RegRead32(RADEON_VIPH_CONTROL);␊ |
859 | ␉␉uint32_t bus_cntl␉␉␉= RegRead32(RADEON_BUS_CNTL);␊ |
860 | ␉␉uint32_t d1vga_control␉␉= RegRead32(AVIVO_D1VGA_CONTROL);␊ |
861 | ␉␉uint32_t d2vga_control␉␉= RegRead32(AVIVO_D2VGA_CONTROL);␊ |
862 | ␉␉uint32_t vga_render_control␉= RegRead32(AVIVO_VGA_RENDER_CONTROL);␊ |
863 | ␉␉uint32_t rom_cntl␉␉␉= RegRead32(R600_ROM_CNTL);␊ |
864 | ␉␉uint32_t cg_spll_func_cntl␉= 0;␊ |
865 | ␉␉uint32_t cg_spll_status;␊ |
866 | ␊ |
867 | ␉␉/* disable VIP */␊ |
868 | ␉␉RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));␊ |
869 | ␊ |
870 | ␉␉/* enable the rom */␊ |
871 | ␉␉RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));␊ |
872 | ␊ |
873 | ␉␉/* Disable VGA mode */␊ |
874 | ␉␉RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
875 | ␉␉RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
876 | ␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));␊ |
877 | ␊ |
878 | ␉␉if (chip_family == CHIP_FAMILY_RV730)␊ |
879 | ␉␉{␊ |
880 | ␉␉␉cg_spll_func_cntl = RegRead32(R600_CG_SPLL_FUNC_CNTL);␊ |
881 | ␊ |
882 | ␉␉␉/* enable bypass mode */␊ |
883 | ␉␉␉RegWrite32(R600_CG_SPLL_FUNC_CNTL, (cg_spll_func_cntl | R600_SPLL_BYPASS_EN));␊ |
884 | ␊ |
885 | ␉␉␉/* wait for SPLL_CHG_STATUS to change to 1 */␊ |
886 | ␉␉␉cg_spll_status = 0;␊ |
887 | ␉␉␉while (!(cg_spll_status & R600_SPLL_CHG_STATUS))␊ |
888 | ␉␉␉␉cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);␊ |
889 | ␊ |
890 | ␉␉␉RegWrite32(R600_ROM_CNTL, (rom_cntl & ~R600_SCK_OVERWRITE));␊ |
891 | ␉␉}␊ |
892 | ␉␉else␊ |
893 | ␉␉␉RegWrite32(R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));␊ |
894 | ␊ |
895 | ␉␉ret = read_vbios(true);␊ |
896 | ␊ |
897 | ␉␉/* restore regs */␊ |
898 | ␉␉if (chip_family == CHIP_FAMILY_RV730)␊ |
899 | ␉␉{␊ |
900 | ␉␉␉RegWrite32(R600_CG_SPLL_FUNC_CNTL, cg_spll_func_cntl);␊ |
901 | ␊ |
902 | ␉␉␉/* wait for SPLL_CHG_STATUS to change to 1 */␊ |
903 | ␉␉␉cg_spll_status = 0;␊ |
904 | ␉␉␉while (!(cg_spll_status & R600_SPLL_CHG_STATUS))␊ |
905 | ␉␉␉cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);␊ |
906 | ␉␉}␊ |
907 | ␉␉RegWrite32(RADEON_VIPH_CONTROL, viph_control);␊ |
908 | ␉␉RegWrite32(RADEON_BUS_CNTL, bus_cntl);␊ |
909 | ␉␉RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);␊ |
910 | ␉␉RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);␊ |
911 | ␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);␊ |
912 | ␉␉RegWrite32(R600_ROM_CNTL, rom_cntl);␊ |
913 | ␉}␊ |
914 | ␉else␊ |
915 | ␉␉if (chip_family >= CHIP_FAMILY_R600)␊ |
916 | ␉␉{␊ |
917 | ␉␉␉uint32_t viph_control␉␉␉␉= RegRead32(RADEON_VIPH_CONTROL);␊ |
918 | ␉␉␉uint32_t bus_cntl␉␉␉␉␉= RegRead32(RADEON_BUS_CNTL);␊ |
919 | ␉␉␉uint32_t d1vga_control␉␉␉␉= RegRead32(AVIVO_D1VGA_CONTROL);␊ |
920 | ␉␉␉uint32_t d2vga_control ␉␉␉␉= RegRead32(AVIVO_D2VGA_CONTROL);␊ |
921 | ␉␉␉uint32_t vga_render_control␉␉␉= RegRead32(AVIVO_VGA_RENDER_CONTROL);␊ |
922 | ␉␉␉uint32_t rom_cntl␉␉␉␉␉= RegRead32(R600_ROM_CNTL);␊ |
923 | ␉␉␉uint32_t general_pwrmgt␉␉␉␉= RegRead32(R600_GENERAL_PWRMGT);␊ |
924 | ␉␉␉uint32_t low_vid_lower_gpio_cntl␉= RegRead32(R600_LOW_VID_LOWER_GPIO_CNTL);␊ |
925 | ␉␉␉uint32_t medium_vid_lower_gpio_cntl␉= RegRead32(R600_MEDIUM_VID_LOWER_GPIO_CNTL);␊ |
926 | ␉␉␉uint32_t high_vid_lower_gpio_cntl␉= RegRead32(R600_HIGH_VID_LOWER_GPIO_CNTL);␊ |
927 | ␉␉␉uint32_t ctxsw_vid_lower_gpio_cntl␉= RegRead32(R600_CTXSW_VID_LOWER_GPIO_CNTL);␊ |
928 | ␉␉␉uint32_t lower_gpio_enable␉␉␉= RegRead32(R600_LOWER_GPIO_ENABLE);␊ |
929 | ␊ |
930 | ␉␉␉/* disable VIP */␊ |
931 | ␉␉␉RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));␊ |
932 | ␊ |
933 | ␉␉␉/* enable the rom */␊ |
934 | ␉␉␉RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));␊ |
935 | ␊ |
936 | ␉␉␉/* Disable VGA mode */␊ |
937 | ␉␉␉RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
938 | ␉␉␉RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
939 | ␉␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));␊ |
940 | ␉␉␉RegWrite32(R600_ROM_CNTL, ((rom_cntl & ~R600_SCK_PRESCALE_CRYSTAL_CLK_MASK) | (1 << R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT) | R600_SCK_OVERWRITE));␊ |
941 | ␉␉␉RegWrite32(R600_GENERAL_PWRMGT, (general_pwrmgt & ~R600_OPEN_DRAIN_PADS));␊ |
942 | ␉␉␉RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, (low_vid_lower_gpio_cntl & ~0x400));␊ |
943 | ␉␉␉RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, (medium_vid_lower_gpio_cntl & ~0x400));␊ |
944 | ␉␉␉RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, (high_vid_lower_gpio_cntl & ~0x400));␊ |
945 | ␉␉␉RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, (ctxsw_vid_lower_gpio_cntl & ~0x400));␊ |
946 | ␉␉␉RegWrite32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400));␊ |
947 | ␊ |
948 | ␉␉␉ret = read_vbios(true);␊ |
949 | ␊ |
950 | ␉␉␉/* restore regs */␊ |
951 | ␉␉␉RegWrite32(RADEON_VIPH_CONTROL, viph_control);␊ |
952 | ␉␉␉RegWrite32(RADEON_BUS_CNTL, bus_cntl);␊ |
953 | ␉␉␉RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);␊ |
954 | ␉␉␉RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);␊ |
955 | ␉␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);␊ |
956 | ␉␉␉RegWrite32(R600_ROM_CNTL, rom_cntl);␊ |
957 | ␉␉␉RegWrite32(R600_GENERAL_PWRMGT, general_pwrmgt);␊ |
958 | ␉␉␉RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, low_vid_lower_gpio_cntl);␊ |
959 | ␉␉␉RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, medium_vid_lower_gpio_cntl);␊ |
960 | ␉␉␉RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl);␊ |
961 | ␉␉␉RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl);␊ |
962 | ␉␉␉RegWrite32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable);␊ |
963 | ␊ |
964 | ␉␉}␊ |
965 | ␊ |
966 | ␉return ret;␊ |
967 | }␊ |
968 | ␊ |
969 | bool radeon_card_posted(void)␊ |
970 | {␊ |
971 | ␉uint32_t reg;␊ |
972 | ␊ |
973 | ␉/* first check CRTCs */␊ |
974 | ␉reg = RegRead32(RADEON_CRTC_GEN_CNTL) | RegRead32(RADEON_CRTC2_GEN_CNTL);␊ |
975 | ␉if (reg & RADEON_CRTC_EN)␊ |
976 | ␉␉return true;␊ |
977 | ␊ |
978 | ␉/* then check MEM_SIZE, in case something turned the crtcs off */␊ |
979 | ␉reg = RegRead32(R600_CONFIG_MEMSIZE);␊ |
980 | ␉if (reg)␊ |
981 | ␉␉return true;␊ |
982 | ␊ |
983 | ␉return false;␊ |
984 | }␊ |
985 | #if 0␊ |
986 | bool devprop_add_pci_config_space(void)␊ |
987 | {␊ |
988 | ␉int offset;␊ |
989 | ␊ |
990 | ␉uint8_t *config_space = malloc(0x100);␊ |
991 | ␉if (!config_space)␊ |
992 | ␉␉return false;␊ |
993 | ␊ |
994 | ␉for (offset = 0; offset < 0x100; offset += 4)␊ |
995 | ␉␉config_space[offset / 4] = pci_config_read32(card->pci_dev->dev.addr, offset);␊ |
996 | ␊ |
997 | ␉devprop_add_value(card->device, "ATY,PCIConfigSpace", config_space, 0x100);␊ |
998 | ␉free(config_space);␊ |
999 | ␉return true;␊ |
1000 | }␊ |
1001 | #endif␊ |
1002 | ␊ |
1003 | static bool init_card(pci_dt_t *pci_dev)␊ |
1004 | {␊ |
1005 | ␉const char *fb_name;␊ |
1006 | ␉char name[24];␊ |
1007 | ␉char name_parent[24];␊ |
1008 | ␉int i;␊ |
1009 | ␉bool add_vbios = true;␊ |
1010 | ␊ |
1011 | ␉card = malloc(sizeof(card_t));␊ |
1012 | ␉if (!card)␊ |
1013 | ␉␉return false;␊ |
1014 | ␉bzero(card, sizeof(card_t));␊ |
1015 | ␊ |
1016 | ␉card->pci_dev = pci_dev;␊ |
1017 | ␊ |
1018 | ␉for (i = 0; radeon_cards[i].device_id ; i++)␊ |
1019 | ␉␉if (radeon_cards[i].device_id == pci_dev->device_id)␊ |
1020 | ␉␉{␊ |
1021 | ␉␉␉card->info = &radeon_cards[i];␊ |
1022 | ␉␉␉if ((radeon_cards[i].subsys_id == 0x00000000) || ␊ |
1023 | ␉␉␉␉(radeon_cards[i].subsys_id == pci_dev->subsys_id.subsys_id))␊ |
1024 | ␉␉␉␉break;␊ |
1025 | ␉␉}␊ |
1026 | ␊ |
1027 | ␉if (!card->info->device_id || !card->info->cfg_name)␊ |
1028 | ␉{␊ |
1029 | ␉␉printf("Unsupported card!\n");␊ |
1030 | ␉␉return false;␊ |
1031 | ␉}␊ |
1032 | ␊ |
1033 | ␊ |
1034 | ␉card->fb␉␉= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_0) & ~0x0f);␊ |
1035 | ␉card->mmio␉␉= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_2) & ~0x0f);␊ |
1036 | ␉card->io␉␉= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_4) & ~0x03);␊ |
1037 | ␊ |
1038 | ␉card->posted␉= radeon_card_posted();␊ |
1039 | ␉verbose("ATI card %s, ", card->posted ? "POSTed" : "non-POSTed");␊ |
1040 | ␉␊ |
1041 | ␉get_vram_size();␊ |
1042 | ␊ |
1043 | ␉getBoolForKey(kVBIOS, &add_vbios, &bootInfo->bootConfig);␊ |
1044 | ␊ |
1045 | ␉if (add_vbios)␊ |
1046 | ␉␉if (!load_vbios_file(kUseAtiROM, pci_dev->vendor_id, pci_dev->device_id, pci_dev->subsys_id.subsys_id))␊ |
1047 | ␉␉{␊ |
1048 | ␉␉␉verbose("reading VBIOS from %s", card->posted ? "legacy space" : "PCI ROM");␊ |
1049 | ␉␉␉if (card->posted)␊ |
1050 | ␉␉␉␉read_vbios(false);␊ |
1051 | ␉␉␉else␊ |
1052 | ␉␉␉␉read_disabled_vbios();␊ |
1053 | ␉␉␉verbose("\n");␊ |
1054 | ␉␉}␊ |
1055 | ␊ |
1056 | ␉card->ports = 2; // default␊ |
1057 | ␊ |
1058 | ␉if (card->info->chip_family >= CHIP_FAMILY_CEDAR)␊ |
1059 | ␉{␊ |
1060 | ␉␉card->flags |= EVERGREEN;␊ |
1061 | ␉␉card->ports = 3;␊ |
1062 | ␉}␊ |
1063 | ␊ |
1064 | ␉atN = 0;␊ |
1065 | ␊ |
1066 | ␉fb_name = getStringForKey(kAtiConfig, &bootInfo->bootConfig);␊ |
1067 | ␉if (!fb_name)␊ |
1068 | ␉{␊ |
1069 | ␉␉fb_name = card_configs[card->info->cfg_name].name;␊ |
1070 | ␉␉card->ports = card_configs[card->info->cfg_name].ports;␊ |
1071 | ␉}␊ |
1072 | ␉else␊ |
1073 | ␉{␊ |
1074 | ␉␉for (i = 0; i < kCfgEnd; i++)␊ |
1075 | ␉␉␉if (strcmp(fb_name, card_configs[card->info->cfg_name].name) == 0)␊ |
1076 | ␉␉␉␉card->ports = card_configs[card->info->cfg_name].ports;␊ |
1077 | ␉}␊ |
1078 | ␊ |
1079 | ␉sprintf(name, "ATY,%s", fb_name);␊ |
1080 | ␉aty_name.type = kStr;␊ |
1081 | ␉aty_name.size = strlen(name) + 1;␊ |
1082 | ␉aty_name.data = (uint8_t *)name;␊ |
1083 | ␊ |
1084 | ␉sprintf(name_parent, "ATY,%sParent", fb_name);␊ |
1085 | ␉aty_nameparent.type = kStr;␊ |
1086 | ␉aty_nameparent.size = strlen(name_parent) + 1;␊ |
1087 | ␉aty_nameparent.data = (uint8_t *)name_parent;␊ |
1088 | ␊ |
1089 | ␉return true;␊ |
1090 | }␊ |
1091 | ␊ |
1092 | bool setup_ati_devprop(pci_dt_t *ati_dev)␊ |
1093 | {␊ |
1094 | ␉char *devicepath;␊ |
1095 | ␊ |
1096 | ␉if (!init_card(ati_dev))␊ |
1097 | ␉␉return false;␊ |
1098 | ␊ |
1099 | ␉/* ------------------------------------------------- */␊ |
1100 | ␉/* Find a better way to do this (in device_inject.c) */␊ |
1101 | ␉if (!string)␊ |
1102 | ␉␉string = devprop_create_string();␊ |
1103 | ␊ |
1104 | ␉devicepath = get_pci_dev_path(ati_dev);␊ |
1105 | ␉card->device = devprop_add_device(string, devicepath);␊ |
1106 | ␉if (!card->device)␊ |
1107 | ␉␉return false;␊ |
1108 | ␉/* ------------------------------------------------- */␊ |
1109 | ␊ |
1110 | #if 0␊ |
1111 | ␉uint64_t fb␉␉= (uint32_t)card->fb;␊ |
1112 | ␉uint64_t mmio␉= (uint32_t)card->mmio;␊ |
1113 | ␉uint64_t io␉␉= (uint32_t)card->io;␊ |
1114 | ␉devprop_add_value(card->device, "ATY,FrameBufferOffset", &fb, 8);␊ |
1115 | ␉devprop_add_value(card->device, "ATY,RegisterSpaceOffset", &mmio, 8);␊ |
1116 | ␉devprop_add_value(card->device, "ATY,IOSpaceOffset", &io, 8);␊ |
1117 | #endif␊ |
1118 | ␊ |
1119 | ␉devprop_add_list(ati_devprop_list);␊ |
1120 | ␊ |
1121 | ␉/* ------------------------------------------------- */␊ |
1122 | ␉/* Find a better way to do this (in device_inject.c) */␊ |
1123 | ␉stringdata = malloc(string->length);␊ |
1124 | ␉memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);␊ |
1125 | ␉stringlength = string->length;␊ |
1126 | ␉/* ------------------------------------------------- */␊ |
1127 | ␊ |
1128 | ␉verbose("ATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x]):: %s\n", ␊ |
1129 | ␉␉␉chip_family_name[card->info->chip_family], card->info->model_name, ␊ |
1130 | ␉␉␉(uint32_t)(card->vram_size / (1024 * 1024)), card_configs[card->info->cfg_name].name, ␊ |
1131 | ␉␉␉ati_dev->vendor_id, ati_dev->device_id,␊ |
1132 | ␉␉␉ati_dev->subsys_id.subsys.vendor_id, ati_dev->subsys_id.subsys.device_id, ␊ |
1133 | ␉␉␉devicepath);␊ |
1134 | ␊ |
1135 | ␉free(card);␊ |
1136 | ␊ |
1137 | ␉return true;␊ |
1138 | }␊ |
1139 | ␊ |
1140 | |