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1/*
2 * platform.h
3 * AsereBLN: reworked and extended
4 *
5 */
6
7#ifndef __LIBSAIO_PLATFORM_H
8#define __LIBSAIO_PLATFORM_H
9
10#include "libsaio.h"
11
12extern bool platformCPUFeature(uint32_t);
13extern void scan_platform(void);
14extern void dumpPhysAddr(const char * title, void * a, int len);
15
16/* CPUID index into cpuid_raw */
17#define CPUID_00
18#define CPUID_11
19#define CPUID_22
20#define CPUID_33
21#define CPUID_44
22#define CPUID_805
23#define CPUID_816
24#define CPUID_MAX7
25
26#define CPU_MODEL_YONAH0x0E
27#define CPU_MODEL_MEROM0x0F
28#define CPU_MODEL_PENRYN0x17
29#define CPU_MODEL_NEHALEM0x1A
30#define CPU_MODEL_ATOM0x1C
31#define CPU_MODEL_FIELDS0x1E/* Lynnfield, Clarksfield, Jasper */
32#define CPU_MODEL_DALES0x1F/* Havendale, Auburndale */
33#define CPU_MODEL_DALES_32NM0x25/* Clarkdale, Arrandale */
34#define CPU_MODEL_WESTMERE0x2C/* Gulftown, Westmere-EP, Westmere-WS */
35#define CPU_MODEL_NEHALEM_EX0x2E
36#define CPU_MODEL_WESTMERE_EX0x2F
37
38/* CPU Features */
39#define CPU_FEATURE_MMX0x00000001// MMX Instruction Set
40#define CPU_FEATURE_SSE0x00000002// SSE Instruction Set
41#define CPU_FEATURE_SSE20x00000004// SSE2 Instruction Set
42#define CPU_FEATURE_SSE30x00000008// SSE3 Instruction Set
43#define CPU_FEATURE_SSE410x00000010// SSE41 Instruction Set
44#define CPU_FEATURE_SSE420x00000020// SSE42 Instruction Set
45#define CPU_FEATURE_EM64T0x00000040// 64Bit Support
46#define CPU_FEATURE_HTT0x00000080// HyperThreading
47#define CPU_FEATURE_MOBILE0x00000100// Mobile CPU
48#define CPU_FEATURE_MSR0x00000200// MSR Support
49
50/* SMBIOS Memory Types */
51#define SMB_MEM_TYPE_UNDEFINED0
52#define SMB_MEM_TYPE_OTHER1
53#define SMB_MEM_TYPE_UNKNOWN2
54#define SMB_MEM_TYPE_DRAM3
55#define SMB_MEM_TYPE_EDRAM4
56#define SMB_MEM_TYPE_VRAM5
57#define SMB_MEM_TYPE_SRAM6
58#define SMB_MEM_TYPE_RAM7
59#define SMB_MEM_TYPE_ROM8
60#define SMB_MEM_TYPE_FLASH9
61#define SMB_MEM_TYPE_EEPROM10
62#define SMB_MEM_TYPE_FEPROM11
63#define SMB_MEM_TYPE_EPROM12
64#define SMB_MEM_TYPE_CDRAM13
65#define SMB_MEM_TYPE_3DRAM14
66#define SMB_MEM_TYPE_SDRAM15
67#define SMB_MEM_TYPE_SGRAM16
68#define SMB_MEM_TYPE_RDRAM17
69#define SMB_MEM_TYPE_DDR18
70#define SMB_MEM_TYPE_DDR219
71#define SMB_MEM_TYPE_FBDIMM20
72#define SMB_MEM_TYPE_DDR324// Supported in 10.5.6+ AppleSMBIOS
73
74/* Memory Configuration Types */
75#define SMB_MEM_CHANNEL_UNKNOWN0
76#define SMB_MEM_CHANNEL_SINGLE1
77#define SMB_MEM_CHANNEL_DUAL2
78#define SMB_MEM_CHANNEL_TRIPLE3
79
80/* Maximum number of ram slots */
81#define MAX_RAM_SLOTS8
82#define RAM_SLOT_ENUMERATOR{0, 2, 4, 1, 3, 5, 6, 8, 10, 7, 9, 11}
83
84/* Maximum number of SPD bytes */
85#define MAX_SPD_SIZE256
86
87/* Size of SMBIOS UUID in bytes */
88#define UUID_LEN16
89
90typedef struct _RamSlotInfo_t {
91 uint32_tModuleSize;// Size of Module in MB
92 uint32_tFrequency; // in Mhz
93 const char*Vendor;
94 const char*PartNo;
95 const char*SerialNo;
96 char*spd;// SPD Dump
97 boolInUse;
98 uint8_tType;
99 uint8_tBankConnections; // table type 6, see (3.3.7)
100 uint8_tBankConnCnt;
101
102} RamSlotInfo_t;
103
104typedef struct _PlatformInfo_t {
105struct CPU {
106uint32_tFeatures;// CPU Features like MMX, SSE2, VT, MobileCPU
107uint32_tVendor;// Vendor
108uint32_tSignature;// Signature
109uint32_tStepping;// Stepping
110uint32_tModel;// Model
111uint32_tExtModel;// Extended Model
112uint32_tFamily;// Family
113uint32_tExtFamily;// Extended Family
114uint32_tNoCores;// No Cores per Package
115uint32_tNoThreads;// Threads per Package
116uint8_tMaxCoef;// Max Multiplier
117uint8_tMaxDiv;
118uint8_tCurrCoef;// Current Multiplier
119uint8_tCurrDiv;
120uint64_tTSCFrequency;// TSC Frequency Hz
121uint64_tFSBFrequency;// FSB Frequency Hz
122uint64_tCPUFrequency;// CPU Frequency Hz
123charBrandString[48];// 48 Byte Branding String
124uint32_tCPUID[CPUID_MAX][4];// CPUID 0..4, 80..81 Raw Values
125} CPU;
126
127struct RAM {
128uint64_tFrequency;// Ram Frequency
129uint32_tDivider;// Memory divider
130uint8_tCAS;// CAS 1/2/2.5/3/4/5/6/7
131uint8_tTRC;
132uint8_tTRP;
133uint8_tRAS;
134uint8_tChannels;// Channel Configuration Single,Dual or Triple
135uint8_tNoSlots;// Maximum no of slots available
136uint8_tType;// Standard SMBIOS v2.5 Memory Type
137RamSlotInfo_tDIMM[MAX_RAM_SLOTS];// Information about each slot
138} RAM;
139
140struct DMI {
141intMaxMemorySlots;// number of memory slots polulated by SMBIOS
142intCntMemorySlots;// number of memory slots counted
143intMemoryModules;// number of memory modules installed
144intDIMM[MAX_RAM_SLOTS];// Information and SPD mapping for each slot
145} DMI;
146uint8_tType;// System Type: 1=Desktop, 2=Portable... according ACPI2.0 (FACP: PM_Profile)
147uint8_t*UUID;
148} PlatformInfo_t;
149
150extern PlatformInfo_t Platform;
151
152#endif /* !__LIBSAIO_PLATFORM_H */
153

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