1 | /*␊ |
2 | * ATI Graphics Card Enabler, part of the Chameleon Boot Loader Project␊ |
3 | *␊ |
4 | * Copyright 2010 by Islam M. Ahmed Zaid. All rights reserved.␊ |
5 | *␊ |
6 | */␊ |
7 | ␊ |
8 | ␊ |
9 | #include "libsaio.h"␊ |
10 | #include "boot.h"␊ |
11 | #include "bootstruct.h"␊ |
12 | #include "pci.h"␊ |
13 | #include "platform.h"␊ |
14 | #include "device_inject.h"␊ |
15 | ␊ |
16 | #include "ati_reg.h"␊ |
17 | #include "ati5.h"␊ |
18 | ␊ |
19 | #define Reg32(reg)␉␉␉␉␉(*(volatile uint32_t *)(card->mmio + reg))␊ |
20 | #define RegRead32(reg)␉␉␉␉(Reg32(reg))␊ |
21 | #define RegWrite32(reg, value)␉␉(Reg32(reg) = value)␊ |
22 | ␊ |
23 | typedef enum {␊ |
24 | ␉kNul,␊ |
25 | ␉kStr,␊ |
26 | ␉kPtr,␊ |
27 | ␉kCst␊ |
28 | } type_t;␊ |
29 | ␊ |
30 | typedef enum {␊ |
31 | ␉CHIP_FAMILY_UNKNOW,␊ |
32 | ␉CHIP_FAMILY_RS600,␊ |
33 | ␉CHIP_FAMILY_RS690,␊ |
34 | ␉CHIP_FAMILY_RS740,␊ |
35 | ␉CHIP_FAMILY_R600,␉/* r600 */␊ |
36 | ␉CHIP_FAMILY_RV610,␊ |
37 | ␉CHIP_FAMILY_RV630,␊ |
38 | ␉CHIP_FAMILY_RV670,␊ |
39 | ␉CHIP_FAMILY_RV620,␊ |
40 | ␉CHIP_FAMILY_RV635,␊ |
41 | ␉CHIP_FAMILY_RS780,␊ |
42 | ␉CHIP_FAMILY_RS880,␊ |
43 | ␉CHIP_FAMILY_RV770, /* r700 */␊ |
44 | ␉CHIP_FAMILY_RV730,␊ |
45 | ␉CHIP_FAMILY_RV710,␊ |
46 | ␉CHIP_FAMILY_RV740,␊ |
47 | ␉CHIP_FAMILY_CEDAR, /* evergreen */␊ |
48 | ␉CHIP_FAMILY_REDWOOD,␊ |
49 | ␉CHIP_FAMILY_JUNIPER,␊ |
50 | ␉CHIP_FAMILY_CYPRESS,␊ |
51 | ␉CHIP_FAMILY_HEMLOCK,␊ |
52 | ␉CHIP_FAMILY_LAST␊ |
53 | } chip_family_t;␊ |
54 | ␊ |
55 | static const char *chip_family_name[] = {␊ |
56 | ␉"UNKNOW",␊ |
57 | ␉"RS600",␊ |
58 | ␉"RS690",␊ |
59 | ␉"RS740",␊ |
60 | ␉/* r600 */␊ |
61 | ␉"R600",␊ |
62 | ␉"RV610",␊ |
63 | ␉"RV630",␊ |
64 | ␉"RV670",␊ |
65 | ␉"RV620",␊ |
66 | ␉"RV635",␊ |
67 | ␉"RS780",␊ |
68 | ␉"RS880",␊ |
69 | ␉/* r700 */␊ |
70 | ␉"RV770",␊ |
71 | ␉"RV730",␊ |
72 | ␉"RV710",␊ |
73 | ␉"RV740",␊ |
74 | ␉/* evergreen */␊ |
75 | ␉"Cedar",␉// RV810␊ |
76 | ␉"Redwood",␉// RV830␊ |
77 | ␉"Juniper",␉// RV840␊ |
78 | ␉"Cypress",␉// RV870␊ |
79 | ␉"Hemlock",␉␊ |
80 | };␊ |
81 | ␊ |
82 | typedef struct {␊ |
83 | ␉const char␉␉*name;␊ |
84 | ␉uint8_t␉␉␉ports;␊ |
85 | } card_config_t;␊ |
86 | ␊ |
87 | static card_config_t card_configs[] = {␊ |
88 | ␉{NULL,␉␉␉0},␊ |
89 | ␉{"Alopias",␉␉2},␊ |
90 | ␉{"Alouatta",␉4},␊ |
91 | ␉{"Baboon",␉␉3},␊ |
92 | ␉{"Cardinal",␉2},␊ |
93 | ␉{"Caretta",␉␉1},␊ |
94 | ␉{"Colobus",␉␉2},␊ |
95 | ␉{"Douc",␉␉2},␊ |
96 | ␉{"Eulemur",␉␉3},␊ |
97 | ␉{"Flicker",␉␉3},␊ |
98 | ␉{"Galago",␉␉2},␊ |
99 | ␉{"Gliff",␉␉3},␊ |
100 | ␉{"Hoolock",␉␉3},␊ |
101 | ␉{"Hypoprion",␉2},␊ |
102 | ␉{"Iago",␉␉2},␊ |
103 | ␉{"Kakapo",␉␉3},␊ |
104 | ␉{"Kipunji",␉␉4},␊ |
105 | ␉{"Lamna",␉␉2},␊ |
106 | ␉{"Langur",␉␉3},␊ |
107 | ␉{"Megalodon",␉3},␊ |
108 | ␉{"Motmot",␉␉2},␊ |
109 | ␉{"Peregrine",␉2},␊ |
110 | ␉{"Quail",␉␉3},␊ |
111 | ␉{"Raven",␉␉3},␊ |
112 | ␉{"Shrike",␉␉3},␊ |
113 | ␉{"Sphyrna",␉␉1},␊ |
114 | ␉{"Triakis",␉␉2},␊ |
115 | ␉{"Uakari",␉␉4},␊ |
116 | ␉{"Vervet",␉␉4},␊ |
117 | ␉{"Zonalis",␉␉6}␊ |
118 | };␊ |
119 | ␊ |
120 | typedef enum {␊ |
121 | ␉kNull,␊ |
122 | ␉kAlopias,␊ |
123 | ␉kAlouatta,␊ |
124 | ␉kBaboon,␊ |
125 | ␉kCardinal,␊ |
126 | ␉kCaretta,␊ |
127 | ␉kColobus,␊ |
128 | ␉kDouc,␊ |
129 | ␉kEulemur,␊ |
130 | ␉kFlicker,␊ |
131 | ␉kGalago,␊ |
132 | ␉kGliff,␊ |
133 | ␉kHoolock,␊ |
134 | ␉kHypoprion,␊ |
135 | ␉kIago,␊ |
136 | ␉kKakapo,␊ |
137 | ␉kKipunji,␊ |
138 | ␉kLamna,␊ |
139 | ␉kLangur,␊ |
140 | ␉kMegalodon,␊ |
141 | ␉kMotmot,␊ |
142 | ␉kPeregrine,␊ |
143 | ␉kQuail,␊ |
144 | ␉kRaven,␊ |
145 | ␉kShrike,␊ |
146 | ␉kSphyrna,␊ |
147 | ␉kTriakis,␊ |
148 | ␉kUakari,␊ |
149 | ␉kVervet,␊ |
150 | ␉kZonalis,␊ |
151 | ␉kCfgEnd␊ |
152 | } config_name_t;␊ |
153 | ␊ |
154 | typedef struct {␊ |
155 | ␉uint16_t␉␉device_id;␊ |
156 | ␉uint32_t␉␉subsys_id;␊ |
157 | ␉chip_family_t␉chip_family;␊ |
158 | ␉const char␉␉*model_name;␊ |
159 | ␉config_name_t␉cfg_name;␊ |
160 | } radeon_card_info_t;␊ |
161 | ␊ |
162 | static radeon_card_info_t radeon_cards[] = {␊ |
163 | ␉/* Earlier cards are not supported */␊ |
164 | ␉{ 0x9400,␉0x30001002,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 PRO",␉␉␉kNull␉␉},␊ |
165 | ␉{ 0x9400,␉0x25521002,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 XT",␉␉␉kNull␉␉},␊ |
166 | ␊ |
167 | ␉{ 0x9440,␉0x24401682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
168 | ␉{ 0x9440,␉0x24411682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
169 | ␉{ 0x9440,␉0x24441682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
170 | ␉{ 0x9440,␉0x24451682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
171 | ␊ |
172 | ␉{ 0x9441,␉0x24401682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870 X2",␉␉␉kMotmot␉␉},␊ |
173 | ␊ |
174 | ␉{ 0x9442,␉0x24701682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
175 | ␉{ 0x9442,␉0x24711682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
176 | ␉{ 0x9442,␉0x080110B0,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
177 | ␉{ 0x9442,␉0xE104174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
178 | ␊ |
179 | ␉{ 0x944A,␉0x30001682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
180 | ␉{ 0x944A,␉0x30001043,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
181 | ␉{ 0x944A,␉0x30001458,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
182 | ␉{ 0x944A,␉0x30001462,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
183 | ␉{ 0x944A,␉0x30001545,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
184 | ␉{ 0x944A,␉0x30001787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
185 | ␉{ 0x944A,␉0x3000174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
186 | ␉{ 0x944A,␉0x300017AF,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
187 | ␊ |
188 | ␉{ 0x944C,␉0x24801682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4830",␉␉␉␉kMotmot␉␉},␊ |
189 | ␉{ 0x944C,␉0x24811682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4830",␉␉␉␉kMotmot␉␉},␊ |
190 | ␊ |
191 | ␉{ 0x944E,␉0x3260174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4810 Series",␉␉kMotmot␉␉},␊ |
192 | ␉{ 0x944E,␉0x3261174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4810 series",␉␉kMotmot␉␉},␊ |
193 | ␉{ 0x944E,␉0x30001787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4730 Series",␉␉kMotmot␉␉},␊ |
194 | ␉{ 0x944E,␉0x30101787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4810 Series",␉␉kMotmot␉␉},␊ |
195 | ␉{ 0x944E,␉0x31001787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4820",␉␉␉␉kMotmot␉␉},␊ |
196 | ␊ |
197 | ␉{ 0x9490,␉0x30501787,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4710",␉␉␉␉kNull␉␉},␊ |
198 | ␉{ 0x9490,␉0x4710174B,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4710",␉␉␉␉kNull␉␉},␊ |
199 | ␉{ 0x9490,␉0x300017AF,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4710",␉␉␉␉kNull␉␉},␊ |
200 | ␊ |
201 | ␉{ 0x9498,␉0x30501787,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4700",␉␉␉␉kNull␉␉},␊ |
202 | ␉{ 0x9498,␉0x31001787,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4720",␉␉␉␉kNull␉␉},␊ |
203 | ␉{ 0x9498,␉0x24511682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4650",␉␉␉␉kNull␉␉},␊ |
204 | ␉{ 0x9498,␉0x24521682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4650",␉␉␉␉kNull␉␉},␊ |
205 | ␉{ 0x9498,␉0x24541682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4650",␉␉␉␉kNull␉␉},␊ |
206 | ␉{ 0x9498,␉0x29331682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4670",␉␉␉␉kNull␉␉},␊ |
207 | ␉{ 0x9498,␉0x29341682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4670",␉␉␉␉kNull␉␉},␊ |
208 | ␉{ 0x9498,␉0x21CF1458,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4600 Series",␉␉kNull␉␉},␊ |
209 | ␊ |
210 | ␉{ 0x94B3,␉0x29001682,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
211 | ␉{ 0x94B3,␉0x1170174B,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
212 | ␉{ 0x94B3,␉0x10020D00,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
213 | ␊ |
214 | ␉{ 0x94C1,␉0x10021002,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Pro",␉␉␉kNull␉␉},␊ |
215 | ␉{ 0x94C1,␉0x0D021002,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
216 | ␉{ 0x94C1,␉0x0D021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Pro",␉␉␉kNull␉␉},␊ |
217 | ␉{ 0x94C1,␉0x0D021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
218 | ␉{ 0x94C1,␉0x21741458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
219 | ␉{ 0x94C1,␉0x10401462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
220 | ␉{ 0x94C1,␉0x10331462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
221 | ␉{ 0x94C1,␉0x10331462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
222 | ␉{ 0x94C1,␉0x11101462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
223 | ␊ |
224 | ␉{ 0x94C3,␉0x37161642,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
225 | ␉{ 0x94C3,␉0x30001642,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 3410",␉␉␉␉kNull␉␉},␊ |
226 | ␉{ 0x94C3,␉0x03421002,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
227 | ␉{ 0x94C3,␉0x30001025,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
228 | ␉{ 0x94C3,␉0x04021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
229 | ␉{ 0x94C3,␉0x03021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
230 | ␉{ 0x94C3,␉0x04021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
231 | ␉{ 0x94C3,␉0x216A1458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
232 | ␉{ 0x94C3,␉0x21721458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
233 | ␉{ 0x94C3,␉0x30001458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 3410",␉␉␉␉kNull␉␉},␊ |
234 | ␉{ 0x94C3,␉0x11041462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
235 | ␉{ 0x94C3,␉0x10411462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
236 | ␉{ 0x94C3,␉0x11051462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
237 | ␉{ 0x94C3,␉0x10321462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
238 | ␉{ 0x94C3,␉0x30001462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 3410",␉␉␉␉kNull␉␉},␊ |
239 | ␉{ 0x94C3,␉0x3000148C,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
240 | ␉{ 0x94C3,␉0x2247148C,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 LE",␉␉␉kNull␉␉},␊ |
241 | ␉{ 0x94C3,␉0x3000174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
242 | ␉{ 0x94C3,␉0xE400174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
243 | ␉{ 0x94C3,␉0xE370174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
244 | ␉{ 0x94C3,␉0xE400174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
245 | ␉{ 0x94C3,␉0xE370174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
246 | ␉{ 0x94C3,␉0xE400174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
247 | ␉{ 0x94C3,␉0x203817AF,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
248 | ␉{ 0x94C3,␉0x30001787,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
249 | ␉{ 0x94C3,␉0x22471787,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 LE",␉␉␉kNull␉␉},␊ |
250 | ␉{ 0x94C3,␉0x01011A93,␉CHIP_FAMILY_RV610,␉␉"Qimonda Radeon HD 2400 PRO",␉␉kNull␉␉},␊ |
251 | ␊ |
252 | ␊ |
253 | ␉{ 0x9501,␉0x30001002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
254 | ␉{ 0x9501,␉0x25421002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3870",␉␉␉␉kNull␉␉},␊ |
255 | ␉{ 0x9501,␉0x4750174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
256 | ␉{ 0x9501,␉0x3000174B,␉CHIP_FAMILY_RV670,␉␉"Sapphire Radeon HD 3690",␉␉␉kNull␉␉},␊ |
257 | ␉{ 0x9501,␉0x30001787,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
258 | ␊ |
259 | ␉{ 0x9505,␉0x30001002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
260 | ␉{ 0x9505,␉0x25421002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3850",␉␉␉␉kNull␉␉},␊ |
261 | ␉{ 0x9505,␉0x30011043,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
262 | ␉{ 0x9505,␉0x3000148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3850",␉␉␉␉kNull␉␉},␊ |
263 | ␉{ 0x9505,␉0x3002148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
264 | ␉{ 0x9505,␉0x3001148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
265 | ␉{ 0x9505,␉0x3003148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
266 | ␉{ 0x9505,␉0x3004148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
267 | ␉{ 0x9505,␉0x4730174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
268 | ␉{ 0x9505,␉0x3010174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
269 | ␉{ 0x9505,␉0x3001174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
270 | ␉{ 0x9505,␉0x3000174B,␉CHIP_FAMILY_RV670,␉␉"Sapphire Radeon HD 3690",␉␉␉kNull␉␉},␊ |
271 | ␉{ 0x9505,␉0x30001787,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
272 | ␉{ 0x9505,␉0x301017AF,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
273 | ␊ |
274 | ␉{ 0x9540,␉0x4590174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4590",␉␉␉␉kNull␉␉},␊ |
275 | ␉{ 0x9540,␉0x30501787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4590",␉␉␉␉kNull␉␉},␊ |
276 | ␊ |
277 | ␉{ 0x954F,␉0x29201682,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4550",␉␉␉␉kNull␉␉},␊ |
278 | ␉{ 0x954F,␉0x29211682,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4550",␉␉␉␉kNull␉␉},␊ |
279 | ␉{ 0x954F,␉0x30901682,␉CHIP_FAMILY_RV710,␉␉"XFX Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
280 | ␉{ 0x954F,␉0x4450174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4450",␉␉␉␉kNull␉␉},␊ |
281 | ␉{ 0x954F,␉0x3000174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4520",␉␉␉␉kNull␉␉},␊ |
282 | ␉{ 0x954F,␉0x30501787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4450",␉␉␉␉kNull␉␉},␊ |
283 | ␉{ 0x954F,␉0x31001787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4520",␉␉␉␉kNull␉␉},␊ |
284 | ␉{ 0x954F,␉0x4570174B,␉CHIP_FAMILY_RV710,␉␉"Sapphire Radeon HD4570",␉␉␉kNull␉␉},␊ |
285 | ␉{ 0x954F,␉0x301017AF,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4450",␉␉␉␉kNull␉␉},␊ |
286 | ␊ |
287 | ␉{ 0x9552,␉0x3000148C,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
288 | ␉{ 0x9552,␉0x3000174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
289 | ␉{ 0x9552,␉0x30001787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
290 | ␉{ 0x9552,␉0x300017AF,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
291 | ␊ |
292 | ␉{ 0x9581,␉0x95811002,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
293 | ␉{ 0x9581,␉0x3000148C,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
294 | ␊ |
295 | ␉{ 0x9583,␉0x3000148C,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
296 | ␉{ 0x9588,␉0x01021A93,␉CHIP_FAMILY_RV630,␉␉"Qimonda Radeon HD 2600 XT",␉␉kNull␉␉},␊ |
297 | ␊ |
298 | ␉{ 0x9589,␉0x30001462,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3610",␉␉␉␉kNull␉␉},␊ |
299 | ␉{ 0x9589,␉0x30001642,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3610",␉␉␉␉kNull␉␉},␊ |
300 | ␉{ 0x9589,␉0x0E41174B,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
301 | ␉{ 0x9589,␉0x30001787,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
302 | ␉{ 0x9589,␉0x01001A93,␉CHIP_FAMILY_RV630,␉␉"Qimonda Radeon HD 2600 PRO",␉␉kNull␉␉},␊ |
303 | ␊ |
304 | ␉{ 0x9591,␉0x2303148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
305 | ␊ |
306 | ␉{ 0x9598,␉0xB3831002,␉CHIP_FAMILY_RV635,␉␉"ATI All-in-Wonder HD",␉␉␉␉kNull␉␉},␊ |
307 | ␉{ 0x9598,␉0x30011043,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
308 | ␉{ 0x9598,␉0x30001043,␉CHIP_FAMILY_RV635,␉␉"HD3730",␉␉␉␉␉␉␉kNull␉␉},␊ |
309 | ␉{ 0x9598,␉0x3000148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 3730",␉␉␉␉kNull␉␉},␊ |
310 | ␉{ 0x9598,␉0x3031148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
311 | ␉{ 0x9598,␉0x3001148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4580",␉␉␉␉kNull␉␉},␊ |
312 | ␉{ 0x9598,␉0x30011545,␉CHIP_FAMILY_RV635,␉␉"VisionTek Radeon HD 2600 Pro",␉␉kNull␉␉},␊ |
313 | ␉{ 0x9598,␉0x30001545,␉CHIP_FAMILY_RV635,␉␉"VisionTek Radeon HD 2600 XT",␉␉kNull␉␉},␊ |
314 | ␉{ 0x9598,␉0x4570174B,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
315 | ␉{ 0x9598,␉0x4580174B,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4580",␉␉␉␉kNull␉␉},␊ |
316 | ␉{ 0x9598,␉0x4610174B,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4610",␉␉␉␉kNull␉␉},␊ |
317 | ␉{ 0x9598,␉0x3000174B,␉CHIP_FAMILY_RV635,␉␉"Sapphire Radeon HD 3730",␉␉␉kNull␉␉},␊ |
318 | ␉{ 0x9598,␉0x3001174B,␉CHIP_FAMILY_RV635,␉␉"Sapphire Radeon HD 3750",␉␉␉kNull␉␉},␊ |
319 | ␉{ 0x9598,␉0x301017AF,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
320 | ␉{ 0x9598,␉0x301117AF,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4580",␉␉␉␉kNull␉␉},␊ |
321 | ␉{ 0x9598,␉0x300117AF,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD3750",␉␉␉␉kNull␉␉},␊ |
322 | ␉{ 0x9598,␉0x30501787,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4610",␉␉␉␉kNull␉␉},␊ |
323 | ␊ |
324 | ␉{ 0x95C0,␉0x3000148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3550",␉␉␉␉kNull␉␉},␊ |
325 | ␉{ 0x95C0,␉0xE3901745,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3550",␉␉␉␉kNull␉␉},␊ |
326 | ␉{ 0x95C0,␉0x3002174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3570",␉␉␉␉kNull␉␉},␊ |
327 | ␉{ 0x95C0,␉0x3020174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
328 | ␉{ 0x95C0,␉0x3000174B,␉CHIP_FAMILY_RV620,␉␉"Sapphire Radeon HD 3550",␉␉␉kNull␉␉},␊ |
329 | ␊ |
330 | ␉{ 0x95C5,␉0x3000148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3450",␉␉␉␉kNull␉␉},␊ |
331 | ␉{ 0x95C5,␉0x3001148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3550",␉␉␉␉kNull␉␉},␊ |
332 | ␉{ 0x95C5,␉0x3002148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4230",␉␉␉␉kNull␉␉},␊ |
333 | ␉{ 0x95C5,␉0x3033148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4230",␉␉␉␉kNull␉␉},␊ |
334 | ␉{ 0x95C5,␉0x3003148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
335 | ␉{ 0x95C5,␉0x3032148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
336 | ␉{ 0x95C5,␉0x3010174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
337 | ␉{ 0x95C5,␉0x4250174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
338 | ␉{ 0x95C5,␉0x30501787,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
339 | ␉{ 0x95C5,␉0x301017AF,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4230",␉␉␉␉kNull␉␉},␊ |
340 | ␉{ 0x95C5,␉0x01051A93,␉CHIP_FAMILY_RV620,␉␉"Qimonda Radeon HD 3450",␉␉␉kNull␉␉},␊ |
341 | ␉{ 0x95C5,␉0x01041A93,␉CHIP_FAMILY_RV620,␉␉"Qimonda Radeon HD 3450",␉␉␉kNull␉␉},␊ |
342 | ␊ |
343 | ␉/* Evergreen */␊ |
344 | ␉{ 0x6898,␉0x032E1043,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kUakari␉␉},␊ |
345 | ␉{ 0x6898,␉0xE140174B,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kUakari␉␉},␊ |
346 | ␉{ 0x6898,␉0x0B001002,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kZonalis␉},␊ |
347 | ␊ |
348 | ␉{ 0x6899,␉0x21E41458,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
349 | ␉{ 0x6899,␉0x200A1787,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
350 | ␉{ 0x6899,␉0x22901787,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
351 | ␉{ 0x6899,␉0xE140174B,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
352 | ␊ |
353 | ␉{ 0x689C,␉0x03521043,␉CHIP_FAMILY_HEMLOCK,␉"ASUS ARES",␉␉␉␉␉␉kUakari␉␉},␊ |
354 | ␉{ 0x689C,␉0x039E1043,␉CHIP_FAMILY_HEMLOCK,␉"ASUS EAH5870 Series",␉␉␉␉kUakari␉␉},␊ |
355 | ␉{ 0x689C,␉0x30201682,␉CHIP_FAMILY_HEMLOCK,␉"ATI Radeon HD 5970",␉␉␉␉kUakari␉␉},␊ |
356 | ␊ |
357 | ␉{ 0x68B8,␉0xE147174B,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
358 | ␉{ 0x68B8,␉0x21D71458,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
359 | ␉{ 0x68B8,␉0x1482174B,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
360 | ␉{ 0x68B8,␉0x29901682,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
361 | ␉{ 0x68B8,␉0x29911682,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
362 | ␉{ 0x68B8,␉0x200B1787,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
363 | ␉{ 0x68B8,␉0x22881787,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
364 | ␊ |
365 | ␉{ 0x68D8,␉0x301117AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5690",␉␉␉␉kNull␉␉},␊ |
366 | ␉{ 0x68D8,␉0x301017AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5730",␉␉␉␉kNull␉␉},␊ |
367 | ␉{ 0x68D8,␉0x30001787,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5730",␉␉␉␉kNull␉␉},␊ |
368 | ␉{ 0x68D8,␉0x5690174B,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5690",␉␉␉␉kNull␉␉},␊ |
369 | ␉{ 0x68D8,␉0x5730174B,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5730",␉␉␉␉kNull␉␉},␊ |
370 | ␉{ 0x68D8,␉0x21D91458,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5670",␉␉␉␉kBaboon␉␉},␊ |
371 | ␉{ 0x68D8,␉0x03561043,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5670",␉␉␉␉kBaboon␉␉},␊ |
372 | ␉{ 0x68D9,␉0x301017AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
373 | ␉{ 0x68DA,␉0x301017AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
374 | ␉{ 0x68DA,␉0x30001787,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
375 | ␉{ 0x68DA,␉0x5630174B,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
376 | ␊ |
377 | ␉{ 0x68F9,␉0x301317AF,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
378 | ␉{ 0x68F9,␉0x301117AF,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
379 | ␉{ 0x68F9,␉0x301217AF,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5490",␉␉␉␉kNull␉␉},␊ |
380 | ␉{ 0x68F9,␉0x30001787,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
381 | ␉{ 0x68F9,␉0x30021787,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5490",␉␉␉␉kNull␉␉},␊ |
382 | ␉{ 0x68F9,␉0x30011787,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5530",␉␉␉␉kNull␉␉},␊ |
383 | ␉{ 0x68F9,␉0x5470174B,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
384 | ␉{ 0x68F9,␉0x5490174B,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5490",␉␉␉␉kNull␉␉},␊ |
385 | ␉{ 0x68F9,␉0x5530174B,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5530",␉␉␉␉kNull␉␉},␊ |
386 | ␊ |
387 | ␉/* standard/default models */␊ |
388 | ␉{ 0x9400,␉0x00000000,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 XT",␉␉␉kNull␉␉},␊ |
389 | ␉{ 0x9405,␉0x00000000,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 GT",␉␉␉kNull␉␉},␊ |
390 | ␉{ 0x9440,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
391 | ␉{ 0x9441,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870 X2",␉␉␉kMotmot␉␉},␊ |
392 | ␉{ 0x9442,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
393 | ␉{ 0x9443,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850 X2",␉␉␉kMotmot␉␉},␊ |
394 | ␉{ 0x944C,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
395 | ␉{ 0x944E,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4700 Series",␉␉kMotmot␉␉},␊ |
396 | ␉{ 0x944E,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4700 Series",␉␉kMotmot␉␉},␊ |
397 | ␉{ 0x9450,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"AMD FireStream 9270",␉␉␉␉kMotmot␉␉},␊ |
398 | ␉{ 0x9452,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"AMD FireStream 9250",␉␉␉␉kMotmot␉␉},␊ |
399 | ␉{ 0x9460,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
400 | ␉{ 0x9462,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
401 | ␉{ 0x9490,␉0x00000000,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4600 Series",␉␉kFlicker␉},␊ |
402 | ␉{ 0x9498,␉0x00000000,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4600 Series",␉␉kFlicker␉},␊ |
403 | ␉{ 0x94B3,␉0x00000000,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
404 | ␉{ 0x94B4,␉0x00000000,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4700 Series",␉␉kFlicker␉},␊ |
405 | ␉{ 0x94B5,␉0x00000000,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
406 | ␉{ 0x94C1,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Series",␉␉kIago␉␉},␊ |
407 | ␉{ 0x94C3,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Series",␉␉kIago␉␉},␊ |
408 | ␉{ 0x94C7,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350",␉␉␉␉kIago␉␉},␊ |
409 | ␉{ 0x94CC,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Series",␉␉kIago␉␉},␊ |
410 | ␊ |
411 | ␉{ 0x9501,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3800 Series",␉␉kMegalodon␉},␊ |
412 | ␉{ 0x9505,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3800 Series",␉␉kMegalodon␉},␊ |
413 | ␉{ 0x9507,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3830",␉␉␉␉kMegalodon␉},␊ |
414 | ␉{ 0x950F,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3870 X2",␉␉␉kMegalodon␉},␊ |
415 | ␉{ 0x9513,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3850 X2",␉␉␉kMegalodon␉},␊ |
416 | ␉{ 0x9519,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"AMD FireStream 9170",␉␉␉␉kMegalodon␉},␊ |
417 | ␉{ 0x9540,␉0x00000000,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4550",␉␉␉␉kNull␉␉},␊ |
418 | ␉{ 0x954F,␉0x00000000,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
419 | ␉{ 0x9588,␉0x00000000,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 2600 XT",␉␉␉kLamna␉␉},␊ |
420 | ␉{ 0x9589,␉0x00000000,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 2600 PRO",␉␉␉kLamna␉␉},␊ |
421 | ␉{ 0x958A,␉0x00000000,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 2600 X2 Series",␉␉kLamna␉␉},␊ |
422 | ␉{ 0x9598,␉0x00000000,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 3600 Series",␉␉kMegalodon␉},␊ |
423 | ␉{ 0x95C0,␉0x00000000,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3400 Series",␉␉kIago␉␉},␊ |
424 | ␉{ 0x95C5,␉0x00000000,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3400 Series",␉␉kIago␉␉},␊ |
425 | ␊ |
426 | ␉{ 0x9610,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"ATI Radeon HD 3200 Graphics",␉␉kNull␉␉},␊ |
427 | ␉{ 0x9611,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"ATI Radeon 3100 Graphics",␉␉␉kNull␉␉},␊ |
428 | ␉{ 0x9614,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"ATI Radeon HD 3300 Graphics",␉␉kNull␉␉},␊ |
429 | ␉{ 0x9616,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"AMD 760G",␉␉␉␉␉␉␉kNull␉␉},␊ |
430 | ␊ |
431 | ␉{ 0x9710,␉0x00000000,␉CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4200",␉␉␉␉kNull␉␉},␊ |
432 | ␉{ 0x9715,␉0x00000000,␉CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
433 | ␉{ 0x9714,␉0x00000000,␉CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4290",␉␉␉␉kNull␉␉},␊ |
434 | ␊ |
435 | ␊ |
436 | ␉{ 0x688D,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"AMD FireStream 9350",␉␉␉␉kUakari␉␉},␊ |
437 | ␊ |
438 | ␉{ 0x6898,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5800 Series",␉␉kUakari␉␉},␊ |
439 | ␉{ 0x6899,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5800 Series",␉␉kUakari␉␉},␊ |
440 | ␉{ 0x689E,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5800 Series",␉␉kUakari␉␉},␊ |
441 | ␉{ 0x689C,␉0x00000000,␉CHIP_FAMILY_HEMLOCK,␉"ATI Radeon HD 5900 Series",␉␉kUakari␉␉},␊ |
442 | ␊ |
443 | ␉{ 0x68B9,␉0x00000000,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5600 Series",␉␉kVervet␉␉},␊ |
444 | ␉{ 0x68B8,␉0x00000000,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5700 Series",␉␉kVervet␉␉},␊ |
445 | ␉{ 0x68BE,␉0x00000000,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5700 Series",␉␉kVervet␉␉},␊ |
446 | ␊ |
447 | ␉{ 0x68D8,␉0x00000000,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5600 Series",␉␉kBaboon␉␉},␊ |
448 | ␉{ 0x68D9,␉0x00000000,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5500 Series",␉␉kBaboon␉␉},␊ |
449 | ␉{ 0x68DA,␉0x00000000,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5500 Series",␉␉kBaboon␉␉},␊ |
450 | ␊ |
451 | ␉{ 0x68F9,␉0x00000000,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5400 Series",␉␉kNull␉␉},␊ |
452 | ␊ |
453 | ␉{ 0x0000,␉0x00000000,␉CHIP_FAMILY_UNKNOW,␉␉NULL,␉␉␉␉␉␉␉␉kNull␉␉}␊ |
454 | };␊ |
455 | ␊ |
456 | ␊ |
457 | typedef struct {␊ |
458 | ␉struct DevPropDevice␉*device;␊ |
459 | ␉radeon_card_info_t␉␉*info;␊ |
460 | ␉pci_dt_t ␉␉␉␉*pci_dev;␊ |
461 | ␉uint8_t␉␉␉␉␉*fb;␊ |
462 | ␉uint8_t␉␉␉␉␉*mmio;␊ |
463 | ␉uint8_t␉␉␉␉␉*io;␊ |
464 | ␉uint8_t␉␉␉␉␉*rom;␊ |
465 | ␉uint32_t␉␉␉␉rom_size;␊ |
466 | ␉uint32_t␉␉␉␉vram_size;␊ |
467 | ␉uint8_t␉␉␉␉␉ports;␊ |
468 | ␉uint32_t␉␉␉␉flags;␊ |
469 | ␉bool␉␉␉␉␉posted;␊ |
470 | } card_t;␊ |
471 | card_t *card;␊ |
472 | ␊ |
473 | /* Flags */␊ |
474 | #define MKFLAG(n)␉␉(1 << n)␊ |
475 | #define FLAGTRUE␉␉MKFLAG(0)␊ |
476 | #define EVERGREEN␉␉MKFLAG(1)␊ |
477 | ␊ |
478 | static uint8_t atN = 0;␊ |
479 | ␊ |
480 | typedef struct {␊ |
481 | ␉type_t␉␉type;␊ |
482 | ␉uint32_t␉size;␊ |
483 | ␉uint8_t␉␉*data;␊ |
484 | } value_t;␊ |
485 | ␊ |
486 | static value_t aty_name;␊ |
487 | static value_t aty_nameparent;␊ |
488 | //static value_t aty_model;␊ |
489 | ␊ |
490 | #define DATVAL(x)␉␉{kPtr, sizeof(x), (uint8_t *)x}␊ |
491 | #define STRVAL(x)␉␉{kStr, sizeof(x), (uint8_t *)x}␊ |
492 | #define BYTVAL(x)␉␉{kCst, 1, (uint8_t *)x}␊ |
493 | #define WRDVAL(x)␉␉{kCst, 2, (uint8_t *)x}␊ |
494 | #define DWRVAL(x)␉␉{kCst, 4, (uint8_t *)x}␊ |
495 | #define QWRVAL(x)␉␉{kCst, 8, (uint8_t *)x}␊ |
496 | #define NULVAL␉␉␉{kNul, 0, (uint8_t *)NULL}␊ |
497 | ␊ |
498 | bool get_bootdisplay_val(value_t *val);␊ |
499 | bool get_vrammemory_val(value_t *val);␊ |
500 | bool get_name_val(value_t *val);␊ |
501 | bool get_nameparent_val(value_t *val);␊ |
502 | bool get_model_val(value_t *val);␊ |
503 | bool get_conntype_val(value_t *val);␊ |
504 | bool get_vrammemsize_val(value_t *val);␊ |
505 | bool get_binimage_val(value_t *val);␊ |
506 | bool get_deviceid_val(value_t *val);␊ |
507 | bool get_mclk_val(value_t *val);␊ |
508 | bool get_sclk_val(value_t *val);␊ |
509 | bool get_refclk_val(value_t *val);␊ |
510 | bool get_platforminfo_val(value_t *val);␊ |
511 | bool get_vramtotalsize_val(value_t *val);␊ |
512 | ␊ |
513 | typedef struct {␊ |
514 | ␉uint32_t␉flags;␊ |
515 | ␉bool␉␉all_ports;␊ |
516 | ␉char␉␉*name;␊ |
517 | ␉bool␉␉(*get_value)(value_t *val);␊ |
518 | ␉value_t␉␉default_val;␊ |
519 | } dev_prop_t;␊ |
520 | ␊ |
521 | dev_prop_t ati_devprop_list[] = {␊ |
522 | ␉{FLAGTRUE,␉false,␉"@0,AAPL,boot-display",␉␉get_bootdisplay_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
523 | //␉{FLAGTRUE,␉false,␉"@0,ATY,EFIDisplay",␉␉NULL,␉␉␉␉␉STRVAL("TMDSA")␉␉␉␉␉},␊ |
524 | ␊ |
525 | //␉{FLAGTRUE,␉true,␉"@0,AAPL,vram-memory",␉␉get_vrammemory_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
526 | //␉{FLAGTRUE,␉true,␉"@0,compatible",␉␉␉get_name_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
527 | //␉{FLAGTRUE,␉true,␉"@0,connector-type",␉␉get_conntype_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
528 | //␉{FLAGTRUE,␉true,␉"@0,device_type",␉␉␉NULL,␉␉␉␉␉STRVAL("display")␉␉␉␉},␊ |
529 | //␉{FLAGTRUE,␉false,␉"@0,display-connect-flags",␉NULL,␉␉␉␉␉DWRVAL((uint32_t)0)␉␉␉␉},␊ |
530 | //␉{FLAGTRUE,␉true,␉"@0,display-type",␉␉␉NULL,␉␉␉␉␉STRVAL("NONE")␉␉␉␉␉},␊ |
531 | ␉{FLAGTRUE,␉true,␉"@0,name",␉␉␉␉␉get_name_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
532 | //␉{FLAGTRUE,␉true,␉"@0,VRAM,memsize",␉␉␉get_vrammemsize_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
533 | ␊ |
534 | //␉{FLAGTRUE,␉false,␉"AAPL,aux-power-connected",␉NULL,␉␉␉␉␉DWRVAL((uint32_t)1)␉␉␉␉},␊ |
535 | //␉{FLAGTRUE,␉false,␉"AAPL,backlight-control",␉NULL,␉␉␉␉␉DWRVAL((uint32_t)0)␉␉␉␉},␊ |
536 | ␉{FLAGTRUE,␉false,␉"ATY,bin_image",␉␉␉get_binimage_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
537 | ␉{FLAGTRUE,␉false,␉"ATY,Copyright",␉␉␉NULL,␉STRVAL("Copyright AMD Inc. All Rights Reserved. 2005-2010")␉},␊ |
538 | ␉{FLAGTRUE,␉false,␉"ATY,VendorID",␉␉␉␉NULL,␉␉␉␉␉WRDVAL((uint16_t)0x1002)␉␉},␊ |
539 | ␉{FLAGTRUE,␉false,␉"ATY,DeviceID",␉␉␉␉get_deviceid_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
540 | ␊ |
541 | //␉{FLAGTRUE,␉false,␉"ATY,MCLK",␉␉␉␉␉get_mclk_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
542 | //␉{FLAGTRUE,␉false,␉"ATY,SCLK",␉␉␉␉␉get_sclk_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
543 | //␉{FLAGTRUE,␉false,␉"ATY,RefCLK",␉␉␉␉get_refclk_val,␉␉␉DWRVAL((uint32_t)0x0a8c)␉␉},␊ |
544 | ␊ |
545 | //␉{FLAGTRUE,␉false,␉"ATY,PlatformInfo",␉␉␉get_platforminfo_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
546 | ␊ |
547 | ␉{FLAGTRUE,␉false,␉"name",␉␉␉␉␉␉get_nameparent_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
548 | ␉{FLAGTRUE,␉false,␉"device_type",␉␉␉␉get_nameparent_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
549 | ␉{FLAGTRUE,␉false,␉"model",␉␉␉␉␉get_model_val,␉␉␉STRVAL("ATI Radeon")␉␉␉},␊ |
550 | //␉{FLAGTRUE,␉false,␉"VRAM,totalsize",␉␉␉get_vramtotalsize_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
551 | ␊ |
552 | ␉{FLAGTRUE,␉false,␉NULL,␉␉␉␉␉␉NULL,␉␉␉␉␉NULVAL␉␉␉␉␉␉␉}␊ |
553 | };␊ |
554 | ␊ |
555 | bool get_bootdisplay_val(value_t *val)␊ |
556 | {␊ |
557 | ␉static uint32_t v = 0;␊ |
558 | ␊ |
559 | ␉if (v)␊ |
560 | ␉␉return false;␊ |
561 | ␊ |
562 | ␉if (!card->posted)␊ |
563 | ␉␉return false;␊ |
564 | ␊ |
565 | ␉v = 1;␊ |
566 | ␉val->type = kCst;␊ |
567 | ␉val->size = 4;␊ |
568 | ␉val->data = (uint8_t *)&v;␊ |
569 | ␊ |
570 | ␉return true;␊ |
571 | }␊ |
572 | ␊ |
573 | bool get_vrammemory_val(value_t *val)␊ |
574 | {␊ |
575 | ␉return false;␊ |
576 | }␊ |
577 | ␊ |
578 | bool get_name_val(value_t *val)␊ |
579 | {␊ |
580 | ␉val->type = aty_name.type;␊ |
581 | ␉val->size = aty_name.size;␊ |
582 | ␉val->data = aty_name.data;␊ |
583 | ␊ |
584 | ␉return true;␊ |
585 | }␊ |
586 | ␊ |
587 | bool get_nameparent_val(value_t *val)␊ |
588 | {␊ |
589 | ␉val->type = aty_nameparent.type;␊ |
590 | ␉val->size = aty_nameparent.size;␊ |
591 | ␉val->data = aty_nameparent.data;␊ |
592 | ␊ |
593 | ␉return true;␊ |
594 | }␊ |
595 | ␊ |
596 | bool get_model_val(value_t *val)␊ |
597 | {␊ |
598 | ␉if (!card->info->model_name)␊ |
599 | ␉␉return false;␊ |
600 | ␊ |
601 | ␉val->type = kStr;␊ |
602 | ␉val->size = strlen(card->info->model_name) + 1;␊ |
603 | ␉val->data = (uint8_t *)card->info->model_name;␊ |
604 | ␊ |
605 | ␉return true;␊ |
606 | }␊ |
607 | ␊ |
608 | bool get_conntype_val(value_t *val)␊ |
609 | {␊ |
610 | /*␊ |
611 | Connector types:␊ |
612 | 0x4 : DisplayPort␊ |
613 | 0x400: DL DVI-I␊ |
614 | 0x800: HDMI␊ |
615 | */␊ |
616 | ␉return false;␊ |
617 | }␊ |
618 | ␊ |
619 | bool get_vrammemsize_val(value_t *val)␊ |
620 | {␊ |
621 | ␉static int idx = -1;␊ |
622 | ␉static uint64_t memsize;␊ |
623 | ␊ |
624 | ␉idx++;␊ |
625 | ␉memsize = ((uint64_t)card->vram_size << 32);␊ |
626 | ␉if (idx == 0)␊ |
627 | ␉␉memsize = memsize | (uint64_t)card->vram_size;␊ |
628 | ␊ |
629 | ␉val->type = kCst;␊ |
630 | ␉val->size = 8;␊ |
631 | ␉val->data = (uint8_t *)&memsize;␊ |
632 | ␊ |
633 | ␉return true;␊ |
634 | }␊ |
635 | ␊ |
636 | bool get_binimage_val(value_t *val)␊ |
637 | {␊ |
638 | ␉if (!card->rom)␊ |
639 | ␉␉return false;␊ |
640 | ␊ |
641 | ␉val->type = kPtr;␊ |
642 | ␉val->size = card->rom_size;␊ |
643 | ␉val->data = card->rom;␊ |
644 | ␊ |
645 | ␉return true;␊ |
646 | }␊ |
647 | ␊ |
648 | bool get_deviceid_val(value_t *val)␊ |
649 | {␊ |
650 | ␉val->type = kCst;␊ |
651 | ␉val->size = 2;␊ |
652 | ␉val->data = (uint8_t *)&card->pci_dev->device_id;␊ |
653 | ␊ |
654 | ␉return true;␊ |
655 | }␊ |
656 | ␊ |
657 | bool get_mclk_val(value_t *val)␊ |
658 | {␊ |
659 | ␉return false;␊ |
660 | }␊ |
661 | ␊ |
662 | bool get_sclk_val(value_t *val)␊ |
663 | {␊ |
664 | ␉return false;␊ |
665 | }␊ |
666 | ␊ |
667 | bool get_refclk_val(value_t *val)␊ |
668 | {␊ |
669 | ␉return false;␊ |
670 | }␊ |
671 | ␊ |
672 | bool get_platforminfo_val(value_t *val)␊ |
673 | {␊ |
674 | ␉val->data = malloc(0x80);␊ |
675 | ␉if (!val->data)␊ |
676 | ␉␉return false;␊ |
677 | ␊ |
678 | ␉bzero(val->data, 0x80);␊ |
679 | ␊ |
680 | ␉val->type␉␉= kPtr;␊ |
681 | ␉val->size␉␉= 0x80;␊ |
682 | ␉val->data[0]␉= 1;␊ |
683 | ␊ |
684 | ␉return true;␊ |
685 | }␊ |
686 | ␊ |
687 | bool get_vramtotalsize_val(value_t *val)␊ |
688 | {␊ |
689 | ␉val->type = kCst;␊ |
690 | ␉val->size = 4;␊ |
691 | ␉val->data = (uint8_t *)&card->vram_size;␊ |
692 | ␊ |
693 | ␉return true;␊ |
694 | }␊ |
695 | ␊ |
696 | void free_val(value_t *val)␊ |
697 | {␊ |
698 | ␉if (val->type == kPtr)␊ |
699 | ␉␉free(val->data);␊ |
700 | ␉bzero(val, sizeof(value_t));␊ |
701 | }␊ |
702 | ␊ |
703 | void devprop_add_list(dev_prop_t devprop_list[])␊ |
704 | {␊ |
705 | ␉value_t *val = malloc(sizeof(value_t));␊ |
706 | ␉int i, pnum;␊ |
707 | ␉for (i = 0; devprop_list[i].name != NULL; i++)␊ |
708 | ␉␉if ((devprop_list[i].flags == FLAGTRUE) || (devprop_list[i].flags | card->flags))␊ |
709 | ␉␉␉if (devprop_list[i].get_value && devprop_list[i].get_value(val))␊ |
710 | ␉␉␉{␊ |
711 | ␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);␊ |
712 | ␉␉␉␉free_val(val);␊ |
713 | ␉␉␉␉if (devprop_list[i].all_ports)␊ |
714 | ␉␉␉␉{␊ |
715 | ␉␉␉␉␉for (pnum = 1; pnum < card->ports; pnum++)␊ |
716 | ␉␉␉␉␉{␊ |
717 | ␉␉␉␉␉␉if (devprop_list[i].get_value(val))␊ |
718 | ␉␉␉␉␉␉{␊ |
719 | ␉␉␉␉␉␉␉devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii␊ |
720 | ␉␉␉␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);␊ |
721 | ␉␉␉␉␉␉␉free_val(val);␊ |
722 | ␉␉␉␉␉␉}␊ |
723 | ␉␉␉␉␉}␊ |
724 | ␉␉␉␉␉devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card␊ |
725 | ␉␉␉␉}␊ |
726 | ␉␉␉}␊ |
727 | ␉␉␉else␊ |
728 | ␉␉␉{␊ |
729 | ␉␉␉␉if (devprop_list[i].default_val.type != kNul)␊ |
730 | ␉␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, ␊ |
731 | ␉␉␉␉␉␉devprop_list[i].default_val.type == kCst ? ␊ |
732 | ␉␉␉␉␉␉(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data, ␊ |
733 | ␉␉␉␉␉␉devprop_list[i].default_val.size);␊ |
734 | ␊ |
735 | ␉␉␉␉if (devprop_list[i].all_ports)␊ |
736 | ␉␉␉␉{␊ |
737 | ␉␉␉␉␉for (pnum = 1; pnum < card->ports; pnum++)␊ |
738 | ␉␉␉␉␉{␊ |
739 | ␉␉␉␉␉␉if (devprop_list[i].default_val.type != kNul)␊ |
740 | ␉␉␉␉␉␉{␊ |
741 | ␉␉␉␉␉␉␉devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii␊ |
742 | ␉␉␉␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, ␊ |
743 | ␉␉␉␉␉␉␉␉devprop_list[i].default_val.type == kCst ? ␊ |
744 | ␉␉␉␉␉␉␉␉(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data, ␊ |
745 | ␉␉␉␉␉␉␉␉devprop_list[i].default_val.size);␊ |
746 | ␉␉␉␉␉␉}␊ |
747 | ␉␉␉␉␉}␊ |
748 | ␉␉␉␉␉devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card␊ |
749 | ␉␉␉␉}␊ |
750 | ␉␉␉}␊ |
751 | ␊ |
752 | ␉free(val);␊ |
753 | }␊ |
754 | ␊ |
755 | ␊ |
756 | bool validate_rom(option_rom_header_t *rom_header, pci_dt_t *pci_dev)␊ |
757 | {␊ |
758 | ␉option_rom_pci_header_t *rom_pci_header;␊ |
759 | ␉␊ |
760 | ␉if (rom_header->signature != 0xaa55)␊ |
761 | ␉␉return false;␊ |
762 | ␊ |
763 | ␉rom_pci_header = (option_rom_pci_header_t *)((uint8_t *)rom_header + rom_header->pci_header_offset);␊ |
764 | ␊ |
765 | ␉if (rom_pci_header->signature != 0x52494350)␊ |
766 | ␉␉return false;␊ |
767 | ␊ |
768 | ␉if (rom_pci_header->vendor_id != pci_dev->vendor_id || rom_pci_header->device_id != pci_dev->device_id)␊ |
769 | ␉␉return false;␊ |
770 | ␊ |
771 | ␉return true;␊ |
772 | }␊ |
773 | ␊ |
774 | bool load_vbios_file(const char *key, uint16_t vendor_id, uint16_t device_id, uint32_t subsys_id)␊ |
775 | {␊ |
776 | ␉int␉fd;␊ |
777 | ␉char file_name[24];␊ |
778 | ␉bool do_load = false;␊ |
779 | ␊ |
780 | ␉getBoolForKey(key, &do_load, &bootInfo->bootConfig);␊ |
781 | ␉if (!do_load)␊ |
782 | ␉␉return false;␊ |
783 | ␊ |
784 | ␉sprintf(file_name, "/Extra/%04x_%04x_%08x.rom", vendor_id, device_id, subsys_id);␊ |
785 | ␉if ((fd = open_bvdev("bt(0,0)", file_name, 0)) < 0)␊ |
786 | ␉␉return false;␊ |
787 | ␊ |
788 | ␉card->rom_size = file_size(fd);␊ |
789 | ␉card->rom = malloc(card->rom_size);␊ |
790 | ␉if (!card->rom)␊ |
791 | ␉␉return false;␊ |
792 | ␊ |
793 | ␉read(fd, (char *)card->rom, card->rom_size);␊ |
794 | ␉␊ |
795 | ␉if (!validate_rom((option_rom_header_t *)card->rom, card->pci_dev))␊ |
796 | ␉{␊ |
797 | ␉␉card->rom_size = 0;␊ |
798 | ␉␉card->rom = 0;␊ |
799 | ␉␉return false;␊ |
800 | ␉}␊ |
801 | ␊ |
802 | ␉card->rom_size = ((option_rom_header_t *)card->rom)->rom_size * 512;␊ |
803 | ␊ |
804 | ␉close(fd);␊ |
805 | ␊ |
806 | ␉return true;␊ |
807 | }␊ |
808 | ␊ |
809 | void get_vram_size(void)␊ |
810 | {␊ |
811 | ␉chip_family_t chip_family = card->info->chip_family;␊ |
812 | ␊ |
813 | ␉card->vram_size = 0;␊ |
814 | ␊ |
815 | ␉if (chip_family >= CHIP_FAMILY_CEDAR)␊ |
816 | ␉␉/* size in MB on evergreen */␊ |
817 | ␉␉/* XXX watch for overflow!!! */␊ |
818 | ␉␉card->vram_size = RegRead32(R600_CONFIG_MEMSIZE) * 1024 * 1024;␊ |
819 | ␉else␊ |
820 | ␉␉if (chip_family >= CHIP_FAMILY_R600)␊ |
821 | ␉␉␉card->vram_size = RegRead32(R600_CONFIG_MEMSIZE);␊ |
822 | }␊ |
823 | ␊ |
824 | bool read_vbios(bool from_pci)␊ |
825 | {␊ |
826 | ␉option_rom_header_t *rom_addr;␊ |
827 | ␊ |
828 | ␉if (from_pci)␊ |
829 | ␉{␊ |
830 | ␉␉rom_addr = (option_rom_header_t *)(pci_config_read32(card->pci_dev->dev.addr, PCI_ROM_ADDRESS) & ~0x7ff);␊ |
831 | ␉␉verbose(" @0x%x", rom_addr);␊ |
832 | ␉}␊ |
833 | ␉else␊ |
834 | ␉␉rom_addr = (option_rom_header_t *)0xc0000;␊ |
835 | ␊ |
836 | ␉if (!validate_rom(rom_addr, card->pci_dev))␊ |
837 | ␉␉return false;␊ |
838 | ␊ |
839 | ␉card->rom_size = rom_addr->rom_size * 512;␊ |
840 | ␉if (!card->rom_size)␊ |
841 | ␉␉return false;␊ |
842 | ␊ |
843 | ␉card->rom = malloc(card->rom_size);␊ |
844 | ␉if (!card->rom)␊ |
845 | ␉␉return false;␊ |
846 | ␊ |
847 | ␉memcpy(card->rom, (void *)rom_addr, card->rom_size);␊ |
848 | ␊ |
849 | ␉return true;␊ |
850 | }␊ |
851 | ␊ |
852 | bool read_disabled_vbios(void)␊ |
853 | {␊ |
854 | ␉bool ret = false;␊ |
855 | ␉chip_family_t chip_family = card->info->chip_family;␊ |
856 | ␊ |
857 | ␉if (chip_family >= CHIP_FAMILY_RV770)␊ |
858 | ␉{␊ |
859 | ␉␉uint32_t viph_control␉␉= RegRead32(RADEON_VIPH_CONTROL);␊ |
860 | ␉␉uint32_t bus_cntl␉␉␉= RegRead32(RADEON_BUS_CNTL);␊ |
861 | ␉␉uint32_t d1vga_control␉␉= RegRead32(AVIVO_D1VGA_CONTROL);␊ |
862 | ␉␉uint32_t d2vga_control␉␉= RegRead32(AVIVO_D2VGA_CONTROL);␊ |
863 | ␉␉uint32_t vga_render_control␉= RegRead32(AVIVO_VGA_RENDER_CONTROL);␊ |
864 | ␉␉uint32_t rom_cntl␉␉␉= RegRead32(R600_ROM_CNTL);␊ |
865 | ␉␉uint32_t cg_spll_func_cntl␉= 0;␊ |
866 | ␉␉uint32_t cg_spll_status;␊ |
867 | ␊ |
868 | ␉␉/* disable VIP */␊ |
869 | ␉␉RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));␊ |
870 | ␊ |
871 | ␉␉/* enable the rom */␊ |
872 | ␉␉RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));␊ |
873 | ␊ |
874 | ␉␉/* Disable VGA mode */␊ |
875 | ␉␉RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
876 | ␉␉RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
877 | ␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));␊ |
878 | ␊ |
879 | ␉␉if (chip_family == CHIP_FAMILY_RV730)␊ |
880 | ␉␉{␊ |
881 | ␉␉␉cg_spll_func_cntl = RegRead32(R600_CG_SPLL_FUNC_CNTL);␊ |
882 | ␊ |
883 | ␉␉␉/* enable bypass mode */␊ |
884 | ␉␉␉RegWrite32(R600_CG_SPLL_FUNC_CNTL, (cg_spll_func_cntl | R600_SPLL_BYPASS_EN));␊ |
885 | ␊ |
886 | ␉␉␉/* wait for SPLL_CHG_STATUS to change to 1 */␊ |
887 | ␉␉␉cg_spll_status = 0;␊ |
888 | ␉␉␉while (!(cg_spll_status & R600_SPLL_CHG_STATUS))␊ |
889 | ␉␉␉␉cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);␊ |
890 | ␊ |
891 | ␉␉␉RegWrite32(R600_ROM_CNTL, (rom_cntl & ~R600_SCK_OVERWRITE));␊ |
892 | ␉␉}␊ |
893 | ␉␉else␊ |
894 | ␉␉␉RegWrite32(R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));␊ |
895 | ␊ |
896 | ␉␉ret = read_vbios(true);␊ |
897 | ␊ |
898 | ␉␉/* restore regs */␊ |
899 | ␉␉if (chip_family == CHIP_FAMILY_RV730)␊ |
900 | ␉␉{␊ |
901 | ␉␉␉RegWrite32(R600_CG_SPLL_FUNC_CNTL, cg_spll_func_cntl);␊ |
902 | ␊ |
903 | ␉␉␉/* wait for SPLL_CHG_STATUS to change to 1 */␊ |
904 | ␉␉␉cg_spll_status = 0;␊ |
905 | ␉␉␉while (!(cg_spll_status & R600_SPLL_CHG_STATUS))␊ |
906 | ␉␉␉cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);␊ |
907 | ␉␉}␊ |
908 | ␉␉RegWrite32(RADEON_VIPH_CONTROL, viph_control);␊ |
909 | ␉␉RegWrite32(RADEON_BUS_CNTL, bus_cntl);␊ |
910 | ␉␉RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);␊ |
911 | ␉␉RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);␊ |
912 | ␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);␊ |
913 | ␉␉RegWrite32(R600_ROM_CNTL, rom_cntl);␊ |
914 | ␉}␊ |
915 | ␉else␊ |
916 | ␉␉if (chip_family >= CHIP_FAMILY_R600)␊ |
917 | ␉␉{␊ |
918 | ␉␉␉uint32_t viph_control␉␉␉␉= RegRead32(RADEON_VIPH_CONTROL);␊ |
919 | ␉␉␉uint32_t bus_cntl␉␉␉␉␉= RegRead32(RADEON_BUS_CNTL);␊ |
920 | ␉␉␉uint32_t d1vga_control␉␉␉␉= RegRead32(AVIVO_D1VGA_CONTROL);␊ |
921 | ␉␉␉uint32_t d2vga_control ␉␉␉␉= RegRead32(AVIVO_D2VGA_CONTROL);␊ |
922 | ␉␉␉uint32_t vga_render_control␉␉␉= RegRead32(AVIVO_VGA_RENDER_CONTROL);␊ |
923 | ␉␉␉uint32_t rom_cntl␉␉␉␉␉= RegRead32(R600_ROM_CNTL);␊ |
924 | ␉␉␉uint32_t general_pwrmgt␉␉␉␉= RegRead32(R600_GENERAL_PWRMGT);␊ |
925 | ␉␉␉uint32_t low_vid_lower_gpio_cntl␉= RegRead32(R600_LOW_VID_LOWER_GPIO_CNTL);␊ |
926 | ␉␉␉uint32_t medium_vid_lower_gpio_cntl␉= RegRead32(R600_MEDIUM_VID_LOWER_GPIO_CNTL);␊ |
927 | ␉␉␉uint32_t high_vid_lower_gpio_cntl␉= RegRead32(R600_HIGH_VID_LOWER_GPIO_CNTL);␊ |
928 | ␉␉␉uint32_t ctxsw_vid_lower_gpio_cntl␉= RegRead32(R600_CTXSW_VID_LOWER_GPIO_CNTL);␊ |
929 | ␉␉␉uint32_t lower_gpio_enable␉␉␉= RegRead32(R600_LOWER_GPIO_ENABLE);␊ |
930 | ␊ |
931 | ␉␉␉/* disable VIP */␊ |
932 | ␉␉␉RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));␊ |
933 | ␊ |
934 | ␉␉␉/* enable the rom */␊ |
935 | ␉␉␉RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));␊ |
936 | ␊ |
937 | ␉␉␉/* Disable VGA mode */␊ |
938 | ␉␉␉RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
939 | ␉␉␉RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
940 | ␉␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));␊ |
941 | ␉␉␉RegWrite32(R600_ROM_CNTL, ((rom_cntl & ~R600_SCK_PRESCALE_CRYSTAL_CLK_MASK) | (1 << R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT) | R600_SCK_OVERWRITE));␊ |
942 | ␉␉␉RegWrite32(R600_GENERAL_PWRMGT, (general_pwrmgt & ~R600_OPEN_DRAIN_PADS));␊ |
943 | ␉␉␉RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, (low_vid_lower_gpio_cntl & ~0x400));␊ |
944 | ␉␉␉RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, (medium_vid_lower_gpio_cntl & ~0x400));␊ |
945 | ␉␉␉RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, (high_vid_lower_gpio_cntl & ~0x400));␊ |
946 | ␉␉␉RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, (ctxsw_vid_lower_gpio_cntl & ~0x400));␊ |
947 | ␉␉␉RegWrite32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400));␊ |
948 | ␊ |
949 | ␉␉␉ret = read_vbios(true);␊ |
950 | ␊ |
951 | ␉␉␉/* restore regs */␊ |
952 | ␉␉␉RegWrite32(RADEON_VIPH_CONTROL, viph_control);␊ |
953 | ␉␉␉RegWrite32(RADEON_BUS_CNTL, bus_cntl);␊ |
954 | ␉␉␉RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);␊ |
955 | ␉␉␉RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);␊ |
956 | ␉␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);␊ |
957 | ␉␉␉RegWrite32(R600_ROM_CNTL, rom_cntl);␊ |
958 | ␉␉␉RegWrite32(R600_GENERAL_PWRMGT, general_pwrmgt);␊ |
959 | ␉␉␉RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, low_vid_lower_gpio_cntl);␊ |
960 | ␉␉␉RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, medium_vid_lower_gpio_cntl);␊ |
961 | ␉␉␉RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl);␊ |
962 | ␉␉␉RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl);␊ |
963 | ␉␉␉RegWrite32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable);␊ |
964 | ␊ |
965 | ␉␉}␊ |
966 | ␊ |
967 | ␉return ret;␊ |
968 | }␊ |
969 | ␊ |
970 | bool radeon_card_posted(void)␊ |
971 | {␊ |
972 | ␉uint32_t reg;␊ |
973 | ␊ |
974 | ␉/* first check CRTCs */␊ |
975 | ␉reg = RegRead32(RADEON_CRTC_GEN_CNTL) | RegRead32(RADEON_CRTC2_GEN_CNTL);␊ |
976 | ␉if (reg & RADEON_CRTC_EN)␊ |
977 | ␉␉return true;␊ |
978 | ␊ |
979 | ␉/* then check MEM_SIZE, in case something turned the crtcs off */␊ |
980 | ␉reg = RegRead32(R600_CONFIG_MEMSIZE);␊ |
981 | ␉if (reg)␊ |
982 | ␉␉return true;␊ |
983 | ␊ |
984 | ␉return false;␊ |
985 | }␊ |
986 | #if 0␊ |
987 | bool devprop_add_pci_config_space(void)␊ |
988 | {␊ |
989 | ␉int offset;␊ |
990 | ␊ |
991 | ␉uint8_t *config_space = malloc(0x100);␊ |
992 | ␉if (!config_space)␊ |
993 | ␉␉return false;␊ |
994 | ␊ |
995 | ␉for (offset = 0; offset < 0x100; offset += 4)␊ |
996 | ␉␉config_space[offset / 4] = pci_config_read32(card->pci_dev->dev.addr, offset);␊ |
997 | ␊ |
998 | ␉devprop_add_value(card->device, "ATY,PCIConfigSpace", config_space, 0x100);␊ |
999 | ␉free(config_space);␊ |
1000 | ␉return true;␊ |
1001 | }␊ |
1002 | #endif␊ |
1003 | ␊ |
1004 | static bool init_card(pci_dt_t *pci_dev)␊ |
1005 | {␊ |
1006 | ␉const char *fb_name;␊ |
1007 | ␉char name[24];␊ |
1008 | ␉char name_parent[24];␊ |
1009 | ␉int i;␊ |
1010 | ␉bool add_vbios = true;␊ |
1011 | ␊ |
1012 | ␉card = malloc(sizeof(card_t));␊ |
1013 | ␉if (!card)␊ |
1014 | ␉␉return false;␊ |
1015 | ␉bzero(card, sizeof(card_t));␊ |
1016 | ␊ |
1017 | ␉card->pci_dev = pci_dev;␊ |
1018 | ␊ |
1019 | ␉for (i = 0; radeon_cards[i].device_id ; i++)␊ |
1020 | ␉␉if (radeon_cards[i].device_id == pci_dev->device_id)␊ |
1021 | ␉␉{␊ |
1022 | ␉␉␉card->info = &radeon_cards[i];␊ |
1023 | ␉␉␉if ((radeon_cards[i].subsys_id == 0x00000000) || ␊ |
1024 | ␉␉␉␉(radeon_cards[i].subsys_id == pci_dev->subsys_id.subsys_id))␊ |
1025 | ␉␉␉␉break;␊ |
1026 | ␉␉}␊ |
1027 | ␊ |
1028 | ␉if (!card->info->device_id || !card->info->cfg_name)␊ |
1029 | ␉{␊ |
1030 | ␉␉printf("Unsupported card!\n");␊ |
1031 | ␉␉return false;␊ |
1032 | ␉}␊ |
1033 | ␊ |
1034 | ␊ |
1035 | ␉card->fb␉␉= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_0) & ~0x0f);␊ |
1036 | ␉card->mmio␉␉= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_2) & ~0x0f);␊ |
1037 | ␉card->io␉␉= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_4) & ~0x03);␊ |
1038 | ␊ |
1039 | ␉card->posted␉= radeon_card_posted();␊ |
1040 | ␉verbose("ATI card %s, ", card->posted ? "POSTed" : "non-POSTed");␊ |
1041 | ␉␊ |
1042 | ␉get_vram_size();␊ |
1043 | ␊ |
1044 | ␉getBoolForKey(kVBIOS, &add_vbios, &bootInfo->bootConfig);␊ |
1045 | ␊ |
1046 | ␉if (add_vbios)␊ |
1047 | ␉␉if (!load_vbios_file(kUseAtiROM, pci_dev->vendor_id, pci_dev->device_id, pci_dev->subsys_id.subsys_id))␊ |
1048 | ␉␉{␊ |
1049 | ␉␉␉verbose("reading VBIOS from %s", card->posted ? "legacy space" : "PCI ROM");␊ |
1050 | ␉␉␉if (card->posted)␊ |
1051 | ␉␉␉␉read_vbios(false);␊ |
1052 | ␉␉␉else␊ |
1053 | ␉␉␉␉read_disabled_vbios();␊ |
1054 | ␉␉␉verbose("\n");␊ |
1055 | ␉␉}␊ |
1056 | ␊ |
1057 | ␉card->ports = 2; // default␊ |
1058 | ␊ |
1059 | ␉if (card->info->chip_family >= CHIP_FAMILY_CEDAR)␊ |
1060 | ␉{␊ |
1061 | ␉␉card->flags |= EVERGREEN;␊ |
1062 | ␉␉card->ports = 3;␊ |
1063 | ␉}␊ |
1064 | ␊ |
1065 | ␉atN = 0;␊ |
1066 | ␊ |
1067 | ␉fb_name = getStringForKey(kAtiConfig, &bootInfo->bootConfig);␊ |
1068 | ␉if (!fb_name)␊ |
1069 | ␉{␊ |
1070 | ␉␉fb_name = card_configs[card->info->cfg_name].name;␊ |
1071 | ␉␉card->ports = card_configs[card->info->cfg_name].ports;␊ |
1072 | ␉}␊ |
1073 | ␉else␊ |
1074 | ␉{␊ |
1075 | ␉␉for (i = 0; i < kCfgEnd; i++)␊ |
1076 | ␉␉␉if (strcmp(fb_name, card_configs[card->info->cfg_name].name) == 0)␊ |
1077 | ␉␉␉␉card->ports = card_configs[card->info->cfg_name].ports;␊ |
1078 | ␉}␊ |
1079 | ␊ |
1080 | ␉sprintf(name, "ATY,%s", fb_name);␊ |
1081 | ␉aty_name.type = kStr;␊ |
1082 | ␉aty_name.size = strlen(name) + 1;␊ |
1083 | ␉aty_name.data = (uint8_t *)name;␊ |
1084 | ␊ |
1085 | ␉sprintf(name_parent, "ATY,%sParent", fb_name);␊ |
1086 | ␉aty_nameparent.type = kStr;␊ |
1087 | ␉aty_nameparent.size = strlen(name_parent) + 1;␊ |
1088 | ␉aty_nameparent.data = (uint8_t *)name_parent;␊ |
1089 | ␊ |
1090 | ␉return true;␊ |
1091 | }␊ |
1092 | ␊ |
1093 | bool setup_ati_devprop(pci_dt_t *ati_dev)␊ |
1094 | {␊ |
1095 | ␉char *devicepath;␊ |
1096 | ␊ |
1097 | ␉if (!init_card(ati_dev))␊ |
1098 | ␉␉return false;␊ |
1099 | ␊ |
1100 | ␉/* ------------------------------------------------- */␊ |
1101 | ␉/* Find a better way to do this (in device_inject.c) */␊ |
1102 | ␉if (!string)␊ |
1103 | ␉␉string = devprop_create_string();␊ |
1104 | ␊ |
1105 | ␉devicepath = get_pci_dev_path(ati_dev);␊ |
1106 | ␉card->device = devprop_add_device(string, devicepath);␊ |
1107 | ␉if (!card->device)␊ |
1108 | ␉␉return false;␊ |
1109 | ␉/* ------------------------------------------------- */␊ |
1110 | ␊ |
1111 | #if 0␊ |
1112 | ␉uint64_t fb␉␉= (uint32_t)card->fb;␊ |
1113 | ␉uint64_t mmio␉= (uint32_t)card->mmio;␊ |
1114 | ␉uint64_t io␉␉= (uint32_t)card->io;␊ |
1115 | ␉devprop_add_value(card->device, "ATY,FrameBufferOffset", &fb, 8);␊ |
1116 | ␉devprop_add_value(card->device, "ATY,RegisterSpaceOffset", &mmio, 8);␊ |
1117 | ␉devprop_add_value(card->device, "ATY,IOSpaceOffset", &io, 8);␊ |
1118 | #endif␊ |
1119 | ␊ |
1120 | ␉devprop_add_list(ati_devprop_list);␊ |
1121 | ␊ |
1122 | ␉/* ------------------------------------------------- */␊ |
1123 | ␉/* Find a better way to do this (in device_inject.c) */␊ |
1124 | ␉stringdata = malloc(string->length);␊ |
1125 | ␉memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);␊ |
1126 | ␉stringlength = string->length;␊ |
1127 | ␉/* ------------------------------------------------- */␊ |
1128 | ␊ |
1129 | ␉verbose("ATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x]):: %s\n", ␊ |
1130 | ␉␉␉chip_family_name[card->info->chip_family], card->info->model_name, ␊ |
1131 | ␉␉␉(uint32_t)(card->vram_size / (1024 * 1024)), card_configs[card->info->cfg_name].name, ␊ |
1132 | ␉␉␉ati_dev->vendor_id, ati_dev->device_id,␊ |
1133 | ␉␉␉ati_dev->subsys_id.subsys.vendor_id, ati_dev->subsys_id.subsys.device_id, ␊ |
1134 | ␉␉␉devicepath);␊ |
1135 | ␊ |
1136 | ␉free(card);␊ |
1137 | ␊ |
1138 | ␉return true;␊ |
1139 | }␊ |
1140 | ␊ |
1141 | |