Chameleon

Chameleon Svn Source Tree

Root/trunk/i386/libsaio/spd.c

1/*␊
2 * spd.c - serial presence detect memory information␊
3 * (restored from pcefi10.5)␊
4 */␊
5␊
6#include "libsaio.h"␊
7#include "pci.h"␊
8#include "platform.h"␊
9#include "spd.h"␊
10#include "saio_internal.h"␊
11#include "bootstruct.h"␊
12#include "memvendors.h"␊
13␊
14#ifndef DEBUG_SPD␊
15#define DEBUG_SPD 0␊
16#endif␊
17␊
18#if DEBUG_SPD␊
19#define DBG(x...)␉printf(x)␊
20#else␊
21#define DBG(x...)␊
22#endif␊
23␊
24static const char *spd_memory_types[] =␊
25{␊
26␉"RAM", /* 00h Undefined */␊
27␉"FPM", /* 01h FPM */␊
28␉"EDO", /* 02h EDO */␊
29␉"",␉␉␉␉/* 03h PIPELINE NIBBLE */␊
30␉"SDRAM", /* 04h SDRAM */␊
31␉"",␉␉␉␉/* 05h MULTIPLEXED ROM */␊
32␉"DDR SGRAM",␉/* 06h SGRAM DDR */␊
33␉"DDR SDRAM",␉/* 07h SDRAM DDR */␊
34␉"DDR2 SDRAM", /* 08h SDRAM DDR 2 */␊
35␉"",␉␉␉␉/* 09h Undefined */␊
36␉"",␉␉␉␉/* 0Ah Undefined */␊
37␉"DDR3 SDRAM" /* 0Bh SDRAM DDR 3 */␊
38};␊
39␊
40#define UNKNOWN_MEM_TYPE 2␊
41static uint8_t spd_mem_to_smbios[] =␊
42{␊
43␉UNKNOWN_MEM_TYPE, /* 00h Undefined */␊
44␉UNKNOWN_MEM_TYPE, /* 01h FPM */␊
45␉UNKNOWN_MEM_TYPE, /* 02h EDO */␊
46␉UNKNOWN_MEM_TYPE,␉ /* 03h PIPELINE NIBBLE */␊
47␉SMB_MEM_TYPE_SDRAM, /* 04h SDRAM */␊
48␉SMB_MEM_TYPE_ROM,␉ /* 05h MULTIPLEXED ROM */␊
49␉SMB_MEM_TYPE_SGRAM, /* 06h SGRAM DDR */␊
50␉SMB_MEM_TYPE_DDR, /* 07h SDRAM DDR */␊
51␉SMB_MEM_TYPE_DDR2, /* 08h SDRAM DDR 2 */␊
52␉UNKNOWN_MEM_TYPE, ␉ /* 09h Undefined */␊
53␉UNKNOWN_MEM_TYPE,␉ /* 0Ah Undefined */␊
54␉SMB_MEM_TYPE_DDR3 /* 0Bh SDRAM DDR 3 */␊
55};␊
56#define SPD_TO_SMBIOS_SIZE (sizeof(spd_mem_to_smbios)/sizeof(uint8_t))␊
57␊
58#define rdtsc(low,high) \␊
59__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))␊
60␊
61#define SMBHSTSTS 0␊
62#define SMBHSTCNT 2␊
63#define SMBHSTCMD 3␊
64#define SMBHSTADD 4␊
65#define SMBHSTDAT 5␊
66␊
67/** Get Vendor Name from spd, 2 cases handled DDR3 and DDR2, have different formats.*/␊
68const char * getVendorName(RamSlotInfo_t* slot)␊
69{␊
70 uint8_t bank = 0;␊
71 uint8_t code = 0;␊
72 int i = 0;␊
73 const char * spd = slot->spd;␊
74␊
75 if (spd[2]==0x0b) { // DDR3␊
76 bank = spd[0x75];␊
77 code = spd[0x76];␊
78 for (i=0; i < VEN_MAP_SIZE; i++)␊
79 if (bank==vendorMap[i].bank && code==vendorMap[i].code)␊
80 return vendorMap[i].name;␊
81 }␊
82 else if (spd[2]==0x08 || spd[2]==0x07) { // DDR2 or DDR␊
83 if(spd[0x40]==0x7f) {␊
84 for (i=0x40; i<0x48 && spd[i]==0x7f;i++) bank++;␊
85 code = spd[i];␊
86 } else {␊
87 code = spd[0x40]; ␊
88 bank = 0;␊
89 }␊
90 for (i=0; i < VEN_MAP_SIZE; i++)␊
91 if (bank==vendorMap[i].bank && code==vendorMap[i].code)␊
92 return vendorMap[i].name;␊
93 }␊
94 /* OK there is no vendor id here lets try to match the partnum if it exists */␊
95 if (strstr(slot->Vendor,"GU332") == slot->Vendor) // Unifosa fingerprint␊
96 return "Unifosa";␊
97 return "NoName";␊
98}␊
99␊
100/** Get Default Memory Module Speed (no overclocking handled) */␊
101int getDDRspeedMhz(const char * spd)␊
102{␊
103 if (spd[2]==0x0b) { // DDR3␊
104 switch(spd[12]) {␊
105 case 0x0f:␊
106 return 1066;␊
107 case 0x0c:␊
108 return 1333;␊
109 case 0x0a:␊
110 return 1600;␊
111 case 0x14:␊
112 default:␊
113 return 800;␊
114 }␊
115 } ␊
116 else if (spd[2]==0x08) { // DDR2␊
117 switch(spd[9]) {␊
118 case 0x50:␊
119 return 400;␊
120 case 0x3d:␊
121 return 533;␊
122 case 0x30:␊
123 return 667;␊
124 case 0x25:␊
125 default:␊
126 return 800;␊
127 }␊
128 }␊
129 return 800; // default freq for unknown types␊
130}␊
131␊
132#define UIS(a) ((uint32_t)spd[a])␊
133␊
134/** Get DDR3 or DDR2 serial number, 0 most of the times */␊
135uint32_t getDDRSerial(const char* spd)␊
136{␊
137 uint32_t ret=0;␊
138␊
139 if (spd[2]==0x0b) // DDR3␊
140 // assume it is lsb to msb␊
141 ret = UIS(122) | (UIS(123)<<8) | (UIS(124)<<16) | (UIS(125)<<24);␊
142 else if (spd[2]==0x08 || spd[2]==0x07) // DDR2 or DDR␊
143 ret = UIS(95) | (UIS(96)<<8) | (UIS(97)<<16) | (UIS(98)<<24);␊
144 return ret;␊
145}␊
146␊
147/** Get DDR3 or DDR2 Part Number */␊
148const char * getDDRPartNum(const char* spd)␊
149{␊
150 if (spd[2]==0x0b) // DDR3␊
151 return &spd[128];␊
152 else if (spd[2]==0x08 || spd[2]==0x07) // DDR2 or DDR␊
153 return &spd[73];␊
154 return "N/A";␊
155}␊
156␊
157/** Read one byte from the intel i2c, used for reading SPD on intel chipsets only. */␊
158unsigned char smb_read_byte_intel(uint32_t base, uint8_t adr, uint8_t cmd)␊
159{␊
160␉int l1, h1, l2, h2;␊
161 unsigned long long t;␊
162␉␊
163 outb(base + SMBHSTSTS, 0x1f);␉␉␉␉␉// reset SMBus Controller␊
164 outb(base + SMBHSTDAT, 0xff);␊
165␉␊
166 while( inb(base + SMBHSTSTS) & 0x01);␉␉␉// wait until ready␊
167␉␊
168 outb(base + SMBHSTCMD, cmd);␊
169 outb(base + SMBHSTADD, (adr << 1) | 0x01 );␊
170 outb(base + SMBHSTCNT, 0x48 );␊
171␉␊
172 rdtsc(l1, h1);␊
173␉␊
174 ␉while (!( inb(base + SMBHSTSTS) & 0x02))␉␉// wait til command finished␊
175␉{␉␊
176␉␉rdtsc(l2, h2);␊
177␉␉t = ((h2 - h1) * 0xffffffff + (l2 - l1)) / (Platform.CPU.TSCFrequency / 40);␊
178␉␉if (t > 10)␊
179␉␉␉break;␉␉␉␉␉␉␉␉␉// break after 10ms␊
180 }␊
181 return inb(base + SMBHSTDAT);␊
182}␊
183␊
184int mapping []= {0,2,1,3,4,6,5,7,8,10,9,11};␊
185␊
186/** Read from smbus the SPD content and interpret it for detecting memory attributes */␊
187static void read_smb_intel(pci_dt_t *smbus_dev)␊
188{ ␊
189 static int serialnum=0;␊
190 int i, x, ser, speed;␊
191 uint8_t spd_size, spd_type;␊
192 uint32_t base;␊
193 bool dump = false;␊
194 RamSlotInfo_t* slot;␊
195␊
196 base = pci_config_read16(smbus_dev->dev.addr, 0x20) & 0xFFFE;␊
197 DBG("Scanning smbus_dev <%04x, %04x> ...\n",smbus_dev->vendor_id, smbus_dev->device_id);␊
198␊
199 getBoolForKey("DumpSPD", &dump, &bootInfo->bootConfig);␊
200 bool fullBanks = // needed at least for laptops␊
201 Platform.DMI.MemoryModules == Platform.DMI.MaxMemorySlots;␊
202 // Search MAX_RAM_SLOTS slots␊
203 for (i = 0; i < MAX_RAM_SLOTS; i++){␊
204 slot = &Platform.RAM.DIMM[i];␊
205 spd_size = smb_read_byte_intel(base, 0x50 + i, 0);␊
206 ␊
207 // Check spd is present␊
208 if (spd_size && spd_size != 0xff) {␊
209 slot->InUse = true;␊
210 ␊
211 slot->spd = malloc(spd_size);␊
212 if (slot->spd) {␊
213 bzero(slot->spd, spd_size);␊
214 ␊
215 // Copy spd data into buffer␊
216 for (x = 0; x < spd_size; x++)␊
217 slot->spd[x] = smb_read_byte_intel(base, 0x50 + i, x);␊
218 ␊
219 switch (slot->spd[SPD_MEMORY_TYPE]) {␊
220 case SPD_MEMORY_TYPE_SDRAM_DDR2:␊
221 ␊
222 slot->ModuleSize = ((1 << (slot->spd[SPD_NUM_ROWS] & 0x0f) + (slot->spd[SPD_NUM_COLUMNS] & 0x0f) - 17) * ␊
223 ((slot->spd[SPD_NUM_DIMM_BANKS] & 0x7) + 1) * slot->spd[SPD_NUM_BANKS_PER_SDRAM]);␊
224 break;␊
225 ␊
226 case SPD_MEMORY_TYPE_SDRAM_DDR3:␊
227 ␊
228 slot->ModuleSize = ((slot->spd[4] & 0x0f) + 28 ) + ((slot->spd[8] & 0x7) + 3 );␊
229 slot->ModuleSize -= (slot->spd[7] & 0x7) + 25;␊
230 slot->ModuleSize = ((1 << slot->ModuleSize) * (((slot->spd[7] >> 3) & 0x1f) + 1));␊
231 ␊
232 break;␊
233 }␊
234 }␊
235 ␊
236 spd_type = (slot->spd[SPD_MEMORY_TYPE] < ((char) 12) ? slot->spd[SPD_MEMORY_TYPE] : 0);␊
237 slot->Type = spd_mem_to_smbios[spd_type];␊
238 strncpy(slot->PartNo, getDDRPartNum(slot->spd), 64);␊
239 strncpy(slot->Vendor, getVendorName(slot), 64);␊
240 ␊
241 ser = getDDRSerial(slot->spd);␊
242 if (ser==0) {␊
243 sprintf(slot->SerialNo, "10000000%d", serialnum);␊
244 serialnum++;␊
245 }␊
246 else␊
247 sprintf(slot->SerialNo, "%d", ser);␊
248 // determine spd speed␊
249 speed = getDDRspeedMhz(slot->spd);␊
250 if (speed > slot->Frequency) slot->Frequency = speed; // just in case dmi wins on spd␊
251 if(dump) {␊
252 printf("Slot %d Type %d %dMB (%s) %dMHz Vendor=%s, PartNo=%s SerialNo=%s\n", ␊
253 i, ␊
254 (int)slot->Type,␊
255 slot->ModuleSize, ␊
256 spd_memory_types[spd_type],␊
257 slot->Frequency,␊
258 slot->Vendor,␊
259 slot->PartNo,␊
260 slot->SerialNo); ␊
261 dumpPhysAddr("spd content: ",slot->spd, spd_size);␊
262 getc();␊
263 }␊
264 }␊
265 // laptops sometimes show slot 0 and 2 with slot 1 empty when only 2 slots are presents so:␊
266 Platform.DMI.DIMM[i]= ␊
267 i>0 && Platform.RAM.DIMM[1].InUse==false && fullBanks && Platform.DMI.MaxMemorySlots==2 ? ␊
268 mapping[i] : i; // for laptops case, mapping setup would need to be more generic than this␊
269 }␊
270}␊
271␊
272static struct smbus_controllers_t smbus_controllers[] = {␊
273␊
274␉{0x8086, 0x269B, "ESB2", read_smb_intel },␊
275␉{0x8086, 0x25A4, "6300ESB", read_smb_intel },␊
276␉{0x8086, 0x24C3, "ICH4", read_smb_intel },␊
277␉{0x8086, 0x24D3, "ICH5", read_smb_intel },␊
278␉{0x8086, 0x266A, "ICH6", read_smb_intel },␊
279␉{0x8086, 0x27DA, "ICH7", read_smb_intel },␊
280␉{0x8086, 0x283E, "ICH8", read_smb_intel },␊
281␉{0x8086, 0x2930, "ICH9", read_smb_intel },␉␊
282␉{0x8086, 0x3A30, "ICH10R", read_smb_intel },␊
283␉{0x8086, 0x3A60, "ICH10B", read_smb_intel },␊
284␉{0x8086, 0x3B30, "P55", read_smb_intel },␊
285␉{0x8086, 0x5032, "EP80579", read_smb_intel }␊
286␊
287};␊
288␊
289void scan_smbus_controller(pci_dt_t *smbus_dev)␊
290{␊
291␉int␉i;␊
292␊
293␉for( i = 1; i < sizeof(smbus_controllers) / sizeof(smbus_controllers[0]); i++ )␊
294␉␉if (( smbus_controllers[i].vendor == smbus_dev->vendor_id) ␊
295␉␉␉&& ( smbus_controllers[i].device == smbus_dev->device_id))␊
296␉␉{␊
297␉␉␉verbose("%s%s SMBus Controller [%4x:%4x] at %02x:%02x.%x\n", ␊
298␉␉␉␉ (smbus_dev->vendor_id == 0x8086) ? "Intel(R) " : "",␊
299␉␉␉␉ smbus_controllers[i].name,␊
300␉␉␉␉ smbus_dev->vendor_id, smbus_dev->device_id,␊
301␉␉␉␉ smbus_dev->dev.bits.bus, smbus_dev->dev.bits.dev, smbus_dev->dev.bits.func);␊
302␉␉␉␊
303␉␉␉smbus_controllers[i].read_smb(smbus_dev);␊
304␉␉␉␊
305␉␉}␊
306␉␊
307}␊
308␊
309// initial call : pci_dt = root_pci_dev;␊
310// find_and_read_smbus_controller(root_pci_dev);␊
311bool find_and_read_smbus_controller(pci_dt_t* pci_dt)␊
312{␊
313 pci_dt_t␉*current = pci_dt;␊
314 int i;␊
315␊
316 while (current) {␊
317#if DEBUG_SPD␊
318 printf("%02x:%02x.%x [%04x] [%04x:%04x] :: %s\n", ␊
319 current->dev.bits.bus, current->dev.bits.dev, current->dev.bits.func, ␊
320 current->class_id, current->vendor_id, current->device_id, ␊
321 get_pci_dev_path(current));␊
322#endif␊
323␉for ( i = 0; i < sizeof(smbus_controllers) / sizeof(smbus_controllers[0]); i++ )␊
324 {␊
325 if (current->vendor_id == smbus_controllers[i].vendor &&␊
326 current->device_id == smbus_controllers[i].device)␊
327 {␊
328 smbus_controllers[i].read_smb(current); // read smb␊
329 return true;␊
330 } ␊
331 }␊
332 find_and_read_smbus_controller(current->children);␊
333 current = current->next;␊
334 }␊
335 return false; // not found␊
336}␊
337␊
338void scan_spd(PlatformInfo_t *p)␊
339{␊
340 find_and_read_smbus_controller(root_pci_dev);␊
341}␊
342

Archive Download this file

Revision: 99