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1/*␊
2 *␊
3 * Copyright 2008 by Islam M. Ahmed Zaid. All rights reserved.␊
4 *␊
5 */␊
6␊
7#include "libsaio.h"␊
8#include "bootstruct.h"␊
9#include "pci.h"␊
10#include "pci_root.h"␊
11␊
12#ifndef DEBUG_PCI␊
13#define DEBUG_PCI 0␊
14#endif␊
15␊
16#if DEBUG_PCI␊
17#define DBG(x...)␉␉printf(x)␊
18#else␊
19#define DBG(x...)␊
20#endif␊
21␊
22pci_dt_t␉*root_pci_dev;␊
23␊
24␊
25uint8_t pci_config_read8(uint32_t pci_addr, uint8_t reg)␊
26{␊
27␉pci_addr |= reg & ~3;␊
28␉outl(PCI_ADDR_REG, pci_addr);␊
29␉return inb(PCI_DATA_REG + (reg & 3));␊
30}␊
31␊
32uint16_t pci_config_read16(uint32_t pci_addr, uint8_t reg)␊
33{␊
34␉pci_addr |= reg & ~3;␊
35␉outl(PCI_ADDR_REG, pci_addr);␊
36␉return inw(PCI_DATA_REG + (reg & 2));␊
37}␊
38␊
39uint32_t pci_config_read32(uint32_t pci_addr, uint8_t reg)␊
40{␊
41␉pci_addr |= reg & ~3;␊
42␉outl(PCI_ADDR_REG, pci_addr);␊
43␉return inl(PCI_DATA_REG);␊
44}␊
45␊
46void pci_config_write8(uint32_t pci_addr, uint8_t reg, uint8_t data)␊
47{␊
48␉pci_addr |= reg & ~3;␊
49␉outl(PCI_ADDR_REG, pci_addr);␊
50␉outb(PCI_DATA_REG + (reg & 3), data);␊
51}␊
52␊
53void pci_config_write16(uint32_t pci_addr, uint8_t reg, uint16_t data)␊
54{␊
55␉pci_addr |= reg & ~3;␊
56␉outl(PCI_ADDR_REG, pci_addr);␊
57␉outw(PCI_DATA_REG + (reg & 2), data);␊
58}␊
59␊
60void pci_config_write32(uint32_t pci_addr, uint8_t reg, uint32_t data)␊
61{␊
62␉pci_addr |= reg & ~3;␊
63␉outl(PCI_ADDR_REG, pci_addr);␊
64␉outl(PCI_DATA_REG, data);␊
65}␊
66␊
67void scan_pci_bus(pci_dt_t *start, uint8_t bus)␊
68{␊
69␉pci_dt_t␉*new;␊
70␉pci_dt_t␉**current = &start->children;␊
71␉uint32_t␉id;␊
72␉uint32_t␉pci_addr;␊
73␉uint8_t␉␉dev = 0;␊
74␉uint8_t␉␉func = 0;␊
75␉uint8_t␉␉secondary_bus;␊
76␉uint8_t␉␉header_type;␊
77␊
78␉for (dev = 0; dev < 32; dev++) {␊
79␉␉for (func = 0; func < 8; func++) {␊
80␉␉␉pci_addr = PCIADDR(bus, dev, func);␊
81␉␉␉id = pci_config_read32(pci_addr, PCI_VENDOR_ID);␊
82␉␉␉if (!id || id == 0xfffffffful) {␊
83␉␉␉␉continue;␊
84␉␉␉}␊
85␉␉␉new = (pci_dt_t*)malloc(sizeof(pci_dt_t));␊
86␉␉␉if (!new) {␊
87␉␉␉␉continue;␊
88␉␉␉}␊
89␉␉␉bzero(new, sizeof(pci_dt_t));␊
90␊
91␉␉␉new->dev.addr␉␉␉␉= pci_addr;␊
92␉␉␉new->vendor_id␉␉␉␉= id & 0xffff;␊
93␉␉␉new->device_id␉␉␉␉= (id >> 16) & 0xffff;␊
94␉␉␉new->progif␉␉␉␉= pci_config_read8(pci_addr, PCI_CLASS_PROG);␊
95␉␉␉new->revision_id␉␉␉= pci_config_read8(pci_addr, PCI_CLASS_REVISION);␊
96␉␉␉new->subsys_id.subsys_id␉␉= pci_config_read32(pci_addr, PCI_SUBSYSTEM_VENDOR_ID);␊
97␉␉␉new->class_id␉␉␉␉= pci_config_read16(pci_addr, PCI_CLASS_DEVICE);␊
98␉␉␉//new->subclass_id␉␉␉= pci_config_read16(pci_addr, PCI_SUBCLASS_DEVICE);␊
99␉␉␉new->parent␉= start;␊
100␊
101␉␉␉header_type = pci_config_read8(pci_addr, PCI_HEADER_TYPE);␊
102␉␉␉switch (header_type & 0x7f) {␊
103␉␉␉case PCI_HEADER_TYPE_BRIDGE:␊
104␉␉␉case PCI_HEADER_TYPE_CARDBUS:␊
105␉␉␉␉secondary_bus = pci_config_read8(pci_addr, PCI_SECONDARY_BUS);␊
106␉␉␉␉if (secondary_bus != 0) {␊
107␉␉␉␉␉scan_pci_bus(new, secondary_bus);␊
108␉␉␉␉}␊
109␉␉␉␉break;␊
110␉␉␉default:␊
111␉␉␉␉break;␊
112␉␉␉}␊
113␉␉␉*current = new;␊
114␉␉␉current = &new->next;␊
115␊
116␉␉␉if ((func == 0) && ((header_type & 0x80) == 0)) {␊
117␉␉␉␉break;␊
118␉␉␉}␊
119␉␉}␊
120␉}␊
121}␊
122␊
123void enable_pci_devs(void)␊
124{␊
125␉uint16_t id;␊
126␉uint32_t rcba, *fd;␊
127␊
128␉id = pci_config_read16(PCIADDR(0, 0x00, 0), 0x00);␊
129␉/* make sure we're on Intel chipset */␊
130␉if (id != 0x8086)␊
131␉{␊
132␉␉return;␊
133␉}␊
134␉rcba = pci_config_read32(PCIADDR(0, 0x1f, 0), 0xf0) & ~1; //this is LPC host␊
135␉fd = (uint32_t *)(rcba + 0x3418);␊
136␉/* set SMBus Disable (SD) to 0 */␊
137␉*fd &= ~0x8;␊
138␉/* and all devices? */␊
139␉//*fd = 0x1;␊
140}␊
141␊
142␊
143void build_pci_dt(void)␊
144{␊
145␉root_pci_dev = malloc(sizeof(pci_dt_t));␊
146␊
147␉if (!root_pci_dev) {␊
148␉␉return;␊
149␉}␊
150␊
151␉bzero(root_pci_dev, sizeof(pci_dt_t));␊
152␉enable_pci_devs();␊
153␉scan_pci_bus(root_pci_dev, 0);␊
154␊
155#if DEBUG_PCI␊
156␉dump_pci_dt(root_pci_dev->children);␊
157␉pause();␊
158#endif␊
159}␊
160␊
161static char dev_path[256];␊
162char *get_pci_dev_path(pci_dt_t *pci_dt)␊
163{␊
164␉pci_dt_t␉*current;␊
165␉pci_dt_t␉*end;␊
166␉int dev_path_len = 0;␊
167␊
168␉dev_path[0] = 0;␊
169␉end = root_pci_dev;␊
170␉␊
171␉int uid = getPciRootUID();␊
172␉while (end != pci_dt)␊
173␉{␊
174␉␉current = pci_dt;␊
175␉␉while (current->parent != end)␊
176␉␉␉current = current->parent;␉␉␉␊
177␉␉end = current;␊
178␉␉if (current->parent == root_pci_dev) {␊
179␉␉␉dev_path_len += ␊
180␉␉␉␉snprintf(dev_path + dev_path_len, sizeof(dev_path) - dev_path_len, "PciRoot(0x%x)/Pci(0x%x,0x%x)", uid, ␊
181␉␉␉␉current->dev.bits.dev, current->dev.bits.func);␊
182␉␉} else {␊
183␉␉␉dev_path_len +=␊
184␉␉␉␉snprintf(dev_path + dev_path_len, sizeof(dev_path) - dev_path_len, "/Pci(0x%x,0x%x)", ␊
185␉␉␉␉current->dev.bits.dev, current->dev.bits.func);␊
186␉␉}␊
187␊
188␉}␊
189␉return dev_path;␊
190}␊
191␊
192void dump_pci_dt(pci_dt_t *pci_dt)␊
193{␊
194␉pci_dt_t␉*current;␊
195␊
196␉current = pci_dt;␊
197␉while (current) {␊
198␉␉printf("%02x:%02x.%x [%04x%02x] [%04x:%04x] (subsys [%04x:%04x]):: %s\n", ␊
199␉␉␉current->dev.bits.bus, current->dev.bits.dev, current->dev.bits.func, ␊
200␉␉␉current->class_id, 0 /* FIXME: what should this be? */,␊
201␉␉␉current->vendor_id, current->device_id,␊
202␉␉␉current->subsys_id.subsys.vendor_id, current->subsys_id.subsys.device_id, ␊
203␉␉␉get_pci_dev_path(current));␊
204␉␉dump_pci_dt(current->children);␊
205␉␉current = current->next;␊
206␉}␊
207}␊
208

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