Chameleon Applications

Chameleon Applications Commit Details

Date:2011-05-28 02:53:49 (9 years 4 months ago)
Author:ErmaC
Commit:298
Parents: 297
Message:Latest trunk. Also add the Azi modules (Nvidia,AMD,ATI,Intel), added strings into localizable.strings. preparing the "make dmg".
Changes:
A/branches/iFabio/Chameleon/package/slimpkg
M/branches/iFabio/Chameleon/i386/libsaio/Makefile
M/branches/iFabio/Chameleon/i386/libsaio/saio_internal.h
M/branches/iFabio/Chameleon/i386/libsaio/smbios.c
M/branches/iFabio/Chameleon/i386/boot2/options.c
M/branches/iFabio/Chameleon/i386/modules/klibc/klibc.c
M/branches/iFabio/Chameleon/i386/libsaio/xml.c
M/branches/iFabio/Chameleon/i386/libsaio/console.c
M/branches/iFabio/Chameleon/i386/boot2/graphics.c
M/branches/iFabio/Chameleon/i386/libsa/Makefile
M/branches/iFabio/Chameleon/i386/modules/uClibc++/Makefile
M/branches/iFabio/Chameleon/Make.rules
M/branches/iFabio/Chameleon/CHANGES
M/branches/iFabio/Chameleon/i386/modules/Cconfig
M/branches/iFabio/Chameleon/i386/libsaio/ati.c
M/branches/iFabio/Chameleon/i386/libsaio/biosfn.c
M/branches/iFabio/Chameleon/Makefile
M/branches/iFabio/Chameleon/i386/modules/Makefile
M/branches/iFabio/Chameleon/i386/cdboot/Makefile
M/branches/iFabio/Chameleon/i386/modules/Resolution/Makefile
M/branches/iFabio/Chameleon/package/builddmg
M/branches/iFabio/Chameleon/i386/libsaio/cpu.c
M/branches/iFabio/Chameleon/i386/libsaio/fake_efi.c
M/branches/iFabio/Chameleon/i386/modules/HelloWorld/Makefile
M/branches/iFabio/Chameleon/i386/boot2/Makefile
M/branches/iFabio/Chameleon/i386/libsa/prf.c
M/branches/iFabio/Chameleon/package/Resources/English.lproj/Localizable.strings
M/branches/iFabio/Chameleon/i386/boot2/boot.c
M/branches/iFabio/Chameleon/i386/modules/klibc/Makefile
M/branches/iFabio/Chameleon/i386/libsa/libsa.h
M/branches/iFabio/Chameleon/i386/libsaio/bootstruct.c
M/branches/iFabio/Chameleon/TODO
M/branches/iFabio/Chameleon/i386/libsaio/nvidia.c
M/branches/iFabio/Chameleon/i386/libsa/printf.c
M/branches/iFabio/Chameleon/i386/Makefile
M/branches/iFabio/Chameleon/i386/boot2/boot.h
M/branches/iFabio/Chameleon/i386/boot2/modules.c
M/branches/iFabio/Chameleon/i386/libsa/string.c
M/branches/iFabio/Chameleon/i386/config/Makefile
M/branches/iFabio/Chameleon/i386/libsaio/pci.h
M/branches/iFabio/Chameleon/i386/boot2/modules.h
M/branches/iFabio/Chameleon/Chameleon.xcodeproj/project.pbxproj
M/branches/iFabio/Chameleon/i386/libsaio/msdos.c
M/branches/iFabio/Chameleon/i386/boot2/gui.c
M/branches/iFabio/Chameleon/i386/libsaio/platform.h
M/branches/iFabio/Chameleon/i386/libsaio/usb.c
M/branches/iFabio/Chameleon/i386/modules/MakeInc.dir

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branches/iFabio/Chameleon/Chameleon.xcodeproj/project.pbxproj
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038937A9137D4A75004AD9DC /* uClibc++.c */,
038937AA137D4A75004AD9DC /* utility.cpp */,
038937AB137D4A75004AD9DC /* valarray.cpp */,
038937AC137D4A75004AD9DC /* vector.cpp */,
);
path = "uClibc++";
sourceTree = "<group>";
};
0389374D137D4A75004AD9DC /* include */ = {
isa = PBXGroup;
children = (
0389374E137D4A75004AD9DC /* algorithm */,
0389374F137D4A75004AD9DC /* associative_base */,
03893750137D4A75004AD9DC /* basic_definitions */,
03893751137D4A75004AD9DC /* bitset */,
03893752137D4A75004AD9DC /* cassert */,
03893753137D4A75004AD9DC /* cctype */,
03893754137D4A75004AD9DC /* cerrno */,
03893755137D4A75004AD9DC /* cfloat */,
03893756137D4A75004AD9DC /* char_traits */,
03893757137D4A75004AD9DC /* climits */,
03893758137D4A75004AD9DC /* clocale */,
03893759137D4A75004AD9DC /* cmath */,
0389375A137D4A75004AD9DC /* complex */,
0389375B137D4A75004AD9DC /* csetjmp */,
0389375C137D4A75004AD9DC /* csignal */,
0389375D137D4A75004AD9DC /* cstdarg */,
0389375E137D4A75004AD9DC /* cstddef */,
0389375F137D4A75004AD9DC /* cstdio */,
03893760137D4A75004AD9DC /* cstdlib */,
03893761137D4A75004AD9DC /* cstring */,
03893762137D4A75004AD9DC /* ctime */,
03893763137D4A75004AD9DC /* cwchar */,
03893764137D4A75004AD9DC /* cwctype */,
03893765137D4A75004AD9DC /* deque */,
03893766137D4A75004AD9DC /* exception */,
03893767137D4A75004AD9DC /* fstream */,
03893768137D4A75004AD9DC /* func_exception */,
03893769137D4A75004AD9DC /* functional */,
0389376A137D4A75004AD9DC /* iomanip */,
0389376B137D4A75004AD9DC /* ios */,
0389376C137D4A75004AD9DC /* iosfwd */,
0389376D137D4A75004AD9DC /* iostream */,
0389376E137D4A75004AD9DC /* istream */,
0389376F137D4A75004AD9DC /* istream_helpers */,
03893770137D4A75004AD9DC /* iterator */,
03893771137D4A75004AD9DC /* iterator_base */,
03893772137D4A75004AD9DC /* limits */,
03893773137D4A75004AD9DC /* list */,
03893774137D4A75004AD9DC /* locale */,
03893775137D4A75004AD9DC /* Makefile */,
03893776137D4A75004AD9DC /* map */,
03893777137D4A75004AD9DC /* map.old */,
03893778137D4A75004AD9DC /* memory */,
03893779137D4A75004AD9DC /* new */,
0389377A137D4A75004AD9DC /* numeric */,
0389377B137D4A75004AD9DC /* ostream */,
0389377C137D4A75004AD9DC /* ostream_helpers */,
0389377D137D4A75004AD9DC /* queue */,
0389377E137D4A75004AD9DC /* set */,
0389377F137D4A75004AD9DC /* set.old */,
03893780137D4A75004AD9DC /* sstream */,
03893781137D4A75004AD9DC /* stack */,
03893782137D4A75004AD9DC /* stdexcept */,
03893783137D4A75004AD9DC /* streambuf */,
03893784137D4A75004AD9DC /* string */,
03893785137D4A75004AD9DC /* string_iostream */,
03893786137D4A75004AD9DC /* support */,
03893787137D4A75004AD9DC /* system_configuration.h */,
03893788137D4A75004AD9DC /* type_traits */,
03893789137D4A75004AD9DC /* typeinfo */,
0389378A137D4A75004AD9DC /* types */,
0389378B137D4A75004AD9DC /* unwind-cxx.h */,
0389378C137D4A75004AD9DC /* utility */,
0389378D137D4A75004AD9DC /* valarray */,
0389378E137D4A75004AD9DC /* vector */,
);
path = include;
sourceTree = "<group>";
};
03DA89341389338300B43B35 /* AMDGraphicsEnabler */ = {
isa = PBXGroup;
children = (
03DA89351389338300B43B35 /* AMDGraphicsEnabler.c */,
03DA89361389338300B43B35 /* ati.c */,
03DA89371389338300B43B35 /* ati_reg.h */,
03DA89381389338300B43B35 /* Makefile */,
03DA89391389338300B43B35 /* Readme.txt */,
);
path = AMDGraphicsEnabler;
sourceTree = "<group>";
};
03DA893A1389338300B43B35 /* ATiGraphicsEnabler */ = {
isa = PBXGroup;
children = (
03DA893B1389338300B43B35 /* ati.c */,
03DA893C1389338300B43B35 /* ati.h */,
03DA893D1389338300B43B35 /* ATiGraphicsEnabler.c */,
03DA893E1389338300B43B35 /* Makefile */,
03DA89401389338300B43B35 /* Readme.txt */,
);
path = ATiGraphicsEnabler;
sourceTree = "<group>";
};
03DA89411389338300B43B35 /* IntelGraphicsEnabler */ = {
isa = PBXGroup;
children = (
03DA89421389338300B43B35 /* gma.c */,
03DA89431389338300B43B35 /* gma.h */,
03DA89441389338300B43B35 /* IntelGraphicsEnabler.c */,
03DA89451389338300B43B35 /* Makefile */,
03DA89461389338300B43B35 /* Readme.txt */,
);
path = IntelGraphicsEnabler;
sourceTree = "<group>";
};
03DA89471389338300B43B35 /* NVIDIAGraphicsEnabler */ = {
isa = PBXGroup;
children = (
03DA89481389338300B43B35 /* Makefile */,
03DA89491389338300B43B35 /* nvidia.c */,
03DA894A1389338300B43B35 /* nvidia.h */,
03DA894B1389338300B43B35 /* NVIDIAGraphicsEnabler.c */,
03DA894C1389338300B43B35 /* Readme.txt */,
);
path = NVIDIAGraphicsEnabler;
sourceTree = "<group>";
};
08FB7794FE84155DC02AAC07 /* Chameleon */ = {
isa = PBXGroup;
children = (
B0056CE511F3868000754B65 /* i386 */ = {
isa = PBXGroup;
children = (
0389368B137D4A74004AD9DC /* modules */,
B0056CE611F3868000754B65 /* boot0 */,
B0056CEA11F3868000754B65 /* boot1 */,
B0056CF211F3868000754B65 /* boot2 */,
branches/iFabio/Chameleon/i386/libsaio/xml.c
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return "";
}
struct Module {
struct Module {
struct Module *nextModule;
long willLoad;
TagPtr dict;
return 0;
}
// XMLGetTag(int index)
// XMLTagCount( TagPtr dict )
{
long length, pos;
char * tagName;
length = GetNextTag(buffer, &tagName, 0);
if (length == -1) return -1;
length = GetNextTag(buffer, &tagName, 0);
if (length == -1) return -1;
pos = length;
if (!strncmp(tagName, kXMLTagPList, 6))
{
length = 0;
}
if (!strncmp(tagName, kXMLTagPList, 6))
{
length = 0;
}
/***** dict ****/
else if (!strcmp(tagName, kXMLTagDict))
{
length = ParseTagList(buffer + pos, tag, kTagTypeDict, 0);
}
else if (!strncmp(tagName, kXMLTagDict, strlen(kXMLTagDict)) && tagName[strlen(tagName)-1] == '/')
{
length = ParseTagList(buffer + pos, tag, kTagTypeDict, 1);
}
else if (!strncmp(tagName, kXMLTagDict " ", strlen(kXMLTagDict " ")))
{
length = ParseTagList(buffer + pos, tag, kTagTypeDict, 0);
}
else if (!strcmp(tagName, kXMLTagDict))
{
length = ParseTagList(buffer + pos, tag, kTagTypeDict, 0);
}
else if (!strncmp(tagName, kXMLTagDict, strlen(kXMLTagDict)) && tagName[strlen(tagName)-1] == '/')
{
length = ParseTagList(buffer + pos, tag, kTagTypeDict, 1);
}
else if (!strncmp(tagName, kXMLTagDict " ", strlen(kXMLTagDict " ")))
{
length = ParseTagList(buffer + pos, tag, kTagTypeDict, 0);
}
/***** key ****/
else if (!strcmp(tagName, kXMLTagKey))
{
length = ParseTagKey(buffer + pos, tag);
}
else if (!strcmp(tagName, kXMLTagKey))
{
length = ParseTagKey(buffer + pos, tag);
}
/***** string ****/
else if (!strcmp(tagName, kXMLTagString))
{
length = ParseTagString(buffer + pos, tag);
}
else if (!strncmp(tagName, kXMLTagString " ", strlen(kXMLTagString " ")))
{
else if (!strcmp(tagName, kXMLTagString))
{
length = ParseTagString(buffer + pos, tag);
}
else if (!strncmp(tagName, kXMLTagString " ", strlen(kXMLTagString " ")))
{
// TODO: save tag if if found
if(!strncmp(tagName + strlen(kXMLTagString " "), kXMLStringID, strlen(kXMLStringID)))
{
printf("ParseStringID error (0x%x)\n", *val);
getc();
return -1;
}
}
length = ParseTagString(buffer + pos, tag);
tagName[cnt] = 0;
char* val = tagName + strlen(kXMLTagString " " kXMLStringIDRef "\"");
while(*val)
{
{
if ((*val >= '0' && *val <= '9'))// 0 - 9
{
id = (id * 10) + (*val++ - '0');
printf("ParseStringIDREF error (0x%x)\n", *val);
getc();
return -1;
}
}
char* str = GetRefString(id);
length = 0;
//printf("Located IDREF, id = %d, string = %s\n", id, str);
}
}
}
/***** integer ****/
else if (!strcmp(tagName, kXMLTagInteger))
{
length = ParseTagInteger(buffer + pos, tag);
}
else if (!strncmp(tagName, kXMLTagInteger " ", strlen(kXMLTagInteger " ")))
{
else if (!strcmp(tagName, kXMLTagInteger))
{
length = ParseTagInteger(buffer + pos, tag);
}
else if (!strncmp(tagName, kXMLTagInteger " ", strlen(kXMLTagInteger " ")))
{
if(!strncmp(tagName + strlen(kXMLTagInteger " "), kXMLStringID, strlen(kXMLStringID)))
{
// ID=
printf("ParseIntegerID error (0x%x)\n", *val);
getc();
return -1;
}
}
length = ParseTagInteger(buffer + pos, tag);
tagName[cnt] = 0;
char* val = tagName + strlen(kXMLTagInteger " " kXMLStringIDRef "\"");
while(*val)
{
{
if ((*val >= '0' && *val <= '9'))// 0 - 9
{
id = (id * 10) + (*val++ - '0');
printf("ParseStringIDREF error (0x%x)\n", *val);
getc();
return -1;
}
}
int integer = (int)GetRefString(id);
length = 0;
//printf("Located IDREF, id = %d, string = %s\n", id, str);
}
else
}
else
{
length = ParseTagInteger(buffer + pos, tag);
}
}
/***** data ****/
else if (!strcmp(tagName, kXMLTagData))
{
length = ParseTagData(buffer + pos, tag);
}
else if (!strcmp(tagName, kXMLTagData))
{
length = ParseTagData(buffer + pos, tag);
}
else if (!strncmp(tagName, kXMLTagData " ", strlen(kXMLTagData " ")))
{
length = ParseTagData(buffer + pos, tag);
}
else if (!strcmp(tagName, kXMLTagDate))
{
length = ParseTagDate(buffer + pos, tag);
}
{
length = ParseTagData(buffer + pos, tag);
}
else if (!strcmp(tagName, kXMLTagDate))
{
length = ParseTagDate(buffer + pos, tag);
}
/***** date ****/
else if (!strncmp(tagName, kXMLTagDate " ", strlen(kXMLTagDate " ")))
{
length = ParseTagDate(buffer + pos, tag);
}
{
length = ParseTagDate(buffer + pos, tag);
}
/***** false ****/
else if (!strcmp(tagName, kXMLTagFalse))
{
length = ParseTagBoolean(buffer + pos, tag, kTagTypeFalse);
}
else if (!strcmp(tagName, kXMLTagFalse))
{
length = ParseTagBoolean(buffer + pos, tag, kTagTypeFalse);
}
/***** true ****/
else if (!strcmp(tagName, kXMLTagTrue))
{
length = ParseTagBoolean(buffer + pos, tag, kTagTypeTrue);
}
else if (!strcmp(tagName, kXMLTagTrue))
{
length = ParseTagBoolean(buffer + pos, tag, kTagTypeTrue);
}
/***** array ****/
else if (!strcmp(tagName, kXMLTagArray))
{
length = ParseTagList(buffer + pos, tag, kTagTypeArray, 0);
}
else if (!strcmp(tagName, kXMLTagArray))
{
length = ParseTagList(buffer + pos, tag, kTagTypeArray, 0);
}
else if (!strncmp(tagName, kXMLTagArray " ", strlen(kXMLTagArray " ")))
{
length = ParseTagList(buffer + pos, tag, kTagTypeArray, 0);
}
else if (!strcmp(tagName, kXMLTagArray "/"))
{
length = ParseTagList(buffer + pos, tag, kTagTypeArray, 1);
}
{
length = ParseTagList(buffer + pos, tag, kTagTypeArray, 0);
}
else if (!strcmp(tagName, kXMLTagArray "/"))
{
length = ParseTagList(buffer + pos, tag, kTagTypeArray, 1);
}
/***** unknown ****/
else
{
*tag = 0;
length = 0;
}
if (length == -1) return -1;
return pos + length;
else
{
*tag = 0;
length = 0;
}
if (length == -1) return -1;
return pos + length;
}
//==========================================================================
char* val = buffer;
int size;
if(buffer[0] == '<')
if(buffer[0] == '<')
{
printf("Warning integer is non existant\n");
getc();
printf("ParseTagInteger hex error (0x%x) in buffer %s\n", *val, buffer);
getc();
return -1;
}
}
}
else if ( size )// Decimal value
#if DOFREE
static void
FreeSymbol( char * string )
{
{
SymbolPtr symbol, prev;
prev = 0;
}
}
bool XMLCastBoolean(TagPtr dict)
{
if(!dict) return false;
branches/iFabio/Chameleon/i386/libsaio/console.c
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bool gVerboseMode;
bool gErrors;
/* Kabyl: BooterLog */
//Azi: Doubled log available size.
// 64kb are not enough to hold the full log while booting with -f argument (ignore caches).
// It also seems to fix some reported problems while booting with the mentioned argument.
// Note: 96kb are enough to hold full log, booting with -f; even so, this depends on how much
// we "play" at the boot prompt, with what patches we're playing and how much they print to the log,
// kexts loaded, etc...
// Please remove this comment when this gets checked by a "true" dev.
/** Kabyl: BooterLog
Azi: Doubled available log size; this seems to fix some hangs and instant reboots caused by
booting with -f (ignore caches). 96kb are enough to hold full log, booting with -f; even so,
this depends on how much we "play" at the boot prompt and with what patches we're playing,
depending on how much they print to the log.
**/ //Azi: closing **/ alows colapse/expand... is this desirable?? colapsing an entire page
// will also colapse comments....
#define BOOTER_LOG_SIZE(128 * 1024)
#define SAFE_LOG_SIZE134
char * last_str;
};
static void sputc(int c, struct putc_info * pi)
static int
sputc(int c, struct putc_info * pi) //Azi: exists on printf.c & gui.c
{
if (pi->last_str)
if (pi->last_str)
if (pi->str == pi->last_str)
{
*(pi->str) = '\0';
return;
return 0;
}
*(pi->str)++ = c;
*(pi->str)++ = c;
return c;
}
void initBooterLog(void)
/*
* write one character to console
*/
void putchar(int c)
int putchar(int c)
{
if ( c == '\t' )
{
for (c = 0; c < 8; c++) putc(' ');
return;
for (c = 0; c < 8; c++) bios_putchar(' ');
return c;
}
if ( c == '\n' )
{
putc('\r');
bios_putchar('\r');
}
putc(c);
bios_putchar(c);
return c;
}
int getc()
vprf(fmt, ap);
{
/* Kabyl: BooterLog */
// Kabyl: BooterLog
struct putc_info pi;
if (!msgbuf)
}
{
/* Kabyl: BooterLog */
// Kabyl: BooterLog
struct putc_info pi;
if (!msgbuf)
branches/iFabio/Chameleon/i386/libsaio/bootstruct.c
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void initKernBootStruct( void )
{
Node *node;
int nameLen;
static int init_done = 0;
if ( !init_done )
{
bootArgs = (boot_args *)malloc(sizeof(boot_args));
bootArgsPreLion = (boot_args_pre_lion *)malloc(sizeof(boot_args_pre_lion));
bootInfo = (PrivateBootInfo_t *)malloc(sizeof(PrivateBootInfo_t));
if (bootArgs == 0 || bootInfo == 0)
stop("Couldn't allocate boot info\n");
bzero(bootArgs, sizeof(boot_args));
bzero(bootArgsPreLion, sizeof(boot_args_pre_lion));
bzero(bootInfo, sizeof(PrivateBootInfo_t));
// Get system memory map. Also update the size of the
// conventional/extended memory for backwards compatibility.
bootInfo->memoryMapCount =
getMemoryMap( bootInfo->memoryMap, kMemoryMapCountMax,
(unsigned long *) &bootInfo->convmem,
(unsigned long *) &bootInfo->extmem );
if ( bootInfo->memoryMapCount == 0 )
{
// BIOS did not provide a memory map, systems with
// discontiguous memory or unusual memory hole locations
// may have problems.
bootInfo->convmem = getConventionalMemorySize();
bootInfo->extmem = getExtendedMemorySize();
}
bootInfo->configEnd = bootInfo->config;
bootArgs->Video.v_display = VGA_TEXT_MODE;
DT__Initialize();
node = DT__FindNode("/", true);
if (node == 0) {
stop("Couldn't create root node");
}
getPlatformName(platformName);
nameLen = strlen(platformName) + 1;
DT__AddProperty(node, "compatible", nameLen, platformName);
DT__AddProperty(node, "model", nameLen, platformName);
gMemoryMapNode = DT__FindNode("/chosen/memory-map", true);
bootArgs->Version = kBootArgsVersion;
bootArgs->Revision = kBootArgsRevision;
bootArgsPreLion->Version = kBootArgsPreLionVersion;
bootArgsPreLion->Revision = kBootArgsPreLionRevision;
init_done = 1;
}
Node *node;
int nameLen;
static int init_done = 0;
if ( !init_done )
{
bootArgs = (boot_args *)malloc(sizeof(boot_args));
bootArgsPreLion = (boot_args_pre_lion *)malloc(sizeof(boot_args_pre_lion));
bootInfo = (PrivateBootInfo_t *)malloc(sizeof(PrivateBootInfo_t));
if (bootArgs == 0 || bootInfo == 0)
stop("Couldn't allocate boot info\n");
bzero(bootArgs, sizeof(boot_args));
bzero(bootArgsPreLion, sizeof(boot_args_pre_lion));
bzero(bootInfo, sizeof(PrivateBootInfo_t));
// Get system memory map. Also update the size of the
// conventional/extended memory for backwards compatibility.
bootInfo->memoryMapCount =
getMemoryMap( bootInfo->memoryMap, kMemoryMapCountMax,
(unsigned long *) &bootInfo->convmem,
(unsigned long *) &bootInfo->extmem );
if ( bootInfo->memoryMapCount == 0 )
{
// BIOS did not provide a memory map, systems with
// discontiguous memory or unusual memory hole locations
// may have problems.
bootInfo->convmem = getConventionalMemorySize();
bootInfo->extmem = getExtendedMemorySize();
}
bootInfo->configEnd = bootInfo->config;
bootArgs->Video.v_display = VGA_TEXT_MODE;
DT__Initialize();
node = DT__FindNode("/", true);
if (node == 0) {
stop("Couldn't create root node");
}
getPlatformName(platformName);
nameLen = strlen(platformName) + 1;
DT__AddProperty(node, "compatible", nameLen, platformName);
DT__AddProperty(node, "model", nameLen, platformName);
gMemoryMapNode = DT__FindNode("/chosen/memory-map", true);
bootArgs->Version = kBootArgsVersion;
bootArgs->Revision = kBootArgsRevision;
bootArgsPreLion->Version = kBootArgsPreLionVersion;
bootArgsPreLion->Revision = kBootArgsPreLionRevision;
init_done = 1;
}
}
void
reserveKernBootStruct(void)
{
if ((gMacOSVersion[0] == '1') && (gMacOSVersion[1] == '0') && (gMacOSVersion[2] == '.') && (gMacOSVersion[3] == '7'))
{
if ((gMacOSVersion[0] == '1') && (gMacOSVersion[1] == '0')
&& (gMacOSVersion[2] == '.') && (gMacOSVersion[3] == '7'))
{
void *oldAddr = bootArgs;
bootArgs = (boot_args *)AllocateKernelMemory(sizeof(boot_args));
bcopy(oldAddr, bootArgs, sizeof(boot_args));
void
finalizeBootStruct(void)
{
uint32_t size;
void *addr;
int i;
EfiMemoryRange *memoryMap;
MemoryRange *range;
int memoryMapCount = bootInfo->memoryMapCount;
if (memoryMapCount == 0) {
// XXX could make a two-part map here
stop("Unable to convert memory map into proper format\n");
}
// convert memory map to boot_args memory map
memoryMap = (EfiMemoryRange *)AllocateKernelMemory(sizeof(EfiMemoryRange) * memoryMapCount);
bootArgs->MemoryMap = (uint32_t)memoryMap;
bootArgs->MemoryMapSize = sizeof(EfiMemoryRange) * memoryMapCount;
bootArgs->MemoryMapDescriptorSize = sizeof(EfiMemoryRange);
bootArgs->MemoryMapDescriptorVersion = 0;
for (i=0; i<memoryMapCount; i++, memoryMap++) {
range = &bootInfo->memoryMap[i];
switch(range->type) {
uint32_t size;
void *addr;
int i;
EfiMemoryRange *memoryMap;
MemoryRange *range;
int memoryMapCount = bootInfo->memoryMapCount;
if (memoryMapCount == 0) {
// XXX could make a two-part map here
stop("Unable to convert memory map into proper format\n");
}
// convert memory map to boot_args memory map
memoryMap = (EfiMemoryRange *)AllocateKernelMemory(sizeof(EfiMemoryRange) * memoryMapCount);
bootArgs->MemoryMap = (uint32_t)memoryMap;
bootArgs->MemoryMapSize = sizeof(EfiMemoryRange) * memoryMapCount;
bootArgs->MemoryMapDescriptorSize = sizeof(EfiMemoryRange);
bootArgs->MemoryMapDescriptorVersion = 0;
for (i=0; i<memoryMapCount; i++, memoryMap++) {
range = &bootInfo->memoryMap[i];
switch(range->type) {
case kMemoryRangeACPI:
memoryMap->Type = kEfiACPIReclaimMemory;
break;
default:
memoryMap->Type = kEfiReservedMemoryType;
break;
}
memoryMap->PhysicalStart = range->base;
memoryMap->VirtualStart = range->base;
memoryMap->NumberOfPages = range->length >> I386_PGSHIFT;
memoryMap->Attribute = 0;
}
// copy bootFile into device tree
// XXX
// add PCI info somehow into device tree
// XXX
// Flatten device tree
DT__FlattenDeviceTree(0, &size);
addr = (void *)AllocateKernelMemory(size);
if (addr == 0) {
stop("Couldn't allocate device tree\n");
}
DT__FlattenDeviceTree((void **)&addr, &size);
bootArgs->deviceTreeP = (uint32_t)addr;
bootArgs->deviceTreeLength = size;
}
memoryMap->PhysicalStart = range->base;
memoryMap->VirtualStart = range->base;
memoryMap->NumberOfPages = range->length >> I386_PGSHIFT;
memoryMap->Attribute = 0;
}
// copy bootFile into device tree
// XXX
// add PCI info somehow into device tree
// XXX
// Flatten device tree
DT__FlattenDeviceTree(0, &size);
addr = (void *)AllocateKernelMemory(size);
if (addr == 0) {
stop("Couldn't allocate device tree\n");
}
DT__FlattenDeviceTree((void **)&addr, &size);
bootArgs->deviceTreeP = (uint32_t)addr;
bootArgs->deviceTreeLength = size;
// Copy BootArgs values to older structure
memcpy(&bootArgsPreLion->CommandLine, &bootArgs->CommandLine, BOOT_LINE_LENGTH);
bootArgsPreLion->MemoryMapDescriptorSize = bootArgs->MemoryMapDescriptorSize;
bootArgsPreLion->MemoryMapDescriptorVersion = bootArgs->MemoryMapDescriptorVersion;
bootArgsPreLion->deviceTreeP = bootArgs->deviceTreeP;
bootArgsPreLion->deviceTreeP = bootArgs->deviceTreeP;
bootArgsPreLion->deviceTreeLength = bootArgs->deviceTreeLength;
bootArgsPreLion->kaddr = bootArgs->kaddr;
bootArgsPreLion->performanceDataStart = bootArgs->performanceDataStart;
bootArgsPreLion->performanceDataSize = bootArgs->performanceDataSize;
bootArgsPreLion->efiRuntimeServicesVirtualPageStart = bootArgs->efiRuntimeServicesVirtualPageStart;
}
branches/iFabio/Chameleon/i386/libsaio/Makefile
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-fno-builtin -static $(OMIT_FRAME_POINTER_CFLAG) \
-mpreferred-stack-boundary=2 -fno-align-functions -fno-stack-protector \
-march=pentium4 -msse2 -mfpmath=sse -msoft-float -nostdinc -include $(SRCROOT)/autoconf.h
CPPFLAGS := $(CPPFLAGS) -nostdinc++
INC = -I. -I$(SYMROOT) -I$(LIBSADIR) -I$(BOOT2DIR) -I${SRCROOT}/i386/include
@ar q $@ $^ &> /dev/null
@echo "\t[RANLIB] $(@F)"
@ranlib $(SYMROOT)/$(@F)
# dependencies
-include $(OBJROOT)/Makedep
branches/iFabio/Chameleon/i386/libsaio/usb.c
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// Add usb device to the list
void notify_usb_dev(pci_dt_t *pci_dev)
{
struct pciList* current = usbList;
if(!usbList)
{
branches/iFabio/Chameleon/i386/libsaio/nvidia.c
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default_NVCAP[16], default_NVCAP[17], default_NVCAP[18], default_NVCAP[19]);
#endif
devprop_add_nvidia_template(device);
devprop_add_value(device, "NVCAP", default_NVCAP, NVCAP_LEN);
devprop_add_value(device, "VRAM,totalsize", (uint8_t*)&videoRam, 4);
branches/iFabio/Chameleon/i386/libsaio/ati.c
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{ 0x94C3,0x22471787,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull},
{ 0x94C3,0x01011A93,CHIP_FAMILY_RV610,"Qimonda Radeon HD 2400 PRO",kNull},
{ 0x9501,0x30001002,CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9501,0x25421002,CHIP_FAMILY_RV670,"ATI Radeon HD 3870",kNull},
{ 0x9501,0x4750174B,CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x6898,0x00000000,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari},
{ 0x6899,0x00000000,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari},
{ 0x689E,0x00000000,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari},
{ 0x689C,0x00000000,CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5900 Series",kUakari},
{ 0x68B9,0x00000000,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5600 Series",kVervet},
if (radeon_cards[i].device_id == pci_dev->device_id)
{
card->info = &radeon_cards[i];
if ((radeon_cards[i].subsys_id == 0x00000000) ||
if ((radeon_cards[i].subsys_id == 0x00000000) ||
(radeon_cards[i].subsys_id == pci_dev->subsys_id.subsys_id))
break;
}
branches/iFabio/Chameleon/i386/libsaio/cpu.c
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if (bus_ratio_max) {
fsbFrequency = (tscFrequency / bus_ratio_max);
}
//valv: Turbo Ratio Limit
if ((intelCPU != 0x2e) && (intelCPU != 0x2f)) {
msr = rdmsr64(MSR_TURBO_RATIO_LIMIT);
branches/iFabio/Chameleon/i386/libsaio/platform.h
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#define UUID_LEN16
typedef struct _RamSlotInfo_t {
uint32_tModuleSize;// Size of Module in MB
uint32_tFrequency; // in Mhz
uint32_tModuleSize;// Size of Module in MB
uint32_tFrequency;// in Mhz
const char*Vendor;
const char*PartNo;
const char*SerialNo;
char*spd;// SPD Dump
char*spd;// SPD Dump
boolInUse;
uint8_tType;
uint8_tBankConnections; // table type 6, see (3.3.7)
uint8_tBankConnections;// table type 6, see (3.3.7)
uint8_tBankConnCnt;
} RamSlotInfo_t;
branches/iFabio/Chameleon/i386/libsaio/smbios.c
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for (i = 0; i < numOfSetters; i++)
if ((structPtr->orig->type == SMBSetters[i].type) && (SMBSetters[i].fieldOffset < structPtr->orig->length))
{
if (SMBSetters[i].fieldOffset > structPtr->orig->length)
continue;
setterFound = true;
setSMBValue(structPtr, i, (returnType *)((uint8_t *)structPtr->new + SMBSetters[i].fieldOffset));
}
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return bb.eax.r.h;
}
void putc(int ch)
void bios_putchar(int ch)
{
bb.intno = 0x10;
bb.ebx.r.h = 0x00; /* background black */
/* Check to see if the passed-in drive is in El Torito no-emulation mode. */
int is_no_emulation(int drive)
{
struct packet {
unsigned char packet_size;
unsigned char media_type;
unsigned char drive_num;
unsigned char ctrlr_index;
unsigned long lba;
unsigned short device_spec;
unsigned short buffer_segment;
unsigned short load_segment;
unsigned short sector_count;
unsigned char cyl_count;
unsigned char sec_count;
unsigned char head_count;
unsigned char reseved;
} __attribute__((packed));
static struct packet pkt;
bzero(&pkt, sizeof(pkt));
pkt.packet_size = 0x13;
bb.intno = 0x13;
bb.eax.r.h = 0x4b;
bb.eax.r.l = 0x01; // subfunc: get info
bb.edx.r.l = drive;
bb.esi.rr = NORMALIZED_OFFSET((unsigned)&pkt);
bb.ds = NORMALIZED_SEGMENT((unsigned)&pkt);
bios(&bb);
struct packet {
unsigned char packet_size;
unsigned char media_type;
unsigned char drive_num;
unsigned char ctrlr_index;
unsigned long lba;
unsigned short device_spec;
unsigned short buffer_segment;
unsigned short load_segment;
unsigned short sector_count;
unsigned char cyl_count;
unsigned char sec_count;
unsigned char head_count;
unsigned char reseved;
} __attribute__((packed));
static struct packet pkt;
bzero(&pkt, sizeof(pkt));
pkt.packet_size = 0x13;
bb.intno= 0x13;
bb.eax.r.h= 0x4b;
bb.eax.r.l= 0x01; // subfunc: get info
bb.edx.r.l= drive;
bb.esi.rr= NORMALIZED_OFFSET((unsigned)&pkt);
bb.ds= NORMALIZED_SEGMENT((unsigned)&pkt);
bios(&bb);
#if DEBUG
printf("el_torito info drive %x\n", drive);
printf("--> cf %x, eax %x\n", bb.flags.cf, bb.eax.rr);
printf("pkt_size: %x\n", pkt.packet_size);
printf("media_type: %x\n", pkt.media_type);
printf("drive_num: %x\n", pkt.drive_num);
printf("device_spec: %x\n", pkt.device_spec);
printf("press a key->\n");getc();
printf("el_torito info drive %x\n", drive);
printf("--> cf %x, eax %x\n", bb.flags.cf, bb.eax.rr);
printf("pkt_size: %x\n", pkt.packet_size);
printf("media_type: %x\n", pkt.media_type);
printf("drive_num: %x\n", pkt.drive_num);
printf("device_spec: %x\n", pkt.device_spec);
printf("press a key->\n");getc();
#endif
/* Some BIOSes erroneously return cf = 1 */
/* Just check to see if the drive number is the same. */
if (pkt.drive_num == drive) {
if ((pkt.media_type & 0x0F) == 0) {
/* We are in no-emulation mode. */
return 1;
/* Some BIOSes erroneously return cf = 1 */
/* Just check to see if the drive number is the same. */
if (pkt.drive_num == drive) {
if ((pkt.media_type & 0x0F) == 0) {
/* We are in no-emulation mode. */
return 1;
}
}
}
return 0;
return 0;
}
#if DEBUG
*/
void print_drive_info(boot_drive_info_t *dp)
{
// printf("buf_size = %x\n", dp->params.buf_size);
printf("info_flags = %x\n", dp->params.info_flags);
printf(" phys_cyls = %lx\n", dp->params. phys_cyls);
printf(" phys_heads = %lx\n", dp->params. phys_heads);
printf(" phys_spt = %lx\n", dp->params. phys_spt);
printf("phys_sectors = %lx%lx\n", ((unsigned long *)(&dp->params.phys_sectors))[1],
((unsigned long *)(&dp->params.phys_sectors))[0]);
printf("phys_nbps = %x\n", dp->params.phys_nbps);
// printf("dpte_offset = %x\n", dp->params.dpte_offset);
// printf("dpte_segment = %x\n", dp->params.dpte_segment);
// printf("key = %x\n", dp->params.key);
// printf("path_len = %x\n", dp->params. path_len);
// printf("reserved1 = %x\n", dp->params. reserved1);
// printf("reserved2 = %x\n", dp->params.reserved2);
//printf("bus_type[4] = %x\n", dp->params. bus_type[4]);
//printf("interface_type[8] = %x\n", dp->params. interface_type[8]);
//printf("interface_path[8] = %x\n", dp->params. interface_path[8]);
//printf("dev_path[8] = %x\n", dp->params. dev_path[8]);
// printf("reserved3 = %x\n", dp->params. reserved3);
// printf("checksum = %x\n", dp->params. checksum);
printf(" io_port_base = %x\n", dp->dpte.io_port_base);
printf(" control_port_base = %x\n", dp->dpte.control_port_base);
printf(" head_flags = %x\n", dp->dpte. head_flags);
printf(" vendor_info = %x\n", dp->dpte. vendor_info);
printf(" irq = %x\n", dp->dpte. irq);
// printf(" irq_unused = %x\n", dp->dpte. irq_unused);
printf(" block_count = %x\n", dp->dpte. block_count);
printf(" dma_channe = %x\n", dp->dpte. dma_channel);
printf(" dma_type = %x\n", dp->dpte. dma_type);
printf(" pio_type = %x\n", dp->dpte. pio_type);
printf(" pio_unused = %x\n", dp->dpte. pio_unused);
printf(" option_flags = %x\n", dp->dpte.option_flags);
// printf(" reserved = %x\n", dp->dpte.reserved);
printf(" revision = %x\n", dp->dpte. revision);
// printf(" checksum = %x\n", dp->dpte. checksum);
//printf("buf_size = %x\n", dp->params.buf_size);
printf("info_flags = %x\n", dp->params.info_flags);
printf("phys_cyls = %lx\n", dp->params. phys_cyls);
printf("phys_heads = %lx\n", dp->params. phys_heads);
printf("phys_spt = %lx\n", dp->params. phys_spt);
printf("phys_sectors = %lx%lx\n", ((unsigned long *)(&dp->params.phys_sectors))[1],
((unsigned long *)(&dp->params.phys_sectors))[0]);
printf("phys_nbps = %x\n", dp->params.phys_nbps);
//printf("dpte_offset = %x\n", dp->params.dpte_offset);
//printf("dpte_segment = %x\n", dp->params.dpte_segment);
//printf("key = %x\n", dp->params.key);
//printf("path_len = %x\n", dp->params. path_len);
//printf("reserved1 = %x\n", dp->params. reserved1);
//printf("reserved2 = %x\n", dp->params.reserved2);
//printf("bus_type[4] = %x\n", dp->params. bus_type[4]);
//printf("interface_type[8] = %x\n", dp->params. interface_type[8]);
//printf("interface_path[8] = %x\n", dp->params. interface_path[8]);
//printf("dev_path[8] = %x\n", dp->params. dev_path[8]);
//printf("reserved3 = %x\n", dp->params. reserved3);
//printf("checksum = %x\n", dp->params. checksum);
printf("io_port_base = %x\n", dp->dpte.io_port_base);
printf("control_port_base = %x\n", dp->dpte.control_port_base);
printf("head_flags = %x\n", dp->dpte. head_flags);
printf("vendor_info = %x\n", dp->dpte. vendor_info);
printf("irq = %x\n", dp->dpte. irq);
//printf("irq_unused = %x\n", dp->dpte. irq_unused);
printf("block_count = %x\n", dp->dpte. block_count);
printf("dma_channe = %x\n", dp->dpte. dma_channel);
printf("dma_type = %x\n", dp->dpte. dma_type);
printf("pio_type = %x\n", dp->dpte. pio_type);
printf("pio_unused = %x\n", dp->dpte. pio_unused);
printf("option_flags = %x\n", dp->dpte.option_flags);
//printf("reserved = %x\n", dp->dpte.reserved);
printf("revision = %x\n", dp->dpte. revision);
//printf("checksum = %x\n", dp->dpte. checksum);
}
#endif
int get_drive_info(int drive, struct driveInfo *dp)
{
boot_drive_info_t *di = &dp->di;
int ret = 0;
boot_drive_info_t *di = &dp->di;
int ret = 0;
#if UNUSED
if (maxhd == 0) {
bb.intno = 0x13;
bb.eax.r.h = 0x08;
bb.edx.r.l = 0x80;
bios(&bb);
if (bb.flags.cf == 0)
maxhd = 0x7f + bb.edx.r.l;
};
if (drive > maxhd)
return 0;
if (maxhd == 0) {
bb.intno = 0x13;
bb.eax.r.h = 0x08;
bb.edx.r.l = 0x80;
bios(&bb);
if (bb.flags.cf == 0)
maxhd = 0x7f + bb.edx.r.l;
};
if (drive > maxhd)
return 0;
#endif
bzero(dp, sizeof(struct driveInfo));
dp->biosdev = drive;
/* Check for El Torito no-emulation mode. */
dp->no_emulation = is_no_emulation(drive);
bzero(dp, sizeof(struct driveInfo));
dp->biosdev = drive;
/* Check for El Torito no-emulation mode. */
dp->no_emulation = is_no_emulation(drive);
/* Check drive for EBIOS support. */
bb.intno = 0x13;
bb.eax.r.h = 0x41;
bb.edx.r.l = drive;
bb.ebx.rr = 0x55aa;
bios(&bb);
if((bb.ebx.rr == 0xaa55) && (bb.flags.cf == 0)) {
/* Get flags for supported operations. */
dp->uses_ebios = bb.ecx.r.l;
}
if (dp->uses_ebios & (EBIOS_ENHANCED_DRIVE_INFO | EBIOS_LOCKING_ACCESS | EBIOS_FIXED_DISK_ACCESS)) {
/* Get EBIOS drive info. */
static struct drive_params params;
params.buf_size = sizeof(params);
bb.intno = 0x13;
bb.eax.r.h = 0x48;
bb.edx.r.l = drive;
bb.esi.rr = NORMALIZED_OFFSET((unsigned)&params);
bb.ds = NORMALIZED_SEGMENT((unsigned)&params);
bios(&bb);
if(bb.flags.cf != 0 /* || params.phys_sectors < 2097152 */) {
dp->uses_ebios = 0;
di->params.buf_size = 1;
} else {
bcopy(&params, &di->params, sizeof(params));
if (drive >= BASE_HD_DRIVE &&
(dp->uses_ebios & EBIOS_ENHANCED_DRIVE_INFO) &&
di->params.buf_size >= 30 &&
!(di->params.dpte_offset == 0xFFFF && di->params.dpte_segment == 0xFFFF)) {
void *ptr = (void *)(di->params.dpte_offset + ((unsigned int)di->params.dpte_segment << 4));
bcopy(ptr, &di->dpte, sizeof(di->dpte));
}
/* Check drive for EBIOS support. */
bb.intno = 0x13;
bb.eax.r.h = 0x41;
bb.edx.r.l = drive;
bb.ebx.rr = 0x55aa;
bios(&bb);
if ((bb.ebx.rr == 0xaa55) && (bb.flags.cf == 0)) {
/* Get flags for supported operations. */
dp->uses_ebios = bb.ecx.r.l;
}
}
if (dp->uses_ebios & (EBIOS_ENHANCED_DRIVE_INFO | EBIOS_LOCKING_ACCESS | EBIOS_FIXED_DISK_ACCESS)) {
/* Get EBIOS drive info. */
static struct drive_params params;
params.buf_size = sizeof(params);
bb.intno = 0x13;
bb.eax.r.h = 0x48;
bb.edx.r.l = drive;
bb.esi.rr = NORMALIZED_OFFSET((unsigned)&params);
bb.ds = NORMALIZED_SEGMENT((unsigned)&params);
bios(&bb);
if (bb.flags.cf != 0 /* || params.phys_sectors < 2097152 */) {
dp->uses_ebios = 0;
di->params.buf_size = 1;
}
else
{
bcopy(&params, &di->params, sizeof(params));
if (drive >= BASE_HD_DRIVE &&
(dp->uses_ebios & EBIOS_ENHANCED_DRIVE_INFO) &&
di->params.buf_size >= 30 &&
!(di->params.dpte_offset == 0xFFFF && di->params.dpte_segment == 0xFFFF)) {
void *ptr = (void *)(di->params.dpte_offset + ((unsigned int)di->params.dpte_segment << 4));
bcopy(ptr, &di->dpte, sizeof(di->dpte));
}
}
}
/*
* zef: This code will fail on recent JMicron and Intel option ROMs
*/
// if (di->params.phys_heads == 0 || di->params.phys_spt == 0) {
///* Either it's not EBIOS, or EBIOS didn't tell us. */
//bb.intno = 0x13;
//bb.eax.r.h = 0x08;
//bb.edx.r.l = drive;
//bios(&bb);
//if (bb.flags.cf == 0 && bb.eax.r.h == 0) {
// unsigned long cyl;
// unsigned long sec;
// unsigned long hds;
//
// hds = bb.edx.r.h;
// sec = bb.ecx.r.l & 0x3F;
// if((dp->uses_ebios & EBIOS_ENHANCED_DRIVE_INFO) && (sec != 0)) {
//cyl = (di->params.phys_sectors / ((hds + 1) * sec)) - 1;
// }
// else {
//cyl = bb.ecx.r.h | ((bb.ecx.r.l & 0xC0) << 2);
// }
// di->params.phys_heads = hds;
// di->params.phys_spt = sec;
// di->params.phys_cyls = cyl;
//} else {
// ret = -1;
//if (di->params.phys_heads == 0 || di->params.phys_spt == 0) {
///* Either it's not EBIOS, or EBIOS didn't tell us. */
//bb.intno = 0x13;
//bb.eax.r.h = 0x08;
//bb.edx.r.l = drive;
//bios(&bb);
//if (bb.flags.cf == 0 && bb.eax.r.h == 0) {
//unsigned long cyl;
//unsigned long sec;
//unsigned long hds;
//
//hds = bb.edx.r.h;
//sec = bb.ecx.r.l & 0x3F;
//if ((dp->uses_ebios & EBIOS_ENHANCED_DRIVE_INFO) && (sec != 0)) {
//cyl = (di->params.phys_sectors / ((hds + 1) * sec)) - 1;
//} else {
//cyl = bb.ecx.r.h | ((bb.ecx.r.l & 0xC0) << 2);
//}
//di->params.phys_heads = hds;
//di->params.phys_spt = sec;
//di->params.phys_cyls = cyl;
//} else {
//ret = -1;
//}
//}
// }
if (dp->no_emulation) {
/* Some BIOSes give us erroneous EBIOS support information.
* Assume that if you're on a CD, then you can use
* EBIOS disk calls.
*/
dp->uses_ebios |= EBIOS_FIXED_DISK_ACCESS;
}
if (dp->no_emulation) {
/* Some BIOSes give us erroneous EBIOS support information.
* Assume that if you're on a CD, then you can use
* EBIOS disk calls.
*/
dp->uses_ebios |= EBIOS_FIXED_DISK_ACCESS;
}
#if DEBUG
print_drive_info(di);
printf("uses_ebios = 0x%x\n", dp->uses_ebios);
printf("result %d\n", ret);
printf("press a key->\n");getc();
print_drive_info(di);
printf("uses_ebios = 0x%x\n", dp->uses_ebios);
printf("result %d\n", ret);
printf("press a key->\n");getc();
#endif
if (ret == 0) {
dp->valid = 1;
}
return ret;
if (ret == 0) {
dp->valid = 1;
}
return ret;
}
int ebiosEjectMedia(int biosdev)
branches/iFabio/Chameleon/i386/libsaio/pci.h
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} pci_dev_t;
typedef struct pci_dt_t {
pci_dev_tdev;
pci_dev_tdev;
uint16_tvendor_id;
uint16_tdevice_id;
uint16_tvendor_id;
uint16_tdevice_id;
union {
struct {
uint16_tvendor_id;
uint16_tdevice_id;
}subsys;
uint32_tsubsys_id;
} subsys;
uint32_t subsys_id;
}subsys_id;
uint16_tclass_id;
uint16_tclass_id;
struct pci_dt_t*parent;
struct pci_dt_t*children;
struct pci_dt_t*next;
struct pci_dt_t*parent;
struct pci_dt_t*children;
struct pci_dt_t*next;
} pci_dt_t;
#define PCIADDR(bus, dev, func)(1 << 31) | (bus << 16) | (dev << 11) | (func << 8)
/* Message Signaled Interrupts registers */
#define PCI_MSI_FLAGS2/* Various flags */
#define PCI_MSI_FLAGS_MASK_BIT0x100/* interrupt masking & reporting supported */
#define PCI_MSI_FLAGS_MASK_BIT0x100/* interrupt masking & reporting supported */
#define PCI_MSI_FLAGS_64BIT0x080/* 64-bit addresses allowed */
#define PCI_MSI_FLAGS_QSIZE0x070/* Message queue size configured */
#define PCI_MSI_FLAGS_QMASK0x00e/* Maximum queue size available */
#define PCI_MSI_FLAGS_ENABLE0x001/* MSI feature enabled */
#define PCI_MSI_RFU3/* Rest of capability flags */
#define PCI_MSI_ADDRESS_LO4/* Lower 32 bits */
#define PCI_MSI_ADDRESS_HI8/* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */
#define PCI_MSI_DATA_328/* 16 bits of data for 32-bit devices */
#define PCI_MSI_DATA_6412/* 16 bits of data for 64-bit devices */
#define PCI_MSI_MASK_BIT_3212/* per-vector masking for 32-bit devices */
#define PCI_MSI_MASK_BIT_6416/* per-vector masking for 64-bit devices */
#define PCI_MSI_PENDING_3216/* per-vector interrupt pending for 32-bit devices */
#define PCI_MSI_PENDING_6420/* per-vector interrupt pending for 64-bit devices */
#define PCI_MSI_FLAGS_ENABLE0x001/* MSI feature enabled */
#define PCI_MSI_RFU3/* Rest of capability flags */
#define PCI_MSI_ADDRESS_LO4/* Lower 32 bits */
#define PCI_MSI_ADDRESS_HI8/* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */
#define PCI_MSI_DATA_328/* 16 bits of data for 32-bit devices */
#define PCI_MSI_DATA_6412/* 16 bits of data for 64-bit devices */
#define PCI_MSI_MASK_BIT_3212/* per-vector masking for 32-bit devices */
#define PCI_MSI_MASK_BIT_6416/* per-vector masking for 64-bit devices */
#define PCI_MSI_PENDING_3216/* per-vector interrupt pending for 32-bit devices */
#define PCI_MSI_PENDING_6420/* per-vector interrupt pending for 64-bit devices */
/* PCI-X */
#define PCI_PCIX_COMMAND 2 /* Command register offset */
#define PCI_PCIX_COMMAND_DPERE 0x0001 /* Data Parity Error Recover Enable */
#define PCI_PCIX_COMMAND_ERO 0x0002 /* Enable Relaxed Ordering */
#define PCI_PCIX_COMMAND_MAX_MEM_READ_BYTE_COUNT 0x000c /* Maximum Memory Read Byte Count */
#define PCI_PCIX_COMMAND_MAX_OUTSTANDING_SPLIT_TRANS 0x0070
#define PCI_PCIX_COMMAND_RESERVED 0xf80
#define PCI_PCIX_STATUS 4 /* Status register offset */
#define PCI_PCIX_STATUS_FUNCTION 0x00000007
#define PCI_PCIX_STATUS_DEVICE 0x000000f8
#define PCI_PCIX_STATUS_BUS 0x0000ff00
#define PCI_PCIX_STATUS_64BIT 0x00010000
#define PCI_PCIX_STATUS_133MHZ 0x00020000
#define PCI_PCIX_STATUS_SC_DISCARDED 0x00040000 /* Split Completion Discarded */
#define PCI_PCIX_STATUS_UNEXPECTED_SC 0x00080000 /* Unexpected Split Completion */
#define PCI_PCIX_STATUS_DEVICE_COMPLEXITY 0x00100000 /* 0 = simple device, 1 = bridge device */
#define PCI_PCIX_STATUS_DESIGNED_MAX_MEM_READ_BYTE_COUNT 0x00600000 /* 0 = 512 bytes, 1 = 1024, 2 = 2048, 3 = 4096 */
#define PCI_PCIX_STATUS_DESIGNED_MAX_OUTSTANDING_SPLIT_TRANS 0x03800000
#define PCI_PCIX_STATUS_DESIGNED_MAX_CUMULATIVE_READ_SIZE 0x1c000000
#define PCI_PCIX_STATUS_RCVD_SC_ERR_MESS 0x20000000 /* Received Split Completion Error Message */
#define PCI_PCIX_STATUS_266MHZ0x40000000 /* 266 MHz capable */
#define PCI_PCIX_STATUS_533MHZ 0x80000000 /* 533 MHz capable */
#define PCI_PCIX_SIZEOF4
#define PCI_PCIX_COMMAND2/* Command register offset */
#define PCI_PCIX_COMMAND_DPERE0x0001/* Data Parity Error Recover Enable */
#define PCI_PCIX_COMMAND_ERO0x0002/* Enable Relaxed Ordering */
#define PCI_PCIX_COMMAND_MAX_MEM_READ_BYTE_COUNT0x000c/* Maximum Memory Read Byte Count */
#define PCI_PCIX_COMMAND_MAX_OUTSTANDING_SPLIT_TRANS0x0070
#define PCI_PCIX_COMMAND_RESERVED0xf80
#define PCI_PCIX_STATUS4/* Status register offset */
#define PCI_PCIX_STATUS_FUNCTION0x00000007
#define PCI_PCIX_STATUS_DEVICE0x000000f8
#define PCI_PCIX_STATUS_BUS0x0000ff00
#define PCI_PCIX_STATUS_64BIT0x00010000
#define PCI_PCIX_STATUS_133MHZ0x00020000
#define PCI_PCIX_STATUS_SC_DISCARDED0x00040000/* Split Completion Discarded */
#define PCI_PCIX_STATUS_UNEXPECTED_SC0x00080000/* Unexpected Split Completion */
#define PCI_PCIX_STATUS_DEVICE_COMPLEXITY0x00100000/* 0 = simple device, 1 = bridge device */
#define PCI_PCIX_STATUS_DESIGNED_MAX_MEM_READ_BYTE_COUNT0x00600000/* 0 = 512 bytes, 1 = 1024, 2 = 2048, 3 = 4096 */
#define PCI_PCIX_STATUS_DESIGNED_MAX_OUTSTANDING_SPLIT_TRANS0x03800000
#define PCI_PCIX_STATUS_DESIGNED_MAX_CUMULATIVE_READ_SIZE0x1c000000
#define PCI_PCIX_STATUS_RCVD_SC_ERR_MESS0x20000000/* Received Split Completion Error Message */
#define PCI_PCIX_STATUS_266MHZ0x40000000/* 266 MHz capable */
#define PCI_PCIX_STATUS_533MHZ0x80000000/* 533 MHz capable */
#define PCI_PCIX_SIZEOF4
//Azi: check this gui top to bottom!!
/* PCI-X Bridges */
#define PCI_PCIX_BRIDGE_SEC_STATUS 2 /* Secondary bus status register offset */
#define PCI_PCIX_BRIDGE_SEC_STATUS_64BIT 0x0001
#define PCI_PCIX_BRIDGE_SEC_STATUS_133MHZ 0x0002
#define PCI_PCIX_BRIDGE_SEC_STATUS_SC_DISCARDED 0x0004 /* Split Completion Discarded on secondary bus */
#define PCI_PCIX_BRIDGE_SEC_STATUS_UNEXPECTED_SC 0x0008 /* Unexpected Split Completion on secondary bus */
#define PCI_PCIX_BRIDGE_SEC_STATUS_SC_OVERRUN 0x0010 /* Split Completion Overrun on secondary bus */
#define PCI_PCIX_BRIDGE_SEC_STATUS_SPLIT_REQUEST_DELAYED 0x0020
#define PCI_PCIX_BRIDGE_SEC_STATUS_CLOCK_FREQ 0x01c0
#define PCI_PCIX_BRIDGE_SEC_STATUS_RESERVED 0xfe00
#define PCI_PCIX_BRIDGE_STATUS 4 /* Primary bus status register offset */
#define PCI_PCIX_BRIDGE_STATUS_FUNCTION 0x00000007
#define PCI_PCIX_BRIDGE_SEC_STATUS2 /* Secondary bus status register offset */
#define PCI_PCIX_BRIDGE_SEC_STATUS_64BIT0x0001
#define PCI_PCIX_BRIDGE_SEC_STATUS_133MHZ0x0002
#define PCI_PCIX_BRIDGE_SEC_STATUS_SC_DISCARDED0x0004 /* Split Completion Discarded on secondary bus */
#define PCI_PCIX_BRIDGE_SEC_STATUS_UNEXPECTED_SC0x0008 /* Unexpected Split Completion on secondary bus */
#define PCI_PCIX_BRIDGE_SEC_STATUS_SC_OVERRUN0x0010 /* Split Completion Overrun on secondary bus */
#define PCI_PCIX_BRIDGE_SEC_STATUS_SPLIT_REQUEST_DELAYED0x0020
#define PCI_PCIX_BRIDGE_SEC_STATUS_CLOCK_FREQ0x01c0
#define PCI_PCIX_BRIDGE_SEC_STATUS_RESERVED0xfe00
#define PCI_PCIX_BRIDGE_STATUS4 /* Primary bus status register offset */
#define PCI_PCIX_BRIDGE_STATUS_FUNCTION0x00000007
#define PCI_PCIX_BRIDGE_STATUS_DEVICE 0x000000f8
#define PCI_PCIX_BRIDGE_STATUS_BUS 0x0000ff00
#define PCI_PCIX_BRIDGE_STATUS_64BIT 0x00010000
#define PCI_PCIX_BRIDGE_SIZEOF 12
/* PCI Express */
#define PCI_EXP_FLAGS0x2/* Capabilities register */
#define PCI_EXP_FLAGS_VERS0x000f/* Capability version */
#define PCI_EXP_FLAGS_TYPE0x00f0/* Device/Port type */
#define PCI_EXP_TYPE_ENDPOINT0x0/* Express Endpoint */
#define PCI_EXP_TYPE_LEG_END0x1/* Legacy Endpoint */
#define PCI_EXP_TYPE_ROOT_PORT 0x4/* Root Port */
#define PCI_EXP_TYPE_UPSTREAM0x5/* Upstream Port */
#define PCI_EXP_TYPE_DOWNSTREAM 0x6/* Downstream Port */
#define PCI_EXP_TYPE_PCI_BRIDGE 0x7/* PCI/PCI-X Bridge */
#define PCI_EXP_TYPE_PCIE_BRIDGE 0x8/* PCI/PCI-X to PCIE Bridge */
#define PCI_EXP_TYPE_ROOT_INT_EP 0x9/* Root Complex Integrated Endpoint */
#define PCI_EXP_TYPE_ROOT_EC 0xa/* Root Complex Event Collector */
#define PCI_EXP_FLAGS_SLOT0x0100/* Slot implemented */
#define PCI_EXP_FLAGS_IRQ0x3e00/* Interrupt message number */
#define PCI_EXP_DEVCAP0x4/* Device capabilities */
#define PCI_EXP_DEVCAP_PAYLOAD0x07/* Max_Payload_Size */
#define PCI_EXP_DEVCAP_PHANTOM0x18/* Phantom functions */
#define PCI_EXP_DEVCAP_EXT_TAG0x20/* Extended tags */
#define PCI_EXP_DEVCAP_L0S0x1c0/* L0s Acceptable Latency */
#define PCI_EXP_DEVCAP_L10xe00/* L1 Acceptable Latency */
#define PCI_EXP_DEVCAP_ATN_BUT0x1000/* Attention Button Present */
#define PCI_EXP_DEVCAP_ATN_IND0x2000/* Attention Indicator Present */
#define PCI_EXP_DEVCAP_PWR_IND0x4000/* Power Indicator Present */
#define PCI_EXP_DEVCAP_RBE0x8000/* Role-Based Error Reporting */
#define PCI_EXP_DEVCAP_PWR_VAL0x3fc0000 /* Slot Power Limit Value */
#define PCI_EXP_DEVCAP_PWR_SCL0xc000000 /* Slot Power Limit Scale */
#define PCI_EXP_DEVCAP_FLRESET0x10000000 /* Function-Level Reset */
#define PCI_EXP_DEVCTL0x8/* Device Control */
#define PCI_EXP_DEVCTL_CERE0x0001/* Correctable Error Reporting En. */
#define PCI_EXP_DEVCTL_NFERE0x0002/* Non-Fatal Error Reporting Enable */
#define PCI_EXP_DEVCTL_FERE0x0004/* Fatal Error Reporting Enable */
#define PCI_EXP_DEVCTL_URRE0x0008/* Unsupported Request Reporting En. */
#define PCI_EXP_DEVCTL_RELAXED0x0010/* Enable Relaxed Ordering */
#define PCI_EXP_DEVCTL_PAYLOAD0x00e0/* Max_Payload_Size */
#define PCI_EXP_DEVCTL_EXT_TAG0x0100/* Extended Tag Field Enable */
#define PCI_EXP_DEVCTL_PHANTOM0x0200/* Phantom Functions Enable */
#define PCI_EXP_DEVCTL_AUX_PME0x0400/* Auxiliary Power PM Enable */
#define PCI_EXP_DEVCTL_NOSNOOP0x0800/* Enable No Snoop */
#define PCI_EXP_DEVCTL_READRQ0x7000/* Max_Read_Request_Size */
#define PCI_EXP_DEVCTL_BCRE0x8000/* Bridge Configuration Retry Enable */
#define PCI_EXP_DEVCTL_FLRESET0x8000/* Function-Level Reset [bit shared with BCRE] */
#define PCI_EXP_DEVSTA0xa/* Device Status */
#define PCI_EXP_DEVSTA_CED0x01/* Correctable Error Detected */
#define PCI_EXP_DEVSTA_NFED0x02/* Non-Fatal Error Detected */
#define PCI_EXP_DEVSTA_FED0x04/* Fatal Error Detected */
#define PCI_EXP_DEVSTA_URD0x08/* Unsupported Request Detected */
#define PCI_EXP_DEVSTA_AUXPD0x10/* AUX Power Detected */
#define PCI_EXP_DEVSTA_TRPND0x20/* Transactions Pending */
#define PCI_EXP_LNKCAP0xc/* Link Capabilities */
#define PCI_EXP_LNKCAP_SPEED0x0000f/* Maximum Link Speed */
#define PCI_EXP_LNKCAP_WIDTH0x003f0/* Maximum Link Width */
#define PCI_EXP_LNKCAP_ASPM0x00c00/* Active State Power Management */
#define PCI_EXP_LNKCAP_L0S0x07000/* L0s Acceptable Latency */
#define PCI_EXP_LNKCAP_L10x38000/* L1 Acceptable Latency */
#define PCI_EXP_LNKCAP_CLOCKPM0x40000/* Clock Power Management */
#define PCI_EXP_LNKCAP_SURPRISE 0x80000 /* Surprise Down Error Reporting */
#define PCI_EXP_LNKCAP_DLLA0x100000 /* Data Link Layer Active Reporting */
#define PCI_EXP_LNKCAP_LBNC0x200000 /* Link Bandwidth Notification Capability */
#define PCI_EXP_LNKCAP_PORT0xff000000 /* Port Number */
#define PCI_EXP_LNKCTL0x10/* Link Control */
#define PCI_EXP_LNKCTL_ASPM0x0003/* ASPM Control */
#define PCI_EXP_LNKCTL_RCB0x0008/* Read Completion Boundary */
#define PCI_EXP_LNKCTL_DISABLE0x0010/* Link Disable */
#define PCI_EXP_LNKCTL_RETRAIN0x0020/* Retrain Link */
#define PCI_EXP_LNKCTL_CLOCK0x0040/* Common Clock Configuration */
#define PCI_EXP_LNKCTL_XSYNCH0x0080/* Extended Synch */
#define PCI_EXP_LNKCTL_CLOCKPM0x0100/* Clock Power Management */
#define PCI_EXP_LNKCTL_HWAUTWD0x0200/* Hardware Autonomous Width Disable */
#define PCI_EXP_LNKCTL_BWMIE0x0400/* Bandwidth Mgmt Interrupt Enable */
#define PCI_EXP_LNKCTL_AUTBWIE0x0800/* Autonomous Bandwidth Mgmt Interrupt Enable */
#define PCI_EXP_LNKSTA0x12/* Link Status */
#define PCI_EXP_LNKSTA_SPEED0x000f/* Negotiated Link Speed */
#define PCI_EXP_LNKSTA_WIDTH0x03f0/* Negotiated Link Width */
#define PCI_EXP_LNKSTA_TR_ERR0x0400/* Training Error (obsolete) */
#define PCI_EXP_LNKSTA_TRAIN0x0800/* Link Training */
#define PCI_EXP_LNKSTA_SL_CLK0x1000/* Slot Clock Configuration */
#define PCI_EXP_LNKSTA_DL_ACT0x2000/* Data Link Layer in DL_Active State */
#define PCI_EXP_LNKSTA_BWMGMT0x4000/* Bandwidth Mgmt Status */
#define PCI_EXP_LNKSTA_AUTBW0x8000/* Autonomous Bandwidth Mgmt Status */
#define PCI_EXP_SLTCAP0x14/* Slot Capabilities */
#define PCI_EXP_SLTCAP_ATNB0x0001/* Attention Button Present */
#define PCI_EXP_SLTCAP_PWRC0x0002/* Power Controller Present */
#define PCI_EXP_SLTCAP_MRL0x0004/* MRL Sensor Present */
#define PCI_EXP_SLTCAP_ATNI0x0008/* Attention Indicator Present */
#define PCI_EXP_SLTCAP_PWRI0x0010/* Power Indicator Present */
#define PCI_EXP_SLTCAP_HPS0x0020/* Hot-Plug Surprise */
#define PCI_EXP_SLTCAP_HPC0x0040/* Hot-Plug Capable */
#define PCI_EXP_SLTCAP_PWR_VAL0x00007f80 /* Slot Power Limit Value */
#define PCI_EXP_SLTCAP_PWR_SCL0x00018000 /* Slot Power Limit Scale */
#define PCI_EXP_SLTCAP_INTERLOCK 0x020000 /* Electromechanical Interlock Present */
#define PCI_EXP_SLTCAP_NOCMDCOMP 0x040000 /* No Command Completed Support */
#define PCI_EXP_SLTCAP_PSN0xfff80000 /* Physical Slot Number */
#define PCI_EXP_SLTCTL0x18/* Slot Control */
#define PCI_EXP_SLTCTL_ATNB0x0001/* Attention Button Pressed Enable */
#define PCI_EXP_SLTCTL_PWRF0x0002/* Power Fault Detected Enable */
#define PCI_EXP_SLTCTL_MRLS0x0004/* MRL Sensor Changed Enable */
#define PCI_EXP_SLTCTL_PRSD0x0008/* Presence Detect Changed Enable */
#define PCI_EXP_SLTCTL_CMDC0x0010/* Command Completed Interrupt Enable */
#define PCI_EXP_SLTCTL_HPIE0x0020/* Hot-Plug Interrupt Enable */
#define PCI_EXP_SLTCTL_ATNI0x00c0/* Attention Indicator Control */
#define PCI_EXP_SLTCTL_PWRI0x0300/* Power Indicator Control */
#define PCI_EXP_SLTCTL_PWRC0x0400/* Power Controller Control */
#define PCI_EXP_SLTCTL_INTERLOCK 0x0800 /* Electromechanical Interlock Control */
#define PCI_EXP_SLTCTL_LLCHG0x1000/* Data Link Layer State Changed Enable */
#define PCI_EXP_SLTSTA0x1a/* Slot Status */
#define PCI_EXP_SLTSTA_ATNB0x0001/* Attention Button Pressed */
#define PCI_EXP_SLTSTA_PWRF0x0002/* Power Fault Detected */
#define PCI_EXP_SLTSTA_MRLS0x0004/* MRL Sensor Changed */
#define PCI_EXP_SLTSTA_PRSD0x0008/* Presence Detect Changed */
#define PCI_EXP_SLTSTA_CMDC0x0010/* Command Completed */
#define PCI_EXP_SLTSTA_MRL_ST0x0020/* MRL Sensor State */
#define PCI_EXP_SLTSTA_PRES0x0040/* Presence Detect State */
#define PCI_EXP_SLTSTA_INTERLOCK 0x0080 /* Electromechanical Interlock Status */
#define PCI_EXP_SLTSTA_LLCHG0x0100/* Data Link Layer State Changed */
#define PCI_EXP_RTCTL0x1c/* Root Control */
#define PCI_EXP_RTCTL_SECEE0x0001/* System Error on Correctable Error */
#define PCI_EXP_RTCTL_SENFEE0x0002/* System Error on Non-Fatal Error */
#define PCI_EXP_RTCTL_SEFEE0x0004/* System Error on Fatal Error */
#define PCI_EXP_RTCTL_PMEIE0x0008/* PME Interrupt Enable */
#define PCI_EXP_RTCTL_CRSVIS0x0010/* Configuration Request Retry Status Visible to SW */
#define PCI_EXP_RTCAP0x1e/* Root Capabilities */
#define PCI_EXP_RTCAP_CRSVIS0x0010/* Configuration Request Retry Status Visible to SW */
#define PCI_EXP_RTSTA0x20/* Root Status */
#define PCI_EXP_RTSTA_PME_REQID 0x0000ffff /* PME Requester ID */
#define PCI_EXP_RTSTA_PME_STATUS 0x00010000 /* PME Status */
#define PCI_EXP_RTSTA_PME_PENDING 0x00020000 /* PME is Pending */
#define PCI_EXP_DEVCAP20x24/* Device capabilities 2 */
#define PCI_EXP_DEVCTL20x28/* Device Control */
#define PCI_EXP_DEV2_TIMEOUT_RANGE(x)((x) & 0xf) /* Completion Timeout Ranges Supported */
#define PCI_EXP_DEV2_TIMEOUT_VALUE(x)((x) & 0xf) /* Completion Timeout Value */
#define PCI_EXP_DEV2_TIMEOUT_DIS0x0010/* Completion Timeout Disable Supported */
#define PCI_EXP_DEV2_ARI0x0020/* ARI Forwarding */
#define PCI_EXP_DEVSTA20x2a/* Device Status */
#define PCI_EXP_LNKCAP20x2c/* Link Capabilities */
#define PCI_EXP_LNKCTL20x30/* Link Control */
#define PCI_EXP_LNKCTL2_SPEED(x)((x) & 0xf) /* Target Link Speed */
#define PCI_EXP_LNKCTL2_CMPLNC0x0010/* Enter Compliance */
#define PCI_EXP_LNKCTL2_SPEED_DIS0x0020/* Hardware Autonomous Speed Disable */
#define PCI_EXP_LNKCTL2_DEEMPHASIS(x)(((x) >> 6) & 1) /* Selectable De-emphasis */
#define PCI_EXP_LNKCTL2_MARGIN(x)(((x) >> 7) & 7) /* Transmit Margin */
#define PCI_EXP_LNKCTL2_MOD_CMPLNC0x0400/* Enter Modified Compliance */
#define PCI_EXP_LNKCTL2_CMPLNC_SOS0x0800/* Compliance SOS */
#define PCI_EXP_LNKCTL2_COM_DEEMPHASIS(x) (((x) >> 12) & 1) /* Compliance De-emphasis */
#define PCI_EXP_LNKSTA20x32/* Link Status */
#define PCI_EXP_LINKSTA2_DEEMPHASIS(x)((x) & 1)/* Current De-emphasis Level */
#define PCI_EXP_SLTCAP20x34/* Slot Capabilities */
#define PCI_EXP_SLTCTL20x38/* Slot Control */
#define PCI_EXP_SLTSTA20x3a/* Slot Status */
#define PCI_EXP_FLAGS0x2/* Capabilities register */
#define PCI_EXP_FLAGS_VERS0x000f/* Capability version */
#define PCI_EXP_FLAGS_TYPE0x00f0/* Device/Port type */
#define PCI_EXP_TYPE_ENDPOINT0x0/* Express Endpoint */
#define PCI_EXP_TYPE_LEG_END0x1/* Legacy Endpoint */
#define PCI_EXP_TYPE_ROOT_PORT 0x4/* Root Port */
#define PCI_EXP_TYPE_UPSTREAM0x5/* Upstream Port */
#define PCI_EXP_TYPE_DOWNSTREAM 0x6/* Downstream Port */
#define PCI_EXP_TYPE_PCI_BRIDGE 0x7/* PCI/PCI-X Bridge */
#define PCI_EXP_TYPE_PCIE_BRIDGE 0x8/* PCI/PCI-X to PCIE Bridge */
#define PCI_EXP_TYPE_ROOT_INT_EP 0x9/* Root Complex Integrated Endpoint */
#define PCI_EXP_TYPE_ROOT_EC 0xa/* Root Complex Event Collector */
#define PCI_EXP_FLAGS_SLOT0x0100/* Slot implemented */
#define PCI_EXP_FLAGS_IRQ0x3e00/* Interrupt message number */
#define PCI_EXP_DEVCAP0x4/* Device capabilities */
#define PCI_EXP_DEVCAP_PAYLOAD0x07/* Max_Payload_Size */
#define PCI_EXP_DEVCAP_PHANTOM0x18/* Phantom functions */
#define PCI_EXP_DEVCAP_EXT_TAG0x20/* Extended tags */
#define PCI_EXP_DEVCAP_L0S0x1c0/* L0s Acceptable Latency */
#define PCI_EXP_DEVCAP_L10xe00/* L1 Acceptable Latency */
#define PCI_EXP_DEVCAP_ATN_BUT0x1000/* Attention Button Present */
#define PCI_EXP_DEVCAP_ATN_IND0x2000/* Attention Indicator Present */
#define PCI_EXP_DEVCAP_PWR_IND0x4000/* Power Indicator Present */
#define PCI_EXP_DEVCAP_RBE0x8000/* Role-Based Error Reporting */
#define PCI_EXP_DEVCAP_PWR_VAL0x3fc0000 /* Slot Power Limit Value */
#define PCI_EXP_DEVCAP_PWR_SCL0xc000000 /* Slot Power Limit Scale */
#define PCI_EXP_DEVCAP_FLRESET0x10000000 /* Function-Level Reset */
#define PCI_EXP_DEVCTL0x8/* Device Control */
#define PCI_EXP_DEVCTL_CERE0x0001/* Correctable Error Reporting En. */
#define PCI_EXP_DEVCTL_NFERE0x0002/* Non-Fatal Error Reporting Enable */
#define PCI_EXP_DEVCTL_FERE0x0004/* Fatal Error Reporting Enable */
#define PCI_EXP_DEVCTL_URRE0x0008/* Unsupported Request Reporting En. */
#define PCI_EXP_DEVCTL_RELAXED0x0010/* Enable Relaxed Ordering */
#define PCI_EXP_DEVCTL_PAYLOAD0x00e0/* Max_Payload_Size */
#define PCI_EXP_DEVCTL_EXT_TAG0x0100/* Extended Tag Field Enable */
#define PCI_EXP_DEVCTL_PHANTOM0x0200/* Phantom Functions Enable */
#define PCI_EXP_DEVCTL_AUX_PME0x0400/* Auxiliary Power PM Enable */
#define PCI_EXP_DEVCTL_NOSNOOP0x0800/* Enable No Snoop */
#define PCI_EXP_DEVCTL_READRQ0x7000/* Max_Read_Request_Size */
#define PCI_EXP_DEVCTL_BCRE0x8000/* Bridge Configuration Retry Enable */
#define PCI_EXP_DEVCTL_FLRESET0x8000/* Function-Level Reset [bit shared with BCRE] */
#define PCI_EXP_DEVSTA0xa/* Device Status */
#define PCI_EXP_DEVSTA_CED0x01/* Correctable Error Detected */
#define PCI_EXP_DEVSTA_NFED0x02/* Non-Fatal Error Detected */
#define PCI_EXP_DEVSTA_FED0x04/* Fatal Error Detected */
#define PCI_EXP_DEVSTA_URD0x08/* Unsupported Request Detected */
#define PCI_EXP_DEVSTA_AUXPD0x10/* AUX Power Detected */
#define PCI_EXP_DEVSTA_TRPND0x20/* Transactions Pending */
#define PCI_EXP_LNKCAP0xc/* Link Capabilities */
#define PCI_EXP_LNKCAP_SPEED0x0000f/* Maximum Link Speed */
#define PCI_EXP_LNKCAP_WIDTH0x003f0/* Maximum Link Width */
#define PCI_EXP_LNKCAP_ASPM0x00c00/* Active State Power Management */
#define PCI_EXP_LNKCAP_L0S0x07000/* L0s Acceptable Latency */
#define PCI_EXP_LNKCAP_L10x38000/* L1 Acceptable Latency */
#define PCI_EXP_LNKCAP_CLOCKPM0x40000/* Clock Power Management */
#define PCI_EXP_LNKCAP_SURPRISE0x80000 /* Surprise Down Error Reporting */
#define PCI_EXP_LNKCAP_DLLA0x100000 /* Data Link Layer Active Reporting */
#define PCI_EXP_LNKCAP_LBNC0x200000 /* Link Bandwidth Notification Capability */
#define PCI_EXP_LNKCAP_PORT0xff000000 /* Port Number */
#define PCI_EXP_LNKCTL0x10/* Link Control */
#define PCI_EXP_LNKCTL_ASPM0x0003/* ASPM Control */
#define PCI_EXP_LNKCTL_RCB0x0008/* Read Completion Boundary */
#define PCI_EXP_LNKCTL_DISABLE0x0010/* Link Disable */
#define PCI_EXP_LNKCTL_RETRAIN0x0020/* Retrain Link */
#define PCI_EXP_LNKCTL_CLOCK0x0040/* Common Clock Configuration */
#define PCI_EXP_LNKCTL_XSYNCH0x0080/* Extended Synch */
#define PCI_EXP_LNKCTL_CLOCKPM0x0100/* Clock Power Management */
#define PCI_EXP_LNKCTL_HWAUTWD0x0200/* Hardware Autonomous Width Disable */
#define PCI_EXP_LNKCTL_BWMIE0x0400/* Bandwidth Mgmt Interrupt Enable */
#define PCI_EXP_LNKCTL_AUTBWIE0x0800/* Autonomous Bandwidth Mgmt Interrupt Enable */
#define PCI_EXP_LNKSTA0x12/* Link Status */
#define PCI_EXP_LNKSTA_SPEED0x000f/* Negotiated Link Speed */
#define PCI_EXP_LNKSTA_WIDTH0x03f0/* Negotiated Link Width */
#define PCI_EXP_LNKSTA_TR_ERR0x0400/* Training Error (obsolete) */
#define PCI_EXP_LNKSTA_TRAIN0x0800/* Link Training */
#define PCI_EXP_LNKSTA_SL_CLK0x1000/* Slot Clock Configuration */
#define PCI_EXP_LNKSTA_DL_ACT0x2000/* Data Link Layer in DL_Active State */
#define PCI_EXP_LNKSTA_BWMGMT0x4000/* Bandwidth Mgmt Status */
#define PCI_EXP_LNKSTA_AUTBW0x8000/* Autonomous Bandwidth Mgmt Status */
#define PCI_EXP_SLTCAP0x14/* Slot Capabilities */
#define PCI_EXP_SLTCAP_ATNB0x0001/* Attention Button Present */
#define PCI_EXP_SLTCAP_PWRC0x0002/* Power Controller Present */
#define PCI_EXP_SLTCAP_MRL0x0004/* MRL Sensor Present */
#define PCI_EXP_SLTCAP_ATNI0x0008/* Attention Indicator Present */
#define PCI_EXP_SLTCAP_PWRI0x0010/* Power Indicator Present */
#define PCI_EXP_SLTCAP_HPS0x0020/* Hot-Plug Surprise */
#define PCI_EXP_SLTCAP_HPC0x0040/* Hot-Plug Capable */
#define PCI_EXP_SLTCAP_PWR_VAL0x00007f80 /* Slot Power Limit Value */
#define PCI_EXP_SLTCAP_PWR_SCL0x00018000 /* Slot Power Limit Scale */
#define PCI_EXP_SLTCAP_INTERLOCK 0x020000 /* Electromechanical Interlock Present */
#define PCI_EXP_SLTCAP_NOCMDCOMP 0x040000 /* No Command Completed Support */
#define PCI_EXP_SLTCAP_PSN0xfff80000 /* Physical Slot Number */
#define PCI_EXP_SLTCTL0x18/* Slot Control */
#define PCI_EXP_SLTCTL_ATNB0x0001/* Attention Button Pressed Enable */
#define PCI_EXP_SLTCTL_PWRF0x0002/* Power Fault Detected Enable */
#define PCI_EXP_SLTCTL_MRLS0x0004/* MRL Sensor Changed Enable */
#define PCI_EXP_SLTCTL_PRSD0x0008/* Presence Detect Changed Enable */
#define PCI_EXP_SLTCTL_CMDC0x0010/* Command Completed Interrupt Enable */
#define PCI_EXP_SLTCTL_HPIE0x0020/* Hot-Plug Interrupt Enable */
#define PCI_EXP_SLTCTL_ATNI0x00c0/* Attention Indicator Control */
#define PCI_EXP_SLTCTL_PWRI0x0300/* Power Indicator Control */
#define PCI_EXP_SLTCTL_PWRC0x0400/* Power Controller Control */
#define PCI_EXP_SLTCTL_INTERLOCK 0x0800 /* Electromechanical Interlock Control */
#define PCI_EXP_SLTCTL_LLCHG0x1000/* Data Link Layer State Changed Enable */
#define PCI_EXP_SLTSTA0x1a/* Slot Status */
#define PCI_EXP_SLTSTA_ATNB0x0001/* Attention Button Pressed */
#define PCI_EXP_SLTSTA_PWRF0x0002/* Power Fault Detected */
#define PCI_EXP_SLTSTA_MRLS0x0004/* MRL Sensor Changed */
#define PCI_EXP_SLTSTA_PRSD0x0008/* Presence Detect Changed */
#define PCI_EXP_SLTSTA_CMDC0x0010/* Command Completed */
#define PCI_EXP_SLTSTA_MRL_ST0x0020/* MRL Sensor State */
#define PCI_EXP_SLTSTA_PRES0x0040/* Presence Detect State */
#define PCI_EXP_SLTSTA_INTERLOCK0x0080 /* Electromechanical Interlock Status */
#define PCI_EXP_SLTSTA_LLCHG0x0100/* Data Link Layer State Changed */
#define PCI_EXP_RTCTL0x1c/* Root Control */
#define PCI_EXP_RTCTL_SECEE0x0001/* System Error on Correctable Error */
#define PCI_EXP_RTCTL_SENFEE0x0002/* System Error on Non-Fatal Error */
#define PCI_EXP_RTCTL_SEFEE0x0004/* System Error on Fatal Error */
#define PCI_EXP_RTCTL_PMEIE0x0008/* PME Interrupt Enable */
#define PCI_EXP_RTCTL_CRSVIS0x0010/* Configuration Request Retry Status Visible to SW */
#define PCI_EXP_RTCAP0x1e/* Root Capabilities */
#define PCI_EXP_RTCAP_CRSVIS0x0010/* Configuration Request Retry Status Visible to SW */
#define PCI_EXP_RTSTA0x20/* Root Status */
#define PCI_EXP_RTSTA_PME_REQID 0x0000ffff /* PME Requester ID */
#define PCI_EXP_RTSTA_PME_STATUS 0x00010000 /* PME Status */
#define PCI_EXP_RTSTA_PME_PENDING 0x00020000 /* PME is Pending */
#define PCI_EXP_DEVCAP20x24/* Device capabilities 2 */
#define PCI_EXP_DEVCTL20x28/* Device Control */
#define PCI_EXP_DEV2_TIMEOUT_RANGE(x)((x) & 0xf) /* Completion Timeout Ranges Supported */
#define PCI_EXP_DEV2_TIMEOUT_VALUE(x)((x) & 0xf) /* Completion Timeout Value */
#define PCI_EXP_DEV2_TIMEOUT_DIS0x0010/* Completion Timeout Disable Supported */
#define PCI_EXP_DEV2_ARI0x0020/* ARI Forwarding */
#define PCI_EXP_DEVSTA20x2a/* Device Status */
#define PCI_EXP_LNKCAP20x2c/* Link Capabilities */
#define PCI_EXP_LNKCTL20x30/* Link Control */
#define PCI_EXP_LNKCTL2_SPEED(x)((x) & 0xf) /* Target Link Speed */
#define PCI_EXP_LNKCTL2_CMPLNC0x0010/* Enter Compliance */
#define PCI_EXP_LNKCTL2_SPEED_DIS0x0020/* Hardware Autonomous Speed Disable */
#define PCI_EXP_LNKCTL2_DEEMPHASIS(x)(((x) >> 6) & 1) /* Selectable De-emphasis */
#define PCI_EXP_LNKCTL2_MARGIN(x)(((x) >> 7) & 7) /* Transmit Margin */
#define PCI_EXP_LNKCTL2_MOD_CMPLNC0x0400/* Enter Modified Compliance */
#define PCI_EXP_LNKCTL2_CMPLNC_SOS0x0800/* Compliance SOS */
#define PCI_EXP_LNKCTL2_COM_DEEMPHASIS(x)(((x) >> 12) & 1) /* Compliance De-emphasis */
#define PCI_EXP_LNKSTA20x32/* Link Status */
#define PCI_EXP_LINKSTA2_DEEMPHASIS(x)((x) & 1)/* Current De-emphasis Level */
#define PCI_EXP_SLTCAP20x34/* Slot Capabilities */
#define PCI_EXP_SLTCTL20x38/* Slot Control */
#define PCI_EXP_SLTSTA20x3a/* Slot Status */
/* MSI-X */
#define PCI_MSIX_ENABLE0x8000
#define PCI_MSIX_MASK0x4000
#define PCI_MSIX_TABSIZE0x03ff
#define PCI_MSIX_TABLE4
#define PCI_MSIX_PBA8
#define PCI_MSIX_BIR0x7
#define PCI_MSIX_ENABLE0x8000
#define PCI_MSIX_MASK0x4000
#define PCI_MSIX_TABSIZE0x03ff
#define PCI_MSIX_TABLE4
#define PCI_MSIX_PBA8
#define PCI_MSIX_BIR0x7
/* Subsystem vendor/device ID for PCI bridges */
#define PCI_SSVID_VENDOR4
#define PCI_SSVID_DEVICE6
#define PCI_SSVID_VENDOR4
#define PCI_SSVID_DEVICE6
/* Advanced Error Reporting */
#define PCI_ERR_UNCOR_STATUS4/* Uncorrectable Error Status */
#define PCI_ERR_ROOT_SRC54
/* Virtual Channel */
#define PCI_VC_PORT_REG14
#define PCI_VC_PORT_REG28
#define PCI_VC_PORT_CTRL12
#define PCI_VC_PORT_STATUS14
#define PCI_VC_RES_CAP16
#define PCI_VC_RES_CTRL20
#define PCI_VC_RES_STATUS26
#define PCI_VC_PORT_REG14
#define PCI_VC_PORT_REG28
#define PCI_VC_PORT_CTRL12
#define PCI_VC_PORT_STATUS14
#define PCI_VC_RES_CAP16
#define PCI_VC_RES_CTRL20
#define PCI_VC_RES_STATUS26
/* Power Budgeting */
#define PCI_PWR_DSR4/* Data Select Register */
#define PCI_PWR_DATA8/* Data Register */
#define PCI_PWR_DSR4/* Data Select Register */
#define PCI_PWR_DATA8/* Data Register */
#define PCI_PWR_DATA_BASE(x)((x) & 0xff) /* Base Power */
#define PCI_PWR_DATA_SCALE(x)(((x) >> 8) & 3) /* Data Scale */
#define PCI_PWR_DATA_PM_SUB(x)(((x) >> 10) & 7) /* PM Sub State */
#define PCI_PWR_DATA_PM_STATE(x) (((x) >> 13) & 3) /* PM State */
#define PCI_PWR_DATA_TYPE(x)(((x) >> 15) & 7) /* Type */
#define PCI_PWR_DATA_RAIL(x)(((x) >> 18) & 7) /* Power Rail */
#define PCI_PWR_CAP12/* Capability */
#define PCI_PWR_CAP12/* Capability */
#define PCI_PWR_CAP_BUDGET(x)((x) & 1)/* Included in system budget */
/* Access Control Services */
#define PCI_ARI_CTRL0x06/* ARI Control Register */
#define PCI_ARI_CTRL_MFVC0x0001/* MFVC Function Groups Enable */
#define PCI_ARI_CTRL_ACS0x0002/* ACS Function Groups Enable */
#define PCI_ARI_CTRL_FG(x)(((x) >> 4) & 7) /* Function Group */
#define PCI_ARI_CTRL_FG(x)(((x) >> 4) & 7) /* Function Group */
/* Address Translation Service */
#define PCI_ATS_CAP0x04/* ATS Capability Register */
#define PCI_ATS_CAP_IQD(x)((x) & 0x1f) /* Invalidate Queue Depth */
#define PCI_ATS_CAP0x04/* ATS Capability Register */
#define PCI_ATS_CAP_IQD(x)((x) & 0x1f) /* Invalidate Queue Depth */
#define PCI_ATS_CTRL0x06/* ATS Control Register */
#define PCI_ATS_CTRL_STU(x)((x) & 0x1f) /* Smallest Translation Unit */
#define PCI_ATS_CTRL_ENABLE0x8000/* ATS Enable */
#define PCI_ATS_CTRL_STU(x)((x) & 0x1f) /* Smallest Translation Unit */
#define PCI_ATS_CTRL_ENABLE0x8000/* ATS Enable */
/* Single Root I/O Virtualization */
#define PCI_IOV_CAP0x04/* SR-IOV Capability Register */
#define PCI_IOV_CAP_VFM0x00000001 /* VF Migration Capable */
#define PCI_IOV_CAP_IMN(x)((x) >> 21) /* VF Migration Interrupt Message Number */
#define PCI_IOV_CTRL0x08/* SR-IOV Control Register */
#define PCI_IOV_CTRL_VFE0x0001/* VF Enable */
#define PCI_IOV_CTRL_VFME0x0002/* VF Migration Enable */
#define PCI_IOV_CTRL_VFMIE0x0004/* VF Migration Interrupt Enable */
#define PCI_IOV_CTRL_MSE0x0008/* VF MSE */
#define PCI_IOV_CTRL_ARI0x0010/* ARI Capable Hierarchy */
#define PCI_IOV_STATUS0x0a/* SR-IOV Status Register */
#define PCI_IOV_STATUS_MS0x0001/* VF Migration Status */
#define PCI_IOV_INITIALVF0x0c/* Number of VFs that are initially associated */
#define PCI_IOV_TOTALVF0x0e/* Maximum number of VFs that could be associated */
#define PCI_IOV_NUMVF0x10/* Number of VFs that are available */
#define PCI_IOV_FDL0x12/* Function Dependency Link */
#define PCI_IOV_OFFSET0x14/* First VF Offset */
#define PCI_IOV_STRIDE0x16/* Routing ID offset from one VF to the next one */
#define PCI_IOV_DID0x1a/* VF Device ID */
#define PCI_IOV_SUPPS0x1c/* Supported Page Sizes */
#define PCI_IOV_SYSPS0x20/* System Page Size */
#define PCI_IOV_BAR_BASE0x24/* VF BAR0, VF BAR1, ... VF BAR5 */
#define PCI_IOV_NUM_BAR6/* Number of VF BARs */
#define PCI_IOV_MSAO0x3c/* VF Migration State Array Offset */
#define PCI_IOV_MSA_BIR(x)((x) & 7) /* VF Migration State BIR */
#define PCI_IOV_CAP0x04/* SR-IOV Capability Register */
#define PCI_IOV_CAP_VFM0x00000001 /* VF Migration Capable */
#define PCI_IOV_CAP_IMN(x)((x) >> 21) /* VF Migration Interrupt Message Number */
#define PCI_IOV_CTRL0x08/* SR-IOV Control Register */
#define PCI_IOV_CTRL_VFE0x0001/* VF Enable */
#define PCI_IOV_CTRL_VFME0x0002/* VF Migration Enable */
#define PCI_IOV_CTRL_VFMIE0x0004/* VF Migration Interrupt Enable */
#define PCI_IOV_CTRL_MSE0x0008/* VF MSE */
#define PCI_IOV_CTRL_ARI0x0010/* ARI Capable Hierarchy */
#define PCI_IOV_STATUS0x0a/* SR-IOV Status Register */
#define PCI_IOV_STATUS_MS0x0001/* VF Migration Status */
#define PCI_IOV_INITIALVF0x0c/* Number of VFs that are initially associated */
#define PCI_IOV_TOTALVF0x0e/* Maximum number of VFs that could be associated */
#define PCI_IOV_NUMVF0x10/* Number of VFs that are available */
#define PCI_IOV_FDL0x12/* Function Dependency Link */
#define PCI_IOV_OFFSET0x14/* First VF Offset */
#define PCI_IOV_STRIDE0x16/* Routing ID offset from one VF to the next one */
#define PCI_IOV_DID0x1a/* VF Device ID */
#define PCI_IOV_SUPPS0x1c/* Supported Page Sizes */
#define PCI_IOV_SYSPS0x20/* System Page Size */
#define PCI_IOV_BAR_BASE0x24/* VF BAR0, VF BAR1, ... VF BAR5 */
#define PCI_IOV_NUM_BAR6/* Number of VF BARs */
#define PCI_IOV_MSAO0x3c/* VF Migration State Array Offset */
#define PCI_IOV_MSA_BIR(x)((x) & 7) /* VF Migration State BIR */
#define PCI_IOV_MSA_OFFSET(x)((x) & 0xfffffff8) /* VF Migration State Offset */
/*
*2:0 = function
*/
#define PCI_DEVFN(slot,func)((((slot) & 0x1f) << 3) | ((func) & 0x07))
#define PCI_SLOT(devfn)(((devfn) >> 3) & 0x1f)
#define PCI_FUNC(devfn)((devfn) & 0x07)
#define PCI_SLOT(devfn)(((devfn) >> 3) & 0x1f)
#define PCI_FUNC(devfn)((devfn) & 0x07)
/* Device classes and subclasses */
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#define tolower(c) (((c)>='A' && c<='Z')?((c) | 0x20):(c))
#include "libsaio.h"
#include "sl.h"
branches/iFabio/Chameleon/i386/libsaio/fake_efi.c
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/*
* Modern Darwin kernels require some amount of EFI because Apple machines all
* have EFI. Modifying the kernel source to not require EFI is of course
* have EFI. Modifying the kernel source to not require EFI is of course
* possible but would have to be maintained as a separate patch because it is
* unlikely that Apple wishes to add legacy support to their kernel.
*
* As you can see from the Apple-supplied code in bootstruct.c, it seems that
* the intention was clearly to modify this booter to provide EFI-like structures
* to the kernel rather than modifying the kernel to handle non-EFI stuff. This
* to the kernel rather than modifying the kernel to handle non-EFI stuff. This
* makes a lot of sense from an engineering point of view as it means the kernel
* for the as yet unreleased EFI-only Macs could still be booted by the non-EFI
* DTK systems so long as the kernel checked to ensure the boot tables were
* filled in appropriately. Modern xnu requires a system table and a runtime
* filled in appropriately.Modern xnu requires a system table and a runtime
* services table and performs no checks whatsoever to ensure the pointers to
* these tables are non-NULL.Therefore, any modern xnu kernel will page fault
* these tables are non-NULL. Therefore, any modern xnu kernel will page fault
* early on in the boot process if the system table pointer is zero.
*
* Even before that happens, the tsc_init function in modern xnu requires the FSB
*
* As of this writing, the current implementation found here is good enough
* to make the currently available xnu kernel boot without modification on a
* system with an appropriate processor. With a minor source modification to
* system with an appropriate processor. With a minor source modification to
* the tsc_init function to remove the explicit check for Core or Core 2
* processors the kernel can be made to boot on other processors so long as
* the code can be executed by the processor and the machine contains the
/*==========================================================================
* Utility function to make a device tree string from an EFI_GUID
*/
static inline char * mallocStringForGuid(EFI_GUID const *pGuid)
{
char *string = malloc(37);
/*==========================================================================
* Function to map 32 bit physical address to 64 bit virtual address
*/
static uint64_t ptov64(uint32_t addr)
{
return ((uint64_t)addr | 0xFFFFFF8000000000ULL);
* Because we build against modern headers with kBootArgsRevision 4 we
* also take care to set efiMode = 32.
*/
void setupEfiTables32(void)
{
// We use the fake_efi_pages struct so that we only need to do one kernel
#define SMBIOS_ANCHOR_UINT32_LE 0x5f4d535f
#define EFI_ACPI_TABLE_GUID \
{ \
{ \
0xeb9d2d30, 0x2d88, 0x11d3, { 0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
}
}
#define EFI_ACPI_20_TABLE_GUID \
{ \
{ \
0x8868e871, 0xe4f1, 0x11d3, { 0xbc, 0x22, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
}
}
EFI_GUID gEfiAcpiTableGuid = EFI_ACPI_TABLE_GUID;
EFI_GUID gEfiAcpi20TableGuid = EFI_ACPI_20_TABLE_GUID;
/*
* Get an smbios option string option to convert to EFI_CHAR16 string
*/
static EFI_CHAR16* getSmbiosChar16(const char * key, size_t* len)
{
const char*src = getStringForKey(key, &bootInfo->smbiosConfig);
/*
* Get the SystemID from the bios dmi info
*/
staticEFI_CHAR8* getSmbiosUUID()
{
static EFI_CHAR8 uuid[UUID_LEN];
* return a binary UUID value from the overriden SystemID and SMUUID if found,
* or from the bios if not, or from a fixed value if no bios value is found
*/
static EFI_CHAR8* getSystemID()
{
// unable to determine UUID for host. Error: 35 fix
* Must be called AFTER setup Acpi because we need to take care of correct
* facp content to reflect in ioregs
*/
void setupSystemType()
{
Node *node = DT__FindNode("/", false);
/*
* Must be called AFTER getSmbios
*/
void setupBoardId()
{
Node *node;
node = DT__FindNode("/", false);
if (node == 0) {
stop("Couldn't get root node");
}
const char *boardid = getStringForKey("SMboardproduct", &bootInfo->smbiosConfig);
if (boardid)
DT__AddProperty(node, BOARDID_PROP, strlen(boardid)+1, (EFI_CHAR16*)boardid);
}
Node *node;
node = DT__FindNode("/", false);
if (node == 0) {
stop("Couldn't get root node");
}
const char *boardid = getStringForKey("SMboardproduct", &bootInfo->smbiosConfig);
if (boardid)
DT__AddProperty(node, BOARDID_PROP, strlen(boardid)+1, (EFI_CHAR16*)boardid);
}
/*
* Load the smbios.plist override config file if any
*/
static void setupSmbiosConfigFile(const char *filename)
{
chardirSpecSMBIOS[128] = "";
// get a chance to scan mem dynamically if user asks for it while having the config options loaded as well,
// as opposed to when it was in scan_platform(); also load the orig. smbios so that we can access dmi info without
// patching the smbios yet
scan_mem();
}
/*
* Installs all the needed configuration table entries
*/
static void setupEfiConfigurationTable()
{
smbios_p = (EFI_PTR32)getSmbios(SMBIOS_PATCHED);
/*
* Entrypoint from boot.c
*/
void setupFakeEfi(void)
{
// Generate efi device strings
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extern int ebioswrite(int dev, long sec, int count);
extern int get_drive_info(int drive, struct driveInfo *dp);
extern int ebiosEjectMedia(int biosdev);
extern void putc(int ch);
extern void bios_putchar(int ch);
extern void putca(int ch, int attr, int repeat);
extern int getc(void);
extern void pause();
extern bool gErrors;
extern void initBooterLog(void);
extern void setupBooterLog(void);
extern void putchar(int ch);
extern int putchar(int ch);
extern int getchar(void);
extern void msglog(const char * format, ...);
extern int printf(const char *format, ...);
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{
currentIndicator = 0;
}
putc(indicator[currentIndicator++]);
putc('\b');
putchar(indicator[currentIndicator++]);
putchar('\b');
}
}
{
if ( getVideoMode() == VGA_TEXT_MODE )
{
putc(' ');
putc('\b');
putchar(' ');
putchar('\b');
}
}
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IMGSKELROOT = $(SRCROOT)/imgskel
CDBOOT = ${IMGROOT}/usr/standalone/i386/cdboot
VPATH = $(SYMROOT)
#Makefile for i386 boot program
#define FLOPPY and SMALL using DEFINES macro as necessary
-fno-builtin -DSAIO_INTERNAL_USER -static $(OMIT_FRAME_POINTER_CFLAG) \
-mpreferred-stack-boundary=2 -fno-align-functions -fno-stack-protector \
-march=pentium4 -msse2 -mfpmath=sse -msoft-float -nostdinc -include $(SRCROOT)/autoconf.h
CPPFLAGS := $(CPPFLAGS) -nostdinc++ -include $(SRCROOT)/autoconf.h
DEFINES=
# The ordering is important;
# boot2.o must be first.
OBJS = boot2.o boot.o graphics.o drivers.o prompt.o options.o lzss.o mboot.o \
ramdisk.o picopng.o resume.o bmdecompress.o graphic_utils.o gui.o modules.o modules_support.o
ramdisk.o picopng.o resume.o bmdecompress.o graphic_utils.o gui.o modules.o modules_support.o boot_modules.o
# button.o browser.o scrollbar.o == NOTYET
UTILDIR = ../util
PATCH_ADDR = $(shell echo ${SYMBOL_ADDR}-${DATA_ADDR}+${DATA_OFFSET} | bc)
all: $(DIRS_NEEDED) boot
ifeq (${CONFIG_EMBED_THEME}, y)
endif
@${MKDIRS} $(OBJROOT)/../boot2_modules/
@echo "\t[LD] boot.sys"
@$(CC) -static -Wl,-preload -Wl,-segaddr,__INIT,$(BOOT2ADDR) \
-nostdlib -arch i386 -Wl,-segalign,20 \
-o $(SYMROOT)/boot.sys $(filter %.o,$^) $(LIBS) -lcc_kext
@$(CC) -Wl,-segaddr,__INIT,$(BOOT2ADDR) -Wl,-segalign,20 -Wl,-preload \
-nostdlib -arch i386 -static \
-o $(SYMROOT)/boot.sys $(filter %.o,$^) `find $(OBJROOT)/../boot2_modules/ -name \*.o` $(LIBS) -lcc_kext
ifeq (${CONFIG_MODULES}, y)
@$(CC) -static -Wl,-preload -Wl,-segaddr,__INIT,$(BOOT2ADDR) \
-nostdlib -arch i386 -Wl,-segalign,20 \
-Wl,-sectcreate,__DATA,__Symbols,$(SYMROOT)/Symbols.dylib \
-o $(SYMROOT)/boot.sys $(filter %.o,$^) $(LIBS) -lcc_kext
-o $(SYMROOT)/boot.sys $(filter %.o,$^) `find $(OBJROOT)/../boot2_modules/ -name \*.o` $(LIBS) -lcc_kext
@# Second pass, fixup global var locations
@${RM} $(SYMROOT)/${SYMBOLS_MODULE}
@$(CC) -static -Wl,-preload -Wl,-segaddr,__INIT,$(BOOT2ADDR) \
-nostdlib -arch i386 -Wl,-segalign,20 \
-Wl,-sectcreate,__DATA,__Symbols,$(SYMROOT)/Symbols.dylib \
-o $(SYMROOT)/boot.sys $(filter %.o,$^) $(LIBS) -lcc_kext
-o $(SYMROOT)/boot.sys $(filter %.o,$^) `find $(OBJROOT)/../boot2_modules/ -name \*.o` $(LIBS) -lcc_kext
@$(LD) -arch i386 \
-undefined dynamic_lookup \
-macosx_version_min 10.6 \
-o $(OBJROOT)/Symbols_LINKER_ONLY.dylib
endif
@make embed_symbols# this is done in a sub process after boot.sys exists so the strings are populated correctly
@${RM} $(SYMROOT)/boot2.sys
@##size $(SYMROOT)/boot.sys
@ls -l $(SYMROOT)/boot
@( size=`ls -l $(SYMROOT)/boot | awk '{ print $$5}'` ; \
exit 1;\
fi)
embed_symbols:
ifeq (${CONFIG_MODULES}, y)
@echo ================= Embedding Symbols.dylib =================
@echo "\t[MACHOCONV] boot"
@$(SYMROOT)/machOconv $(SYMROOT)/boot.sys $(SYMROOT)/boot
$(SYMROOT)/vers.h:
@echo "#define I386BOOT_VERSION \"5.0.132\"" > $(SYMROOT)/vers.h
@echo "#define I386BOOT_BUILDDATE \"`date \"+%Y-%m-%d %H:%M:%S\"`\"" >> $(SYMROOT)/vers.h
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static int ExecKernel(void *binary)
{
entry_t kernelEntry;
int ret;
bootArgs->kaddr = bootArgs->ksize = 0;
entry_t kernelEntry;
int ret;
bootArgs->kaddr = bootArgs->ksize = 0;
execute_hook("ExecKernel", (void*)binary, NULL, NULL, NULL);
ret = DecodeKernel(binary,
&kernelEntry,
(char **) &bootArgs->kaddr,
(int *)&bootArgs->ksize );
if ( ret != 0 )
return ret;
// Reserve space for boot args
reserveKernBootStruct();
ret = DecodeKernel(binary,
&kernelEntry,
(char **) &bootArgs->kaddr,
(int *)&bootArgs->ksize );
if ( ret != 0 )
return ret;
// Reserve space for boot args
reserveKernBootStruct();
// Notify modules that the kernel has been decoded
execute_hook("DecodedKernel", (void*)binary, NULL, NULL, NULL);
// Load boot drivers from the specifed root path.
if (!gHaveKernelCache)
// Load boot drivers from the specifed root path.
if (!gHaveKernelCache)
LoadDrivers("/");
clearActivityIndicator();
if (gErrors) {
printf("Errors encountered while starting up the computer.\n");
printf("Pausing %d seconds...\n", kBootErrorTimeout);
sleep(kBootErrorTimeout);
}
setupFakeEfi();
md0Ramdisk();
verbose("Starting Darwin %s\n",( archCpuType == CPU_TYPE_I386 ) ? "x86" : "x86_64");
// Cleanup the PXE base code.
if ( (gBootFileType == kNetworkDeviceType) && gUnloadPXEOnExit ) {
clearActivityIndicator();
if (gErrors) {
printf("Errors encountered while starting up the computer.\n");
printf("Pausing %d seconds...\n", kBootErrorTimeout);
sleep(kBootErrorTimeout);
}
setupFakeEfi();
md0Ramdisk();
verbose("Starting Darwin %s\n",( archCpuType == CPU_TYPE_I386 ) ? "x86" : "x86_64");
// Cleanup the PXE base code.
if ( (gBootFileType == kNetworkDeviceType) && gUnloadPXEOnExit ) {
if ( (ret = nbpUnloadBaseCode()) != nbpStatusSuccess )
{
printf("nbpUnloadBaseCode error %d\n", (int) ret);
sleep(2);
}
}
bool dummyVal;
{
printf("nbpUnloadBaseCode error %d\n", (int) ret);
sleep(2);
}
}
bool dummyVal;
if (getBoolForKey(kWaitForKeypressKey, &dummyVal, &bootInfo->bootConfig) && dummyVal) {
printf("Press any key to continue...");
getc();
}
usb_loop();
execute_hook("Kernel Start", (void*)kernelEntry, (void*)bootArgs, NULL, NULL);// Notify modules that the kernel is about to be started
// If we were in text mode, switch to graphics mode.
// This will draw the boot graphics unless we are in
// verbose mode.
if(gVerboseMode)
setVideoMode( GRAPHICS_MODE, 0 );
else
drawBootGraphics();
// If we were in text mode, switch to graphics mode.
// This will draw the boot graphics unless we are in
// verbose mode.
if(gVerboseMode)
setVideoMode( GRAPHICS_MODE, 0 );
else
drawBootGraphics();
setupBooterLog();
finalizeBootStruct();
finalizeBootStruct();
if (checkOSVersion("10.7")) {
// Masking out so that Lion doesn't doublefault
outb(0x21, 0xff); /* Maskout all interrupts Pic1 */
outb(0xa1, 0xff); /* Maskout all interrupts Pic2 */
outb(0x21, 0xff);/* Maskout all interrupts Pic1 */
outb(0xa1, 0xff);/* Maskout all interrupts Pic2 */
// Jump to kernel's entry point. There's no going back now.
startprog( kernelEntry, bootArgsPreLion );
}
// Not reached
return 0;
// Not reached
return 0;
}
//==========================================================================
else if (checkOSVersion("10.6")) {
sprintf(gBootKernelCacheFile, "kernelcache_%s", (archCpuType == CPU_TYPE_I386) ? "i386" : "x86_64");
int lnam = sizeof(gBootKernelCacheFile) + 9; //with adler32
//Slice - TODO
/*
- but the name is longer .adler32 and more...
kernelcache_i386.E102928C.qSs0
so will opendir and scan for some files
*/
//Slice - TODO ???
// e.g. kernelcache_i386.E102928C.qSs0 = "unsaved" cache file.
//
// See kext_tools-180.2.1/kextcache_main.c:
// "Source directory has changed since starting; "
// "not saving cache file %s."
// or
// "Source kernel has changed since starting; "
// "not saving cache file %s."
char* name;
long prev_time = 0;
do {
if (trycache) {
bootFile = gBootKernelCacheFile;
verbose("Loading kernel cache %s\n", bootFile);
if (checkOSVersion("10.7")) {
ret = LoadThinFatFile(bootFile, &binary);
}
ret = LoadFile(bootFile);
binary = (void *)kLoadAddr;
}
if (ret >= 0)
break;
verbose("Kernel cache did not loaded %s\n ", bootFile);
}
bootFile = bootInfo->bootFile;
// Try to load kernel image from alternate locations on boot helper partitions.
ret = LoadThinFatFile(bootFileSpec, &binary);
}
}
} while (0);
clearActivityIndicator();
// chainboot
if (status==1) {
if (getVideoMode() == GRAPHICS_MODE) {// if we are already in graphics-mode,
setVideoMode(VGA_TEXT_MODE, 0);// switch back to text mode
}
if (getVideoMode() == GRAPHICS_MODE) {// if we are already in graphics-mode,
setVideoMode(VGA_TEXT_MODE, 0);// switch back to text mode
}
}
if ((gBootFileType == kNetworkDeviceType) && gUnloadPXEOnExit) {
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#define kWaitForKeypressKey"Wait"
#define kUseAtiROM"UseAtiROM"/* ati.c */
#define kAtiConfig"AtiConfig"/* ati.c */
#define kATYbinimage"ATYbinimage"/* ati.c */
#define kProductVersion"ProductVersion"/* boot.c */
#define karch"arch"/* boot.c */
#define kUseKernelCache"UseKernelCache"/* boot.c */
#define kDSDT"DSDT"/* acpi_patcher.c */
#define kDropSSDT"DropSSDT"/* acpi_patcher.c */
#define kRestartFix"RestartFix"/* acpi_patcher.c */
#define kGeneratePStates"GeneratePStates"/* acpi_patcher.c */
#define kGenerateCStates"GenerateCStates"/* acpi_patcher.c */
#define kEnableC2States"EnableC2State"/* acpi_patcher.c */
extern void spinActivityIndicator();
extern void clearActivityIndicator();
extern void drawColorRectangle( unsigned short x,
unsigned short y,
unsigned short width,
unsigned short height,
unsigned char colorIndex );
unsigned short y,
unsigned short width,
unsigned short height,
unsigned char colorIndex );
extern void drawDataRectangle( unsigned short x,
unsigned short y,
unsigned short width,
unsigned short height,
unsigned char * data );
unsigned short y,
unsigned short width,
unsigned short height,
unsigned char * data );
extern int
convertImage( unsigned short width,
unsigned short height,
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#include "boot.h"
#include "bootstruct.h"
#include "modules.h"
#include "boot_modules.h"
#if CONFIG_MODULE_DEBUG
*/
int init_module_system()
{
// Start any modules that were compiled in first.
start_built_in_modules();
int retVal = 0;
void (*module_start)(void) = NULL;
char* module_data = symbols_module_start + BOOT2_ADDR;
return retVal;
}
void start_built_in_module(char* name, void(*start_function)(void))
{
start_function();
// Notify the module system that this module really exists, specificaly, let other module link with it
module_loaded(name /*, moduleName, moduleVersion, moduleCompat*/);
}
/*
* Load all modules in the /Extra/modules/ directory
* Module depencdies will be loaded first
branches/iFabio/Chameleon/i386/boot2/modules.h
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*
*/
#include <saio_types.h>
#include <mach-o/loader.h>
#include <mach-o/nlist.h>
int init_module_system();
void load_all_modules();
void start_built_in_module(char* name, void(*start_function)(void));
int load_module(char* module);
/********************************************************************************/
void dyld_stub_binder();
#endif /* __BOOT_MODULES_H */
#endif /* __BOOT_MODULES_H */
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static bool infoMenuNativeBoot = false;
static unsigned long screen_params[4] = {DEFAULT_SCREEN_WIDTH, DEFAULT_SCREEN_HEIGHT, 32, 0};// here we store the used screen resolution
// here we store the used screen resolution
static unsigned long screen_params[4] = {DEFAULT_SCREEN_WIDTH, DEFAULT_SCREEN_HEIGHT, 32, 0};
static int getImageIndexByName(const char *name)
{
int result;
// NOTE: This algorithm assumes that the embedded images are sorted.
// This is currently done using the make file. If the array is ever
// manually generated, this *will* fail to work properly.
// This is currently done using the make file. If the array is
// generated manualy, this *will* fail to work properly.
while((result = strcmp(name, embeddedImages[compareIndex].name)) != 0)
{
if(result > 0)// We need to search a HIGHER index
if (result > 0)// We need to search a HIGHER index
{
if(compareIndex != lowerLimit)
if (compareIndex != lowerLimit)
{
lowerLimit = compareIndex;
}
}
else // We Need to search a LOWER index
{
if(compareIndex != upperLimit)
if (compareIndex != upperLimit)
{
upperLimit = compareIndex;
}
char * last_str;
};
static void
sputc(int c, struct putc_info * pi)
static int
sputc(int c, struct putc_info * pi) //Azi: exists on console.c & printf.c
{
if (pi->last_str)
if (pi->str == pi->last_str) {
*(pi->str) = '\0';
return;
return 0;
}
*(pi->str)++ = c;
return c;
}
int gprintf( window_t * window, const char * fmt, ...)
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default:
if (isxdigit(key & kASCIIKeyMask) && digitsI < 2) {
putc(key & kASCIIKeyMask);
putchar(key & kASCIIKeyMask);
digits[digitsI++] = key & kASCIIKeyMask;
} else {
// TODO: Beep or something
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config: $(DIRS_NEEDED) $(SYMPROG)
@cd ${SRCROOT} && $(SYMPROG) $(SRCROOT)/Cconfig
rebuild_config: $(DIRS_NEEDED) $(SYMPROG)
@cd ${SRCROOT} && $(SYMPROG) $(SRCROOT)/Cconfig rebuild
.PHONY: config
#dependencies
-include $(OBJROOT)/Makedep
-include $(OBJROOT)/Makedep
branches/iFabio/Chameleon/i386/modules/Resolution/Makefile
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MODULE_NAME = Resolution
MODULE_VERSION = "1.0.0"
MODULE_COMPAT_VERSION = "1.0.0"
MODULE_START = _$(MODULE_NAME)_start
MODULE_START = $(MODULE_NAME)_start
MODULE_DEPENDENCIES =
MODULE_OBJS = Resolution.o edid.o 915resolution.o
OPTIM = -Os -Oz
DEBUG = -DNOTHING
#DEBUG = -DDEBUG_HELLO_WORLD=1
CFLAGS= $(RC_CFLAGS) $(OPTIM) $(MORECPP) -arch i386 -g -Wmost \
-D__ARCHITECTURE__=\"i386\" -DSAIO_INTERNAL_USER \
-DRCZ_COMPRESSED_FILE_SUPPORT $(DEBUG) \
-fno-builtin $(OMIT_FRAME_POINTER_CFLAG) \
-mpreferred-stack-boundary=2 -fno-align-functions -fno-stack-protector \
-march=pentium4 -msse2 -mfpmath=sse -msoft-float -fno-common
DEFINES=
CONFIG = hd
INC = -I. -I.. -I$(SYMROOT) -I$(UTILDIR) -I$(LIBSADIR) -I$(LIBSAIODIR) -I$(BOOT2DIR)
ifneq "" "$(wildcard /bin/mkdirs)"
MKDIRS = /bin/mkdirs
else
MKDIRS = /bin/mkdir -p
endif
AS = as
LD = ld
# LIBS= -lc_static
LIBS=
VPATH = $(OBJROOT):$(SYMROOT)
SFILES =
CFILES =
HFILES =
EXPORTED_HFILES =
INSTALLED_HFILES =
OTHERFILES = Makefile
ALLSRC = $(SFILES) $(CFILES) \
$(HFILES) $(OTHERFILES)
DIRS_NEEDED = $(OBJROOT) $(SYMROOT)
all embedtheme optionrom: dylib
include ../MakeInc.dir
include ../MakeInc.dir
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IMGSKELROOT = $(SRCROOT)/imgskel
CDBOOT = ${IMGROOT}/usr/standalone/i386/cdboot
ifeq ($(BUILT_IN),yes)
override OBJROOT = $(SRCROOT)/obj/i386/boot2_modules/$(DIR)
override SYMROOT = $(SRCROOT)/sym/i386/
endif
include ${SRCROOT}/Make.rules
UTILDIR = ../../util
LIBSADIR = ../../libsa
LIBSAIODIR = ../../libsaio
BOOT2DIR = ../../boot2
ifeq ($(BUILT_IN),yes)
INC = -I$(SRCROOT)/i386/modules/include/ -Iinclude/ -I$(SRCROOT)/i386/modules/module_includes/ -I$(SRCROOT)/i386/libsaio/ -I$(SRCROOT)/i386/libsa/ -I$(SRCROOT)/i386/include/ -I$(SRCROOT)/i386/boot2/
DEFINES := -D__KLIBC__ $(DEFINES)
CFLAGS:= $(RC_CFLAGS) $(OPTIM) $(MORECPP) -arch i386 -g -Wmost -Werror \
-fno-builtin -DSAIO_INTERNAL_USER -static $(OMIT_FRAME_POINTER_CFLAG) \
-mpreferred-stack-boundary=2 -fno-align-functions -fno-stack-protector \
-march=pentium4 -msse2 -mfpmath=sse -msoft-float -nostdinc -include $(SRCROOT)/autoconf.h
CPPFLAGS := $(CPPFLAGS) -arch i386 -static -nostdinc++ -Wmost -Werror \
-fno-builtin -mpreferred-stack-boundary=2 \
-fno-align-functions -fno-stack-protector \
-march=pentium4 -msse2 -mfpmath=sse -msoft-float \
-arch i386 -include $(SRCROOT)/autoconf.h
else
CFLAGS := $(CLFAGS) -nostdinc -Wmost -Werror \
-fno-builtin -mpreferred-stack-boundary=2 \
-fno-align-functions -fno-stack-protector \
-march=pentium4 -msse2 -mfpmath=sse -msoft-float \
-arch i386 -include $(SRCROOT)/autoconf.h
endif
UTILDIR = ../../util
LIBSADIR = ../../libsa
LIBSAIODIR = ../../libsaio
BOOT2DIR = ../../boot2
INC = -I$(SRCROOT)/i386/modules/include/ -Iinclude/ -I$(SRCROOT)/i386/modules/module_includes/ -I$(SRCROOT)/i386/libsaio/ -I$(SRCROOT)/i386/libsa/ -I$(SRCROOT)/i386/include/ -I$(SRCROOT)/i386/boot2/
DEFINES := -D__KLIBC__ $(DEFINES)
MODULE_DEPENDENCIES := $(foreach x,$(MODULE_DEPENDENCIES),-weak_library $(SYMROOT)/modules/$(x).dylib)
INSTALLDIR = $(DSTROOT)/System/Library/Frameworks/System.framework/Versions/B/PrivateHeaders/standalone
##$(error DEFINED AS $(MODULE_DEFINITION))
MODULE_DEFINITION := $(CONFIG_$(shell echo $(MODULE_NAME) | tr '[:lower:]' '[:upper:]')_MODULE)
ifeq ($(MODULE_DEFINITION),m)
ifneq ($(BUILT_IN),yes)
# Make this as a *MODULE*
all: dylib
else
# Module not selected to be compiled as a module
all:
endif
else
ifeq ($(MODULE_DEFINITION),y)
ifeq ($(BUILT_IN),yes)
# Make this *BUILT IN*
all: ${OBJROOT} ${SYMROOT}/modules/ ${OBJROOT} $(addprefix $(OBJROOT)/, ${MODULE_OBJS}) $(SYMROOT)/boot_modules.h $(SYMROOT)/boot_modules.c
else
# Module not selected to be built in
all:
endif
else
# Don't compile this module
all:
endif
endif
dylib: ${SYMROOT}/modules/ ${OBJROOT} $(addprefix $(OBJROOT)/, ${MODULE_OBJS}) $(SYMROOT)/modules/$(MODULE_NAME).dylib
$(SYMROOT)/modules/$(MODULE_NAME).dylib:
@echo "\t[LD] $(MODULE_NAME).dylib"
@ld -arch i386 \
-alias $(MODULE_START) start \
-alias _$(MODULE_START) start \
-dylib -read_only_relocs suppress \
-S -x -Z -dead_strip_dylibs \
-no_uuid \
.PHONY: $(SYMROOT)/boot_modules.h
.PHONY: $(SYMROOT)/boot_modules.c
$(SYMROOT)/boot_modules.c:
@echo "\tstart_built_in_module(\"$(MODULE_NAME)\", &$(MODULE_START));" >> $@
$(SYMROOT)/boot_modules.h:
@echo "void $(MODULE_START)(); // $(MODULE_NAME)" >> $@
#dependencies
#-include $(OBJROOT)/Makedep
-include $(OBJROOT)/Makedep
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{
}
void _exit()
void _exit(int status)
{
stop("exit() called\n");
while(1) halt(); // this is never reached
}
char __toupper(char c)
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MODULE_NAME = klibc
MODULE_VERSION = "1.5.20"
MODULE_COMPAT_VERSION = "1.5.20"
MODULE_START = _$(MODULE_NAME)_start
MODULE_START = $(MODULE_NAME)_start
MODULE_DEPENDENCIES =
DIR = klibc
__lshrdi3.o __moddi3.o __modsi3.o __udivdi3.o \
__udivmoddi4.o __udivmodsi4.o __udivsi3.o \
__umoddi3.o __umodsi3.o \
strntoumax.o strntoimax.o atoi.o atol.o atoll.o \
strcasecmp.o strncasecmp.o strdup.o strlcat.o strndup.o strnlen.o \
strntoumax.o strntoimax.o atol.o atoll.o \
strcasecmp.o strncasecmp.o strlcat.o strndup.o strnlen.o \
strsep.o strtoimax.o strtok_r.o strtok.o strtol.o strtoll.o strtotimespec.o strtotimeval.o \
strtoul.o strtoull.o strtoumax.o strxspn.o strpbrk.o \
bsearch.o calloc.o \
qsort.o sha1hash.o onexit.o atexit.o exit.o \
snprintf.o vsnprintf.o sscanf.o vsscanf.o\
OPTIM = -Os -Oz
DEBUG = -DNOTHING
#DEBUG = -DDEBUG_HELLO_WORLD=1
CFLAGS= $(RC_CFLAGS) $(OPTIM) $(MORECPP) -arch i386 -g -Wmost \
-D__ARCHITECTURE__=\"i386\" -DSAIO_INTERNAL_USER \
-DRCZ_COMPRESSED_FILE_SUPPORT $(DEBUG) \
-fno-builtin $(OMIT_FRAME_POINTER_CFLAG) \
-mpreferred-stack-boundary=2 -fno-align-functions -fno-stack-protector \
-march=pentium4 -msse2 -mfpmath=sse -msoft-float -fno-common
DEFINES=
CONFIG = hd
INC = -I. -I.. -I$(SYMROOT) -I$(UTILDIR) -I$(LIBSADIR) -I$(LIBSAIODIR) -I$(BOOT2DIR)
ifneq "" "$(wildcard /bin/mkdirs)"
MKDIRS = /bin/mkdirs
else
MKDIRS = /bin/mkdir -p
endif
AS = as
LD = ld
# LIBS= -lc_static
LIBS=
VPATH = $(OBJROOT):$(SYMROOT)
SFILES =
CFILES =
HFILES =
EXPORTED_HFILES =
INSTALLED_HFILES =
OTHERFILES = Makefile
ALLSRC = $(SFILES) $(CFILES) \
$(HFILES) $(OTHERFILES)
DIRS_NEEDED = $(OBJROOT) $(SYMROOT)
all embedtheme optionrom: dylib
include ../MakeInc.dir
include ../MakeInc.dir
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MODULE_NAME = uClibc++
MODULE_NAME = uClibcxx
MODULE_VERSION = "0.2.2"
MODULE_COMPAT_VERSION = "0.2.2"
MODULE_START = _uClibcxx_start
MODULE_START = $(MODULE_NAME)_start
MODULE_DEPENDENCIES = klibc
DIR = uClibc++
utility.o valarray.o vector.o support.o \
ios.o iostream.o istream.o ostream.o
OPTIM = -Os -Oz
DEBUG = -DNOTHING
#DEBUG = -DDEBUG_HELLO_WORLD=1
CFLAGS= $(RC_CFLAGS) $(OPTIM) $(MORECPP) -arch i386 -g -Wmost \
-D__ARCHITECTURE__=\"i386\" -DSAIO_INTERNAL_USER \
-DRCZ_COMPRESSED_FILE_SUPPORT $(DEBUG) \
-fno-builtin $(OMIT_FRAME_POINTER_CFLAG) \
-mpreferred-stack-boundary=2 -fno-align-functions -fno-stack-protector \
-march=pentium4 -msse2 -mfpmath=sse -msoft-float -fno-common
DEFINES=
CONFIG = hd
INC = -I. -I.. -I$(SYMROOT) -I$(UTILDIR) -I$(LIBSADIR) -I$(LIBSAIODIR) -I$(BOOT2DIR) -Iinclude
ifneq "" "$(wildcard /bin/mkdirs)"
MKDIRS = /bin/mkdirs
else
MKDIRS = /bin/mkdir -p
endif
AS = as
LD = ld
# LIBS= -lc_static
LIBS=
VPATH = $(OBJROOT):$(SYMROOT)
SFILES =
CFILES =
HFILES =
EXPORTED_HFILES =
INSTALLED_HFILES =
OTHERFILES = Makefile
ALLSRC = $(SFILES) $(CFILES) \
$(HFILES) $(OTHERFILES)
DIRS_NEEDED = $(OBJROOT) $(SYMROOT)
all embedtheme optionrom: dylib
include ../MakeInc.dir
include ../MakeInc.dir
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source "i386/modules/klibc/Cconfig"
source "i386/modules/uClibc++/Cconfig"
source "i386/modules/HelloWorld/Cconfig"
endmenu
source "i386/modules/AMDGraphicsEnabler/Cconfig"
source "i386/modules/ATiGraphicsEnabler/Cconfig"
source "i386/modules/IntelGraphicsEnabler/Cconfig"
source "i386/modules/NVIDIAGraphicsEnabler/Cconfig"
endmenu
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MODULE_NAME = HelloWorld
MODULE_VERSION = "1.0.0"
MODULE_COMPAT_VERSION = "1.0.0"
#MODULE_START = _$(MODULE_NAME)_start
#MODULE_START = $(MODULE_NAME)_start
MODULE_START = __Z16HelloWorld_startv
MODULE_DEPENDENCIES = uClibc++
MODULE_OBJS = HelloWorld.o
OPTIM = -Os -Oz
DEBUG = -DNOTHING
#DEBUG = -DDEBUG_HELLO_WORLD=1
CFLAGS= $(RC_CFLAGS) $(OPTIM) $(MORECPP) -arch i386 -g -Wmost \
-D__ARCHITECTURE__=\"i386\" -DSAIO_INTERNAL_USER \
-DRCZ_COMPRESSED_FILE_SUPPORT $(DEBUG) \
-fno-builtin $(OMIT_FRAME_POINTER_CFLAG) \
-mpreferred-stack-boundary=2 -fno-align-functions -fno-stack-protector \
-march=pentium4 -msse2 -mfpmath=sse -msoft-float -fno-common
DEFINES=
CONFIG = hd
INC = -I. -I.. -I$(SYMROOT) -I$(UTILDIR) -I$(LIBSADIR) -I$(LIBSAIODIR) -I$(BOOT2DIR)
LIBS=
VPATH = $(OBJROOT):$(SYMROOT)
SFILES =
CFILES =
HFILES =
EXPORTED_HFILES =
INSTALLED_HFILES =
OTHERFILES = Makefile
ALLSRC = $(SFILES) $(CFILES) \
$(HFILES) $(OTHERFILES)
DIRS_NEEDED = $(OBJROOT) $(SYMROOT)
all embedtheme optionrom: dylib
include ../MakeInc.dir
include ../MakeInc.dir
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include ${SRCROOT}/Make.rules
# The order of building is important.
SUBDIRS = klibc uClibc++ Resolution
SUBDIRS = klibc uClibc++ Resolution HelloWorld \
ATiGraphicsEnabler AMDGraphicsEnabler NVIDIAGraphicsEnabler IntelGraphicsEnabler
CFLAGS= -O3 $(MORECPP) -arch i386 -g -static
ifeq (${CONFIG_MODULES}, y)
all install: $(SYMROOT) $(OBJROOT) objroot_dirs
all: $(SYMROOT) $(OBJROOT) objroot_dirs $(SYMROOT)/boot_modules.c $(SYMROOT)/boot_modules.h
@for i in ${SUBDIRS}; \
do \
echo ================= make $@ for $$i =================; \
"RC_CFLAGS=$(RC_CFLAGS)" $@ \
) || exit $$?; \
done
@# Finish up boot_modules.c
@echo "}" >> $(SYMROOT)/boot_modules.c
else
all:
all: $(SYMROOT) $(OBJROOT) objroot_dirs $(SYMROOT)/boot_modules.c $(SYMROOT)/boot_modules.h
@# Finish up boot_modules.c
@echo "}" >> $(SYMROOT)/boot_modules.c
endif
.PHONY: objroot_dirs
.PHONY: $(SYMROOT)/boot_modules.h
.PHONY: $(SYMROOT)/boot_modules.c
objroot_dirs:
@rm -rf module_includes
@mkdir module_includes
@rm -rf "$(SYMROOT)/modules/"
@mkdir "$(SYMROOT)/modules/"
@mkdir "$(SYMROOT)/modules/"
$(SYMROOT)/boot_modules.c: ${OBJROOT} ${SYMROOT}/modules/ ${OBJROOT} $(addprefix $(OBJROOT)/, ${MODULE_OBJS})
@echo "// Autogenerated - do not modify" > $@
@echo "#include <modules.h>" >> $@
@echo "#include \"boot_modules.h\"" >> $@
@echo "void start_built_in_modules() {" >> $@
$(SYMROOT)/boot_modules.h: ${OBJROOT} ${SYMROOT}/modules/ ${OBJROOT} $(addprefix $(OBJROOT)/, ${MODULE_OBJS})
@echo "// Autogenerated - do not modify" > $@
@echo "void start_built_in_modules(); " > $@
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IMGROOT = $(SRCROOT)/sym/cache
IMGSKELROOT = $(SRCROOT)/imgskel
CDBOOT = ${IMGROOT}/usr/standalone/i386/cdboot
DIR = cdboot
include ${SRCROOT}/Make.rules
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extern char * strstr(const char *in, const char *str);
extern int atoi(const char * str);
extern int ptol(const char * str);
extern int strlen(const char * str);
extern size_t strlen(const char * str);
extern char * strcat(char * s1, const char * s2);
extern char * strncat(char * s1, const char * s2, size_t n);
extern char * strdup(const char *s1);
/*
* prf.c
*/
extern void prf(const char * fmt, va_list ap, void (*putfn_p)(),
extern void prf(const char * fmt, va_list ap, int (*putfn_p)(),
void * putfn_arg);
/*
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char * last_str;
};
static void
sputc(int c, struct putc_info * pi)
static int
sputc(int c, struct putc_info * pi) //Azi: exists on console.c & gui.c
{
if (pi->last_str)
if (pi->str == pi->last_str) {
*(pi->str) = '\0';
return;
return 0;
}
*(pi->str)++ = c;
return c;
}
/*VARARGS1*/
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void bzero(void * dst, size_t len)
{
asm volatile ( "xorl %%eax, %%eax \n\t"
"cld \n\t"
"movl %%ecx, %%edx \n\t"
"shrl $2, %%ecx \n\t"
"rep; stosl \n\t"
"movl %%edx, %%ecx \n\t"
"andl $3, %%ecx \n\t"
"rep; stosb \n\t"
:
: "c" (len), "D" (dst)
: "memory", "%eax" );
"cld \n\t"
"movl %%ecx, %%edx \n\t"
"shrl $2, %%ecx \n\t"
"rep; stosl \n\t"
"movl %%edx, %%ecx \n\t"
"andl $3, %%ecx \n\t"
"rep; stosb \n\t"
:
: "c" (len), "D" (dst)
: "memory", "%eax" );
}
void __bzero(void * dst, size_t len)
{
asm volatile ( "xorl %%eax, %%eax \n\t"
"cld \n\t"
"movl %%ecx, %%edx \n\t"
"shrl $2, %%ecx \n\t"
"rep; stosl \n\t"
"movl %%edx, %%ecx \n\t"
"andl $3, %%ecx \n\t"