Chameleon Applications

Chameleon Applications Commit Details

Date:2011-07-16 01:29:40 (9 years 4 months ago)
Author:ErmaC
Commit:318
Parents: 317
Message:update chameleon to 1162.
Changes:
D/branches/iFabio/Chameleon/i386/libsaio/smbios_patcher.h
D/branches/iFabio/Chameleon/i386/libsaio/ati.h
D/branches/iFabio/Chameleon/i386/libsaio/ufs_byteorder.c
D/branches/iFabio/Chameleon/i386/libsaio/ufs.c
D/branches/iFabio/Chameleon/i386/libsaio/mem.h
M/branches/iFabio/Chameleon/i386/libsaio/Makefile
M/branches/iFabio/Chameleon/i386/libsaio/saio_internal.h
M/branches/iFabio/Chameleon/i386/boot2/options.c
M/branches/iFabio/Chameleon/i386/libsaio/hpet.c
M/branches/iFabio/Chameleon/i386/boot2/graphics.c
M/branches/iFabio/Chameleon/CHANGES
M/branches/iFabio/Chameleon/i386/libsaio/ati.c
M/branches/iFabio/Chameleon/i386/boot1/boot1h.s
M/branches/iFabio/Chameleon/i386/libsaio/sys.c
M/branches/iFabio/Chameleon/i386/boot2/drivers.c
M/branches/iFabio/Chameleon/i386/boot2/mboot.c
M/branches/iFabio/Chameleon/i386/boot0/chain0.s
M/branches/iFabio/Chameleon/i386/libsaio/cpu.c
M/branches/iFabio/Chameleon/i386/libsaio/fake_efi.c
M/branches/iFabio/Chameleon/i386/libsaio/openbsd.c
M/branches/iFabio/Chameleon/i386/modules/Resolution/915resolution.c
M/branches/iFabio/Chameleon/i386/libsaio/cpu.h
M/branches/iFabio/Chameleon/i386/libsa/zalloc.c
M/branches/iFabio/Chameleon/i386/modules/Resolution/edid.c
M/branches/iFabio/Chameleon/i386/modules/uClibcxx/Cconfig
M/branches/iFabio/Chameleon/i386/boot0/boot0.s
M/branches/iFabio/Chameleon/i386/boot2/boot.c
M/branches/iFabio/Chameleon/TODO
M/branches/iFabio/Chameleon/i386/libsaio/nvidia.c
M/branches/iFabio/Chameleon/i386/libsaio/freebsd.c
M/branches/iFabio/Chameleon/i386/boot2/boot.h
M/branches/iFabio/Chameleon/i386/boot2/modules.c
M/branches/iFabio/Chameleon/i386/modules/HelloWorld/HelloWorld.cpp
M/branches/iFabio/Chameleon/i386/modules/klibc/vsscanf.c
M/branches/iFabio/Chameleon/i386/libsaio/stringTable.c
M/branches/iFabio/Chameleon/i386/libsaio/aml_generator.c
M/branches/iFabio/Chameleon/i386/libsaio/pci.h
M/branches/iFabio/Chameleon/i386/libsaio/acpi_patcher.c
M/branches/iFabio/Chameleon/i386/boot2/gui.c
M/branches/iFabio/Chameleon/i386/boot0/Cconfig
M/branches/iFabio/Chameleon/i386/boot1/Cconfig
M/branches/iFabio/Chameleon/i386/boot2/Cconfig
M/branches/iFabio/Chameleon/i386/libsaio/device_inject.c
M/branches/iFabio/Chameleon/i386/boot2/gui.h
M/branches/iFabio/Chameleon/i386/libsaio/smbios.c
M/branches/iFabio/Chameleon/i386/boot2/ramdisk.c
M/branches/iFabio/Chameleon/i386/util/fdisk/cmd.c
M/branches/iFabio/Chameleon/package/Kexts/AHCIPortInjector.kext/Contents/Info.plist
M/branches/iFabio/Chameleon/i386/libsaio/xml.c
M/branches/iFabio/Chameleon/i386/libsaio/console.c
M/branches/iFabio/Chameleon/doc/BootHelp.txt
M/branches/iFabio/Chameleon/i386/libsaio/fdisk.h
M/branches/iFabio/Chameleon/i386/libsaio/xml.h
M/branches/iFabio/Chameleon/i386/libsaio/pci_root.c
M/branches/iFabio/Chameleon/i386/libsaio/befs.c
M/branches/iFabio/Chameleon/i386/libsaio/biosfn.c
M/branches/iFabio/Chameleon/i386/modules/Makefile
M/branches/iFabio/Chameleon/i386/libsaio/saio_types.h
M/branches/iFabio/Chameleon/package/smbios.plist
M/branches/iFabio/Chameleon/i386/libsaio/spd.c
M/branches/iFabio/Chameleon/i386/libsaio/smbios_getters.c
M/branches/iFabio/Chameleon/i386/libsaio/pci_setup.c
M/branches/iFabio/Chameleon/i386/boot2/Makefile
M/branches/iFabio/Chameleon/i386/modules/klibc/Cconfig
M/branches/iFabio/Chameleon/i386/modules/klibc/vsnprintf.c
M/branches/iFabio/Chameleon/doc/README
M/branches/iFabio/Chameleon/i386/libsaio/bootstruct.c
M/branches/iFabio/Chameleon/i386/libsaio/dram_controllers.c
M/branches/iFabio/Chameleon/i386/libsa/printf.c
M/branches/iFabio/Chameleon/i386/Makefile
M/branches/iFabio/Chameleon/i386/libsaio/ext2fs.c
M/branches/iFabio/Chameleon/i386/libsaio/bootstruct.h
M/branches/iFabio/Chameleon/i386/config/Makefile
M/branches/iFabio/Chameleon/i386/libsaio/load.c
M/branches/iFabio/Chameleon/i386/modules/Resolution/Cconfig
M/branches/iFabio/Chameleon/i386/libsa/qsort.c
M/branches/iFabio/Chameleon/i386/libsaio/platform.c
M/branches/iFabio/Chameleon/i386/libsaio/msdos.c
M/branches/iFabio/Chameleon/i386/boot2/bmdecompress.c
M/branches/iFabio/Chameleon/i386/modules/HelloWorld/Cconfig
M/branches/iFabio/Chameleon/i386/libsaio/platform.h
M/branches/iFabio/Chameleon/i386/libsaio/usb.c
M/branches/iFabio/Chameleon/i386/libsaio/disk.c

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branches/iFabio/Chameleon/i386/libsaio/ufs.c
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/*
* Copyright (c) 2000-2003 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* The contents of this file constitute Original Code as defined in and
* are subject to the Apple Public Source License Version 2.0 (the
* "License"). You may not use this file except in compliance with the
* License. Please obtain a copy of the License at
* http://www.apple.com/publicsource and read it before using this file.
*
* This Original Code and all software distributed under the License are
* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
* License for the specific language governing rights and limitations
* under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* ufs.c - File System Module for UFS.
*
* Copyright (c) 1998-2002 Apple Computer, Inc.
*
* DRI: Josh de Cesare
*/
#if 0
#include <sl.h>
#include "ufs.h"
#include "ufs_byteorder.h"
#if !defined(MAXNAMLEN) && defined(UFSMAXNAMLEN)
#define MAXNAMLEN UFSMAXNAMLEN
#endif
typedef struct dinode Inode, *InodePtr;
// Private function prototypes
static char *ReadBlock(long fragNum, long fragOffset, long length,
char *buffer, long cache);
static long ReadInode(long inodeNum, InodePtr inode, long *flags, long *time);
static long ResolvePathToInode(char *filePath, long *flags,
InodePtr fileInode, InodePtr dirInode);
static long ReadDirEntry(InodePtr dirInode, long *fileInodeNum,
long long *dirIndex, char **name);
static long FindFileInDir(char *fileName, long *flags,
InodePtr fileInode, InodePtr dirInode);
static char *ReadFileBlock(InodePtr fileInode, long fragNum, long blockOffset,
long length, char *buffer, long cache);
static long ReadFile(InodePtr fileInode, uint64_t *length, void *base, uint64_t offset);
#define kDevBlockSize (0x200) // Size of each disk block.
#define kDiskLabelBlock (15) // Block the DL is in.
#ifdef __i386__
static CICell gCurrentIH;
static long long gPartitionBase;
static char *gULBuf;
static char *gFSBuf;
static struct fs *gFS;
#if !BOOT1
static struct ufslabel gUFSLabel; // for UUID
#endif
static long gBlockSize;
static long gFragSize;
static long gFragsPerBlock;
static char *gTempBlock;
static char *gTempName;
static char *gTempName2;
static InodePtr gRootInodePtr;
static InodePtr gFileInodePtr;
#else /* !__i386__ */
static CICell gCurrentIH;
static long long gPartitionBase;
static char gDLBuf[8192];
static char gFSBuf[SBSIZE];
static struct fs *gFS;
#if !BOOT1
static struct ufslabel gUFSLabel; // for UUID
#endif
static long gBlockSize;
static long gFragSize;
static long gFragsPerBlock;
static char *gTempBlock;
static char gTempName[MAXNAMLEN + 1];
static char gTempName2[MAXNAMLEN + 1];
static Inode _gRootInode;
static Inode _gFileInode;
static InodePtr gRootInodePtr = &_gRootInode;
static InodePtr gFileInodePtr = &_gFileInode;
#endif /* !__i386__ */
// Public functions
void UFSFree(CICell ih)
{
if(gCurrentIH == ih)
gCurrentIH = 0;
free(ih);
}
long UFSInitPartition( CICell ih )
{
#if !BOOT1
long ret;
#endif
if (ih == gCurrentIH) {
#ifdef __i386__
CacheInit(ih, gBlockSize);
#endif
return 0;
}
#if !BOOT1
verbose("UFSInitPartition: %x\n", ih);
#endif
gCurrentIH = 0;
#ifdef __i386__
if (!gULBuf) gULBuf = (char *) malloc(UFS_LABEL_SIZE);
if (!gFSBuf) gFSBuf = (char *) malloc(SBSIZE);
if (!gTempName) gTempName = (char *) malloc(MAXNAMLEN + 1);
if (!gTempName2) gTempName2 = (char *) malloc(MAXNAMLEN + 1);
if (!gRootInodePtr) gRootInodePtr = (InodePtr) malloc(sizeof(Inode));
if (!gFileInodePtr) gFileInodePtr = (InodePtr) malloc(sizeof(Inode));
if (!gULBuf || !gFSBuf || !gTempName || !gTempName2 ||
!gRootInodePtr || !gFileInodePtr) return -1;
#endif
// Assume there is no Disk Label
gPartitionBase = 0;
#if !BOOT1
// read the disk label to get the UUID
// (rumor has it that UFS headers can be either-endian on disk; hopefully
// that isn't true for this UUID field).
Seek(ih, gPartitionBase + UFS_LABEL_OFFSET);
ret = Read(ih, (long)&gUFSLabel, UFS_LABEL_SIZE);
if(ret != 0)
bzero(&gUFSLabel, UFS_LABEL_SIZE);
#endif /* !BOOT1 */
// Look for the Super Block
Seek(ih, gPartitionBase + SBOFF);
Read(ih, (long)gFSBuf, SBSIZE);
gFS = (struct fs *)gFSBuf;
byte_swap_superblock(gFS);
if (gFS->fs_magic != FS_MAGIC) {
return -1;
}
ih->modTime = gFS->fs_time;
// Calculate the block size and set up the block cache.
gBlockSize = gFS->fs_bsize;
gFragSize = gFS->fs_fsize;
gFragsPerBlock = gBlockSize / gFragSize;
if (gTempBlock != 0) free(gTempBlock);
gTempBlock = malloc(gBlockSize);
CacheInit(ih, gBlockSize);
gCurrentIH = ih;
// Read the Root Inode
ReadInode(ROOTINO, gRootInodePtr, 0, 0);
return 0;
}
#if !BOOT1
long UFSGetUUID(CICell ih, char *uuidStr)
{
long long uuid = gUFSLabel.ul_uuid;
if (UFSInitPartition(ih) == -1) return -1;
if (uuid == 0LL) return -1;
return CreateUUIDString((uint8_t*)(&uuid), sizeof(uuid), uuidStr);
}
#endif /* !BOOT1 */
long UFSLoadFile( CICell ih, char * filePath )
{
return UFSReadFile(ih, filePath, (void *)gFSLoadAddress, 0, 0);
}
long UFSReadFile( CICell ih, char * filePath, void * base, uint64_t offset, uint64_t length )
{
long ret, flags;
#if !BOOT1
verbose("Loading UFS file: [%s] from %x.\n", filePath, (unsigned)ih);
#endif
if (UFSInitPartition(ih) == -1) return -1;
// Skip one or two leading '/'.
if (*filePath == '/') filePath++;
if (*filePath == '/') filePath++;
ret = ResolvePathToInode(filePath, &flags, gFileInodePtr, gRootInodePtr);
if ((ret == -1) || ((flags & kFileTypeMask) != kFileTypeFlat)) return -1;
ret = ReadFile(gFileInodePtr, &length, base, offset);
if (ret == -1) return -1;
return length;
}
#ifndef BOOT1
long UFSGetDirEntry( CICell ih, char * dirPath, long long * dirIndex,
char ** name, long * flags, long * time,
FinderInfo * finderInfo, long * infoValid)
{
long ret, fileInodeNum, dirFlags;
Inode tmpInode;
if (UFSInitPartition(ih) == -1) return -1;
if (infoValid) *infoValid = 0;
// Skip a leading '/' if present
if (*dirPath == '/') dirPath++;
if (*dirPath == '/') dirPath++;
ret = ResolvePathToInode(dirPath, &dirFlags, gFileInodePtr, gRootInodePtr);
if ((ret == -1) || ((dirFlags & kFileTypeMask) != kFileTypeDirectory))
return -1;
ret = ReadDirEntry(gFileInodePtr, &fileInodeNum, dirIndex, name);
if (ret != 0) return ret;
ReadInode(fileInodeNum, &tmpInode, flags, time);
return 0;
}
void
UFSGetDescription(CICell ih, char *str, long strMaxLen)
{
if (UFSInitPartition(ih) == -1) { return; }
struct ufslabel *ul;
// Look for the Disk Label
Seek(ih, 1ULL * UFS_LABEL_OFFSET);
Read(ih, (long)gULBuf, UFS_LABEL_SIZE);
ul = (struct ufslabel *)gULBuf;
unsigned char magic_bytes[] = UFS_LABEL_MAGIC;
int i;
unsigned char *p = (unsigned char *)&ul->ul_magic;
for (i=0; i<sizeof(magic_bytes); i++, p++) {
if (*p != magic_bytes[i])
return;
}
strncpy(str, (const char *)ul->ul_name, strMaxLen);
}
long
UFSGetFileBlock(CICell ih, char *filePath, unsigned long long *firstBlock)
{
long ret, flags;
if (UFSInitPartition(ih) == -1) return -1;
// Skip one or two leading '/'.
if (*filePath == '/') filePath++;
if (*filePath == '/') filePath++;
ret = ResolvePathToInode(filePath, &flags, gFileInodePtr, gRootInodePtr);
if ((ret == -1) || ((flags & kFileTypeMask) != kFileTypeFlat)) return -1;
*firstBlock = (gPartitionBase + 1ULL * gFileInodePtr->di_db[0] * gBlockSize) / 512ULL;
return 0;
}
#endif /* !BOOT1 */
// Private functions
static char * ReadBlock( long fragNum, long blockOffset, long length,
char * buffer, long cache )
{
long long offset;
long blockNum;
blockNum = fragNum / gFragsPerBlock;
fragNum -= blockNum * gFragsPerBlock;
blockOffset += fragNum * gFragSize;
offset = gPartitionBase + 1ULL * blockNum * gBlockSize;
if (cache && ((blockOffset + length) <= gBlockSize)) {
CacheRead(gCurrentIH, gTempBlock, offset, gBlockSize, 1);
if (buffer != 0) bcopy(gTempBlock + blockOffset, buffer, length);
else buffer = gTempBlock + blockOffset;
} else {
offset += blockOffset;
CacheRead(gCurrentIH, buffer, offset, length, 0);
}
return buffer;
}
static long ReadInode( long inodeNum, InodePtr inode, long * flags, long * time )
{
long fragNum = ino_to_fsba(gFS, inodeNum);
long blockOffset = ino_to_fsbo(gFS, inodeNum) * sizeof(Inode);
ReadBlock(fragNum, blockOffset, sizeof(Inode), (char *)inode, 1);
byte_swap_dinode_in(inode);
if (time != 0) *time = inode->di_mtime;
if (flags != 0) {
switch (inode->di_mode & IFMT) {
case IFREG: *flags = kFileTypeFlat; break;
case IFDIR: *flags = kFileTypeDirectory; break;
case IFLNK: *flags = kFileTypeLink; break;
default : *flags = kFileTypeUnknown; break;
}
*flags |= inode->di_mode & kPermMask;
if (inode->di_uid != 0) *flags |= kOwnerNotRoot;
}
return 0;
}
static long ResolvePathToInode( char * filePath, long * flags,
InodePtr fileInode, InodePtr dirInode )
{
char * restPath;
long ret, cnt;
// if filePath is empty the we want this directory.
if (*filePath == '\0') {
bcopy((char *)dirInode, (char *)fileInode, sizeof(Inode));
return 0;
}
// Copy the file name to gTempName
cnt = 0;
while ((filePath[cnt] != '/') && (filePath[cnt] != '\0')) cnt++;
strlcpy(gTempName, filePath, cnt+1);
// Move restPath to the right place.
if (filePath[cnt] != '\0') cnt++;
restPath = filePath + cnt;
// gTempName is a name in the current Dir.
// restPath is the rest of the path if any.
ret = FindFileInDir(gTempName, flags, fileInode, dirInode);
if (ret == -1) return -1;
if ((*restPath != '\0') && ((*flags & kFileTypeMask) == kFileTypeDirectory))
ret = ResolvePathToInode(restPath, flags, fileInode, fileInode);
return ret;
}
static long ReadDirEntry( InodePtr dirInode, long * fileInodeNum,
long long * dirIndex, char ** name )
{
struct direct *dir;
char *buffer;
long long index;
long dirBlockNum, dirBlockOffset;
while (1) {
index = *dirIndex;
dirBlockOffset = (long) (index % DIRBLKSIZ);
dirBlockNum = (long) (index / DIRBLKSIZ);
buffer = ReadFileBlock(dirInode, dirBlockNum, 0, DIRBLKSIZ, 0, 1);
if (buffer == 0) return -1;
dir = (struct direct *)(buffer + dirBlockOffset);
byte_swap_dir_block_in((char *)dir, 1);
*dirIndex += dir->d_reclen;
if (dir->d_ino != 0) break;
if (dirBlockOffset != 0) return -1;
}
*fileInodeNum = dir->d_ino;
*name = strlcpy(gTempName2, dir->d_name, dir->d_namlen+1);
return 0;
}
static long FindFileInDir( char * fileName, long * flags,
InodePtr fileInode, InodePtr dirInode )
{
long ret, inodeNum;
long long index = 0;
char *name;
while (1) {
ret = ReadDirEntry(dirInode, &inodeNum, &index, &name);
if (ret == -1) return -1;
if (strcmp(fileName, name) == 0) break;
}
ReadInode(inodeNum, fileInode, flags, 0);
return 0;
}
static char * ReadFileBlock( InodePtr fileInode, long fragNum, long blockOffset,
long length, char * buffer, long cache )
{
long fragCount, blockNum;
long diskFragNum, indFragNum, indBlockOff, refsPerBlock;
char *indBlock;
fragCount = (fileInode->di_size + gFragSize - 1) / gFragSize;
if (fragNum >= fragCount) return 0;
refsPerBlock = gBlockSize / sizeof(ufs_daddr_t);
blockNum = fragNum / gFragsPerBlock;
fragNum -= blockNum * gFragsPerBlock;
// Get Direct Block Number.
if (blockNum < NDADDR) {
diskFragNum = fileInode->di_db[blockNum];
} else {
blockNum -= NDADDR;
// Get Single Indirect Fragment Number.
if (blockNum < refsPerBlock) {
indFragNum = fileInode->di_ib[0];
} else {
blockNum -= refsPerBlock;
// Get Double Indirect Fragment Number.
if (blockNum < (refsPerBlock * refsPerBlock)) {
indFragNum = fileInode->di_ib[1];
} else {
blockNum -= refsPerBlock * refsPerBlock;
// Get Triple Indirect Fragment Number.
indFragNum = fileInode->di_ib[2];
indBlock = ReadBlock(indFragNum, 0, gBlockSize, 0, 1);
indBlockOff = blockNum / (refsPerBlock * refsPerBlock);
blockNum %= (refsPerBlock * refsPerBlock);
indFragNum = SWAP_BE32(((ufs_daddr_t *)indBlock)[indBlockOff]);
}
indBlock = ReadBlock(indFragNum, 0, gBlockSize, 0, 1);
indBlockOff = blockNum / refsPerBlock;
blockNum %= refsPerBlock;
indFragNum = SWAP_BE32(((ufs_daddr_t *)indBlock)[indBlockOff]);
}
indBlock = ReadBlock(indFragNum, 0, gBlockSize, 0, 1);
diskFragNum = SWAP_BE32(((ufs_daddr_t *)indBlock)[blockNum]);
}
buffer = ReadBlock(diskFragNum+fragNum, blockOffset, length, buffer, cache);
return buffer;
}
static long ReadFile( InodePtr fileInode, uint64_t * length, void * base, uint64_t offset )
{
long bytesLeft, curSize, curFrag;
char *buffer, *curAddr = (char *)base;
bytesLeft = fileInode->di_size;
if (offset > bytesLeft) {
printf("Offset is too large.\n");
return -1;
}
if ((*length == 0) || ((offset + *length) > bytesLeft)) {
*length = bytesLeft - offset;
}
/*
if (bytesLeft > kLoadSize) {
printf("File is too large.\n");
return -1;
}
*/
bytesLeft = *length;
curFrag = (offset / gBlockSize) * gFragsPerBlock;
offset %= gBlockSize;
while (bytesLeft) {
curSize = gBlockSize;
if (curSize > bytesLeft) curSize = bytesLeft;
if ((offset + curSize) > gBlockSize) curSize = (gBlockSize - offset);
buffer = ReadFileBlock(fileInode, curFrag, offset, curSize, curAddr, 0);
if (buffer == 0) break;
if (offset != 0) offset = 0;
curFrag += gFragsPerBlock;
curAddr += curSize;
bytesLeft -= curSize;
}
return bytesLeft;
}
#endif
branches/iFabio/Chameleon/i386/libsaio/smbios_patcher.h
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/*
* Copyright 2008 mackerintel
*/
/*
* AsereBLN: cleanup
*/
#ifndef __LIBSAIO_SMBIOS_PATCHER_H
#define __LIBSAIO_SMBIOS_PATCHER_H
#include "libsaio.h"
#include "SMBIOS.h"
extern char MacModel[8];
extern unsigned int ModelRev;
extern uint64_t smbios_p;
/* From Foundation/Efi/Guid/Smbios/SmBios.h */
/* Modified to wrap Data4 array init with {} */
#define EFI_SMBIOS_TABLE_GUID {0xeb9d2d31, 0x2d88, 0x11d3, 0x9a, 0x16, {0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}
#define SMBIOS_RANGE_START 0x000F0000
#define SMBIOS_RANGE_END 0x000FFFFF
#define SMBIOS_ORIGINAL0
#define SMBIOS_PATCHED1
struct smbios_table_header
{
uint8_ttype;
uint8_tlength;
uint16_thandle;
} __attribute__ ((packed));
struct smbios_property
{
const char*name;
uint8_ttable_type;
enum {SMSTRING, SMWORD, SMBYTE, SMOWORD} value_type;
intoffset;
int(*auto_int) (const char *name, int table_num);
const char*(*auto_str) (const char *name, int table_num);
const char*(*auto_oword) (const char *name, int table_num);
};
struct smbios_table_description
{
uint8_ttype;
intlen;
int(*numfunc)(int tablen);
};
/** call with flag SMBIOS_ORIGINAL to get orig. entrypoint
or call with flag SMBIOS_PATCHED to get patched smbios entrypoint
*/
extern struct SMBEntryPoint*getSmbios(int);
extern struct DMIHeader* FindNextDmiTableOfType(int type, int minlen);
extern struct DMIHeader* FindFirstDmiTableOfType(int type, int minlen);
extern void getSmbiosProductName();
const char *smbiosStringAtIndex(DMIHeader*, int index, int *length );
extern bool scanDMI(void);
extern void scan_cpu_DMI(void); //PlatformInfo_t *); //Slice
#endif /* !__LIBSAIO_SMBIOS_PATCHER_H */
branches/iFabio/Chameleon/i386/libsaio/mem.h
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/*
* Copyright 2010 AsereBLN. All rights reserved. <aserebln@googlemail.com>
*
* mem.h
*/
#ifndef __LIBSAIO_MEM_H
#define __LIBSAIO_MEM_H
#include "platform.h"
extern void scan_memory(); //PlatformInfo_t *);
#endif/* __LIBSAIO_MEM_H */
branches/iFabio/Chameleon/i386/libsaio/ufs_byteorder.c
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/*
* Copyright (c) 1999-2003 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* Portions Copyright (c) 1999-2003 Apple Computer, Inc. All Rights
* Reserved. This file contains Original Code and/or Modifications of
* Original Code as defined in and that are subject to the Apple Public
* Source License Version 2.0 (the "License"). You may not use this file
* except in compliance with the License. Please obtain a copy of the
* License at http://www.apple.com/publicsource and read it before using
* this file.
*
* The Original Code and all software distributed under the License are
* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE OR NON- INFRINGEMENT. Please see the
* License for the specific language governing rights and limitations
* under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright 1993 NeXT, Inc.
* All rights reserved.
*/
#if 0
#include <sys/types.h>
#include <sys/param.h>
//#include <sys/vnode.h>
#include <ufs/ufs/dir.h>
#include <libkern/OSByteOrder.h>
#include "ufs_byteorder.h"
#include "libsaio.h"
#defineswapBigLongToHost(thing) ((thing) = OSSwapBigToHostInt32(thing))
#defineswapBigShortToHost(thing) ((thing) = OSSwapBigToHostInt16(thing))
#definebyte_swap_longlong(thing) ((thing) = OSSwapBigToHostInt64(thing))
#definebyte_swap_int(thing) ((thing) = OSSwapBigToHostInt32(thing))
#definebyte_swap_short(thing) ((thing) = OSSwapBigToHostInt16(thing))
#if UNUSED
void
byte_swap_longlongs(unsigned long long *array, int count)
{
register unsigned long longi;
for (i = 0; i < (unsigned long long)count; i++)
byte_swap_longlong(array[i]);
}
#endif
void
byte_swap_ints(unsigned int *array, int count)
{
register inti;
for (i = 0; i < count; i++)
byte_swap_int(array[i]);
}
void
byte_swap_shorts(unsigned short *array, int count)
{
register inti;
for (i = 0; i < count; i++)
byte_swap_short(array[i]);
}
#if UNUSED
static void
swapBigIntsToHost(unsigned int *array, int count)
{
register inti;
for (i = 0; i < count; i++)
swapBigLongToHost(array[i]);
}
static void
swapBigShortToHosts(unsigned short *array, int count)
{
register inti;
for (i = 0; i < count; i++)
swapBigShortToHost(array[i]);
}
#endif
void
byte_swap_superblock(struct fs *sb)
{
u_int16_t * usptr;
unsigned long size;
byte_swap_ints(((u_int32_t *)&sb->fs_firstfield), 52);
byte_swap_int(sb->fs_cgrotor);
byte_swap_int(sb->fs_cpc);
byte_swap_shorts((u_int16_t *)sb->fs_opostbl, 16 * 8);
byte_swap_ints((u_int32_t *)sb->fs_sparecon, 50);
byte_swap_ints((u_int32_t *)&sb->fs_contigsumsize, 3);
#if UNUSED
byte_swap_longlongs((u_int64_t *)&sb->fs_maxfilesize,3);
#endif
byte_swap_ints((u_int32_t *)&sb->fs_state, 6);
/* Got these magic numbers from mkfs.c in newfs */
if (sb->fs_nrpos != 8 || sb->fs_cpc > 16) {
usptr = (u_int16_t *)((u_int8_t *)(sb) + (sb)->fs_postbloff);
size = sb->fs_cpc * sb->fs_nrpos;
byte_swap_shorts(usptr,size);/* fs_postbloff */
}
}
/* This value should correspond to the value set in the ffs_mounts */
#define RESYMLNKLEN 60
void
byte_swap_dinode_in(struct dinode *di)
{
int i;
di->di_mode = OSSwapInt16(di->di_mode);
di->di_nlink = OSSwapInt16(di->di_nlink);
#ifdef LFS
di->di_u.inumber = OSSwapInt32(di->di_u.inumber);
#else
di->di_u.oldids[0] = OSSwapInt16(di->di_u.oldids[0]);
di->di_u.oldids[1] = OSSwapInt16(di->di_u.oldids[1]);
#endif
di->di_size = OSSwapInt64(di->di_size);
di->di_atime = OSSwapInt32(di->di_atime);
di->di_atimensec = OSSwapInt32(di->di_atimensec);
di->di_mtime = OSSwapInt32(di->di_mtime);
di->di_mtimensec = OSSwapInt32(di->di_mtimensec);
di->di_ctime = OSSwapInt32(di->di_ctime);
di->di_ctimensec = OSSwapInt32(di->di_ctimensec);
if (((di->di_mode & IFMT) != IFLNK ) || (di->di_size > RESYMLNKLEN)) {
for (i=0; i < NDADDR; i++)/* direct blocks */
di->di_db[i] = OSSwapInt32(di->di_db[i]);
for (i=0; i < NIADDR; i++)/* indirect blocks */
di->di_ib[i] = OSSwapInt32(di->di_ib[i]);
}
di->di_flags = OSSwapInt32(di->di_flags);
di->di_blocks = OSSwapInt32(di->di_blocks);
di->di_gen = OSSwapInt32(di->di_gen);
di->di_uid = OSSwapInt32(di->di_uid);
di->di_gid = OSSwapInt32(di->di_gid);
di->di_spare[0] = OSSwapInt32(di->di_spare[0]);
di->di_spare[1] = OSSwapInt32(di->di_spare[1]);
}
void
byte_swap_dir_block_in(char *addr, int count)
{
register struct direct * ep = (struct direct *) addr;
register int entryoffsetinblk = 0;
while (entryoffsetinblk < count) {
ep = (struct direct *) (entryoffsetinblk + addr);
swapBigLongToHost(ep->d_ino);
swapBigShortToHost(ep->d_reclen);
entryoffsetinblk += ep->d_reclen;
if (ep->d_reclen < 12)/* handle garbage in dirs */
break;
}
}
#endif
branches/iFabio/Chameleon/i386/libsaio/ati.h
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/*
* ATI injector
*
* Copyright (C) 2009 Jasmin Fazlic, iNDi, netkas
*
* ATI injector is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* ATI driver and injector is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with ATI injector. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* Alternatively you can choose to comply with APSL
*/
#ifndef __LIBSAIO_ATI_H
#define __LIBSAIO_ATI_H
bool setup_ati_devprop(pci_dt_t *ati_dev);
struct ati_chipsets_t {
unsigned device;
char *name;
};
struct ati_data_key {
uint32_t size;
char *name;
uint8_t data[];
};
#define REG8(reg) ((volatile uint8_t *)regs)[(reg)]
#define REG16(reg) ((volatile uint16_t *)regs)[(reg) >> 1]
#define REG32R(reg) ((volatile uint32_t *)regs)[(reg) >> 2]
#define REG32W(reg, val) ((volatile uint32_t *)regs)[(reg) >> 2] = (val)
#endif /* !__LIBSAIO_ATI_H */
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static long ParseTagInteger(char *buffer, TagPtr *tag);
static long ParseTagData(char *buffer, TagPtr *tag);
static long ParseTagDate(char *buffer, TagPtr *tag);
static long ParseTagBoolean(char *buffer, TagPtr *tag, long type);
static long GetNextTag(char *buffer, char **tag, long *start);
static long FixDataMatchingTag(char *buffer, char *tag);
static TagPtr NewTag(void);
return 0;
}
//==========================================================================
// XMLGetProperty
TagPtr
XMLGetKey( TagPtr dict, int id )
{
TagPtr tagList, tag;
if (dict->type != kTagTypeDict) return 0;
tag = 0;
int element = 0;
tagList = dict->tag;
while (tagList && element != id)
{
tag = tagList;
tagList = tag->tagNext;
if ((tag->type != kTagTypeKey) || (tag->string == 0)) continue;
element++;
if(id == element) return tag;
}
return 0;
}
TagPtr XMLGetValueForKey(TagPtr key)
{
if (!key ||
key->type != kTagTypeKey) return 0;
return key->tag;
}
// XMLGetTag(int index)
// XMLTagCount( TagPtr dict )
&& (dict->type != kTagTypeArray)// If we are an array, any element is valid
) continue;
if(tag->type == kTagTypeKey) printf("Located key %s\n", tag->string);
//if(tag->type == kTagTypeKey) printf("Located key %s\n", tag->string);
count++;
}
pos = 0;
char *configBuffer;
configBuffer = malloc(strlen(buffer)+1);
strcpy(configBuffer, buffer);
int strlength = strlen(buffer);
configBuffer = malloc(strlength+1);
bcopy(buffer, configBuffer, strlength);
configBuffer[strlength] = 0;
buffer_start = configBuffer;
while (1)
//==========================================================================
// ParseTagBoolean
static long
long
ParseTagBoolean( char * buffer, TagPtr * tag, long type )
{
TagPtr tmpTag;
}
/*** Cast functions ***/
bool XMLIsArray(TagPtr entry)
{
return entry && (entry->type == kTagTypeArray);
}
TagPtr XMLCastArray(TagPtr dict)
{
if(!dict) return NULL;
else return NULL;
}
bool XMLIsDict(TagPtr entry)
{
return entry && (entry->type == kTagTypeDict);
}
TagPtr XMLCastDict(TagPtr dict)
{
if(!dict) return NULL;
else return NULL;
}
bool XMLIsString(TagPtr entry)
{
return entry &&
((entry->type == kTagTypeString) ||
(entry->type == kTagTypeKey));
}
char* XMLCastString(TagPtr dict)
{
if(!dict) return NULL;
}
}
bool XMLIsBoolean(TagPtr entry)
{
return entry &&
((entry->type == kTagTypeTrue) ||
(entry->type == kTagTypeFalse));
}
bool XMLCastBoolean(TagPtr dict)
{
if(!dict) return false;
return false;
}
bool XMLIsInteger(TagPtr entry)
{
return entry && (entry->type == kTagTypeInteger);
}
int XMLCastInteger(TagPtr dict)
{
if(!dict)
{
printf("XMLCastInteger: null dict\n");
//printf("XMLCastInteger: null dict\n");
return 0;
}
if(dict->type == kTagTypeInteger) return (int)(dict->string);
return 0;
}
bool XMLAddTagToDictionary(TagPtr dict, char* key, TagPtr value)
{
if (!dict || dict->type != kTagTypeDict) return false;
TagPtr tmpTag;
char* string;
tmpTag = NewTag();
if (tmpTag == 0)
{
return false;
}
string = NewSymbol(key);
if (string == 0)
{
XMLFreeTag(tmpTag);
return false;
}
tmpTag->type = kTagTypeKey;
tmpTag->string = string;
tmpTag->tag = value;
tmpTag->offset = 0;
tmpTag->tagNext = 0;
TagPtr tagList = dict->tag;
if(!tagList)
{
// First tag
dict->tag = tmpTag;
return true;
}
while(tagList && tagList->tagNext) tagList = tagList->tagNext;
if(tagList)
{
tagList->tagNext = tmpTag;
return true;
}
return false;
}
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bool gVerboseMode;
bool gErrors;
/** Kabyl: BooterLog
Azi: Doubled available log size; this seems to fix some hangs and instant reboots caused by
booting with -f (ignore caches). 96kb are enough to hold full log, booting with -f; even so,
this depends on how much we "play" at the boot prompt and with what patches we're playing,
depending on how much they print to the log.
**/ //Azi: closing **/ alows colapse/expand... is this desirable?? colapsing an entire page
// will also colapse comments....
/*
* Azi: Doubled available log size; this seems to fix some hangs and instant reboots caused by
* booting with -f (ignore caches). 96kb are enough to hold full log, booting with -f; even so,
* this depends on how much we "play" at the boot prompt and with what patches we're playing,
* depending on how much they print to the log.
*
* Kabyl: BooterLog
*/
#define BOOTER_LOG_SIZE(128 * 1024)
#define SAFE_LOG_SIZE134
char *msgbuf = 0;
char *cursor = 0;
struct putc_info //Azi: same as below
struct putc_info //Azi: exists on gui.c & printf.c
{
char * str;
char * last_str;
};
static int
sputc(int c, struct putc_info * pi) //Azi: exists on printf.c & gui.c
sputc(int c, struct putc_info * pi) //Azi: same as above
{
if (pi->last_str)
if (pi->str == pi->last_str)
{
register int c = getc();
if ( c == '\r' ) c = '\n';
//if ( c == '\r' ) c = '\n';
if ( c >= ' ' && c < 0x7f) putchar(c);
//if ( c >= ' ' && c < 0x7f) putchar(c);
return (c);
}
void pause()
{
printf("Press a key to continue...\n");
getc();
getchar(); // replace getchar() by pause() were useful.
}
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TagPtr XMLGetProperty( TagPtr dict, const char * key );
TagPtr XMLGetElement( TagPtr dict, int id );
TagPtr XMLGetKey( TagPtr dict, int id );
TagPtr XMLGetValueForKey(TagPtr key);
int XMLTagCount( TagPtr dict );
bool XMLIsType(TagPtr dict, enum xmltype type);
TagPtr XMLCastDict ( TagPtr dict );
TagPtr XMLCastArray( TagPtr dict );
bool XMLIsBoolean(TagPtr entry);
bool XMLIsString (TagPtr entry);
bool XMLIsInteger(TagPtr entry);
bool XMLIsDict (TagPtr entry);
bool XMLIsArray (TagPtr entry);
bool XMLAddTagToDictionary(TagPtr dict, char* key, TagPtr value);
long XMLParseNextTag(char *buffer, TagPtr *tag);
void XMLFreeTag(TagPtr tag);
char* XMLDecode(const char *in);
//
long XMLParseFile( char * buffer, TagPtr * dict );
//==========================================================================
// ParseTag*
long ParseTagBoolean( char * buffer, TagPtr * tag, long type );
#endif /* __LIBSAIO_XML_H */
branches/iFabio/Chameleon/i386/libsaio/bootstruct.c
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* Portions Copyright (c) 1999-2003 Apple Computer, Inc. All Rights
* Reserved. This file contains Original Code and/or Modifications of
* Original Code as defined in and that are subject to the Apple Public
* Source License Version 2.0 (the "License"). You may not use this file
* Source License Version 2.0 (the "License").You may not use this file
* except in compliance with the License. Please obtain a copy of the
* License at http://www.apple.com/publicsource and read it before using
* this file.
bootArgs = (boot_args *)AllocateKernelMemory(sizeof(boot_args));
bcopy(oldAddr, bootArgs, sizeof(boot_args));
}
else {
else
{
void *oldAddr = bootArgsPreLion;
bootArgsPreLion = (boot_args_pre_lion *)AllocateKernelMemory(sizeof(boot_args_pre_lion));
bcopy(oldAddr, bootArgsPreLion, sizeof(boot_args_pre_lion));
branches/iFabio/Chameleon/i386/libsaio/ext2fs.c
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return;
}
str[strMaxLen]=0;
strncpy (str, buf+0x478, min (strMaxLen, 16));
strncpy (str, buf+0x478, MIN(strMaxLen, 16));
free (buf);
}
branches/iFabio/Chameleon/i386/libsaio/bootstruct.h
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/** <-- JavaDoc style (doxygen) //Azi
/*
* Copyright (c) 2002-2003 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
#include "bios.h"
#include "device_tree.h"
/*! <-- QT style (doxygen) //Azi
/*!
Kernel boot args global also used by booter for its own data.
*/
extern boot_args *bootArgs;
char * configEnd; // pointer to end of config files
char config[CONFIG_SIZE];
config_file_t bootConfig; // boot.plist
config_file_t overrideConfig; // additional boot.plist which can override bootConfig keys
config_file_t bootConfig; // com.apple.Boot.plist
config_file_t chameleonConfig; // org.chameleon.Boot.plist which can override bootConfig keys
config_file_t themeConfig; // theme.plist
config_file_t smbiosConfig; // smbios.plist
config_file_t helperConfig; // boot helper partition's boot.plist
config_file_t ramdiskConfig; // RAMDisk.plist
bool memDetect;
} PrivateBootInfo_t;
extern PrivateBootInfo_t *bootInfo;
branches/iFabio/Chameleon/i386/libsaio/acpi_patcher.c
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uint8_tacpi_cpu_count = 0;
char* acpi_cpu_name[32];
uint32_t acpi_cpu_p_blk = 0;
void get_acpi_cpu_names(unsigned char* dsdt, uint32_t length)
{
acpi_cpu_name[acpi_cpu_count] = malloc(4);
memcpy(acpi_cpu_name[acpi_cpu_count], dsdt+offset, 4);
i = offset + 5;
if (acpi_cpu_count == 0)
acpi_cpu_p_blk = dsdt[i] | (dsdt[i+1] << 8);
verbose("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
0x31, 0x03, 0x10, 0x20 /* 1.._*/
};
char cstate_resource_template[] =
char resource_template_register_fixedhw[] =
{
0x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
0x01, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x79, 0x00
};
char resource_template_register_systemio[] =
{
0x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
0x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x79, 0x00,
};
if (Platform.CPU.Vendor != 0x756E6547) {
verbose ("Not an Intel platform: C-States will not be generated !!!\n");
return NULL;
bool c2_enabled = false;
bool c3_enabled = false;
bool c4_enabled = false;
bool cst_using_sustemio = false;
getBoolForKey(kEnableC2States, &c2_enabled, &bootInfo->bootConfig);
getBoolForKey(kEnableC3States, &c3_enabled, &bootInfo->bootConfig);
getBoolForKey(kEnableC4States, &c4_enabled, &bootInfo->bootConfig);
getBoolForKey(kEnableC2States, &c2_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kEnableC3States, &c3_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kEnableC4States, &c4_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kCSTUsingSystemIO, &cst_using_sustemio, &bootInfo->chameleonConfig);
c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
aml_add_byte(pack, cstates_count);
struct aml_chunk* tmpl = aml_add_package(pack);
cstate_resource_template[11] = 0x00; // C1
aml_add_buffer(tmpl, cstate_resource_template, sizeof(cstate_resource_template));
aml_add_byte(tmpl, 0x01); // C1
aml_add_byte(tmpl, 0x01); // Latency
aml_add_word(tmpl, 0x03e8); // Power
if (cst_using_sustemio) {
resource_template_register_fixedhw[8] = 0x00;
resource_template_register_fixedhw[9] = 0x00;
resource_template_register_fixedhw[10] = 0x00;
resource_template_register_fixedhw[11] = 0x00; // C1
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x01); // C1
aml_add_byte(tmpl, 0x20); // Latency
aml_add_word(tmpl, 0x03e8); // Power
uint8_t p_blk_lo = acpi_cpu_p_blk + 4;
uint8_t p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
// C2
if (c2_enabled)
{
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C2
resource_template_register_systemio[12] = p_blk_hi; // C2
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x02); // C2
aml_add_byte(tmpl, 0x60); // Latency
aml_add_word(tmpl, 0x01f4); // Power
}
p_blk_lo = acpi_cpu_p_blk + 5;
p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
// C4
if (c4_enabled)
{
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C4
resource_template_register_systemio[12] = p_blk_hi; // C4
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x04); // C4
aml_add_word(tmpl, 0x0A); // Latency
aml_add_byte(tmpl, 0xC8); // Power
}
else
// C3
if (c3_enabled)
{
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C3
resource_template_register_systemio[12] = p_blk_hi; // C3
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x03); // C3
aml_add_word(tmpl, 0x80); // Latency
aml_add_word(tmpl, 0x015e); // Power
}
// C2
if (c2_enabled)
{
tmpl = aml_add_package(pack);
cstate_resource_template[11] = 0x10; // C2
aml_add_buffer(tmpl, cstate_resource_template, sizeof(cstate_resource_template));
aml_add_byte(tmpl, 0x02); // C2
aml_add_byte(tmpl, fadt->C2_Latency);
aml_add_word(tmpl, 0x01f4); // Power
}
// C4
if (c4_enabled)
{
tmpl = aml_add_package(pack);
cstate_resource_template[11] = 0x30; // C4
aml_add_buffer(tmpl, cstate_resource_template, sizeof(cstate_resource_template));
aml_add_byte(tmpl, 0x04); // C4
aml_add_word(tmpl, fadt->C3_Latency / 2); // TODO: right latency for C4
aml_add_byte(tmpl, 0xfa); // Power
}
else
// C3
if (c3_enabled)
{
tmpl = aml_add_package(pack);
cstate_resource_template[11] = 0x20; // C3
aml_add_buffer(tmpl, cstate_resource_template, sizeof(cstate_resource_template));
aml_add_byte(tmpl, 0x03); // C3
aml_add_word(tmpl, fadt->C3_Latency);
aml_add_word(tmpl, 0x015e); // Power
}
}
else {
resource_template_register_fixedhw[11] = 0x00; // C1
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x01); // C1
aml_add_byte(tmpl, 0x01); // Latency
aml_add_word(tmpl, 0x03e8); // Power
// C2
if (c2_enabled)
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x10; // C2
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x02); // C2
aml_add_byte(tmpl, fadt->C2_Latency);
aml_add_word(tmpl, 0x01f4); // Power
}
// C4
if (c4_enabled)
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x30; // C4
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x04); // C4
aml_add_word(tmpl, 0x11); // TODO: right latency for C4
aml_add_byte(tmpl, 0xfa); // Power
}
else
// C3
if (c3_enabled)
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x20; // C3
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x03); // C3
aml_add_word(tmpl, fadt->C3_Latency);
aml_add_word(tmpl, 0x015e); // Power
}
}
// Aliaces
int i;
// Restart Fix
if (Platform.CPU.Vendor == 0x756E6547) {/* Intel */
fix_restart = true;
getBoolForKey(kRestartFix, &fix_restart, &bootInfo->bootConfig);
getBoolForKey(kRestartFix, &fix_restart, &bootInfo->chameleonConfig);
} else {
verbose ("Not an Intel platform: Restart Fix not applied !!!\n");
fix_restart = false;
memcpy(fadt_mod, fadt, fadt->Length);
}
// Determine system type / PM_Model
if ( (value=getStringForKey(kSystemType, &bootInfo->bootConfig))!=NULL)
if ( (value=getStringForKey(kSystemType, &bootInfo->chameleonConfig))!=NULL)
{
if (Platform.Type > 6)
{
int len = 0;
// Try using the file specified with the DSDT option
if (getValueForKey(kDSDT, &filename, &len, &bootInfo->bootConfig))
if (getValueForKey(kDSDT, &filename, &len, &bootInfo->chameleonConfig))
{
sprintf(dirSpec, filename);
}
// SSDT Options
bool drop_ssdt=false, generate_pstates=false, generate_cstates=false;
getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->bootConfig);
getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->bootConfig);
getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->bootConfig);
getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);
getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);
getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->chameleonConfig);
{
int i;
}
#if DEBUG_ACPI
printf("Press a key to continue... (DEBUG_ACPI)\n");
getc();
getchar();
#endif
return 1;
}
branches/iFabio/Chameleon/i386/libsaio/spd.c
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"DDR2 SDRAM", /* 08h SDRAM DDR 2 */
"",/* 09h Undefined */
"",/* 0Ah Undefined */
"DDR3 SDRAM" /* 0Bh SDRAM DDR 3 */
"DDR3 SDRAM"/* 0Bh SDRAM DDR 3 */
};
#define UNKNOWN_MEM_TYPE 2
static uint8_t spd_mem_to_smbios[] =
{
UNKNOWN_MEM_TYPE, /* 00h Undefined */
UNKNOWN_MEM_TYPE, /* 01h FPM */
UNKNOWN_MEM_TYPE, /* 02h EDO */
UNKNOWN_MEM_TYPE, /* 03h PIPELINE NIBBLE */
SMB_MEM_TYPE_SDRAM, /* 04h SDRAM */
SMB_MEM_TYPE_ROM, /* 05h MULTIPLEXED ROM */
SMB_MEM_TYPE_SGRAM, /* 06h SGRAM DDR */
SMB_MEM_TYPE_DDR, /* 07h SDRAM DDR */
SMB_MEM_TYPE_DDR2, /* 08h SDRAM DDR 2 */
UNKNOWN_MEM_TYPE, /* 09h Undefined */
UNKNOWN_MEM_TYPE, /* 0Ah Undefined */
SMB_MEM_TYPE_DDR3 /* 0Bh SDRAM DDR 3 */
UNKNOWN_MEM_TYPE,/* 00h Undefined */
UNKNOWN_MEM_TYPE,/* 01h FPM */
UNKNOWN_MEM_TYPE,/* 02h EDO */
UNKNOWN_MEM_TYPE,/* 03h PIPELINE NIBBLE */
SMB_MEM_TYPE_SDRAM,/* 04h SDRAM */
SMB_MEM_TYPE_ROM,/* 05h MULTIPLEXED ROM */
SMB_MEM_TYPE_SGRAM,/* 06h SGRAM DDR */
SMB_MEM_TYPE_DDR,/* 07h SDRAM DDR */
SMB_MEM_TYPE_DDR2,/* 08h SDRAM DDR 2 */
UNKNOWN_MEM_TYPE,/* 09h Undefined */
UNKNOWN_MEM_TYPE,/* 0Ah Undefined */
SMB_MEM_TYPE_DDR3/* 0Bh SDRAM DDR 3 */
};
#define SPD_TO_SMBIOS_SIZE (sizeof(spd_mem_to_smbios)/sizeof(uint8_t))
int i, speed;
uint8_t spd_size, spd_type;
uint32_t base, mmio, hostc;
bool dump = false;
// bool dump = false;
RamSlotInfo_t* slot;
uint16_t cmd = pci_config_read16(smbus_dev->dev.addr, 0x04);
verbose("Scanning SMBus [%04x:%04x], mmio: 0x%x, ioport: 0x%x, hostc: 0x%x\n",
smbus_dev->vendor_id, smbus_dev->device_id, mmio, base, hostc);
getBoolForKey("DumpSPD", &dump, &bootInfo->bootConfig);
//Azi: no use for this!
// getBoolForKey("DumpSPD", &dump, &bootInfo->chameleonConfig);
// needed at least for laptops
bool fullBanks = Platform.DMI.MemoryModules == Platform.DMI.CntMemorySlots;
slot->Vendor,
slot->PartNo,
slot->SerialNo);
#if DEBUG_SPD
dumpPhysAddr("spd content: ", slot->spd, spd_size);
getc();
#endif
}
// laptops sometimes show slot 0 and 2 with slot 1 empty when only 2 slots are presents so:
Platform.DMI.DIMM[i]=
i>0 && Platform.RAM.DIMM[1].InUse==false && fullBanks && Platform.DMI.CntMemorySlots == 2 ?
mapping[i] : i; // for laptops case, mapping setup would need to be more generic than this
i>0 && Platform.RAM.DIMM[1].InUse==false && fullBanks && Platform.DMI.CntMemorySlots == 2 ?
mapping[i] : i; // for laptops case, mapping setup would need to be more generic than this
slot->spd = NULL;
} // for
{0x8086, 0x266A, "ICH6",read_smb_intel },
{0x8086, 0x27DA, "ICH7",read_smb_intel },
{0x8086, 0x283E, "ICH8",read_smb_intel },
{0x8086, 0x2930, "ICH9",read_smb_intel },
{0x8086, 0x2930, "ICH9",read_smb_intel },
{0x8086, 0x3A30, "ICH10R",read_smb_intel },
{0x8086, 0x3A60, "ICH10B",read_smb_intel },
{0x8086, 0x3B30, "5 Series",read_smb_intel },
branches/iFabio/Chameleon/i386/libsaio/Makefile
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SAIO_OBJS = table.o asm.o bios.o biosfn.o \
disk.o sys.o cache.o bootstruct.o \
stringTable.o load.o pci.o allocate.o misc.o \
ufs.o ufs_byteorder.o \
befs.o freebsd.o openbsd.o \
vbe.o nbp.o hfs.o hfs_compare.o \
xml.o ntfs.o msdos.o md5c.o device_tree.o \
smbios.o smbios_getters.o smbios_decode.o \
fake_efi.o ext2fs.o \
hpet.o dram_controllers.o spd.o usb.o pci_setup.o \
device_inject.o nvidia.o ati.o pci_root.o \
device_inject.o nvidia.o ati.o gma.o pci_root.o \
convert.o aml_generator.o console.o
LIBS = libsaio.a
branches/iFabio/Chameleon/i386/libsaio/pci_root.c
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if (rootuid < 10) return rootuid;
rootuid = 0;/* default uid = 0 */
if (getValueForKey(kPCIRootUID, &val, &len, &bootInfo->bootConfig)) {
if (getValueForKey(kPCIRootUID, &val, &len, &bootInfo->chameleonConfig)) {
if (isdigit(val[0])) rootuid = val[0] - '0';
goto out;
}
/* Chameleon compatibility */
else if (getValueForKey("PciRoot", &val, &len, &bootInfo->bootConfig)) {
else if (getValueForKey("PciRoot", &val, &len, &bootInfo->chameleonConfig)) {
if (isdigit(val[0])) rootuid = val[0] - '0';
goto out;
}
/* PCEFI compatibility */
else if (getValueForKey("-pci0", &val, &len, &bootInfo->bootConfig)) {
else if (getValueForKey("-pci0", &val, &len, &bootInfo->chameleonConfig)) {
rootuid = 0;
goto out;
}
else if (getValueForKey("-pci1", &val, &len, &bootInfo->bootConfig)) {
else if (getValueForKey("-pci1", &val, &len, &bootInfo->chameleonConfig)) {
rootuid = 1;
goto out;
}
branches/iFabio/Chameleon/i386/libsaio/aml_generator.c
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case AML_CHUNK_DWORD:
case AML_CHUNK_QWORD:
case AML_CHUNK_ALIAS:
verbose("aml_add_to_parent: Node doesn't support child nodes!");
verbose("aml_add_to_parent: Node doesn't support child nodes!\n");
return false;
case AML_CHUNK_NAME:
if (parent->First)
{
verbose("aml_add_to_parent: Name node could have one child only!");
verbose("aml_add_to_parent: Name node supports only one child node!\n");
return false;
}
break;
{
if (strlen(name) < 4)
{
verbose("aml_fill_simple_name: simple name %s has incorrect lengh! Must be 4\n", name);
verbose("aml_fill_simple_name: simple name %s has incorrect lengh! Must be 4.\n", name);
return 0;
}
if ((len % 4) > 1 || count == 0)
{
verbose("aml_fill_name: pathname %s has incorrect length! Must be 4, 8, 12, 16, etc\n", name);
verbose("aml_fill_name: pathname %s has incorrect length! Must be 4, 8, 12, 16, etc...\n", name);
return 0;
}
branches/iFabio/Chameleon/i386/libsaio/befs.c
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return;
}
str[strMaxLen]=0;
strncpy (str, buf+0x200, min (strMaxLen, 32));
strncpy (str, buf+0x200, MIN (strMaxLen, 32));
free (buf);
}
branches/iFabio/Chameleon/i386/libsaio/usb.c
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bool fix_ehci, fix_uhci, fix_usb, fix_legacy;
fix_ehci = fix_uhci = fix_usb = fix_legacy = false;
if (getBoolForKey(kUSBBusFix, &fix_usb, &bootInfo->bootConfig))
if (getBoolForKey(kUSBBusFix, &fix_usb, &bootInfo->chameleonConfig))
{
fix_ehci = fix_uhci = fix_legacy = fix_usb;// Disable all if none set
}
else
{
getBoolForKey(kEHCIacquire, &fix_ehci, &bootInfo->bootConfig);
getBoolForKey(kUHCIreset, &fix_uhci, &bootInfo->bootConfig);
getBoolForKey(kLegacyOff, &fix_legacy, &bootInfo->bootConfig);
getBoolForKey(kEHCIacquire, &fix_ehci, &bootInfo->chameleonConfig);
getBoolForKey(kUHCIreset, &fix_uhci, &bootInfo->chameleonConfig);
getBoolForKey(kLegacyOff, &fix_legacy, &bootInfo->chameleonConfig);
}
struct pciList* current = usbList;
{
// Set usb legacy off modification by Signal64
// NOTE: This *must* be called after the last file is loaded from the drive in the event that we are booting form usb.
// NOTE2: This should be called after any getc() call. (aka, after the Wait=y keyworkd is used)
// NOTE2: This should be called after any getc()/getchar() call. (aka, after the Wait=y keyworkd is used)
// AKA: Make this run immediatly before the kernel is called
uint32_tcapaddr, opaddr;
uint8_teecp;
boolalwaysHardBIOSReset;
alwaysHardBIOSReset = false;
if (!getBoolForKey(kEHCIhard, &alwaysHardBIOSReset, &bootInfo->bootConfig)) {
if (!getBoolForKey(kEHCIhard, &alwaysHardBIOSReset, &bootInfo->chameleonConfig)) {
alwaysHardBIOSReset = true;
}
branches/iFabio/Chameleon/i386/libsaio/device_inject.c
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/* Use the static "device-properties" boot config key contents if available,
* otheriwse use the generated one.
*/
if (!getValueForKey(kDeviceProperties, &val, &cnt, &bootInfo->bootConfig) && string)
if (!getValueForKey(kDeviceProperties, &val, &cnt, &bootInfo->chameleonConfig) && string)
{
val = (const char*)string;
cnt = strlength * 2;
branches/iFabio/Chameleon/i386/libsaio/fdisk.h
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#define FDISK_LINUX0x83
#define FDISK_OPENBSD0xa6 /* OpenBSD FFS partition */
#define FDISK_FREEBSD0xa5 /* FreeBSD UFS2 partition */
#define FDISK_BEFS0xeb /* Haiku BeFS partition */
#define FDISK_UFS0xa8 /* Apple UFS partition */
#define FDISK_HFS0xaf /* Apple HFS partition */
#define FDISK_BOOTER0xab /* Apple booter partition */
#define FDISK_BEFS0xeb /* Haiku BeFS partition */
/*
* Format of fdisk partion entry (if present).
branches/iFabio/Chameleon/i386/libsaio/dram_controllers.c
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static long possible_nhm_bus[] = {0xFF, 0x7F, 0x3F};
unsigned long did, vid;
int i;
// Nehalem supports Scrubbing
// First, locate the PCI bus where the MCH is located
for(i = 0; i < sizeof(possible_nhm_bus); i++)
{
case 0: mch_fsb = 1066; break;
case 1: mch_fsb = 533; break;
default:
default:
case 2: mch_fsb = 800; break;
case 3: mch_fsb = 667; break;
case 4: mch_fsb = 1333; break;
{ 0x8086, 0x1A30, "i845",NULL, NULL, NULL },
{ 0x8086, 0x2970, "i946PL/GZ",setup_p35, get_fsb_i965, get_timings_i965 },
{ 0x8086, 0x2990, "Q963/Q965",setup_p35, get_fsb_i965, get_timings_i965 },
{ 0x8086, 0x29A0, "P965/G965",setup_p35, get_fsb_i965, get_timings_i965 },
{ 0x8086, 0x2970, "i946PL/GZ",setup_p35, get_fsb_i965,get_timings_i965},
{ 0x8086, 0x2990, "Q963/Q965",setup_p35, get_fsb_i965,get_timings_i965},
{ 0x8086, 0x29A0, "P965/G965",setup_p35, get_fsb_i965,get_timings_i965},
{ 0x8086, 0x2A00, "GM965/GL960",setup_p35, get_fsb_im965, get_timings_im965 },
{ 0x8086, 0x2A10, "GME965/GLE960",setup_p35, get_fsb_im965, get_timings_im965 },
{ 0x8086, 0x2A40, "PM/GM45/47",setup_p35, get_fsb_im965, get_timings_im965 },
{ 0x8086, 0x2A00, "GM965/GL960",setup_p35, get_fsb_im965,get_timings_im965},
{ 0x8086, 0x2A10, "GME965/GLE960",setup_p35, get_fsb_im965,get_timings_im965},
{ 0x8086, 0x2A40, "PM/GM45/47",setup_p35, get_fsb_im965,get_timings_im965},
{ 0x8086, 0x29B0, "Q35",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x29C0, "P35/G33",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x29D0, "Q33",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x29E0, "X38/X48",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x2E00, "Eaglelake",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x2E10, "Q45/Q43",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x2E20, "P45/G45",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x2E30, "G41",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x29B0, "Q35",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0x29C0, "P35/G33",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0x29D0, "Q33",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0x29E0, "X38/X48",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0x2E00, "Eaglelake",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0x2E10, "Q45/Q43",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0x2E20, "P45/G45",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0x2E30, "G41",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0xD131, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0xD132, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3400, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3401, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3402, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3403, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3404, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3405, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3406, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3407, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0xD131, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0xD132, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3400, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3401, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3402, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3403, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3404, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3405, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3406, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3407, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
};
static const char *memory_channel_types[] =
void scan_dram_controller(pci_dt_t *dram_dev)
{
int i;
for(i = 1; i < sizeof(dram_controllers) / sizeof(dram_controllers[0]); i++)
for(i = 1; i < sizeof(dram_controllers) / sizeof(dram_controllers[0]); i++)
if ((dram_controllers[i].vendor == dram_dev->vendor_id)
&& (dram_controllers[i].device == dram_dev->device_id))
{
memory_channel_types[Platform.RAM.Channels]
,Platform.RAM.CAS, Platform.RAM.TRC, Platform.RAM.TRP, Platform.RAM.RAS
,Platform.RAM.CAS, Platform.RAM.TRC, Platform.RAM.TRP, Platform.RAM.RAS
);
/* getc();
*/
);
//getchar();
}
}
branches/iFabio/Chameleon/i386/libsaio/nvidia.c
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/*
* NVidia injector
*NVidia injector
*
* Copyright (C) 2009 Jasmin Fazlic, iNDi
*Copyright (C) 2009Jasmin Fazlic, iNDi
*
* NVidia injector is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*NVidia injector is free software: you can redistribute it and/or modify
*it under the terms of the GNU General Public License as published by
*the Free Software Foundation, either version 3 of the License, or
*(at your option) any later version.
*
* NVidia driver and injector is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*NVidia driver and injector is distributed in the hope that it will be useful,
*but WITHOUT ANY WARRANTY; without even the implied warranty of
*MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
*GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with NVidia injector. If not, see <http://www.gnu.org/licenses/>.
*You should have received a copy of the GNU General Public License
*along with NVidia injector. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* Alternatively you can choose to comply with APSL
* SOFTWARE.
*/
#include "libsaio.h"
#include "boot.h"
#include "bootstruct.h"
#include "pci.h"
#define DBG(x...)
#endif
#define NVIDIA_ROM_SIZE 0x20000
#define PATCH_ROM_SUCCESS 1
#define PATCH_ROM_SUCCESS_HAS_LVDS 2
#define PATCH_ROM_FAILED 0
#define MAX_NUM_DCB_ENTRIES 16
#define NVIDIA_ROM_SIZE0x10000
#define PATCH_ROM_SUCCESS1
#define PATCH_ROM_SUCCESS_HAS_LVDS2
#define PATCH_ROM_FAILED0
#define MAX_NUM_DCB_ENTRIES16
#define TYPE_GROUPED0xff
#define TYPE_GROUPED 0xff
extern uint32_t devices_number;
const char *nvidia_compatible_0[]={ "@0,compatible","NVDA,NVMac" };
const char *nvidia_compatible_1[]={ "@1,compatible","NVDA,NVMac" };
const char *nvidia_device_type_0[]={ "@0,device_type","display" };
const char *nvidia_device_type_1[]={ "@1,device_type","display" };
const char *nvidia_device_type[]={ "device_type","NVDA,Parent" };
const char *nvidia_name_0[]={ "@0,name","NVDA,Display-A" };
const char *nvidia_name_1[]={ "@1,name","NVDA,Display-B" };
const char *nvidia_slot_name[]={ "AAPL,slot-name","Slot-1" };
const char *nvidia_compatible_0[]={ "@0,compatible","NVDA,NVMac" };
const char *nvidia_compatible_1[]={ "@1,compatible","NVDA,NVMac" };
const char *nvidia_device_type_0[]={ "@0,device_type", "display" };
const char *nvidia_device_type_1[]={ "@1,device_type", "display" };
const char *nvidia_device_type[]={ "device_type","NVDA,Parent" };
const char *nvidia_name_0[]={ "@0,name","NVDA,Display-A" };
const char *nvidia_name_1[]={ "@1,name","NVDA,Display-B" };
const char *nvidia_slot_name[]={ "AAPL,slot-name", "Slot-1" };
static uint8_t default_dcfg_0[]={0xff, 0xff, 0xff, 0xff};
static uint8_t default_dcfg_1[]={0xff, 0xff, 0xff, 0xff};
uint8_t connector_type_1[] ={0x00, 0x08, 0x00, 0x00};
static uint8_t default_NVCAP[]={
static uint8_t default_NVCAP[]= {
0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a,
0x00, 0x00, 0x00, 0x00
};
static uint8_t default_NVPM[]= {
0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00
};
#define NVCAP_LEN ( sizeof(default_NVCAP) / sizeof(uint8_t) )
static uint8_t default_dcfg_0[]={0xff, 0xff, 0xff, 0xff};
static uint8_t default_dcfg_1[]={0xff, 0xff, 0xff, 0xff};
#define DCFG0_LEN ( sizeof(default_dcfg_0) / sizeof(uint8_t) )
#define DCFG1_LEN ( sizeof(default_dcfg_1) / sizeof(uint8_t) )
#define NVCAP_LEN ( sizeof(default_NVCAP) / sizeof(uint8_t) )
static struct nv_chipsets_t NVKnownChipsets[] = {
{ 0x00000000, "Unknown" },
// temporary placement
{ 0x10DE0DF4, "GeForce GT 450M" }, //Azi + issue #99
{ 0x10DE1251, "GeForce GTX 560M" }, // Asus G74SX
//========================================
// 0040 - 004F
{ 0x10DE0040, "GeForce 6800 Ultra" },
{ 0x10DE0041, "GeForce 6800" },
{ 0x10DE0042, "GeForce 6800 LE" },
{ 0x10DE1200, "GeForce GTX 560 Ti" },
{ 0x10DE1244, "GeForce GTX 550 Ti" },
{ 0x10DE1245, "GeForce GTS 450" },
{ 0x10DE1251, "N12E-GS-A1" }
{ 0x10DE1251, "N12E-GS-A1" },
};
static uint16_t swap16(uint16_t x)
static uint16_t read16(uint8_t *ptr, uint16_t offset)
{
uint8_t ret[2];
ret[0] = ptr[offset+1];
ret[1] = ptr[offset];
return *((uint16_t*)&ret);
}
return ((x & 0x000000FF) << 24) | ((x & 0x0000FF00) << 8 ) | ((x & 0x00FF0000) >> 8 ) | ((x & 0xFF000000) >> 24);
}
static uint8_t read8(uint8_t *ptr, uint16_t offset)
static uint8_tread8(uint8_t *ptr, uint16_t offset)
{
return ptr[offset];
}
static uint32_t read32(uint8_t *ptr, uint16_t offset)
{
uint8_t ret[4];
ret[0] = ptr[offset+3];
ret[1] = ptr[offset+2];
ret[2] = ptr[offset+1];
ret[3] = ptr[offset];
return *((uint32_t*)&ret);
}
#endif
}
uint16_t dcbptr = swap16(read16(rom, 0x36));
if(!dcbptr) {
if (!dcbptr) {
printf("no dcb table found\n");
return PATCH_ROM_FAILED;
}/* else
printf("dcb table at offset 0x%04x\n", dcbptr);
*/
uint8_t *dcbtable = &rom[dcbptr];
}
//else
//printf("dcb table at offset 0x%04x\n", dcbptr);
uint8_t *dcbtable = &rom[dcbptr];
uint8_t dcbtable_version = dcbtable[0];
uint8_t headerlength = 0;
uint8_t recordlength = 0;
uint8_t numentries = 0;
uint8_t headerlength = 0;
uint8_t numentries = 0;
uint8_t recordlength = 0;
if(dcbtable_version >= 0x20) {
if (dcbtable_version >= 0x20)
{
uint32_t sig;
if(dcbtable_version >= 0x30) {
if (dcbtable_version >= 0x30)
{
headerlength = dcbtable[1];
numentries = dcbtable[2];
numentries = dcbtable[2];
recordlength = dcbtable[3];
sig = *(uint32_t *)&dcbtable[6];
} else {
}
else
{
sig = *(uint32_t *)&dcbtable[4];
headerlength = 8;
}
if (sig != 0x4edcbdcb) {
printf("bad display config block signature (0x%8x)\n", sig);
if (sig != 0x4edcbdcb)
{
printf("Bad display config block signature (0x%8x)\n", sig); //Azi: issue #48
return PATCH_ROM_FAILED;
}
} else if (dcbtable_version >= 0x14) { /* some NV15/16, and NV11+ */
}
else if (dcbtable_version >= 0x14) /* some NV15/16, and NV11+ */
{
char sig[8] = { 0 };
strncpy(sig, (char *)&dcbtable[-7], 7);
recordlength = 10;
if (strcmp(sig, "DEV_REC")) {
if (strcmp(sig, "DEV_REC"))
{
printf("Bad Display Configuration Block signature (%s)\n", sig);
return PATCH_ROM_FAILED;
}
} else {
}
else
{
printf("ERROR: dcbtable_version is 0x%X\n", dcbtable_version);
return PATCH_ROM_FAILED;
}
if(numentries >= MAX_NUM_DCB_ENTRIES)
if (numentries >= MAX_NUM_DCB_ENTRIES)
numentries = MAX_NUM_DCB_ENTRIES;
uint8_t num_outputs = 0, i=0;
struct dcbentry {
uint8_t num_outputs = 0, i = 0;
struct dcbentry
{
uint8_t type;
uint8_t index;
uint8_t *heads;
} entries[numentries];
for (i = 0; i < numentries; i++) {
for (i = 0; i < numentries; i++)
{
uint32_t connection;
connection = *(uint32_t *)&dcbtable[headerlength + recordlength * i];
/* Should we allow discontinuous DCBs? Certainly DCB I2C tables can be discontinuous */
if ((connection & 0x0000000f) == 0x0000000f) /* end of records */
continue;
entries[num_outputs].type = connection & 0xf;
entries[num_outputs].index = num_outputs;
entries[num_outputs++].heads = (uint8_t*)&(dcbtable[(headerlength + recordlength * i) + 1]);
}
int has_lvds = false;
uint8_t channel1 = 0, channel2 = 0;
for(i=0; i<num_outputs; i++) {
if(entries[i].type == 3) {
for (i = 0; i < num_outputs; i++)
{
if (entries[i].type == 3)
{
has_lvds = true;
//printf("found LVDS\n");
channel1 |= ( 0x1 << entries[i].index);
entries[i].type = TYPE_GROUPED;
}
}
// if we have a LVDS output, we group the rest to the second channel
if(has_lvds) {
for(i=0; i<num_outputs; i++) {
if(entries[i].type == TYPE_GROUPED)
if (has_lvds)
{
for (i = 0; i < num_outputs; i++)
{
if (entries[i].type == TYPE_GROUPED)
continue;
channel2 |= ( 0x1 << entries[i].index);
entries[i].type = TYPE_GROUPED;
}
} else {
//
}
else
{
int x;
// we loop twice as we need to generate two channels
for(x=0; x<=1; x++) {
for(i=0; i<num_outputs; i++) {
if(entries[i].type == TYPE_GROUPED)
for (x = 0; x <= 1; x++)
{
for (i=0; i<num_outputs; i++)
{
if (entries[i].type == TYPE_GROUPED)
continue;
// if type is TMDS, the prior output is ANALOG
// we always group ANALOG and TMDS
// if there is a TV output after TMDS, we group it to that channel as well
if(i && entries[i].type == 0x2) {
switch (x) {
if (i && entries[i].type == 0x2)
{
switch (x)
{
case 0:
//printf("group channel 1\n");
channel1 |= ( 0x1 << entries[i].index);
entries[i].type = TYPE_GROUPED;
if((entries[i-1].type == 0x0)) {
if ((entries[i-1].type == 0x0))
{
channel1 |= ( 0x1 << entries[i-1].index);
entries[i-1].type = TYPE_GROUPED;
}
// group TV as well if there is one
if( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) ) {
if ( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) )
{
//printf("group tv1\n");
channel1 |= ( 0x1 << entries[i+1].index);
entries[i+1].type = TYPE_GROUPED;
}
break;
case 1:
//printf("group channel 2 : %d\n", i);
channel2 |= ( 0x1 << entries[i].index);
entries[i].type = TYPE_GROUPED;
if((entries[i-1].type == 0x0)) {
if ((entries[i - 1].type == 0x0))
{
channel2 |= ( 0x1 << entries[i-1].index);
entries[i-1].type = TYPE_GROUPED;
}
// group TV as well if there is one
if( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) ) {
if ( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) )
{
//printf("group tv2\n");
channel2 |= ( 0x1 << entries[i+1].index);
entries[i+1].type = TYPE_GROUPED;
}
break;
}
break;
}
// if we have left ungrouped outputs merge them to the empty channel
uint8_t *togroup;// = (channel1 ? (channel2 ? NULL : &channel2) : &channel1);
togroup = &channel2;
for(i=0; i<num_outputs;i++)
if(entries[i].type != TYPE_GROUPED) {
for (i = 0; i < num_outputs; i++)
{
if (entries[i].type != TYPE_GROUPED)
{
//printf("%d not grouped\n", i);
if(togroup)
if (togroup)
{
*togroup |= ( 0x1 << entries[i].index);
}
entries[i].type = TYPE_GROUPED;
}
}
if(channel1 > channel2) {
if (channel1 > channel2)
{
uint8_t buff = channel1;
channel1 = channel2;
channel2 = buff;
default_NVCAP[8] = channel2;
// patching HEADS
for(i=0; i<num_outputs;i++) {
if(channel1 & (1 << i))
for (i = 0; i < num_outputs; i++)
{
if (channel1 & (1 << i))
{
*entries[i].heads = 1;
}
else if(channel2 & (1 << i))
{
*entries[i].heads = 2;
}
}
return (has_lvds ? PATCH_ROM_SUCCESS_HAS_LVDS : PATCH_ROM_SUCCESS);
}
static char *get_nvidia_model(uint32_t id) {
inti;
for (i=1; i< (sizeof(NVKnownChipsets) / sizeof(NVKnownChipsets[0])); i++) {
if (NVKnownChipsets[i].device == id) {
static char *get_nvidia_model(uint32_t id)
{
int i;
for (i = 1; i < (sizeof(NVKnownChipsets) / sizeof(NVKnownChipsets[0])); i++) {
if (NVKnownChipsets[i].device == id)
{
return NVKnownChipsets[i].name;
}
}
static uint32_t load_nvidia_bios_file(const char *filename, uint8_t *buf, int bufsize)
{
intfd;
intsize;
if ((fd = open_bvdev("bt(0,0)", filename, 0)) < 0) {
int fd;
int size;
if ((fd = open_bvdev("bt(0,0)", filename, 0)) < 0)
{
return 0;
}
size = file_size(fd);
if (size > bufsize) {
printf("Filesize of %s is bigger than expected! Truncating to 0x%x Bytes!\n", filename, bufsize);
if (size > bufsize)
{
printf("Filesize of %s is bigger than expected! Truncating to 0x%x Bytes!\n",
filename, bufsize);
size = bufsize;
}
size = read(fd, (char *)buf, size);
close(fd);
return size > 0 ? size : 0;
}
static int devprop_add_nvidia_template(struct DevPropDevice *device)
{
chartmp[16];
if(!device)
char tmp[16];
if (!device)
return 0;
if(!DP_ADD_TEMP_VAL(device, nvidia_compatible_0))
if (!DP_ADD_TEMP_VAL(device, nvidia_compatible_0))
return 0;
if(!DP_ADD_TEMP_VAL(device, nvidia_device_type_0))
if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_0))
return 0;
if(!DP_ADD_TEMP_VAL(device, nvidia_name_0))
if (!DP_ADD_TEMP_VAL(device, nvidia_name_0))
return 0;
if(!DP_ADD_TEMP_VAL(device, nvidia_compatible_1))
if (!DP_ADD_TEMP_VAL(device, nvidia_compatible_1))
return 0;
if(!DP_ADD_TEMP_VAL(device, nvidia_device_type_1))
if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_1))
return 0;
if(!DP_ADD_TEMP_VAL(device, nvidia_name_1))
if (!DP_ADD_TEMP_VAL(device, nvidia_name_1))
return 0;
if(!DP_ADD_TEMP_VAL(device, nvidia_device_type))
if (!DP_ADD_TEMP_VAL(device, nvidia_device_type))
return 0;
// Rek : Dont use sprintf return, it does not WORK !! our custom sprintf() always return 0!
// len = sprintf(tmp, "Slot-%x", devices_number);
sprintf(tmp, "Slot-%x",devices_number);
devprop_add_value(device, "AAPL,slot-name", (uint8_t *) tmp, strlen(tmp));
devices_number++;
return 1;
}
int hex2bin(const char *hex, uint8_t *bin, int len)
{
char*p;
inti;
inti;
charbuf[3];
if (hex == NULL || bin == NULL || len <= 0 || strlen(hex) != len * 2) {
printf("[ERROR] bin2hex input error\n");
return -1;
}
buf[2] = '\0';
p = (char *) hex;
for (i=0; i<len; i++) {
for (i = 0; i < len; i++)
{
if (p[0] == '\0' || p[1] == '\0' || !isxdigit(p[0]) || !isxdigit(p[1])) {
printf("[ERROR] bin2hex '%s' syntax error\n", hex);
return -2;
unsigned long long mem_detect(volatile uint8_t *regs, uint8_t nvCardType, pci_dt_t *nvda_dev)
{
unsigned long long vram_size = 0;
if (nvCardType < NV_ARCH_50) {
if (nvCardType < NV_ARCH_50)
{
vram_size = REG32(NV04_PFB_FIFO_DATA);
vram_size &= NV10_PFB_FIFO_DATA_RAM_AMOUNT_MB_MASK;
}
else if (nvCardType < NV_ARCH_C0) {
else if (nvCardType < NV_ARCH_C0)
{
vram_size = REG32(NV04_PFB_FIFO_DATA);
vram_size |= (vram_size & 0xff) << 32;
vram_size &= 0xffffffff00ll;
}
else { // >= NV_ARCH_C0
else // >= NV_ARCH_C0
{
vram_size = REG32(NVC0_MEM_CTRLR_RAM_AMOUNT) << 20;
vram_size *= REG32(NVC0_MEM_CTRLR_COUNT);
}
// workaround code for GT 420/430 & 9600M GT
// Workaround for GT 420/430 & 9600M GT
switch (nvda_dev->device_id)
{
case 0x0DE1: vram_size = 1024*1024*1024; break; // GT 430
case 0x0DE2: vram_size = 1024*1024*1024; break; // GT 420
case 0x0649: vram_size = 512*1024*1024; break; // 9600M GT
case 0x0649: vram_size = 512*1024*1024; break;// 9600M GT
default: break;
}
return vram_size;
}
bool setup_nvidia_devprop(pci_dt_t *nvda_dev)
{
struct DevPropDevice*device;
char*devicepath;
option_rom_pci_header_t*rom_pci_header;
volatile uint8_t*regs;
uint8_t*rom;
uint8_t*nvRom;
uint8_tnvCardType;
unsigned long longvideoRam;
uint32_tnvBiosOveride;
uint32_tbar[7];
uint32_tboot_display;
intnvPatch;
intlen;
charbiosVersion[32];
charnvFilename[32];
charkNVCAP[12];
char*model;
const char*value;
booldoit;
struct DevPropDevice*device;
char*devicepath;
option_rom_pci_header_t *rom_pci_header;
volatile uint8_t*regs;
uint8_t*rom;
uint8_t*nvRom;
uint8_tnvCardType;
unsigned long longvideoRam;
uint32_tnvBiosOveride;
uint32_tbar[7];
uint32_tboot_display;
intnvPatch;
intlen;
charbiosVersion[32];
charnvFilename[32];
charkNVCAP[12];
char*model;
const char*value;
booldoit;
devicepath = get_pci_dev_path(nvda_dev);
bar[0] = pci_config_read32(nvda_dev->dev.addr, 0x10 );
regs = (uint8_t *) (bar[0] & ~0x0f);
// get card type
nvCardType = (REG32(0) >> 20) & 0x1ff;
// Amount of VRAM in kilobytes
videoRam = mem_detect(regs, nvCardType, nvda_dev);
model = get_nvidia_model((nvda_dev->vendor_id << 16) | nvda_dev->device_id);
verbose("nVidia %s %dMB NV%02x [%04x:%04x] :: %s\n",
verbose("nVidia %s %dMB NV%02x [%04x:%04x] :: %s\n",
model, (uint32_t)(videoRam / 1024 / 1024),
(REG32(0) >> 20) & 0x1ff, nvda_dev->vendor_id, nvda_dev->device_id,
devicepath);
rom = malloc(NVIDIA_ROM_SIZE);
sprintf(nvFilename, "/Extra/%04x_%04x.rom", (uint16_t)nvda_dev->vendor_id, (uint16_t)nvda_dev->device_id);
if (getBoolForKey(kUseNvidiaROM, &doit, &bootInfo->bootConfig) && doit) {
sprintf(nvFilename, "/Extra/%04x_%04x.rom", (uint16_t)nvda_dev->vendor_id,
(uint16_t)nvda_dev->device_id);
if (getBoolForKey(kUseNvidiaROM, &doit, &bootInfo->chameleonConfig) && doit)
{
verbose("Looking for nvidia video bios file %s\n", nvFilename);
nvBiosOveride = load_nvidia_bios_file(nvFilename, rom, NVIDIA_ROM_SIZE);
if (nvBiosOveride > 0) {
if (nvBiosOveride > 0)
{
verbose("Using nVidia Video BIOS File %s (%d Bytes)\n", nvFilename, nvBiosOveride);
DBG("%s Signature 0x%02x%02x %d bytes\n", nvFilename, rom[0], rom[1], nvBiosOveride);
} else {
}
else
{
printf("ERROR: unable to open nVidia Video BIOS File %s\n", nvFilename);
return false;
}
} else {
}
else
{
// Otherwise read bios from card
nvBiosOveride = 0;
// TODO: we should really check for the signature before copying the rom, i think.
// PRAMIN first
nvRom = (uint8_t*)&regs[NV_PRAMIN_OFFSET];
bcopy((uint32_t *)nvRom, rom, NVIDIA_ROM_SIZE);
// Valid Signature ?
if (rom[0] != 0x55 && rom[1] != 0xaa) {
if (rom[0] != 0x55 && rom[1] != 0xaa)
{
// PROM next
// Enable PROM access
(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED;
nvRom = (uint8_t*)&regs[NV_PROM_OFFSET];
bcopy((uint8_t *)nvRom, rom, NVIDIA_ROM_SIZE);
// disable PROM access
(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED;
(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED;
// Valid Signature ?
if (rom[0] != 0x55 && rom[1] != 0xaa) {
if (rom[0] != 0x55 && rom[1] != 0xaa)
{
// 0xC0000 last
bcopy((char *)0xc0000, rom, NVIDIA_ROM_SIZE);
// Valid Signature ?
if (rom[0] != 0x55 && rom[1] != 0xaa) {
if (rom[0] != 0x55 && rom[1] != 0xaa)
{
printf("ERROR: Unable to locate nVidia Video BIOS\n");
return false;
} else {
}
else
{
DBG("ROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
}
} else {
}
else
{
DBG("PROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
}
} else {
}
else
{
DBG("PRAM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
}
}
if ((nvPatch = patch_nvidia_rom(rom)) == PATCH_ROM_FAILED) {
printf("ERROR: nVidia ROM Patching Failed!\n");
//return false;
}
rom_pci_header = (option_rom_pci_header_t*)(rom + *(uint16_t *)&rom[24]);
// check for 'PCIR' sig
if (rom_pci_header->signature == 0x50434952) {
if (rom_pci_header->device_id != nvda_dev->device_id) {
if (rom_pci_header->signature == 0x50434952)
{
if (rom_pci_header->device_id != nvda_dev->device_id)
{
// Get Model from the OpROM
model = get_nvidia_model((rom_pci_header->vendor_id << 16) | rom_pci_header->device_id);
} else {
}
else
{
printf("nVidia incorrect PCI ROM signature: 0x%x\n", rom_pci_header->signature);
}
}
if (!string) {
string = devprop_create_string();
}
device = devprop_add_device(string, devicepath);
/* FIXME: for primary graphics card only */
boot_display = 1;
devprop_add_value(device, "@0,AAPL,boot-display", (uint8_t*)&boot_display, 4);
if(nvPatch == PATCH_ROM_SUCCESS_HAS_LVDS) {
if (nvPatch == PATCH_ROM_SUCCESS_HAS_LVDS) {
uint8_t built_in = 0x01;
devprop_add_value(device, "@0,built-in", &built_in, 1);
}
// get bios version
const int MAX_BIOS_VERSION_LENGTH = 32;
char* version_str = (char*)malloc(MAX_BIOS_VERSION_LENGTH);
memset(version_str, 0, MAX_BIOS_VERSION_LENGTH);
int i, version_start;
int crlf_count = 0;
// only search the first 384 bytes
for(i = 0; i < 0x180; i++) {
if(rom[i] == 0x0D && rom[i+1] == 0x0A) {
for (i = 0; i < 0x180; i++)
{
if (rom[i] == 0x0D && rom[i+1] == 0x0A)
{
crlf_count++;
// second 0x0D0A was found, extract bios version
if(crlf_count == 2) {
if(rom[i-1] == 0x20) i--; // strip last " "
for(version_start = i; version_start > (i-MAX_BIOS_VERSION_LENGTH); version_start--) {
if (crlf_count == 2)
{
if (rom[i-1] == 0x20) i--; // strip last " "
for (version_start = i; version_start > (i-MAX_BIOS_VERSION_LENGTH); version_start--)
{
// find start
if(rom[version_start] == 0x00) {
if (rom[version_start] == 0x00)
{
version_start++;
// strip "Version "
if(strncmp((const char*)rom+version_start, "Version ", 8) == 0) {
if (strncmp((const char*)rom+version_start, "Version ", 8) == 0)
{
version_start += 8;
}
}
sprintf(biosVersion, "%s", (nvBiosOveride > 0) ? nvFilename : version_str);
sprintf(kNVCAP, "NVCAP_%04x", nvda_dev->device_id);
if (getValueForKey(kNVCAP, &value, &len, &bootInfo->bootConfig) && len == NVCAP_LEN * 2) {
uint8_tnew_NVCAP[NVCAP_LEN];
if (hex2bin(value, new_NVCAP, NVCAP_LEN) == 0) {
if (getValueForKey(kNVCAP, &value, &len, &bootInfo->chameleonConfig) && len == NVCAP_LEN * 2)
{
uint8_t new_NVCAP[NVCAP_LEN];
if (hex2bin(value, new_NVCAP, NVCAP_LEN) == 0)
{
verbose("Using user supplied NVCAP for %s :: %s\n", model, devicepath);
memcpy(default_NVCAP, new_NVCAP, NVCAP_LEN);
}
}
if (getValueForKey(kDcfg0, &value, &len, &bootInfo->chameleonConfig) && len == DCFG0_LEN * 2)
{
uint8_t new_dcfg0[DCFG0_LEN];
if (hex2bin(value, new_dcfg0, DCFG0_LEN) == 0)
{
memcpy(default_dcfg_0, new_dcfg0, DCFG0_LEN);
verbose("Using user supplied @0,display-cfg\n");
printf("@0,display-cfg: %02x%02x%02x%02x\n",
default_dcfg_0[0], default_dcfg_0[1], default_dcfg_0[2], default_dcfg_0[3]);
}
}
if (getValueForKey(kDcfg1, &value, &len, &bootInfo->chameleonConfig) && len == DCFG1_LEN * 2)
{
uint8_t new_dcfg1[DCFG1_LEN];
if (hex2bin(value, new_dcfg1, DCFG1_LEN) == 0)
{
memcpy(default_dcfg_1, new_dcfg1, DCFG1_LEN);
verbose("Using user supplied @1,display-cfg\n");
printf("@1,display-cfg: %02x%02x%02x%02x\n",
default_dcfg_1[0], default_dcfg_1[1], default_dcfg_1[2], default_dcfg_1[3]);
}
}
#if DEBUG_NVCAP
printf("NVCAP: %02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x\n",
default_NVCAP[0], default_NVCAP[1], default_NVCAP[2], default_NVCAP[3],
default_NVCAP[4], default_NVCAP[5], default_NVCAP[6], default_NVCAP[7],
default_NVCAP[8], default_NVCAP[9], default_NVCAP[10], default_NVCAP[11],
default_NVCAP[12], default_NVCAP[13], default_NVCAP[14], default_NVCAP[15],
default_NVCAP[16], default_NVCAP[17], default_NVCAP[18], default_NVCAP[19]);
printf("NVCAP: %02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x\n",
default_NVCAP[0], default_NVCAP[1], default_NVCAP[2], default_NVCAP[3],
default_NVCAP[4], default_NVCAP[5], default_NVCAP[6], default_NVCAP[7],
default_NVCAP[8], default_NVCAP[9], default_NVCAP[10], default_NVCAP[11],
default_NVCAP[12], default_NVCAP[13], default_NVCAP[14], default_NVCAP[15],
default_NVCAP[16], default_NVCAP[17], default_NVCAP[18], default_NVCAP[19]);
#endif
devprop_add_nvidia_template(device);
devprop_add_value(device, "NVCAP", default_NVCAP, NVCAP_LEN);
devprop_add_value(device, "VRAM,totalsize", (uint8_t*)&videoRam, 4);
devprop_add_value(device, "model", (uint8_t*)model, strlen(model) + 1);
devprop_add_value(device, "rom-revision", (uint8_t*)biosVersion, strlen(biosVersion) + 1);
devprop_add_value(device, "@1,connector-type", connector_type_1, 4);
devprop_add_value(device, "@0,display-cfg", default_dcfg_0, DCFG0_LEN);
devprop_add_value(device, "@1,display-cfg", default_dcfg_1, DCFG1_LEN);
devprop_add_value(device, "NVPM", default_NVPM, 28);
if (getBoolForKey(kVBIOS, &doit, &bootInfo->bootConfig) && doit) {
//add HDMI Audio back to nvidia
//http://forge.voodooprojects.org/p/chameleon/issues/67/
//uint8_t connector_type_1[]= {0x00, 0x08, 0x00, 0x00};
//devprop_add_value(device, "@1,connector-type",connector_type_1, 4);
//end Nvidia HDMI Audio
if (getBoolForKey(kVBIOS, &doit, &bootInfo->chameleonConfig) && doit)
{
devprop_add_value(device, "vbios", rom, (nvBiosOveride > 0) ? nvBiosOveride : (rom[2] * 512));
}
stringdata = malloc(sizeof(uint8_t) * string->length);
memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);
stringlength = string->length;
return true;
}
branches/iFabio/Chameleon/i386/libsaio/ati.c
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*
*/
#include "libsaio.h"
#include "boot.h"
#include "bootstruct.h"
#include "pci.h"
#include "platform.h"
#include "device_inject.h"
#include "ati_reg.h"
#defineOFFSET_TO_GET_ATOMBIOS_STRINGS_START0x6e
#define OFFSET_TO_GET_ATOMBIOS_STRINGS_START 0x6e
#define Reg32(reg)(*(volatile uint32_t *)(card->mmio + reg))
#define RegRead32(reg)(Reg32(reg))
#define RegWrite32(reg, value)(Reg32(reg) = value)
#define Reg32(reg)(*(volatile uint32_t *)(card->mmio + reg))
#define RegRead32(reg)(Reg32(reg))
#define RegWrite32(reg, value)(Reg32(reg) = value)
typedef enum {
kNul,
CHIP_FAMILY_JUNIPER,
CHIP_FAMILY_CYPRESS,
CHIP_FAMILY_HEMLOCK,
//CHIP_FAMILY_GRANVILLE, //Azi:---
/* Northern Islands */
CHIP_FAMILY_BARTS,
CHIP_FAMILY_CAICOS,
"Juniper",// RV840
"Cypress",// RV870
"Hemlock",
//"Granville"//Azi:---
/* Northern Islands */
"Barts",
"Caicos",
} config_name_t;
typedef struct {
uint16_tdevice_id;
uint32_tsubsys_id;
chip_family_tchip_family;
const char*model_name;
config_name_tcfg_name;
uint16_tdevice_id;
uint32_tsubsys_id;
chip_family_tchip_family;
const char*model_name;
config_name_tcfg_name;
} radeon_card_info_t;
static radeon_card_info_t radeon_cards[] = {
//Azi: added devices
// temporary placement
// issue #88
{ 0x6741,0x1646103C,CHIP_FAMILY_TURKS,/*???*/"AMD Radeon HD 6600M Series",kNull},
// issue #89
{ 0x68A8,0x050E1025,CHIP_FAMILY_CYPRESS,"AMD Radeon HD 6850M",kUakari}, //Azi: CHIP_FAMILY_GRANVILLE ??
// issue #90
{ 0x68E4,0x1c921043,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur},
// issue #91
{ 0x68C0,0x1594103C,CHIP_FAMILY_REDWOOD,"AMD Radeon HD 6570M",kNull},
//==================================//================================//============================//
/* Earlier cards are not supported */
{ 0x9400,0x30001002,CHIP_FAMILY_R600,"ATI Radeon HD 2900 PRO",kNull},
{ 0x9400,0x25521002,CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull},
{ 0x9440,0x24401682,CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9440,0x24411682,CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9440,0x24441682,CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9440,0x24451682,CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9441,0x24401682,CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot},
{ 0x9442,0x24701682,CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0x24711682,CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0x080110B0,CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0xE104174B,CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x944A,0x30001682,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001043,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001458,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001462,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001545,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001787,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x3000174B,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x300017AF,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944C,0x24801682,CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot},
{ 0x944C,0x24811682,CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot},
{ 0x944E,0x3260174B,CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot},
{ 0x944E,0x3261174B,CHIP_FAMILY_RV770,"ATI Radeon HD 4810 series",kMotmot},
{ 0x944E,0x30001787,CHIP_FAMILY_RV770,"ATI Radeon HD 4730 Series",kMotmot},
{ 0x944E,0x30101787,CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot},
{ 0x944E,0x31001787,CHIP_FAMILY_RV770,"ATI Radeon HD 4820",kMotmot},
{ 0x9490,0x30501787,CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9490,0x4710174B,CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9490,0x300017AF,CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9498,0x30501787,CHIP_FAMILY_RV730,"ATI Radeon HD 4700",kNull},
{ 0x9498,0x31001787,CHIP_FAMILY_RV730,"ATI Radeon HD 4720",kNull},
{ 0x9498,0x24511682,CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull},
{ 0x9498,0x24521682,CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull},
{ 0x9498,0x24541682,CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull},
{ 0x9498,0x29331682,CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull},
{ 0x9498,0x29341682,CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull},
{ 0x9498,0x21CF1458,CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kNull},
{ 0x94B3,0x29001682,CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94B3,0x1170174B,CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94B3,0x10020D00,CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94C1,0x10021002,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Pro",kNull},
{ 0x94C1,0x0D021002,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x0D021028,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Pro",kNull},
{ 0x94C1,0x0D021028,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x21741458,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10401462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10331462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10331462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x11101462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C3,0x37161642,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001642,CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x03421002,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001025,CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0x04021028,CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x03021028,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x04021028,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x216A1458,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x21721458,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001458,CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x11041462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x10411462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x11051462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x10321462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001462,CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x3000148C,CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0x2247148C,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull},
{ 0x94C3,0x3000174B,CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0xE400174B,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE370174B,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE400174B,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE370174B,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE400174B,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x203817AF,CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x30001787,CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0x22471787,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull},
{ 0x94C3,0x01011A93,CHIP_FAMILY_RV610,"Qimonda Radeon HD 2400 PRO",kNull},
{ 0x9501,0x30001002,CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9501,0x25421002,CHIP_FAMILY_RV670,"ATI Radeon HD 3870",kNull},
{ 0x9501,0x4750174B,CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9501,0x3000174B,CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull},
{ 0x9501,0x30001787,CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9505,0x30001002,CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9505,0x25421002,CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull},
{ 0x9505,0x30011043,CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3000148C,CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull},
{ 0x9505,0x3002148C,CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3001148C,CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3003148C,CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3004148C,CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x4730174B,CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3010174B,CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3001174B,CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3000174B,CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull},
{ 0x9505,0x30001787,CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9505,0x301017AF,CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9540,0x4590174B,CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull},
{ 0x9540,0x30501787,CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull},
{ 0x954F,0x29201682,CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull},
{ 0x954F,0x29211682,CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull},
{ 0x954F,0x30901682,CHIP_FAMILY_RV710,"XFX Radeon HD 4570",kNull},
{ 0x954F,0x4450174B,CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x954F,0x3000174B,CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull},
{ 0x954F,0x30501787,CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x954F,0x31001787,CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull},
{ 0x954F,0x4570174B,CHIP_FAMILY_RV710,"Sapphire Radeon HD4570",kNull},
{ 0x954F,0x301017AF,CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x9552,0x3000148C,CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x3000174B,CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x30001787,CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x300017AF,CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9581,0x95811002,CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9581,0x3000148C,CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9583,0x3000148C,CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9588,0x01021A93,CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 XT",kNull},
{ 0x9589,0x30001462,CHIP_FAMILY_RV630,"ATI Radeon HD 3610",kNull},
{ 0x9589,0x30001642,CHIP_FAMILY_RV630,"ATI Radeon HD 3610",kNull},
{ 0x9589,0x0E41174B,CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9589,0x30001787,CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9589,0x01001A93,CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 PRO",kNull},
{ 0x9591,0x2303148C,CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kNull},
{ 0x9598,0xB3831002,CHIP_FAMILY_RV635,"ATI All-in-Wonder HD",kNull},
{ 0x9598,0x30011043,CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x30001043,CHIP_FAMILY_RV635,"HD3730",kNull},
{ 0x9598,0x3000148C,CHIP_FAMILY_RV635,"ATI Radeon HD 3730",kNull},
{ 0x9598,0x3031148C,CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x3001148C,CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x30011545,CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 Pro",kNull},
{ 0x9598,0x30001545,CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 XT",kNull},
{ 0x9598,0x4570174B,CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x4580174B,CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x4610174B,CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull},
{ 0x9598,0x3000174B,CHIP_FAMILY_RV635,"Sapphire Radeon HD 3730",kNull},
{ 0x9598,0x3001174B,CHIP_FAMILY_RV635,"Sapphire Radeon HD 3750",kNull},
{ 0x9598,0x301017AF,CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x301117AF,CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x300117AF,CHIP_FAMILY_RV635,"ATI Radeon HD3750",kNull},
{ 0x9598,0x30501787,CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull},
{ 0x95C0,0x3000148C,CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull},
{ 0x95C0,0xE3901745,CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull},
{ 0x95C0,0x3002174B,CHIP_FAMILY_RV620,"ATI Radeon HD 3570",kNull},
{ 0x95C0,0x3020174B,CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C0,0x3000174B,CHIP_FAMILY_RV620,"Sapphire Radeon HD 3550",kNull},
{ 0x95C5,0x3000148C,CHIP_FAMILY_RV620,"ATI Radeon HD 3450",kNull},
{ 0x95C5,0x3001148C,CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull},
{ 0x95C5,0x3002148C,CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x3033148C,CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x3003148C,CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x3032148C,CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x3010174B,CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x4250174B,CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x30501787,CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x301017AF,CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x01051A93,CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull},
{ 0x95C5,0x01041A93,CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull},
{ 0x9400,0x30001002, CHIP_FAMILY_R600,"ATI Radeon HD 2900 PRO",kNull},
{ 0x9400,0x25521002, CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull},
{ 0x9440,0x24401682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9440,0x24411682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9440,0x24441682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9440,0x24451682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9441,0x24401682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot},
{ 0x9442,0x24701682, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0x24711682, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0x080110B0, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0xE104174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x944A,0x30001682, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001043, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001458, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001462, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001545, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x3000174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x300017AF, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944C,0x24801682, CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot},
{ 0x944C,0x24811682, CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot},
{ 0x944E,0x3260174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot},
{ 0x944E,0x3261174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 series",kMotmot},
{ 0x944E,0x30001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4730 Series",kMotmot},
{ 0x944E,0x30101787, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot},
{ 0x944E,0x31001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4820",kMotmot},
{ 0x9490,0x30501787, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9490,0x4710174B, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9490,0x300017AF, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9498,0x30501787, CHIP_FAMILY_RV730,"ATI Radeon HD 4700",kNull},
{ 0x9498,0x31001787, CHIP_FAMILY_RV730,"ATI Radeon HD 4720",kNull},
{ 0x9498,0x24511682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull},
{ 0x9498,0x24521682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull},
{ 0x9498,0x24541682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull},
{ 0x9498,0x29331682, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull},
{ 0x9498,0x29341682, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull},
{ 0x9498,0x21CF1458, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kNull},
{ 0x94B3,0x29001682, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94B3,0x1170174B, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94B3,0x10020D00, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94C1,0x10021002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Pro",kNull},
{ 0x94C1,0x0D021002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x0D021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Pro",kNull},
{ 0x94C1,0x0D021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x21741458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10401462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10331462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10331462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x11101462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C3,0x37161642, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001642, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x03421002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001025, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0x04021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x03021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x04021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x216A1458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x21721458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001458, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x11041462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x10411462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x11051462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x10321462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001462, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x3000148C, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0x2247148C, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull},
{ 0x94C3,0x3000174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0xE400174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE370174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE400174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE370174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE400174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x203817AF, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x30001787, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0x22471787, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull},
{ 0x94C3,0x01011A93, CHIP_FAMILY_RV610,"Qimonda Radeon HD 2400 PRO",kNull},
{ 0x9501,0x30001002, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9501,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3870",kNull},
{ 0x9501,0x4750174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9501,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull},
{ 0x9501,0x30001787, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9505,0x30001002, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9505,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull},
{ 0x9505,0x30011043, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3000148C, CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull},
{ 0x9505,0x3002148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3001148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3003148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3004148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x4730174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3010174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3001174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull},
{ 0x9505,0x30001787, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9505,0x301017AF, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9540,0x4590174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull},
{ 0x9540,0x30501787, CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull},
{ 0x954F,0x29201682, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull},
{ 0x954F,0x29211682, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull},
{ 0x954F,0x30901682, CHIP_FAMILY_RV710,"XFX Radeon HD 4570",kNull},
{ 0x954F,0x4450174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x954F,0x3000174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull},
{ 0x954F,0x30501787, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x954F,0x31001787, CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull},
{ 0x954F,0x4570174B, CHIP_FAMILY_RV710,"Sapphire Radeon HD4570",kNull},
{ 0x954F,0x301017AF, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x9552,0x3000148C, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x3000174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x30001787, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x300017AF, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9581,0x95811002, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9581,0x3000148C, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9583,0x3000148C, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9588,0x01021A93, CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 XT",kNull},
{ 0x9589,0x30001462, CHIP_FAMILY_RV630,"ATI Radeon HD 3610",kNull},
{ 0x9589,0x30001642, CHIP_FAMILY_RV630,"ATI Radeon HD 3610",kNull},
{ 0x9589,0x0E41174B, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9589,0x30001787, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9589,0x01001A93, CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 PRO",kNull},
{ 0x9591,0x2303148C, CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kNull},
//Azi: most of the 9598 are rv630, according to http://developer.amd.com/gpu_assets/ATI_Device_IDs_xxx_xx.txt
{ 0x9598,0xB3831002, CHIP_FAMILY_RV635,"ATI All-in-Wonder HD",kNull},
{ 0x9598,0x30011043, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x30001043, CHIP_FAMILY_RV635,"HD3730",kNull},
{ 0x9598,0x3000148C, CHIP_FAMILY_RV635,"ATI Radeon HD 3730",kNull},
{ 0x9598,0x3031148C, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x3001148C, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x30011545, CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 Pro",kNull},
{ 0x9598,0x30001545, CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 XT",kNull},
{ 0x9598,0x4570174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x4580174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x4610174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull},
{ 0x9598,0x3000174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3730",kNull},
{ 0x9598,0x3001174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3750",kNull},
{ 0x9598,0x301017AF, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x301117AF, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x300117AF, CHIP_FAMILY_RV635,"ATI Radeon HD3750",kNull},
{ 0x9598,0x30501787, CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull},
{ 0x95C0,0x3000148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull},
{ 0x95C0,0xE3901745, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull},
{ 0x95C0,0x3002174B, CHIP_FAMILY_RV620,"ATI Radeon HD 3570",kNull},
{ 0x95C0,0x3020174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C0,0x3000174B, CHIP_FAMILY_RV620,"Sapphire Radeon HD 3550",kNull},
{ 0x95C5,0x3000148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3450",kNull},
{ 0x95C5,0x3001148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull},
{ 0x95C5,0x3002148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x3033148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x3003148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x3032148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x3010174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x4250174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x30501787, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x301017AF, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x01051A93, CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull},
{ 0x95C5,0x01041A93, CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull},
/* Evergreen */
{ 0x6898,0x032E1043,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari},
{ 0x6898,0xE140174B,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari},
{ 0x6898,0x29611682,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari},
{ 0x6898,0x0B001002,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kZonalis},
{ 0x6898,0x00D0106B,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kLangur},
{ 0x6899,0x21E41458,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0x200A1787,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0x22901787,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0xE140174B,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x689C,0x03521043,CHIP_FAMILY_HEMLOCK,"ASUS ARES",kUakari},
{ 0x689C,0x039E1043,CHIP_FAMILY_HEMLOCK,"ASUS EAH5870 Series",kUakari},
{ 0x689C,0x30201682,CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5970",kUakari},
{ 0x68B8,0xE147174B,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x21D71458,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x1482174B,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x29901682,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x29911682,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x200B1787,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x22881787,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x00CF106B,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kHoolock},
{ 0x68D8,0x301117AF,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull},
{ 0x68D8,0x301017AF,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x30001787,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x5690174B,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull},
{ 0x68D8,0x5730174B,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x21D91458,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D8,0x03561043,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D8,0xE151174B,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D9,0x301017AF,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x301017AF,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x30001787,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x5630174B,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68E0,0x04561028,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur},
{ 0x68E1,0x1426103C,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5430M",kEulemur},
{ 0x68F9,0x301317AF,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x301117AF,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x301217AF,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull},
{ 0x68F9,0x30001787,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x30021787,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull},
{ 0x68F9,0x30011787,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull},
{ 0x68F9,0x5470174B,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x5490174B,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull},
{ 0x68F9,0x5530174B,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull},
{ 0x6898,0x032E1043, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari},
{ 0x6898,0xE140174B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari},
{ 0x6898,0x29611682, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari},
{ 0x6898,0x0B001002, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kZonalis},
{ 0x6898,0x00D0106B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kLangur},
{ 0x6899,0x21E41458, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0x200A1787, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0x22901787, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0xE140174B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x689C,0x03521043, CHIP_FAMILY_HEMLOCK,"ASUS ARES",kUakari},
{ 0x689C,0x039E1043, CHIP_FAMILY_HEMLOCK,"ASUS EAH5870 Series",kUakari},
{ 0x689C,0x30201682, CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5970",kUakari},
{ 0x68B8,0xE147174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x21D71458, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x1482174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x29901682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x29911682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x200B1787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x22881787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x00CF106B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kHoolock},
{ 0x68D8,0x301117AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull},
{ 0x68D8,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x5690174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull},
{ 0x68D8,0x5730174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x21D91458, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D8,0x03561043, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D8,0xE151174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D9,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x5630174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68E0,0x04561028, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur},
{ 0x68E1,