Chameleon Applications

Chameleon Applications Commit Details

Date:2011-07-16 01:29:40 (12 years 8 months ago)
Author:ErmaC
Commit:318
Parents: 317
Message:update chameleon to 1162.
Changes:
D/branches/iFabio/Chameleon/i386/libsaio/smbios_patcher.h
D/branches/iFabio/Chameleon/i386/libsaio/ati.h
D/branches/iFabio/Chameleon/i386/libsaio/ufs_byteorder.c
D/branches/iFabio/Chameleon/i386/libsaio/ufs.c
D/branches/iFabio/Chameleon/i386/libsaio/mem.h
M/branches/iFabio/Chameleon/i386/libsaio/Makefile
M/branches/iFabio/Chameleon/i386/libsaio/saio_internal.h
M/branches/iFabio/Chameleon/i386/boot2/options.c
M/branches/iFabio/Chameleon/i386/libsaio/hpet.c
M/branches/iFabio/Chameleon/i386/boot2/graphics.c
M/branches/iFabio/Chameleon/CHANGES
M/branches/iFabio/Chameleon/i386/libsaio/ati.c
M/branches/iFabio/Chameleon/i386/boot1/boot1h.s
M/branches/iFabio/Chameleon/i386/libsaio/sys.c
M/branches/iFabio/Chameleon/i386/boot2/drivers.c
M/branches/iFabio/Chameleon/i386/boot2/mboot.c
M/branches/iFabio/Chameleon/i386/boot0/chain0.s
M/branches/iFabio/Chameleon/i386/libsaio/cpu.c
M/branches/iFabio/Chameleon/i386/libsaio/fake_efi.c
M/branches/iFabio/Chameleon/i386/libsaio/openbsd.c
M/branches/iFabio/Chameleon/i386/modules/Resolution/915resolution.c
M/branches/iFabio/Chameleon/i386/libsaio/cpu.h
M/branches/iFabio/Chameleon/i386/libsa/zalloc.c
M/branches/iFabio/Chameleon/i386/modules/Resolution/edid.c
M/branches/iFabio/Chameleon/i386/modules/uClibcxx/Cconfig
M/branches/iFabio/Chameleon/i386/boot0/boot0.s
M/branches/iFabio/Chameleon/i386/boot2/boot.c
M/branches/iFabio/Chameleon/TODO
M/branches/iFabio/Chameleon/i386/libsaio/nvidia.c
M/branches/iFabio/Chameleon/i386/libsaio/freebsd.c
M/branches/iFabio/Chameleon/i386/boot2/boot.h
M/branches/iFabio/Chameleon/i386/boot2/modules.c
M/branches/iFabio/Chameleon/i386/modules/HelloWorld/HelloWorld.cpp
M/branches/iFabio/Chameleon/i386/modules/klibc/vsscanf.c
M/branches/iFabio/Chameleon/i386/libsaio/stringTable.c
M/branches/iFabio/Chameleon/i386/libsaio/aml_generator.c
M/branches/iFabio/Chameleon/i386/libsaio/pci.h
M/branches/iFabio/Chameleon/i386/libsaio/acpi_patcher.c
M/branches/iFabio/Chameleon/i386/boot2/gui.c
M/branches/iFabio/Chameleon/i386/boot0/Cconfig
M/branches/iFabio/Chameleon/i386/boot1/Cconfig
M/branches/iFabio/Chameleon/i386/boot2/Cconfig
M/branches/iFabio/Chameleon/i386/libsaio/device_inject.c
M/branches/iFabio/Chameleon/i386/boot2/gui.h
M/branches/iFabio/Chameleon/i386/libsaio/smbios.c
M/branches/iFabio/Chameleon/i386/boot2/ramdisk.c
M/branches/iFabio/Chameleon/i386/util/fdisk/cmd.c
M/branches/iFabio/Chameleon/package/Kexts/AHCIPortInjector.kext/Contents/Info.plist
M/branches/iFabio/Chameleon/i386/libsaio/xml.c
M/branches/iFabio/Chameleon/i386/libsaio/console.c
M/branches/iFabio/Chameleon/doc/BootHelp.txt
M/branches/iFabio/Chameleon/i386/libsaio/fdisk.h
M/branches/iFabio/Chameleon/i386/libsaio/xml.h
M/branches/iFabio/Chameleon/i386/libsaio/pci_root.c
M/branches/iFabio/Chameleon/i386/libsaio/befs.c
M/branches/iFabio/Chameleon/i386/libsaio/biosfn.c
M/branches/iFabio/Chameleon/i386/modules/Makefile
M/branches/iFabio/Chameleon/i386/libsaio/saio_types.h
M/branches/iFabio/Chameleon/package/smbios.plist
M/branches/iFabio/Chameleon/i386/libsaio/spd.c
M/branches/iFabio/Chameleon/i386/libsaio/smbios_getters.c
M/branches/iFabio/Chameleon/i386/libsaio/pci_setup.c
M/branches/iFabio/Chameleon/i386/boot2/Makefile
M/branches/iFabio/Chameleon/i386/modules/klibc/Cconfig
M/branches/iFabio/Chameleon/i386/modules/klibc/vsnprintf.c
M/branches/iFabio/Chameleon/doc/README
M/branches/iFabio/Chameleon/i386/libsaio/bootstruct.c
M/branches/iFabio/Chameleon/i386/libsaio/dram_controllers.c
M/branches/iFabio/Chameleon/i386/libsa/printf.c
M/branches/iFabio/Chameleon/i386/Makefile
M/branches/iFabio/Chameleon/i386/libsaio/ext2fs.c
M/branches/iFabio/Chameleon/i386/libsaio/bootstruct.h
M/branches/iFabio/Chameleon/i386/config/Makefile
M/branches/iFabio/Chameleon/i386/libsaio/load.c
M/branches/iFabio/Chameleon/i386/modules/Resolution/Cconfig
M/branches/iFabio/Chameleon/i386/libsa/qsort.c
M/branches/iFabio/Chameleon/i386/libsaio/platform.c
M/branches/iFabio/Chameleon/i386/libsaio/msdos.c
M/branches/iFabio/Chameleon/i386/boot2/bmdecompress.c
M/branches/iFabio/Chameleon/i386/modules/HelloWorld/Cconfig
M/branches/iFabio/Chameleon/i386/libsaio/platform.h
M/branches/iFabio/Chameleon/i386/libsaio/usb.c
M/branches/iFabio/Chameleon/i386/libsaio/disk.c

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branches/iFabio/Chameleon/i386/libsaio/ufs.c
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/*
* Copyright (c) 2000-2003 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* The contents of this file constitute Original Code as defined in and
* are subject to the Apple Public Source License Version 2.0 (the
* "License"). You may not use this file except in compliance with the
* License. Please obtain a copy of the License at
* http://www.apple.com/publicsource and read it before using this file.
*
* This Original Code and all software distributed under the License are
* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
* License for the specific language governing rights and limitations
* under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* ufs.c - File System Module for UFS.
*
* Copyright (c) 1998-2002 Apple Computer, Inc.
*
* DRI: Josh de Cesare
*/
#if 0
#include <sl.h>
#include "ufs.h"
#include "ufs_byteorder.h"
#if !defined(MAXNAMLEN) && defined(UFSMAXNAMLEN)
#define MAXNAMLEN UFSMAXNAMLEN
#endif
typedef struct dinode Inode, *InodePtr;
// Private function prototypes
static char *ReadBlock(long fragNum, long fragOffset, long length,
char *buffer, long cache);
static long ReadInode(long inodeNum, InodePtr inode, long *flags, long *time);
static long ResolvePathToInode(char *filePath, long *flags,
InodePtr fileInode, InodePtr dirInode);
static long ReadDirEntry(InodePtr dirInode, long *fileInodeNum,
long long *dirIndex, char **name);
static long FindFileInDir(char *fileName, long *flags,
InodePtr fileInode, InodePtr dirInode);
static char *ReadFileBlock(InodePtr fileInode, long fragNum, long blockOffset,
long length, char *buffer, long cache);
static long ReadFile(InodePtr fileInode, uint64_t *length, void *base, uint64_t offset);
#define kDevBlockSize (0x200) // Size of each disk block.
#define kDiskLabelBlock (15) // Block the DL is in.
#ifdef __i386__
static CICell gCurrentIH;
static long long gPartitionBase;
static char *gULBuf;
static char *gFSBuf;
static struct fs *gFS;
#if !BOOT1
static struct ufslabel gUFSLabel; // for UUID
#endif
static long gBlockSize;
static long gFragSize;
static long gFragsPerBlock;
static char *gTempBlock;
static char *gTempName;
static char *gTempName2;
static InodePtr gRootInodePtr;
static InodePtr gFileInodePtr;
#else /* !__i386__ */
static CICell gCurrentIH;
static long long gPartitionBase;
static char gDLBuf[8192];
static char gFSBuf[SBSIZE];
static struct fs *gFS;
#if !BOOT1
static struct ufslabel gUFSLabel; // for UUID
#endif
static long gBlockSize;
static long gFragSize;
static long gFragsPerBlock;
static char *gTempBlock;
static char gTempName[MAXNAMLEN + 1];
static char gTempName2[MAXNAMLEN + 1];
static Inode _gRootInode;
static Inode _gFileInode;
static InodePtr gRootInodePtr = &_gRootInode;
static InodePtr gFileInodePtr = &_gFileInode;
#endif /* !__i386__ */
// Public functions
void UFSFree(CICell ih)
{
if(gCurrentIH == ih)
gCurrentIH = 0;
free(ih);
}
long UFSInitPartition( CICell ih )
{
#if !BOOT1
long ret;
#endif
if (ih == gCurrentIH) {
#ifdef __i386__
CacheInit(ih, gBlockSize);
#endif
return 0;
}
#if !BOOT1
verbose("UFSInitPartition: %x\n", ih);
#endif
gCurrentIH = 0;
#ifdef __i386__
if (!gULBuf) gULBuf = (char *) malloc(UFS_LABEL_SIZE);
if (!gFSBuf) gFSBuf = (char *) malloc(SBSIZE);
if (!gTempName) gTempName = (char *) malloc(MAXNAMLEN + 1);
if (!gTempName2) gTempName2 = (char *) malloc(MAXNAMLEN + 1);
if (!gRootInodePtr) gRootInodePtr = (InodePtr) malloc(sizeof(Inode));
if (!gFileInodePtr) gFileInodePtr = (InodePtr) malloc(sizeof(Inode));
if (!gULBuf || !gFSBuf || !gTempName || !gTempName2 ||
!gRootInodePtr || !gFileInodePtr) return -1;
#endif
// Assume there is no Disk Label
gPartitionBase = 0;
#if !BOOT1
// read the disk label to get the UUID
// (rumor has it that UFS headers can be either-endian on disk; hopefully
// that isn't true for this UUID field).
Seek(ih, gPartitionBase + UFS_LABEL_OFFSET);
ret = Read(ih, (long)&gUFSLabel, UFS_LABEL_SIZE);
if(ret != 0)
bzero(&gUFSLabel, UFS_LABEL_SIZE);
#endif /* !BOOT1 */
// Look for the Super Block
Seek(ih, gPartitionBase + SBOFF);
Read(ih, (long)gFSBuf, SBSIZE);
gFS = (struct fs *)gFSBuf;
byte_swap_superblock(gFS);
if (gFS->fs_magic != FS_MAGIC) {
return -1;
}
ih->modTime = gFS->fs_time;
// Calculate the block size and set up the block cache.
gBlockSize = gFS->fs_bsize;
gFragSize = gFS->fs_fsize;
gFragsPerBlock = gBlockSize / gFragSize;
if (gTempBlock != 0) free(gTempBlock);
gTempBlock = malloc(gBlockSize);
CacheInit(ih, gBlockSize);
gCurrentIH = ih;
// Read the Root Inode
ReadInode(ROOTINO, gRootInodePtr, 0, 0);
return 0;
}
#if !BOOT1
long UFSGetUUID(CICell ih, char *uuidStr)
{
long long uuid = gUFSLabel.ul_uuid;
if (UFSInitPartition(ih) == -1) return -1;
if (uuid == 0LL) return -1;
return CreateUUIDString((uint8_t*)(&uuid), sizeof(uuid), uuidStr);
}
#endif /* !BOOT1 */
long UFSLoadFile( CICell ih, char * filePath )
{
return UFSReadFile(ih, filePath, (void *)gFSLoadAddress, 0, 0);
}
long UFSReadFile( CICell ih, char * filePath, void * base, uint64_t offset, uint64_t length )
{
long ret, flags;
#if !BOOT1
verbose("Loading UFS file: [%s] from %x.\n", filePath, (unsigned)ih);
#endif
if (UFSInitPartition(ih) == -1) return -1;
// Skip one or two leading '/'.
if (*filePath == '/') filePath++;
if (*filePath == '/') filePath++;
ret = ResolvePathToInode(filePath, &flags, gFileInodePtr, gRootInodePtr);
if ((ret == -1) || ((flags & kFileTypeMask) != kFileTypeFlat)) return -1;
ret = ReadFile(gFileInodePtr, &length, base, offset);
if (ret == -1) return -1;
return length;
}
#ifndef BOOT1
long UFSGetDirEntry( CICell ih, char * dirPath, long long * dirIndex,
char ** name, long * flags, long * time,
FinderInfo * finderInfo, long * infoValid)
{
long ret, fileInodeNum, dirFlags;
Inode tmpInode;
if (UFSInitPartition(ih) == -1) return -1;
if (infoValid) *infoValid = 0;
// Skip a leading '/' if present
if (*dirPath == '/') dirPath++;
if (*dirPath == '/') dirPath++;
ret = ResolvePathToInode(dirPath, &dirFlags, gFileInodePtr, gRootInodePtr);
if ((ret == -1) || ((dirFlags & kFileTypeMask) != kFileTypeDirectory))
return -1;
ret = ReadDirEntry(gFileInodePtr, &fileInodeNum, dirIndex, name);
if (ret != 0) return ret;
ReadInode(fileInodeNum, &tmpInode, flags, time);
return 0;
}
void
UFSGetDescription(CICell ih, char *str, long strMaxLen)
{
if (UFSInitPartition(ih) == -1) { return; }
struct ufslabel *ul;
// Look for the Disk Label
Seek(ih, 1ULL * UFS_LABEL_OFFSET);
Read(ih, (long)gULBuf, UFS_LABEL_SIZE);
ul = (struct ufslabel *)gULBuf;
unsigned char magic_bytes[] = UFS_LABEL_MAGIC;
int i;
unsigned char *p = (unsigned char *)&ul->ul_magic;
for (i=0; i<sizeof(magic_bytes); i++, p++) {
if (*p != magic_bytes[i])
return;
}
strncpy(str, (const char *)ul->ul_name, strMaxLen);
}
long
UFSGetFileBlock(CICell ih, char *filePath, unsigned long long *firstBlock)
{
long ret, flags;
if (UFSInitPartition(ih) == -1) return -1;
// Skip one or two leading '/'.
if (*filePath == '/') filePath++;
if (*filePath == '/') filePath++;
ret = ResolvePathToInode(filePath, &flags, gFileInodePtr, gRootInodePtr);
if ((ret == -1) || ((flags & kFileTypeMask) != kFileTypeFlat)) return -1;
*firstBlock = (gPartitionBase + 1ULL * gFileInodePtr->di_db[0] * gBlockSize) / 512ULL;
return 0;
}
#endif /* !BOOT1 */
// Private functions
static char * ReadBlock( long fragNum, long blockOffset, long length,
char * buffer, long cache )
{
long long offset;
long blockNum;
blockNum = fragNum / gFragsPerBlock;
fragNum -= blockNum * gFragsPerBlock;
blockOffset += fragNum * gFragSize;
offset = gPartitionBase + 1ULL * blockNum * gBlockSize;
if (cache && ((blockOffset + length) <= gBlockSize)) {
CacheRead(gCurrentIH, gTempBlock, offset, gBlockSize, 1);
if (buffer != 0) bcopy(gTempBlock + blockOffset, buffer, length);
else buffer = gTempBlock + blockOffset;
} else {
offset += blockOffset;
CacheRead(gCurrentIH, buffer, offset, length, 0);
}
return buffer;
}
static long ReadInode( long inodeNum, InodePtr inode, long * flags, long * time )
{
long fragNum = ino_to_fsba(gFS, inodeNum);
long blockOffset = ino_to_fsbo(gFS, inodeNum) * sizeof(Inode);
ReadBlock(fragNum, blockOffset, sizeof(Inode), (char *)inode, 1);
byte_swap_dinode_in(inode);
if (time != 0) *time = inode->di_mtime;
if (flags != 0) {
switch (inode->di_mode & IFMT) {
case IFREG: *flags = kFileTypeFlat; break;
case IFDIR: *flags = kFileTypeDirectory; break;
case IFLNK: *flags = kFileTypeLink; break;
default : *flags = kFileTypeUnknown; break;
}
*flags |= inode->di_mode & kPermMask;
if (inode->di_uid != 0) *flags |= kOwnerNotRoot;
}
return 0;
}
static long ResolvePathToInode( char * filePath, long * flags,
InodePtr fileInode, InodePtr dirInode )
{
char * restPath;
long ret, cnt;
// if filePath is empty the we want this directory.
if (*filePath == '\0') {
bcopy((char *)dirInode, (char *)fileInode, sizeof(Inode));
return 0;
}
// Copy the file name to gTempName
cnt = 0;
while ((filePath[cnt] != '/') && (filePath[cnt] != '\0')) cnt++;
strlcpy(gTempName, filePath, cnt+1);
// Move restPath to the right place.
if (filePath[cnt] != '\0') cnt++;
restPath = filePath + cnt;
// gTempName is a name in the current Dir.
// restPath is the rest of the path if any.
ret = FindFileInDir(gTempName, flags, fileInode, dirInode);
if (ret == -1) return -1;
if ((*restPath != '\0') && ((*flags & kFileTypeMask) == kFileTypeDirectory))
ret = ResolvePathToInode(restPath, flags, fileInode, fileInode);
return ret;
}
static long ReadDirEntry( InodePtr dirInode, long * fileInodeNum,
long long * dirIndex, char ** name )
{
struct direct *dir;
char *buffer;
long long index;
long dirBlockNum, dirBlockOffset;
while (1) {
index = *dirIndex;
dirBlockOffset = (long) (index % DIRBLKSIZ);
dirBlockNum = (long) (index / DIRBLKSIZ);
buffer = ReadFileBlock(dirInode, dirBlockNum, 0, DIRBLKSIZ, 0, 1);
if (buffer == 0) return -1;
dir = (struct direct *)(buffer + dirBlockOffset);
byte_swap_dir_block_in((char *)dir, 1);
*dirIndex += dir->d_reclen;
if (dir->d_ino != 0) break;
if (dirBlockOffset != 0) return -1;
}
*fileInodeNum = dir->d_ino;
*name = strlcpy(gTempName2, dir->d_name, dir->d_namlen+1);
return 0;
}
static long FindFileInDir( char * fileName, long * flags,
InodePtr fileInode, InodePtr dirInode )
{
long ret, inodeNum;
long long index = 0;
char *name;
while (1) {
ret = ReadDirEntry(dirInode, &inodeNum, &index, &name);
if (ret == -1) return -1;
if (strcmp(fileName, name) == 0) break;
}
ReadInode(inodeNum, fileInode, flags, 0);
return 0;
}
static char * ReadFileBlock( InodePtr fileInode, long fragNum, long blockOffset,
long length, char * buffer, long cache )
{
long fragCount, blockNum;
long diskFragNum, indFragNum, indBlockOff, refsPerBlock;
char *indBlock;
fragCount = (fileInode->di_size + gFragSize - 1) / gFragSize;
if (fragNum >= fragCount) return 0;
refsPerBlock = gBlockSize / sizeof(ufs_daddr_t);
blockNum = fragNum / gFragsPerBlock;
fragNum -= blockNum * gFragsPerBlock;
// Get Direct Block Number.
if (blockNum < NDADDR) {
diskFragNum = fileInode->di_db[blockNum];
} else {
blockNum -= NDADDR;
// Get Single Indirect Fragment Number.
if (blockNum < refsPerBlock) {
indFragNum = fileInode->di_ib[0];
} else {
blockNum -= refsPerBlock;
// Get Double Indirect Fragment Number.
if (blockNum < (refsPerBlock * refsPerBlock)) {
indFragNum = fileInode->di_ib[1];
} else {
blockNum -= refsPerBlock * refsPerBlock;
// Get Triple Indirect Fragment Number.
indFragNum = fileInode->di_ib[2];
indBlock = ReadBlock(indFragNum, 0, gBlockSize, 0, 1);
indBlockOff = blockNum / (refsPerBlock * refsPerBlock);
blockNum %= (refsPerBlock * refsPerBlock);
indFragNum = SWAP_BE32(((ufs_daddr_t *)indBlock)[indBlockOff]);
}
indBlock = ReadBlock(indFragNum, 0, gBlockSize, 0, 1);
indBlockOff = blockNum / refsPerBlock;
blockNum %= refsPerBlock;
indFragNum = SWAP_BE32(((ufs_daddr_t *)indBlock)[indBlockOff]);
}
indBlock = ReadBlock(indFragNum, 0, gBlockSize, 0, 1);
diskFragNum = SWAP_BE32(((ufs_daddr_t *)indBlock)[blockNum]);
}
buffer = ReadBlock(diskFragNum+fragNum, blockOffset, length, buffer, cache);
return buffer;
}
static long ReadFile( InodePtr fileInode, uint64_t * length, void * base, uint64_t offset )
{
long bytesLeft, curSize, curFrag;
char *buffer, *curAddr = (char *)base;
bytesLeft = fileInode->di_size;
if (offset > bytesLeft) {
printf("Offset is too large.\n");
return -1;
}
if ((*length == 0) || ((offset + *length) > bytesLeft)) {
*length = bytesLeft - offset;
}
/*
if (bytesLeft > kLoadSize) {
printf("File is too large.\n");
return -1;
}
*/
bytesLeft = *length;
curFrag = (offset / gBlockSize) * gFragsPerBlock;
offset %= gBlockSize;
while (bytesLeft) {
curSize = gBlockSize;
if (curSize > bytesLeft) curSize = bytesLeft;
if ((offset + curSize) > gBlockSize) curSize = (gBlockSize - offset);
buffer = ReadFileBlock(fileInode, curFrag, offset, curSize, curAddr, 0);
if (buffer == 0) break;
if (offset != 0) offset = 0;
curFrag += gFragsPerBlock;
curAddr += curSize;
bytesLeft -= curSize;
}
return bytesLeft;
}
#endif
branches/iFabio/Chameleon/i386/libsaio/smbios_patcher.h
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/*
* Copyright 2008 mackerintel
*/
/*
* AsereBLN: cleanup
*/
#ifndef __LIBSAIO_SMBIOS_PATCHER_H
#define __LIBSAIO_SMBIOS_PATCHER_H
#include "libsaio.h"
#include "SMBIOS.h"
extern char MacModel[8];
extern unsigned int ModelRev;
extern uint64_t smbios_p;
/* From Foundation/Efi/Guid/Smbios/SmBios.h */
/* Modified to wrap Data4 array init with {} */
#define EFI_SMBIOS_TABLE_GUID {0xeb9d2d31, 0x2d88, 0x11d3, 0x9a, 0x16, {0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}
#define SMBIOS_RANGE_START 0x000F0000
#define SMBIOS_RANGE_END 0x000FFFFF
#define SMBIOS_ORIGINAL0
#define SMBIOS_PATCHED1
struct smbios_table_header
{
uint8_ttype;
uint8_tlength;
uint16_thandle;
} __attribute__ ((packed));
struct smbios_property
{
const char*name;
uint8_ttable_type;
enum {SMSTRING, SMWORD, SMBYTE, SMOWORD} value_type;
intoffset;
int(*auto_int) (const char *name, int table_num);
const char*(*auto_str) (const char *name, int table_num);
const char*(*auto_oword) (const char *name, int table_num);
};
struct smbios_table_description
{
uint8_ttype;
intlen;
int(*numfunc)(int tablen);
};
/** call with flag SMBIOS_ORIGINAL to get orig. entrypoint
or call with flag SMBIOS_PATCHED to get patched smbios entrypoint
*/
extern struct SMBEntryPoint*getSmbios(int);
extern struct DMIHeader* FindNextDmiTableOfType(int type, int minlen);
extern struct DMIHeader* FindFirstDmiTableOfType(int type, int minlen);
extern void getSmbiosProductName();
const char *smbiosStringAtIndex(DMIHeader*, int index, int *length );
extern bool scanDMI(void);
extern void scan_cpu_DMI(void); //PlatformInfo_t *); //Slice
#endif /* !__LIBSAIO_SMBIOS_PATCHER_H */
branches/iFabio/Chameleon/i386/libsaio/mem.h
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/*
* Copyright 2010 AsereBLN. All rights reserved. <aserebln@googlemail.com>
*
* mem.h
*/
#ifndef __LIBSAIO_MEM_H
#define __LIBSAIO_MEM_H
#include "platform.h"
extern void scan_memory(); //PlatformInfo_t *);
#endif/* __LIBSAIO_MEM_H */
branches/iFabio/Chameleon/i386/libsaio/ufs_byteorder.c
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/*
* Copyright (c) 1999-2003 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
*
* Portions Copyright (c) 1999-2003 Apple Computer, Inc. All Rights
* Reserved. This file contains Original Code and/or Modifications of
* Original Code as defined in and that are subject to the Apple Public
* Source License Version 2.0 (the "License"). You may not use this file
* except in compliance with the License. Please obtain a copy of the
* License at http://www.apple.com/publicsource and read it before using
* this file.
*
* The Original Code and all software distributed under the License are
* distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
* EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
* INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE OR NON- INFRINGEMENT. Please see the
* License for the specific language governing rights and limitations
* under the License.
*
* @APPLE_LICENSE_HEADER_END@
*/
/*
* Copyright 1993 NeXT, Inc.
* All rights reserved.
*/
#if 0
#include <sys/types.h>
#include <sys/param.h>
//#include <sys/vnode.h>
#include <ufs/ufs/dir.h>
#include <libkern/OSByteOrder.h>
#include "ufs_byteorder.h"
#include "libsaio.h"
#defineswapBigLongToHost(thing) ((thing) = OSSwapBigToHostInt32(thing))
#defineswapBigShortToHost(thing) ((thing) = OSSwapBigToHostInt16(thing))
#definebyte_swap_longlong(thing) ((thing) = OSSwapBigToHostInt64(thing))
#definebyte_swap_int(thing) ((thing) = OSSwapBigToHostInt32(thing))
#definebyte_swap_short(thing) ((thing) = OSSwapBigToHostInt16(thing))
#if UNUSED
void
byte_swap_longlongs(unsigned long long *array, int count)
{
register unsigned long longi;
for (i = 0; i < (unsigned long long)count; i++)
byte_swap_longlong(array[i]);
}
#endif
void
byte_swap_ints(unsigned int *array, int count)
{
register inti;
for (i = 0; i < count; i++)
byte_swap_int(array[i]);
}
void
byte_swap_shorts(unsigned short *array, int count)
{
register inti;
for (i = 0; i < count; i++)
byte_swap_short(array[i]);
}
#if UNUSED
static void
swapBigIntsToHost(unsigned int *array, int count)
{
register inti;
for (i = 0; i < count; i++)
swapBigLongToHost(array[i]);
}
static void
swapBigShortToHosts(unsigned short *array, int count)
{
register inti;
for (i = 0; i < count; i++)
swapBigShortToHost(array[i]);
}
#endif
void
byte_swap_superblock(struct fs *sb)
{
u_int16_t * usptr;
unsigned long size;
byte_swap_ints(((u_int32_t *)&sb->fs_firstfield), 52);
byte_swap_int(sb->fs_cgrotor);
byte_swap_int(sb->fs_cpc);
byte_swap_shorts((u_int16_t *)sb->fs_opostbl, 16 * 8);
byte_swap_ints((u_int32_t *)sb->fs_sparecon, 50);
byte_swap_ints((u_int32_t *)&sb->fs_contigsumsize, 3);
#if UNUSED
byte_swap_longlongs((u_int64_t *)&sb->fs_maxfilesize,3);
#endif
byte_swap_ints((u_int32_t *)&sb->fs_state, 6);
/* Got these magic numbers from mkfs.c in newfs */
if (sb->fs_nrpos != 8 || sb->fs_cpc > 16) {
usptr = (u_int16_t *)((u_int8_t *)(sb) + (sb)->fs_postbloff);
size = sb->fs_cpc * sb->fs_nrpos;
byte_swap_shorts(usptr,size);/* fs_postbloff */
}
}
/* This value should correspond to the value set in the ffs_mounts */
#define RESYMLNKLEN 60
void
byte_swap_dinode_in(struct dinode *di)
{
int i;
di->di_mode = OSSwapInt16(di->di_mode);
di->di_nlink = OSSwapInt16(di->di_nlink);
#ifdef LFS
di->di_u.inumber = OSSwapInt32(di->di_u.inumber);
#else
di->di_u.oldids[0] = OSSwapInt16(di->di_u.oldids[0]);
di->di_u.oldids[1] = OSSwapInt16(di->di_u.oldids[1]);
#endif
di->di_size = OSSwapInt64(di->di_size);
di->di_atime = OSSwapInt32(di->di_atime);
di->di_atimensec = OSSwapInt32(di->di_atimensec);
di->di_mtime = OSSwapInt32(di->di_mtime);
di->di_mtimensec = OSSwapInt32(di->di_mtimensec);
di->di_ctime = OSSwapInt32(di->di_ctime);
di->di_ctimensec = OSSwapInt32(di->di_ctimensec);
if (((di->di_mode & IFMT) != IFLNK ) || (di->di_size > RESYMLNKLEN)) {
for (i=0; i < NDADDR; i++)/* direct blocks */
di->di_db[i] = OSSwapInt32(di->di_db[i]);
for (i=0; i < NIADDR; i++)/* indirect blocks */
di->di_ib[i] = OSSwapInt32(di->di_ib[i]);
}
di->di_flags = OSSwapInt32(di->di_flags);
di->di_blocks = OSSwapInt32(di->di_blocks);
di->di_gen = OSSwapInt32(di->di_gen);
di->di_uid = OSSwapInt32(di->di_uid);
di->di_gid = OSSwapInt32(di->di_gid);
di->di_spare[0] = OSSwapInt32(di->di_spare[0]);
di->di_spare[1] = OSSwapInt32(di->di_spare[1]);
}
void
byte_swap_dir_block_in(char *addr, int count)
{
register struct direct * ep = (struct direct *) addr;
register int entryoffsetinblk = 0;
while (entryoffsetinblk < count) {
ep = (struct direct *) (entryoffsetinblk + addr);
swapBigLongToHost(ep->d_ino);
swapBigShortToHost(ep->d_reclen);
entryoffsetinblk += ep->d_reclen;
if (ep->d_reclen < 12)/* handle garbage in dirs */
break;
}
}
#endif
branches/iFabio/Chameleon/i386/libsaio/ati.h
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/*
* ATI injector
*
* Copyright (C) 2009 Jasmin Fazlic, iNDi, netkas
*
* ATI injector is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* ATI driver and injector is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with ATI injector. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* Alternatively you can choose to comply with APSL
*/
#ifndef __LIBSAIO_ATI_H
#define __LIBSAIO_ATI_H
bool setup_ati_devprop(pci_dt_t *ati_dev);
struct ati_chipsets_t {
unsigned device;
char *name;
};
struct ati_data_key {
uint32_t size;
char *name;
uint8_t data[];
};
#define REG8(reg) ((volatile uint8_t *)regs)[(reg)]
#define REG16(reg) ((volatile uint16_t *)regs)[(reg) >> 1]
#define REG32R(reg) ((volatile uint32_t *)regs)[(reg) >> 2]
#define REG32W(reg, val) ((volatile uint32_t *)regs)[(reg) >> 2] = (val)
#endif /* !__LIBSAIO_ATI_H */
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static long ParseTagInteger(char *buffer, TagPtr *tag);
static long ParseTagData(char *buffer, TagPtr *tag);
static long ParseTagDate(char *buffer, TagPtr *tag);
static long ParseTagBoolean(char *buffer, TagPtr *tag, long type);
static long GetNextTag(char *buffer, char **tag, long *start);
static long FixDataMatchingTag(char *buffer, char *tag);
static TagPtr NewTag(void);
return 0;
}
//==========================================================================
// XMLGetProperty
TagPtr
XMLGetKey( TagPtr dict, int id )
{
TagPtr tagList, tag;
if (dict->type != kTagTypeDict) return 0;
tag = 0;
int element = 0;
tagList = dict->tag;
while (tagList && element != id)
{
tag = tagList;
tagList = tag->tagNext;
if ((tag->type != kTagTypeKey) || (tag->string == 0)) continue;
element++;
if(id == element) return tag;
}
return 0;
}
TagPtr XMLGetValueForKey(TagPtr key)
{
if (!key ||
key->type != kTagTypeKey) return 0;
return key->tag;
}
// XMLGetTag(int index)
// XMLTagCount( TagPtr dict )
&& (dict->type != kTagTypeArray)// If we are an array, any element is valid
) continue;
if(tag->type == kTagTypeKey) printf("Located key %s\n", tag->string);
//if(tag->type == kTagTypeKey) printf("Located key %s\n", tag->string);
count++;
}
pos = 0;
char *configBuffer;
configBuffer = malloc(strlen(buffer)+1);
strcpy(configBuffer, buffer);
int strlength = strlen(buffer);
configBuffer = malloc(strlength+1);
bcopy(buffer, configBuffer, strlength);
configBuffer[strlength] = 0;
buffer_start = configBuffer;
while (1)
//==========================================================================
// ParseTagBoolean
static long
long
ParseTagBoolean( char * buffer, TagPtr * tag, long type )
{
TagPtr tmpTag;
}
/*** Cast functions ***/
bool XMLIsArray(TagPtr entry)
{
return entry && (entry->type == kTagTypeArray);
}
TagPtr XMLCastArray(TagPtr dict)
{
if(!dict) return NULL;
else return NULL;
}
bool XMLIsDict(TagPtr entry)
{
return entry && (entry->type == kTagTypeDict);
}
TagPtr XMLCastDict(TagPtr dict)
{
if(!dict) return NULL;
else return NULL;
}
bool XMLIsString(TagPtr entry)
{
return entry &&
((entry->type == kTagTypeString) ||
(entry->type == kTagTypeKey));
}
char* XMLCastString(TagPtr dict)
{
if(!dict) return NULL;
}
}
bool XMLIsBoolean(TagPtr entry)
{
return entry &&
((entry->type == kTagTypeTrue) ||
(entry->type == kTagTypeFalse));
}
bool XMLCastBoolean(TagPtr dict)
{
if(!dict) return false;
return false;
}
bool XMLIsInteger(TagPtr entry)
{
return entry && (entry->type == kTagTypeInteger);
}
int XMLCastInteger(TagPtr dict)
{
if(!dict)
{
printf("XMLCastInteger: null dict\n");
//printf("XMLCastInteger: null dict\n");
return 0;
}
if(dict->type == kTagTypeInteger) return (int)(dict->string);
return 0;
}
bool XMLAddTagToDictionary(TagPtr dict, char* key, TagPtr value)
{
if (!dict || dict->type != kTagTypeDict) return false;
TagPtr tmpTag;
char* string;
tmpTag = NewTag();
if (tmpTag == 0)
{
return false;
}
string = NewSymbol(key);
if (string == 0)
{
XMLFreeTag(tmpTag);
return false;
}
tmpTag->type = kTagTypeKey;
tmpTag->string = string;
tmpTag->tag = value;
tmpTag->offset = 0;
tmpTag->tagNext = 0;
TagPtr tagList = dict->tag;
if(!tagList)
{
// First tag
dict->tag = tmpTag;
return true;
}
while(tagList && tagList->tagNext) tagList = tagList->tagNext;
if(tagList)
{
tagList->tagNext = tmpTag;
return true;
}
return false;
}
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bool gVerboseMode;
bool gErrors;
/** Kabyl: BooterLog
Azi: Doubled available log size; this seems to fix some hangs and instant reboots caused by
booting with -f (ignore caches). 96kb are enough to hold full log, booting with -f; even so,
this depends on how much we "play" at the boot prompt and with what patches we're playing,
depending on how much they print to the log.
**/ //Azi: closing **/ alows colapse/expand... is this desirable?? colapsing an entire page
// will also colapse comments....
/*
* Azi: Doubled available log size; this seems to fix some hangs and instant reboots caused by
* booting with -f (ignore caches). 96kb are enough to hold full log, booting with -f; even so,
* this depends on how much we "play" at the boot prompt and with what patches we're playing,
* depending on how much they print to the log.
*
* Kabyl: BooterLog
*/
#define BOOTER_LOG_SIZE(128 * 1024)
#define SAFE_LOG_SIZE134
char *msgbuf = 0;
char *cursor = 0;
struct putc_info //Azi: same as below
struct putc_info //Azi: exists on gui.c & printf.c
{
char * str;
char * last_str;
};
static int
sputc(int c, struct putc_info * pi) //Azi: exists on printf.c & gui.c
sputc(int c, struct putc_info * pi) //Azi: same as above
{
if (pi->last_str)
if (pi->str == pi->last_str)
{
register int c = getc();
if ( c == '\r' ) c = '\n';
//if ( c == '\r' ) c = '\n';
if ( c >= ' ' && c < 0x7f) putchar(c);
//if ( c >= ' ' && c < 0x7f) putchar(c);
return (c);
}
void pause()
{
printf("Press a key to continue...\n");
getc();
getchar(); // replace getchar() by pause() were useful.
}
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TagPtr XMLGetProperty( TagPtr dict, const char * key );
TagPtr XMLGetElement( TagPtr dict, int id );
TagPtr XMLGetKey( TagPtr dict, int id );
TagPtr XMLGetValueForKey(TagPtr key);
int XMLTagCount( TagPtr dict );
bool XMLIsType(TagPtr dict, enum xmltype type);
TagPtr XMLCastDict ( TagPtr dict );
TagPtr XMLCastArray( TagPtr dict );
bool XMLIsBoolean(TagPtr entry);
bool XMLIsString (TagPtr entry);
bool XMLIsInteger(TagPtr entry);
bool XMLIsDict (TagPtr entry);
bool XMLIsArray (TagPtr entry);
bool XMLAddTagToDictionary(TagPtr dict, char* key, TagPtr value);
long XMLParseNextTag(char *buffer, TagPtr *tag);
void XMLFreeTag(TagPtr tag);
char* XMLDecode(const char *in);
//
long XMLParseFile( char * buffer, TagPtr * dict );
//==========================================================================
// ParseTag*
long ParseTagBoolean( char * buffer, TagPtr * tag, long type );
#endif /* __LIBSAIO_XML_H */
branches/iFabio/Chameleon/i386/libsaio/bootstruct.c
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* Portions Copyright (c) 1999-2003 Apple Computer, Inc. All Rights
* Reserved. This file contains Original Code and/or Modifications of
* Original Code as defined in and that are subject to the Apple Public
* Source License Version 2.0 (the "License"). You may not use this file
* Source License Version 2.0 (the "License").You may not use this file
* except in compliance with the License. Please obtain a copy of the
* License at http://www.apple.com/publicsource and read it before using
* this file.
bootArgs = (boot_args *)AllocateKernelMemory(sizeof(boot_args));
bcopy(oldAddr, bootArgs, sizeof(boot_args));
}
else {
else
{
void *oldAddr = bootArgsPreLion;
bootArgsPreLion = (boot_args_pre_lion *)AllocateKernelMemory(sizeof(boot_args_pre_lion));
bcopy(oldAddr, bootArgsPreLion, sizeof(boot_args_pre_lion));
branches/iFabio/Chameleon/i386/libsaio/ext2fs.c
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return;
}
str[strMaxLen]=0;
strncpy (str, buf+0x478, min (strMaxLen, 16));
strncpy (str, buf+0x478, MIN(strMaxLen, 16));
free (buf);
}
branches/iFabio/Chameleon/i386/libsaio/bootstruct.h
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/** <-- JavaDoc style (doxygen) //Azi
/*
* Copyright (c) 2002-2003 Apple Computer, Inc. All rights reserved.
*
* @APPLE_LICENSE_HEADER_START@
#include "bios.h"
#include "device_tree.h"
/*! <-- QT style (doxygen) //Azi
/*!
Kernel boot args global also used by booter for its own data.
*/
extern boot_args *bootArgs;
char * configEnd; // pointer to end of config files
char config[CONFIG_SIZE];
config_file_t bootConfig; // boot.plist
config_file_t overrideConfig; // additional boot.plist which can override bootConfig keys
config_file_t bootConfig; // com.apple.Boot.plist
config_file_t chameleonConfig; // org.chameleon.Boot.plist which can override bootConfig keys
config_file_t themeConfig; // theme.plist
config_file_t smbiosConfig; // smbios.plist
config_file_t helperConfig; // boot helper partition's boot.plist
config_file_t ramdiskConfig; // RAMDisk.plist
bool memDetect;
} PrivateBootInfo_t;
extern PrivateBootInfo_t *bootInfo;
branches/iFabio/Chameleon/i386/libsaio/acpi_patcher.c
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uint8_tacpi_cpu_count = 0;
char* acpi_cpu_name[32];
uint32_t acpi_cpu_p_blk = 0;
void get_acpi_cpu_names(unsigned char* dsdt, uint32_t length)
{
acpi_cpu_name[acpi_cpu_count] = malloc(4);
memcpy(acpi_cpu_name[acpi_cpu_count], dsdt+offset, 4);
i = offset + 5;
if (acpi_cpu_count == 0)
acpi_cpu_p_blk = dsdt[i] | (dsdt[i+1] << 8);
verbose("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
0x31, 0x03, 0x10, 0x20 /* 1.._*/
};
char cstate_resource_template[] =
char resource_template_register_fixedhw[] =
{
0x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
0x01, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x79, 0x00
};
char resource_template_register_systemio[] =
{
0x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
0x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x79, 0x00,
};
if (Platform.CPU.Vendor != 0x756E6547) {
verbose ("Not an Intel platform: C-States will not be generated !!!\n");
return NULL;
bool c2_enabled = false;
bool c3_enabled = false;
bool c4_enabled = false;
bool cst_using_sustemio = false;
getBoolForKey(kEnableC2States, &c2_enabled, &bootInfo->bootConfig);
getBoolForKey(kEnableC3States, &c3_enabled, &bootInfo->bootConfig);
getBoolForKey(kEnableC4States, &c4_enabled, &bootInfo->bootConfig);
getBoolForKey(kEnableC2States, &c2_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kEnableC3States, &c3_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kEnableC4States, &c4_enabled, &bootInfo->chameleonConfig);
getBoolForKey(kCSTUsingSystemIO, &cst_using_sustemio, &bootInfo->chameleonConfig);
c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
aml_add_byte(pack, cstates_count);
struct aml_chunk* tmpl = aml_add_package(pack);
cstate_resource_template[11] = 0x00; // C1
aml_add_buffer(tmpl, cstate_resource_template, sizeof(cstate_resource_template));
aml_add_byte(tmpl, 0x01); // C1
aml_add_byte(tmpl, 0x01); // Latency
aml_add_word(tmpl, 0x03e8); // Power
if (cst_using_sustemio) {
resource_template_register_fixedhw[8] = 0x00;
resource_template_register_fixedhw[9] = 0x00;
resource_template_register_fixedhw[10] = 0x00;
resource_template_register_fixedhw[11] = 0x00; // C1
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x01); // C1
aml_add_byte(tmpl, 0x20); // Latency
aml_add_word(tmpl, 0x03e8); // Power
uint8_t p_blk_lo = acpi_cpu_p_blk + 4;
uint8_t p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
// C2
if (c2_enabled)
{
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C2
resource_template_register_systemio[12] = p_blk_hi; // C2
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x02); // C2
aml_add_byte(tmpl, 0x60); // Latency
aml_add_word(tmpl, 0x01f4); // Power
}
p_blk_lo = acpi_cpu_p_blk + 5;
p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
// C4
if (c4_enabled)
{
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C4
resource_template_register_systemio[12] = p_blk_hi; // C4
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x04); // C4
aml_add_word(tmpl, 0x0A); // Latency
aml_add_byte(tmpl, 0xC8); // Power
}
else
// C3
if (c3_enabled)
{
tmpl = aml_add_package(pack);
resource_template_register_systemio[11] = p_blk_lo; // C3
resource_template_register_systemio[12] = p_blk_hi; // C3
aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
aml_add_byte(tmpl, 0x03); // C3
aml_add_word(tmpl, 0x80); // Latency
aml_add_word(tmpl, 0x015e); // Power
}
// C2
if (c2_enabled)
{
tmpl = aml_add_package(pack);
cstate_resource_template[11] = 0x10; // C2
aml_add_buffer(tmpl, cstate_resource_template, sizeof(cstate_resource_template));
aml_add_byte(tmpl, 0x02); // C2
aml_add_byte(tmpl, fadt->C2_Latency);
aml_add_word(tmpl, 0x01f4); // Power
}
// C4
if (c4_enabled)
{
tmpl = aml_add_package(pack);
cstate_resource_template[11] = 0x30; // C4
aml_add_buffer(tmpl, cstate_resource_template, sizeof(cstate_resource_template));
aml_add_byte(tmpl, 0x04); // C4
aml_add_word(tmpl, fadt->C3_Latency / 2); // TODO: right latency for C4
aml_add_byte(tmpl, 0xfa); // Power
}
else
// C3
if (c3_enabled)
{
tmpl = aml_add_package(pack);
cstate_resource_template[11] = 0x20; // C3
aml_add_buffer(tmpl, cstate_resource_template, sizeof(cstate_resource_template));
aml_add_byte(tmpl, 0x03); // C3
aml_add_word(tmpl, fadt->C3_Latency);
aml_add_word(tmpl, 0x015e); // Power
}
}
else {
resource_template_register_fixedhw[11] = 0x00; // C1
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x01); // C1
aml_add_byte(tmpl, 0x01); // Latency
aml_add_word(tmpl, 0x03e8); // Power
// C2
if (c2_enabled)
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x10; // C2
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x02); // C2
aml_add_byte(tmpl, fadt->C2_Latency);
aml_add_word(tmpl, 0x01f4); // Power
}
// C4
if (c4_enabled)
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x30; // C4
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x04); // C4
aml_add_word(tmpl, 0x11); // TODO: right latency for C4
aml_add_byte(tmpl, 0xfa); // Power
}
else
// C3
if (c3_enabled)
{
tmpl = aml_add_package(pack);
resource_template_register_fixedhw[11] = 0x20; // C3
aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
aml_add_byte(tmpl, 0x03); // C3
aml_add_word(tmpl, fadt->C3_Latency);
aml_add_word(tmpl, 0x015e); // Power
}
}
// Aliaces
int i;
// Restart Fix
if (Platform.CPU.Vendor == 0x756E6547) {/* Intel */
fix_restart = true;
getBoolForKey(kRestartFix, &fix_restart, &bootInfo->bootConfig);
getBoolForKey(kRestartFix, &fix_restart, &bootInfo->chameleonConfig);
} else {
verbose ("Not an Intel platform: Restart Fix not applied !!!\n");
fix_restart = false;
memcpy(fadt_mod, fadt, fadt->Length);
}
// Determine system type / PM_Model
if ( (value=getStringForKey(kSystemType, &bootInfo->bootConfig))!=NULL)
if ( (value=getStringForKey(kSystemType, &bootInfo->chameleonConfig))!=NULL)
{
if (Platform.Type > 6)
{
int len = 0;
// Try using the file specified with the DSDT option
if (getValueForKey(kDSDT, &filename, &len, &bootInfo->bootConfig))
if (getValueForKey(kDSDT, &filename, &len, &bootInfo->chameleonConfig))
{
sprintf(dirSpec, filename);
}
// SSDT Options
bool drop_ssdt=false, generate_pstates=false, generate_cstates=false;
getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->bootConfig);
getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->bootConfig);
getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->bootConfig);
getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);
getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);
getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->chameleonConfig);
{
int i;
}
#if DEBUG_ACPI
printf("Press a key to continue... (DEBUG_ACPI)\n");
getc();
getchar();
#endif
return 1;
}
branches/iFabio/Chameleon/i386/libsaio/spd.c
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"DDR2 SDRAM", /* 08h SDRAM DDR 2 */
"",/* 09h Undefined */
"",/* 0Ah Undefined */
"DDR3 SDRAM" /* 0Bh SDRAM DDR 3 */
"DDR3 SDRAM"/* 0Bh SDRAM DDR 3 */
};
#define UNKNOWN_MEM_TYPE 2
static uint8_t spd_mem_to_smbios[] =
{
UNKNOWN_MEM_TYPE, /* 00h Undefined */
UNKNOWN_MEM_TYPE, /* 01h FPM */
UNKNOWN_MEM_TYPE, /* 02h EDO */
UNKNOWN_MEM_TYPE, /* 03h PIPELINE NIBBLE */
SMB_MEM_TYPE_SDRAM, /* 04h SDRAM */
SMB_MEM_TYPE_ROM, /* 05h MULTIPLEXED ROM */
SMB_MEM_TYPE_SGRAM, /* 06h SGRAM DDR */
SMB_MEM_TYPE_DDR, /* 07h SDRAM DDR */
SMB_MEM_TYPE_DDR2, /* 08h SDRAM DDR 2 */
UNKNOWN_MEM_TYPE, /* 09h Undefined */
UNKNOWN_MEM_TYPE, /* 0Ah Undefined */
SMB_MEM_TYPE_DDR3 /* 0Bh SDRAM DDR 3 */
UNKNOWN_MEM_TYPE,/* 00h Undefined */
UNKNOWN_MEM_TYPE,/* 01h FPM */
UNKNOWN_MEM_TYPE,/* 02h EDO */
UNKNOWN_MEM_TYPE,/* 03h PIPELINE NIBBLE */
SMB_MEM_TYPE_SDRAM,/* 04h SDRAM */
SMB_MEM_TYPE_ROM,/* 05h MULTIPLEXED ROM */
SMB_MEM_TYPE_SGRAM,/* 06h SGRAM DDR */
SMB_MEM_TYPE_DDR,/* 07h SDRAM DDR */
SMB_MEM_TYPE_DDR2,/* 08h SDRAM DDR 2 */
UNKNOWN_MEM_TYPE,/* 09h Undefined */
UNKNOWN_MEM_TYPE,/* 0Ah Undefined */
SMB_MEM_TYPE_DDR3/* 0Bh SDRAM DDR 3 */
};
#define SPD_TO_SMBIOS_SIZE (sizeof(spd_mem_to_smbios)/sizeof(uint8_t))
int i, speed;
uint8_t spd_size, spd_type;
uint32_t base, mmio, hostc;
bool dump = false;
// bool dump = false;
RamSlotInfo_t* slot;
uint16_t cmd = pci_config_read16(smbus_dev->dev.addr, 0x04);
verbose("Scanning SMBus [%04x:%04x], mmio: 0x%x, ioport: 0x%x, hostc: 0x%x\n",
smbus_dev->vendor_id, smbus_dev->device_id, mmio, base, hostc);
getBoolForKey("DumpSPD", &dump, &bootInfo->bootConfig);
//Azi: no use for this!
// getBoolForKey("DumpSPD", &dump, &bootInfo->chameleonConfig);
// needed at least for laptops
bool fullBanks = Platform.DMI.MemoryModules == Platform.DMI.CntMemorySlots;
slot->Vendor,
slot->PartNo,
slot->SerialNo);
#if DEBUG_SPD
dumpPhysAddr("spd content: ", slot->spd, spd_size);
getc();
#endif
}
// laptops sometimes show slot 0 and 2 with slot 1 empty when only 2 slots are presents so:
Platform.DMI.DIMM[i]=
i>0 && Platform.RAM.DIMM[1].InUse==false && fullBanks && Platform.DMI.CntMemorySlots == 2 ?
mapping[i] : i; // for laptops case, mapping setup would need to be more generic than this
i>0 && Platform.RAM.DIMM[1].InUse==false && fullBanks && Platform.DMI.CntMemorySlots == 2 ?
mapping[i] : i; // for laptops case, mapping setup would need to be more generic than this
slot->spd = NULL;
} // for
{0x8086, 0x266A, "ICH6",read_smb_intel },
{0x8086, 0x27DA, "ICH7",read_smb_intel },
{0x8086, 0x283E, "ICH8",read_smb_intel },
{0x8086, 0x2930, "ICH9",read_smb_intel },
{0x8086, 0x2930, "ICH9",read_smb_intel },
{0x8086, 0x3A30, "ICH10R",read_smb_intel },
{0x8086, 0x3A60, "ICH10B",read_smb_intel },
{0x8086, 0x3B30, "5 Series",read_smb_intel },
branches/iFabio/Chameleon/i386/libsaio/Makefile
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SAIO_OBJS = table.o asm.o bios.o biosfn.o \
disk.o sys.o cache.o bootstruct.o \
stringTable.o load.o pci.o allocate.o misc.o \
ufs.o ufs_byteorder.o \
befs.o freebsd.o openbsd.o \
vbe.o nbp.o hfs.o hfs_compare.o \
xml.o ntfs.o msdos.o md5c.o device_tree.o \
smbios.o smbios_getters.o smbios_decode.o \
fake_efi.o ext2fs.o \
hpet.o dram_controllers.o spd.o usb.o pci_setup.o \
device_inject.o nvidia.o ati.o pci_root.o \
device_inject.o nvidia.o ati.o gma.o pci_root.o \
convert.o aml_generator.o console.o
LIBS = libsaio.a
branches/iFabio/Chameleon/i386/libsaio/pci_root.c
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if (rootuid < 10) return rootuid;
rootuid = 0;/* default uid = 0 */
if (getValueForKey(kPCIRootUID, &val, &len, &bootInfo->bootConfig)) {
if (getValueForKey(kPCIRootUID, &val, &len, &bootInfo->chameleonConfig)) {
if (isdigit(val[0])) rootuid = val[0] - '0';
goto out;
}
/* Chameleon compatibility */
else if (getValueForKey("PciRoot", &val, &len, &bootInfo->bootConfig)) {
else if (getValueForKey("PciRoot", &val, &len, &bootInfo->chameleonConfig)) {
if (isdigit(val[0])) rootuid = val[0] - '0';
goto out;
}
/* PCEFI compatibility */
else if (getValueForKey("-pci0", &val, &len, &bootInfo->bootConfig)) {
else if (getValueForKey("-pci0", &val, &len, &bootInfo->chameleonConfig)) {
rootuid = 0;
goto out;
}
else if (getValueForKey("-pci1", &val, &len, &bootInfo->bootConfig)) {
else if (getValueForKey("-pci1", &val, &len, &bootInfo->chameleonConfig)) {
rootuid = 1;
goto out;
}
branches/iFabio/Chameleon/i386/libsaio/aml_generator.c
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case AML_CHUNK_DWORD:
case AML_CHUNK_QWORD:
case AML_CHUNK_ALIAS:
verbose("aml_add_to_parent: Node doesn't support child nodes!");
verbose("aml_add_to_parent: Node doesn't support child nodes!\n");
return false;
case AML_CHUNK_NAME:
if (parent->First)
{
verbose("aml_add_to_parent: Name node could have one child only!");
verbose("aml_add_to_parent: Name node supports only one child node!\n");
return false;
}
break;
{
if (strlen(name) < 4)
{
verbose("aml_fill_simple_name: simple name %s has incorrect lengh! Must be 4\n", name);
verbose("aml_fill_simple_name: simple name %s has incorrect lengh! Must be 4.\n", name);
return 0;
}
if ((len % 4) > 1 || count == 0)
{
verbose("aml_fill_name: pathname %s has incorrect length! Must be 4, 8, 12, 16, etc\n", name);
verbose("aml_fill_name: pathname %s has incorrect length! Must be 4, 8, 12, 16, etc...\n", name);
return 0;
}
branches/iFabio/Chameleon/i386/libsaio/befs.c
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return;
}
str[strMaxLen]=0;
strncpy (str, buf+0x200, min (strMaxLen, 32));
strncpy (str, buf+0x200, MIN (strMaxLen, 32));
free (buf);
}
branches/iFabio/Chameleon/i386/libsaio/usb.c
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bool fix_ehci, fix_uhci, fix_usb, fix_legacy;
fix_ehci = fix_uhci = fix_usb = fix_legacy = false;
if (getBoolForKey(kUSBBusFix, &fix_usb, &bootInfo->bootConfig))
if (getBoolForKey(kUSBBusFix, &fix_usb, &bootInfo->chameleonConfig))
{
fix_ehci = fix_uhci = fix_legacy = fix_usb;// Disable all if none set
}
else
{
getBoolForKey(kEHCIacquire, &fix_ehci, &bootInfo->bootConfig);
getBoolForKey(kUHCIreset, &fix_uhci, &bootInfo->bootConfig);
getBoolForKey(kLegacyOff, &fix_legacy, &bootInfo->bootConfig);
getBoolForKey(kEHCIacquire, &fix_ehci, &bootInfo->chameleonConfig);
getBoolForKey(kUHCIreset, &fix_uhci, &bootInfo->chameleonConfig);
getBoolForKey(kLegacyOff, &fix_legacy, &bootInfo->chameleonConfig);
}
struct pciList* current = usbList;
{
// Set usb legacy off modification by Signal64
// NOTE: This *must* be called after the last file is loaded from the drive in the event that we are booting form usb.
// NOTE2: This should be called after any getc() call. (aka, after the Wait=y keyworkd is used)
// NOTE2: This should be called after any getc()/getchar() call. (aka, after the Wait=y keyworkd is used)
// AKA: Make this run immediatly before the kernel is called
uint32_tcapaddr, opaddr;
uint8_teecp;
boolalwaysHardBIOSReset;
alwaysHardBIOSReset = false;
if (!getBoolForKey(kEHCIhard, &alwaysHardBIOSReset, &bootInfo->bootConfig)) {
if (!getBoolForKey(kEHCIhard, &alwaysHardBIOSReset, &bootInfo->chameleonConfig)) {
alwaysHardBIOSReset = true;
}
branches/iFabio/Chameleon/i386/libsaio/device_inject.c
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/* Use the static "device-properties" boot config key contents if available,
* otheriwse use the generated one.
*/
if (!getValueForKey(kDeviceProperties, &val, &cnt, &bootInfo->bootConfig) && string)
if (!getValueForKey(kDeviceProperties, &val, &cnt, &bootInfo->chameleonConfig) && string)
{
val = (const char*)string;
cnt = strlength * 2;
branches/iFabio/Chameleon/i386/libsaio/fdisk.h
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#define FDISK_LINUX0x83
#define FDISK_OPENBSD0xa6 /* OpenBSD FFS partition */
#define FDISK_FREEBSD0xa5 /* FreeBSD UFS2 partition */
#define FDISK_BEFS0xeb /* Haiku BeFS partition */
#define FDISK_UFS0xa8 /* Apple UFS partition */
#define FDISK_HFS0xaf /* Apple HFS partition */
#define FDISK_BOOTER0xab /* Apple booter partition */
#define FDISK_BEFS0xeb /* Haiku BeFS partition */
/*
* Format of fdisk partion entry (if present).
branches/iFabio/Chameleon/i386/libsaio/dram_controllers.c
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static long possible_nhm_bus[] = {0xFF, 0x7F, 0x3F};
unsigned long did, vid;
int i;
// Nehalem supports Scrubbing
// First, locate the PCI bus where the MCH is located
for(i = 0; i < sizeof(possible_nhm_bus); i++)
{
case 0: mch_fsb = 1066; break;
case 1: mch_fsb = 533; break;
default:
default:
case 2: mch_fsb = 800; break;
case 3: mch_fsb = 667; break;
case 4: mch_fsb = 1333; break;
{ 0x8086, 0x1A30, "i845",NULL, NULL, NULL },
{ 0x8086, 0x2970, "i946PL/GZ",setup_p35, get_fsb_i965, get_timings_i965 },
{ 0x8086, 0x2990, "Q963/Q965",setup_p35, get_fsb_i965, get_timings_i965 },
{ 0x8086, 0x29A0, "P965/G965",setup_p35, get_fsb_i965, get_timings_i965 },
{ 0x8086, 0x2970, "i946PL/GZ",setup_p35, get_fsb_i965,get_timings_i965},
{ 0x8086, 0x2990, "Q963/Q965",setup_p35, get_fsb_i965,get_timings_i965},
{ 0x8086, 0x29A0, "P965/G965",setup_p35, get_fsb_i965,get_timings_i965},
{ 0x8086, 0x2A00, "GM965/GL960",setup_p35, get_fsb_im965, get_timings_im965 },
{ 0x8086, 0x2A10, "GME965/GLE960",setup_p35, get_fsb_im965, get_timings_im965 },
{ 0x8086, 0x2A40, "PM/GM45/47",setup_p35, get_fsb_im965, get_timings_im965 },
{ 0x8086, 0x2A00, "GM965/GL960",setup_p35, get_fsb_im965,get_timings_im965},
{ 0x8086, 0x2A10, "GME965/GLE960",setup_p35, get_fsb_im965,get_timings_im965},
{ 0x8086, 0x2A40, "PM/GM45/47",setup_p35, get_fsb_im965,get_timings_im965},
{ 0x8086, 0x29B0, "Q35",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x29C0, "P35/G33",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x29D0, "Q33",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x29E0, "X38/X48",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x2E00, "Eaglelake",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x2E10, "Q45/Q43",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x2E20, "P45/G45",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x2E30, "G41",setup_p35, get_fsb_i965, get_timings_p35 },
{ 0x8086, 0x29B0, "Q35",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0x29C0, "P35/G33",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0x29D0, "Q33",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0x29E0, "X38/X48",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0x2E00, "Eaglelake",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0x2E10, "Q45/Q43",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0x2E20, "P45/G45",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0x2E30, "G41",setup_p35, get_fsb_i965,get_timings_p35},
{ 0x8086, 0xD131, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0xD132, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3400, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3401, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3402, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3403, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3404, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3405, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3406, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0x3407, "NHM IMC",setup_nhm, get_fsb_nhm, get_timings_nhm },
{ 0x8086, 0xD131, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0xD132, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3400, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3401, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3402, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3403, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3404, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3405, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3406, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
{ 0x8086, 0x3407, "NHM IMC",setup_nhm, get_fsb_nhm,get_timings_nhm},
};
static const char *memory_channel_types[] =
void scan_dram_controller(pci_dt_t *dram_dev)
{
int i;
for(i = 1; i < sizeof(dram_controllers) / sizeof(dram_controllers[0]); i++)
for(i = 1; i < sizeof(dram_controllers) / sizeof(dram_controllers[0]); i++)
if ((dram_controllers[i].vendor == dram_dev->vendor_id)
&& (dram_controllers[i].device == dram_dev->device_id))
{
memory_channel_types[Platform.RAM.Channels]
,Platform.RAM.CAS, Platform.RAM.TRC, Platform.RAM.TRP, Platform.RAM.RAS
,Platform.RAM.CAS, Platform.RAM.TRC, Platform.RAM.TRP, Platform.RAM.RAS
);
/* getc();
*/
);
//getchar();
}
}
branches/iFabio/Chameleon/i386/libsaio/nvidia.c
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/*
* NVidia injector
*NVidia injector
*
* Copyright (C) 2009 Jasmin Fazlic, iNDi
*Copyright (C) 2009Jasmin Fazlic, iNDi
*
* NVidia injector is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*NVidia injector is free software: you can redistribute it and/or modify
*it under the terms of the GNU General Public License as published by
*the Free Software Foundation, either version 3 of the License, or
*(at your option) any later version.
*
* NVidia driver and injector is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*NVidia driver and injector is distributed in the hope that it will be useful,
*but WITHOUT ANY WARRANTY; without even the implied warranty of
*MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
*GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with NVidia injector. If not, see <http://www.gnu.org/licenses/>.
*You should have received a copy of the GNU General Public License
*along with NVidia injector. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* Alternatively you can choose to comply with APSL
* SOFTWARE.
*/
#include "libsaio.h"
#include "boot.h"
#include "bootstruct.h"
#include "pci.h"
#define DBG(x...)
#endif
#define NVIDIA_ROM_SIZE 0x20000
#define PATCH_ROM_SUCCESS 1
#define PATCH_ROM_SUCCESS_HAS_LVDS 2
#define PATCH_ROM_FAILED 0
#define MAX_NUM_DCB_ENTRIES 16
#define NVIDIA_ROM_SIZE0x10000
#define PATCH_ROM_SUCCESS1
#define PATCH_ROM_SUCCESS_HAS_LVDS2
#define PATCH_ROM_FAILED0
#define MAX_NUM_DCB_ENTRIES16
#define TYPE_GROUPED0xff
#define TYPE_GROUPED 0xff
extern uint32_t devices_number;
const char *nvidia_compatible_0[]={ "@0,compatible","NVDA,NVMac" };
const char *nvidia_compatible_1[]={ "@1,compatible","NVDA,NVMac" };
const char *nvidia_device_type_0[]={ "@0,device_type","display" };
const char *nvidia_device_type_1[]={ "@1,device_type","display" };
const char *nvidia_device_type[]={ "device_type","NVDA,Parent" };
const char *nvidia_name_0[]={ "@0,name","NVDA,Display-A" };
const char *nvidia_name_1[]={ "@1,name","NVDA,Display-B" };
const char *nvidia_slot_name[]={ "AAPL,slot-name","Slot-1" };
const char *nvidia_compatible_0[]={ "@0,compatible","NVDA,NVMac" };
const char *nvidia_compatible_1[]={ "@1,compatible","NVDA,NVMac" };
const char *nvidia_device_type_0[]={ "@0,device_type", "display" };
const char *nvidia_device_type_1[]={ "@1,device_type", "display" };
const char *nvidia_device_type[]={ "device_type","NVDA,Parent" };
const char *nvidia_name_0[]={ "@0,name","NVDA,Display-A" };
const char *nvidia_name_1[]={ "@1,name","NVDA,Display-B" };
const char *nvidia_slot_name[]={ "AAPL,slot-name", "Slot-1" };
static uint8_t default_dcfg_0[]={0xff, 0xff, 0xff, 0xff};
static uint8_t default_dcfg_1[]={0xff, 0xff, 0xff, 0xff};
uint8_t connector_type_1[] ={0x00, 0x08, 0x00, 0x00};
static uint8_t default_NVCAP[]={
static uint8_t default_NVCAP[]= {
0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a,
0x00, 0x00, 0x00, 0x00
};
static uint8_t default_NVPM[]= {
0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00
};
#define NVCAP_LEN ( sizeof(default_NVCAP) / sizeof(uint8_t) )
static uint8_t default_dcfg_0[]={0xff, 0xff, 0xff, 0xff};
static uint8_t default_dcfg_1[]={0xff, 0xff, 0xff, 0xff};
#define DCFG0_LEN ( sizeof(default_dcfg_0) / sizeof(uint8_t) )
#define DCFG1_LEN ( sizeof(default_dcfg_1) / sizeof(uint8_t) )
#define NVCAP_LEN ( sizeof(default_NVCAP) / sizeof(uint8_t) )
static struct nv_chipsets_t NVKnownChipsets[] = {
{ 0x00000000, "Unknown" },
// temporary placement
{ 0x10DE0DF4, "GeForce GT 450M" }, //Azi + issue #99
{ 0x10DE1251, "GeForce GTX 560M" }, // Asus G74SX
//========================================
// 0040 - 004F
{ 0x10DE0040, "GeForce 6800 Ultra" },
{ 0x10DE0041, "GeForce 6800" },
{ 0x10DE0042, "GeForce 6800 LE" },
{ 0x10DE1200, "GeForce GTX 560 Ti" },
{ 0x10DE1244, "GeForce GTX 550 Ti" },
{ 0x10DE1245, "GeForce GTS 450" },
{ 0x10DE1251, "N12E-GS-A1" }
{ 0x10DE1251, "N12E-GS-A1" },
};
static uint16_t swap16(uint16_t x)
static uint16_t read16(uint8_t *ptr, uint16_t offset)
{
uint8_t ret[2];
ret[0] = ptr[offset+1];
ret[1] = ptr[offset];
return *((uint16_t*)&ret);
}
return ((x & 0x000000FF) << 24) | ((x & 0x0000FF00) << 8 ) | ((x & 0x00FF0000) >> 8 ) | ((x & 0xFF000000) >> 24);
}
static uint8_t read8(uint8_t *ptr, uint16_t offset)
static uint8_tread8(uint8_t *ptr, uint16_t offset)
{
return ptr[offset];
}
static uint32_t read32(uint8_t *ptr, uint16_t offset)
{
uint8_t ret[4];
ret[0] = ptr[offset+3];
ret[1] = ptr[offset+2];
ret[2] = ptr[offset+1];
ret[3] = ptr[offset];
return *((uint32_t*)&ret);
}
#endif
}
uint16_t dcbptr = swap16(read16(rom, 0x36));
if(!dcbptr) {
if (!dcbptr) {
printf("no dcb table found\n");
return PATCH_ROM_FAILED;
}/* else
printf("dcb table at offset 0x%04x\n", dcbptr);
*/
uint8_t *dcbtable = &rom[dcbptr];
}
//else
//printf("dcb table at offset 0x%04x\n", dcbptr);
uint8_t *dcbtable = &rom[dcbptr];
uint8_t dcbtable_version = dcbtable[0];
uint8_t headerlength = 0;
uint8_t recordlength = 0;
uint8_t numentries = 0;
uint8_t headerlength = 0;
uint8_t numentries = 0;
uint8_t recordlength = 0;
if(dcbtable_version >= 0x20) {
if (dcbtable_version >= 0x20)
{
uint32_t sig;
if(dcbtable_version >= 0x30) {
if (dcbtable_version >= 0x30)
{
headerlength = dcbtable[1];
numentries = dcbtable[2];
numentries = dcbtable[2];
recordlength = dcbtable[3];
sig = *(uint32_t *)&dcbtable[6];
} else {
}
else
{
sig = *(uint32_t *)&dcbtable[4];
headerlength = 8;
}
if (sig != 0x4edcbdcb) {
printf("bad display config block signature (0x%8x)\n", sig);
if (sig != 0x4edcbdcb)
{
printf("Bad display config block signature (0x%8x)\n", sig); //Azi: issue #48
return PATCH_ROM_FAILED;
}
} else if (dcbtable_version >= 0x14) { /* some NV15/16, and NV11+ */
}
else if (dcbtable_version >= 0x14) /* some NV15/16, and NV11+ */
{
char sig[8] = { 0 };
strncpy(sig, (char *)&dcbtable[-7], 7);
recordlength = 10;
if (strcmp(sig, "DEV_REC")) {
if (strcmp(sig, "DEV_REC"))
{
printf("Bad Display Configuration Block signature (%s)\n", sig);
return PATCH_ROM_FAILED;
}
} else {
}
else
{
printf("ERROR: dcbtable_version is 0x%X\n", dcbtable_version);
return PATCH_ROM_FAILED;
}
if(numentries >= MAX_NUM_DCB_ENTRIES)
if (numentries >= MAX_NUM_DCB_ENTRIES)
numentries = MAX_NUM_DCB_ENTRIES;
uint8_t num_outputs = 0, i=0;
struct dcbentry {
uint8_t num_outputs = 0, i = 0;
struct dcbentry
{
uint8_t type;
uint8_t index;
uint8_t *heads;
} entries[numentries];
for (i = 0; i < numentries; i++) {
for (i = 0; i < numentries; i++)
{
uint32_t connection;
connection = *(uint32_t *)&dcbtable[headerlength + recordlength * i];
/* Should we allow discontinuous DCBs? Certainly DCB I2C tables can be discontinuous */
if ((connection & 0x0000000f) == 0x0000000f) /* end of records */
continue;
entries[num_outputs].type = connection & 0xf;
entries[num_outputs].index = num_outputs;
entries[num_outputs++].heads = (uint8_t*)&(dcbtable[(headerlength + recordlength * i) + 1]);
}
int has_lvds = false;
uint8_t channel1 = 0, channel2 = 0;
for(i=0; i<num_outputs; i++) {
if(entries[i].type == 3) {
for (i = 0; i < num_outputs; i++)
{
if (entries[i].type == 3)
{
has_lvds = true;
//printf("found LVDS\n");
channel1 |= ( 0x1 << entries[i].index);
entries[i].type = TYPE_GROUPED;
}
}
// if we have a LVDS output, we group the rest to the second channel
if(has_lvds) {
for(i=0; i<num_outputs; i++) {
if(entries[i].type == TYPE_GROUPED)
if (has_lvds)
{
for (i = 0; i < num_outputs; i++)
{
if (entries[i].type == TYPE_GROUPED)
continue;
channel2 |= ( 0x1 << entries[i].index);
entries[i].type = TYPE_GROUPED;
}
} else {
//
}
else
{
int x;
// we loop twice as we need to generate two channels
for(x=0; x<=1; x++) {
for(i=0; i<num_outputs; i++) {
if(entries[i].type == TYPE_GROUPED)
for (x = 0; x <= 1; x++)
{
for (i=0; i<num_outputs; i++)
{
if (entries[i].type == TYPE_GROUPED)
continue;
// if type is TMDS, the prior output is ANALOG
// we always group ANALOG and TMDS
// if there is a TV output after TMDS, we group it to that channel as well
if(i && entries[i].type == 0x2) {
switch (x) {
if (i && entries[i].type == 0x2)
{
switch (x)
{
case 0:
//printf("group channel 1\n");
channel1 |= ( 0x1 << entries[i].index);
entries[i].type = TYPE_GROUPED;
if((entries[i-1].type == 0x0)) {
if ((entries[i-1].type == 0x0))
{
channel1 |= ( 0x1 << entries[i-1].index);
entries[i-1].type = TYPE_GROUPED;
}
// group TV as well if there is one
if( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) ) {
if ( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) )
{
//printf("group tv1\n");
channel1 |= ( 0x1 << entries[i+1].index);
entries[i+1].type = TYPE_GROUPED;
}
break;
case 1:
//printf("group channel 2 : %d\n", i);
channel2 |= ( 0x1 << entries[i].index);
entries[i].type = TYPE_GROUPED;
if((entries[i-1].type == 0x0)) {
if ((entries[i - 1].type == 0x0))
{
channel2 |= ( 0x1 << entries[i-1].index);
entries[i-1].type = TYPE_GROUPED;
}
// group TV as well if there is one
if( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) ) {
if ( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) )
{
//printf("group tv2\n");
channel2 |= ( 0x1 << entries[i+1].index);
entries[i+1].type = TYPE_GROUPED;
}
break;
}
break;
}
// if we have left ungrouped outputs merge them to the empty channel
uint8_t *togroup;// = (channel1 ? (channel2 ? NULL : &channel2) : &channel1);
togroup = &channel2;
for(i=0; i<num_outputs;i++)
if(entries[i].type != TYPE_GROUPED) {
for (i = 0; i < num_outputs; i++)
{
if (entries[i].type != TYPE_GROUPED)
{
//printf("%d not grouped\n", i);
if(togroup)
if (togroup)
{
*togroup |= ( 0x1 << entries[i].index);
}
entries[i].type = TYPE_GROUPED;
}
}
if(channel1 > channel2) {
if (channel1 > channel2)
{
uint8_t buff = channel1;
channel1 = channel2;
channel2 = buff;
default_NVCAP[8] = channel2;
// patching HEADS
for(i=0; i<num_outputs;i++) {
if(channel1 & (1 << i))
for (i = 0; i < num_outputs; i++)
{
if (channel1 & (1 << i))
{
*entries[i].heads = 1;
}
else if(channel2 & (1 << i))
{
*entries[i].heads = 2;
}
}
return (has_lvds ? PATCH_ROM_SUCCESS_HAS_LVDS : PATCH_ROM_SUCCESS);
}
static char *get_nvidia_model(uint32_t id) {
inti;
for (i=1; i< (sizeof(NVKnownChipsets) / sizeof(NVKnownChipsets[0])); i++) {
if (NVKnownChipsets[i].device == id) {
static char *get_nvidia_model(uint32_t id)
{
int i;
for (i = 1; i < (sizeof(NVKnownChipsets) / sizeof(NVKnownChipsets[0])); i++) {
if (NVKnownChipsets[i].device == id)
{
return NVKnownChipsets[i].name;
}
}
static uint32_t load_nvidia_bios_file(const char *filename, uint8_t *buf, int bufsize)
{
intfd;
intsize;
if ((fd = open_bvdev("bt(0,0)", filename, 0)) < 0) {
int fd;
int size;
if ((fd = open_bvdev("bt(0,0)", filename, 0)) < 0)
{
return 0;
}
size = file_size(fd);
if (size > bufsize) {
printf("Filesize of %s is bigger than expected! Truncating to 0x%x Bytes!\n", filename, bufsize);
if (size > bufsize)
{
printf("Filesize of %s is bigger than expected! Truncating to 0x%x Bytes!\n",
filename, bufsize);
size = bufsize;
}
size = read(fd, (char *)buf, size);
close(fd);
return size > 0 ? size : 0;
}
static int devprop_add_nvidia_template(struct DevPropDevice *device)
{
chartmp[16];
if(!device)
char tmp[16];
if (!device)
return 0;
if(!DP_ADD_TEMP_VAL(device, nvidia_compatible_0))
if (!DP_ADD_TEMP_VAL(device, nvidia_compatible_0))
return 0;
if(!DP_ADD_TEMP_VAL(device, nvidia_device_type_0))
if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_0))
return 0;
if(!DP_ADD_TEMP_VAL(device, nvidia_name_0))
if (!DP_ADD_TEMP_VAL(device, nvidia_name_0))
return 0;
if(!DP_ADD_TEMP_VAL(device, nvidia_compatible_1))
if (!DP_ADD_TEMP_VAL(device, nvidia_compatible_1))
return 0;
if(!DP_ADD_TEMP_VAL(device, nvidia_device_type_1))
if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_1))
return 0;
if(!DP_ADD_TEMP_VAL(device, nvidia_name_1))
if (!DP_ADD_TEMP_VAL(device, nvidia_name_1))
return 0;
if(!DP_ADD_TEMP_VAL(device, nvidia_device_type))
if (!DP_ADD_TEMP_VAL(device, nvidia_device_type))
return 0;
// Rek : Dont use sprintf return, it does not WORK !! our custom sprintf() always return 0!
// len = sprintf(tmp, "Slot-%x", devices_number);
sprintf(tmp, "Slot-%x",devices_number);
devprop_add_value(device, "AAPL,slot-name", (uint8_t *) tmp, strlen(tmp));
devices_number++;
return 1;
}
int hex2bin(const char *hex, uint8_t *bin, int len)
{
char*p;
inti;
inti;
charbuf[3];
if (hex == NULL || bin == NULL || len <= 0 || strlen(hex) != len * 2) {
printf("[ERROR] bin2hex input error\n");
return -1;
}
buf[2] = '\0';
p = (char *) hex;
for (i=0; i<len; i++) {
for (i = 0; i < len; i++)
{
if (p[0] == '\0' || p[1] == '\0' || !isxdigit(p[0]) || !isxdigit(p[1])) {
printf("[ERROR] bin2hex '%s' syntax error\n", hex);
return -2;
unsigned long long mem_detect(volatile uint8_t *regs, uint8_t nvCardType, pci_dt_t *nvda_dev)
{
unsigned long long vram_size = 0;
if (nvCardType < NV_ARCH_50) {
if (nvCardType < NV_ARCH_50)
{
vram_size = REG32(NV04_PFB_FIFO_DATA);
vram_size &= NV10_PFB_FIFO_DATA_RAM_AMOUNT_MB_MASK;
}
else if (nvCardType < NV_ARCH_C0) {
else if (nvCardType < NV_ARCH_C0)
{
vram_size = REG32(NV04_PFB_FIFO_DATA);
vram_size |= (vram_size & 0xff) << 32;
vram_size &= 0xffffffff00ll;
}
else { // >= NV_ARCH_C0
else // >= NV_ARCH_C0
{
vram_size = REG32(NVC0_MEM_CTRLR_RAM_AMOUNT) << 20;
vram_size *= REG32(NVC0_MEM_CTRLR_COUNT);
}
// workaround code for GT 420/430 & 9600M GT
// Workaround for GT 420/430 & 9600M GT
switch (nvda_dev->device_id)
{
case 0x0DE1: vram_size = 1024*1024*1024; break; // GT 430
case 0x0DE2: vram_size = 1024*1024*1024; break; // GT 420
case 0x0649: vram_size = 512*1024*1024; break; // 9600M GT
case 0x0649: vram_size = 512*1024*1024; break;// 9600M GT
default: break;
}
return vram_size;
}
bool setup_nvidia_devprop(pci_dt_t *nvda_dev)
{
struct DevPropDevice*device;
char*devicepath;
option_rom_pci_header_t*rom_pci_header;
volatile uint8_t*regs;
uint8_t*rom;
uint8_t*nvRom;
uint8_tnvCardType;
unsigned long longvideoRam;
uint32_tnvBiosOveride;
uint32_tbar[7];
uint32_tboot_display;
intnvPatch;
intlen;
charbiosVersion[32];
charnvFilename[32];
charkNVCAP[12];
char*model;
const char*value;
booldoit;
struct DevPropDevice*device;
char*devicepath;
option_rom_pci_header_t *rom_pci_header;
volatile uint8_t*regs;
uint8_t*rom;
uint8_t*nvRom;
uint8_tnvCardType;
unsigned long longvideoRam;
uint32_tnvBiosOveride;
uint32_tbar[7];
uint32_tboot_display;
intnvPatch;
intlen;
charbiosVersion[32];
charnvFilename[32];
charkNVCAP[12];
char*model;
const char*value;
booldoit;
devicepath = get_pci_dev_path(nvda_dev);
bar[0] = pci_config_read32(nvda_dev->dev.addr, 0x10 );
regs = (uint8_t *) (bar[0] & ~0x0f);
// get card type
nvCardType = (REG32(0) >> 20) & 0x1ff;
// Amount of VRAM in kilobytes
videoRam = mem_detect(regs, nvCardType, nvda_dev);
model = get_nvidia_model((nvda_dev->vendor_id << 16) | nvda_dev->device_id);
verbose("nVidia %s %dMB NV%02x [%04x:%04x] :: %s\n",
verbose("nVidia %s %dMB NV%02x [%04x:%04x] :: %s\n",
model, (uint32_t)(videoRam / 1024 / 1024),
(REG32(0) >> 20) & 0x1ff, nvda_dev->vendor_id, nvda_dev->device_id,
devicepath);
rom = malloc(NVIDIA_ROM_SIZE);
sprintf(nvFilename, "/Extra/%04x_%04x.rom", (uint16_t)nvda_dev->vendor_id, (uint16_t)nvda_dev->device_id);
if (getBoolForKey(kUseNvidiaROM, &doit, &bootInfo->bootConfig) && doit) {
sprintf(nvFilename, "/Extra/%04x_%04x.rom", (uint16_t)nvda_dev->vendor_id,
(uint16_t)nvda_dev->device_id);
if (getBoolForKey(kUseNvidiaROM, &doit, &bootInfo->chameleonConfig) && doit)
{
verbose("Looking for nvidia video bios file %s\n", nvFilename);
nvBiosOveride = load_nvidia_bios_file(nvFilename, rom, NVIDIA_ROM_SIZE);
if (nvBiosOveride > 0) {
if (nvBiosOveride > 0)
{
verbose("Using nVidia Video BIOS File %s (%d Bytes)\n", nvFilename, nvBiosOveride);
DBG("%s Signature 0x%02x%02x %d bytes\n", nvFilename, rom[0], rom[1], nvBiosOveride);
} else {
}
else
{
printf("ERROR: unable to open nVidia Video BIOS File %s\n", nvFilename);
return false;
}
} else {
}
else
{
// Otherwise read bios from card
nvBiosOveride = 0;
// TODO: we should really check for the signature before copying the rom, i think.
// PRAMIN first
nvRom = (uint8_t*)&regs[NV_PRAMIN_OFFSET];
bcopy((uint32_t *)nvRom, rom, NVIDIA_ROM_SIZE);
// Valid Signature ?
if (rom[0] != 0x55 && rom[1] != 0xaa) {
if (rom[0] != 0x55 && rom[1] != 0xaa)
{
// PROM next
// Enable PROM access
(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED;
nvRom = (uint8_t*)&regs[NV_PROM_OFFSET];
bcopy((uint8_t *)nvRom, rom, NVIDIA_ROM_SIZE);
// disable PROM access
(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED;
(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED;
// Valid Signature ?
if (rom[0] != 0x55 && rom[1] != 0xaa) {
if (rom[0] != 0x55 && rom[1] != 0xaa)
{
// 0xC0000 last
bcopy((char *)0xc0000, rom, NVIDIA_ROM_SIZE);
// Valid Signature ?
if (rom[0] != 0x55 && rom[1] != 0xaa) {
if (rom[0] != 0x55 && rom[1] != 0xaa)
{
printf("ERROR: Unable to locate nVidia Video BIOS\n");
return false;
} else {
}
else
{
DBG("ROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
}
} else {
}
else
{
DBG("PROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
}
} else {
}
else
{
DBG("PRAM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);
}
}
if ((nvPatch = patch_nvidia_rom(rom)) == PATCH_ROM_FAILED) {
printf("ERROR: nVidia ROM Patching Failed!\n");
//return false;
}
rom_pci_header = (option_rom_pci_header_t*)(rom + *(uint16_t *)&rom[24]);
// check for 'PCIR' sig
if (rom_pci_header->signature == 0x50434952) {
if (rom_pci_header->device_id != nvda_dev->device_id) {
if (rom_pci_header->signature == 0x50434952)
{
if (rom_pci_header->device_id != nvda_dev->device_id)
{
// Get Model from the OpROM
model = get_nvidia_model((rom_pci_header->vendor_id << 16) | rom_pci_header->device_id);
} else {
}
else
{
printf("nVidia incorrect PCI ROM signature: 0x%x\n", rom_pci_header->signature);
}
}
if (!string) {
string = devprop_create_string();
}
device = devprop_add_device(string, devicepath);
/* FIXME: for primary graphics card only */
boot_display = 1;
devprop_add_value(device, "@0,AAPL,boot-display", (uint8_t*)&boot_display, 4);
if(nvPatch == PATCH_ROM_SUCCESS_HAS_LVDS) {
if (nvPatch == PATCH_ROM_SUCCESS_HAS_LVDS) {
uint8_t built_in = 0x01;
devprop_add_value(device, "@0,built-in", &built_in, 1);
}
// get bios version
const int MAX_BIOS_VERSION_LENGTH = 32;
char* version_str = (char*)malloc(MAX_BIOS_VERSION_LENGTH);
memset(version_str, 0, MAX_BIOS_VERSION_LENGTH);
int i, version_start;
int crlf_count = 0;
// only search the first 384 bytes
for(i = 0; i < 0x180; i++) {
if(rom[i] == 0x0D && rom[i+1] == 0x0A) {
for (i = 0; i < 0x180; i++)
{
if (rom[i] == 0x0D && rom[i+1] == 0x0A)
{
crlf_count++;
// second 0x0D0A was found, extract bios version
if(crlf_count == 2) {
if(rom[i-1] == 0x20) i--; // strip last " "
for(version_start = i; version_start > (i-MAX_BIOS_VERSION_LENGTH); version_start--) {
if (crlf_count == 2)
{
if (rom[i-1] == 0x20) i--; // strip last " "
for (version_start = i; version_start > (i-MAX_BIOS_VERSION_LENGTH); version_start--)
{
// find start
if(rom[version_start] == 0x00) {
if (rom[version_start] == 0x00)
{
version_start++;
// strip "Version "
if(strncmp((const char*)rom+version_start, "Version ", 8) == 0) {
if (strncmp((const char*)rom+version_start, "Version ", 8) == 0)
{
version_start += 8;
}
}
sprintf(biosVersion, "%s", (nvBiosOveride > 0) ? nvFilename : version_str);
sprintf(kNVCAP, "NVCAP_%04x", nvda_dev->device_id);
if (getValueForKey(kNVCAP, &value, &len, &bootInfo->bootConfig) && len == NVCAP_LEN * 2) {
uint8_tnew_NVCAP[NVCAP_LEN];
if (hex2bin(value, new_NVCAP, NVCAP_LEN) == 0) {
if (getValueForKey(kNVCAP, &value, &len, &bootInfo->chameleonConfig) && len == NVCAP_LEN * 2)
{
uint8_t new_NVCAP[NVCAP_LEN];
if (hex2bin(value, new_NVCAP, NVCAP_LEN) == 0)
{
verbose("Using user supplied NVCAP for %s :: %s\n", model, devicepath);
memcpy(default_NVCAP, new_NVCAP, NVCAP_LEN);
}
}
if (getValueForKey(kDcfg0, &value, &len, &bootInfo->chameleonConfig) && len == DCFG0_LEN * 2)
{
uint8_t new_dcfg0[DCFG0_LEN];
if (hex2bin(value, new_dcfg0, DCFG0_LEN) == 0)
{
memcpy(default_dcfg_0, new_dcfg0, DCFG0_LEN);
verbose("Using user supplied @0,display-cfg\n");
printf("@0,display-cfg: %02x%02x%02x%02x\n",
default_dcfg_0[0], default_dcfg_0[1], default_dcfg_0[2], default_dcfg_0[3]);
}
}
if (getValueForKey(kDcfg1, &value, &len, &bootInfo->chameleonConfig) && len == DCFG1_LEN * 2)
{
uint8_t new_dcfg1[DCFG1_LEN];
if (hex2bin(value, new_dcfg1, DCFG1_LEN) == 0)
{
memcpy(default_dcfg_1, new_dcfg1, DCFG1_LEN);
verbose("Using user supplied @1,display-cfg\n");
printf("@1,display-cfg: %02x%02x%02x%02x\n",
default_dcfg_1[0], default_dcfg_1[1], default_dcfg_1[2], default_dcfg_1[3]);
}
}
#if DEBUG_NVCAP
printf("NVCAP: %02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x\n",
default_NVCAP[0], default_NVCAP[1], default_NVCAP[2], default_NVCAP[3],
default_NVCAP[4], default_NVCAP[5], default_NVCAP[6], default_NVCAP[7],
default_NVCAP[8], default_NVCAP[9], default_NVCAP[10], default_NVCAP[11],
default_NVCAP[12], default_NVCAP[13], default_NVCAP[14], default_NVCAP[15],
default_NVCAP[16], default_NVCAP[17], default_NVCAP[18], default_NVCAP[19]);
printf("NVCAP: %02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x\n",
default_NVCAP[0], default_NVCAP[1], default_NVCAP[2], default_NVCAP[3],
default_NVCAP[4], default_NVCAP[5], default_NVCAP[6], default_NVCAP[7],
default_NVCAP[8], default_NVCAP[9], default_NVCAP[10], default_NVCAP[11],
default_NVCAP[12], default_NVCAP[13], default_NVCAP[14], default_NVCAP[15],
default_NVCAP[16], default_NVCAP[17], default_NVCAP[18], default_NVCAP[19]);
#endif
devprop_add_nvidia_template(device);
devprop_add_value(device, "NVCAP", default_NVCAP, NVCAP_LEN);
devprop_add_value(device, "VRAM,totalsize", (uint8_t*)&videoRam, 4);
devprop_add_value(device, "model", (uint8_t*)model, strlen(model) + 1);
devprop_add_value(device, "rom-revision", (uint8_t*)biosVersion, strlen(biosVersion) + 1);
devprop_add_value(device, "@1,connector-type", connector_type_1, 4);
devprop_add_value(device, "@0,display-cfg", default_dcfg_0, DCFG0_LEN);
devprop_add_value(device, "@1,display-cfg", default_dcfg_1, DCFG1_LEN);
devprop_add_value(device, "NVPM", default_NVPM, 28);
if (getBoolForKey(kVBIOS, &doit, &bootInfo->bootConfig) && doit) {
//add HDMI Audio back to nvidia
//http://forge.voodooprojects.org/p/chameleon/issues/67/
//uint8_t connector_type_1[]= {0x00, 0x08, 0x00, 0x00};
//devprop_add_value(device, "@1,connector-type",connector_type_1, 4);
//end Nvidia HDMI Audio
if (getBoolForKey(kVBIOS, &doit, &bootInfo->chameleonConfig) && doit)
{
devprop_add_value(device, "vbios", rom, (nvBiosOveride > 0) ? nvBiosOveride : (rom[2] * 512));
}
stringdata = malloc(sizeof(uint8_t) * string->length);
memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);
stringlength = string->length;
return true;
}
branches/iFabio/Chameleon/i386/libsaio/ati.c
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*
*/
#include "libsaio.h"
#include "boot.h"
#include "bootstruct.h"
#include "pci.h"
#include "platform.h"
#include "device_inject.h"
#include "ati_reg.h"
#defineOFFSET_TO_GET_ATOMBIOS_STRINGS_START0x6e
#define OFFSET_TO_GET_ATOMBIOS_STRINGS_START 0x6e
#define Reg32(reg)(*(volatile uint32_t *)(card->mmio + reg))
#define RegRead32(reg)(Reg32(reg))
#define RegWrite32(reg, value)(Reg32(reg) = value)
#define Reg32(reg)(*(volatile uint32_t *)(card->mmio + reg))
#define RegRead32(reg)(Reg32(reg))
#define RegWrite32(reg, value)(Reg32(reg) = value)
typedef enum {
kNul,
CHIP_FAMILY_JUNIPER,
CHIP_FAMILY_CYPRESS,
CHIP_FAMILY_HEMLOCK,
//CHIP_FAMILY_GRANVILLE, //Azi:---
/* Northern Islands */
CHIP_FAMILY_BARTS,
CHIP_FAMILY_CAICOS,
"Juniper",// RV840
"Cypress",// RV870
"Hemlock",
//"Granville"//Azi:---
/* Northern Islands */
"Barts",
"Caicos",
} config_name_t;
typedef struct {
uint16_tdevice_id;
uint32_tsubsys_id;
chip_family_tchip_family;
const char*model_name;
config_name_tcfg_name;
uint16_tdevice_id;
uint32_tsubsys_id;
chip_family_tchip_family;
const char*model_name;
config_name_tcfg_name;
} radeon_card_info_t;
static radeon_card_info_t radeon_cards[] = {
//Azi: added devices
// temporary placement
// issue #88
{ 0x6741,0x1646103C,CHIP_FAMILY_TURKS,/*???*/"AMD Radeon HD 6600M Series",kNull},
// issue #89
{ 0x68A8,0x050E1025,CHIP_FAMILY_CYPRESS,"AMD Radeon HD 6850M",kUakari}, //Azi: CHIP_FAMILY_GRANVILLE ??
// issue #90
{ 0x68E4,0x1c921043,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur},
// issue #91
{ 0x68C0,0x1594103C,CHIP_FAMILY_REDWOOD,"AMD Radeon HD 6570M",kNull},
//==================================//================================//============================//
/* Earlier cards are not supported */
{ 0x9400,0x30001002,CHIP_FAMILY_R600,"ATI Radeon HD 2900 PRO",kNull},
{ 0x9400,0x25521002,CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull},
{ 0x9440,0x24401682,CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9440,0x24411682,CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9440,0x24441682,CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9440,0x24451682,CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9441,0x24401682,CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot},
{ 0x9442,0x24701682,CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0x24711682,CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0x080110B0,CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0xE104174B,CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x944A,0x30001682,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001043,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001458,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001462,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001545,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001787,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x3000174B,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x300017AF,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944C,0x24801682,CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot},
{ 0x944C,0x24811682,CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot},
{ 0x944E,0x3260174B,CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot},
{ 0x944E,0x3261174B,CHIP_FAMILY_RV770,"ATI Radeon HD 4810 series",kMotmot},
{ 0x944E,0x30001787,CHIP_FAMILY_RV770,"ATI Radeon HD 4730 Series",kMotmot},
{ 0x944E,0x30101787,CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot},
{ 0x944E,0x31001787,CHIP_FAMILY_RV770,"ATI Radeon HD 4820",kMotmot},
{ 0x9490,0x30501787,CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9490,0x4710174B,CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9490,0x300017AF,CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9498,0x30501787,CHIP_FAMILY_RV730,"ATI Radeon HD 4700",kNull},
{ 0x9498,0x31001787,CHIP_FAMILY_RV730,"ATI Radeon HD 4720",kNull},
{ 0x9498,0x24511682,CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull},
{ 0x9498,0x24521682,CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull},
{ 0x9498,0x24541682,CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull},
{ 0x9498,0x29331682,CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull},
{ 0x9498,0x29341682,CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull},
{ 0x9498,0x21CF1458,CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kNull},
{ 0x94B3,0x29001682,CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94B3,0x1170174B,CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94B3,0x10020D00,CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94C1,0x10021002,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Pro",kNull},
{ 0x94C1,0x0D021002,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x0D021028,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Pro",kNull},
{ 0x94C1,0x0D021028,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x21741458,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10401462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10331462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10331462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x11101462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C3,0x37161642,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001642,CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x03421002,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001025,CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0x04021028,CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x03021028,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x04021028,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x216A1458,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x21721458,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001458,CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x11041462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x10411462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x11051462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x10321462,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001462,CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x3000148C,CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0x2247148C,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull},
{ 0x94C3,0x3000174B,CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0xE400174B,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE370174B,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE400174B,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE370174B,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE400174B,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x203817AF,CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x30001787,CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0x22471787,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull},
{ 0x94C3,0x01011A93,CHIP_FAMILY_RV610,"Qimonda Radeon HD 2400 PRO",kNull},
{ 0x9501,0x30001002,CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9501,0x25421002,CHIP_FAMILY_RV670,"ATI Radeon HD 3870",kNull},
{ 0x9501,0x4750174B,CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9501,0x3000174B,CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull},
{ 0x9501,0x30001787,CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9505,0x30001002,CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9505,0x25421002,CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull},
{ 0x9505,0x30011043,CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3000148C,CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull},
{ 0x9505,0x3002148C,CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3001148C,CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3003148C,CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3004148C,CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x4730174B,CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3010174B,CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3001174B,CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3000174B,CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull},
{ 0x9505,0x30001787,CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9505,0x301017AF,CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9540,0x4590174B,CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull},
{ 0x9540,0x30501787,CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull},
{ 0x954F,0x29201682,CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull},
{ 0x954F,0x29211682,CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull},
{ 0x954F,0x30901682,CHIP_FAMILY_RV710,"XFX Radeon HD 4570",kNull},
{ 0x954F,0x4450174B,CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x954F,0x3000174B,CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull},
{ 0x954F,0x30501787,CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x954F,0x31001787,CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull},
{ 0x954F,0x4570174B,CHIP_FAMILY_RV710,"Sapphire Radeon HD4570",kNull},
{ 0x954F,0x301017AF,CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x9552,0x3000148C,CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x3000174B,CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x30001787,CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x300017AF,CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9581,0x95811002,CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9581,0x3000148C,CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9583,0x3000148C,CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9588,0x01021A93,CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 XT",kNull},
{ 0x9589,0x30001462,CHIP_FAMILY_RV630,"ATI Radeon HD 3610",kNull},
{ 0x9589,0x30001642,CHIP_FAMILY_RV630,"ATI Radeon HD 3610",kNull},
{ 0x9589,0x0E41174B,CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9589,0x30001787,CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9589,0x01001A93,CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 PRO",kNull},
{ 0x9591,0x2303148C,CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kNull},
{ 0x9598,0xB3831002,CHIP_FAMILY_RV635,"ATI All-in-Wonder HD",kNull},
{ 0x9598,0x30011043,CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x30001043,CHIP_FAMILY_RV635,"HD3730",kNull},
{ 0x9598,0x3000148C,CHIP_FAMILY_RV635,"ATI Radeon HD 3730",kNull},
{ 0x9598,0x3031148C,CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x3001148C,CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x30011545,CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 Pro",kNull},
{ 0x9598,0x30001545,CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 XT",kNull},
{ 0x9598,0x4570174B,CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x4580174B,CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x4610174B,CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull},
{ 0x9598,0x3000174B,CHIP_FAMILY_RV635,"Sapphire Radeon HD 3730",kNull},
{ 0x9598,0x3001174B,CHIP_FAMILY_RV635,"Sapphire Radeon HD 3750",kNull},
{ 0x9598,0x301017AF,CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x301117AF,CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x300117AF,CHIP_FAMILY_RV635,"ATI Radeon HD3750",kNull},
{ 0x9598,0x30501787,CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull},
{ 0x95C0,0x3000148C,CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull},
{ 0x95C0,0xE3901745,CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull},
{ 0x95C0,0x3002174B,CHIP_FAMILY_RV620,"ATI Radeon HD 3570",kNull},
{ 0x95C0,0x3020174B,CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C0,0x3000174B,CHIP_FAMILY_RV620,"Sapphire Radeon HD 3550",kNull},
{ 0x95C5,0x3000148C,CHIP_FAMILY_RV620,"ATI Radeon HD 3450",kNull},
{ 0x95C5,0x3001148C,CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull},
{ 0x95C5,0x3002148C,CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x3033148C,CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x3003148C,CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x3032148C,CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x3010174B,CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x4250174B,CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x30501787,CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x301017AF,CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x01051A93,CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull},
{ 0x95C5,0x01041A93,CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull},
{ 0x9400,0x30001002, CHIP_FAMILY_R600,"ATI Radeon HD 2900 PRO",kNull},
{ 0x9400,0x25521002, CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull},
{ 0x9440,0x24401682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9440,0x24411682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9440,0x24441682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9440,0x24451682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot},
{ 0x9441,0x24401682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot},
{ 0x9442,0x24701682, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0x24711682, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0x080110B0, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x9442,0xE104174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot},
{ 0x944A,0x30001682, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001043, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001458, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001462, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001545, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x30001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x3000174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944A,0x300017AF, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944C,0x24801682, CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot},
{ 0x944C,0x24811682, CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot},
{ 0x944E,0x3260174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot},
{ 0x944E,0x3261174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 series",kMotmot},
{ 0x944E,0x30001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4730 Series",kMotmot},
{ 0x944E,0x30101787, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot},
{ 0x944E,0x31001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4820",kMotmot},
{ 0x9490,0x30501787, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9490,0x4710174B, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9490,0x300017AF, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull},
{ 0x9498,0x30501787, CHIP_FAMILY_RV730,"ATI Radeon HD 4700",kNull},
{ 0x9498,0x31001787, CHIP_FAMILY_RV730,"ATI Radeon HD 4720",kNull},
{ 0x9498,0x24511682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull},
{ 0x9498,0x24521682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull},
{ 0x9498,0x24541682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull},
{ 0x9498,0x29331682, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull},
{ 0x9498,0x29341682, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull},
{ 0x9498,0x21CF1458, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kNull},
{ 0x94B3,0x29001682, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94B3,0x1170174B, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94B3,0x10020D00, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94C1,0x10021002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Pro",kNull},
{ 0x94C1,0x0D021002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x0D021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Pro",kNull},
{ 0x94C1,0x0D021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x21741458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10401462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10331462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x10331462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C1,0x11101462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull},
{ 0x94C3,0x37161642, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001642, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x03421002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001025, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0x04021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x03021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x04021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x216A1458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x21721458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001458, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x11041462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x10411462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x11051462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x10321462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x30001462, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull},
{ 0x94C3,0x3000148C, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0x2247148C, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull},
{ 0x94C3,0x3000174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0xE400174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE370174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE400174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE370174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0xE400174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull},
{ 0x94C3,0x203817AF, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull},
{ 0x94C3,0x30001787, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull},
{ 0x94C3,0x22471787, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull},
{ 0x94C3,0x01011A93, CHIP_FAMILY_RV610,"Qimonda Radeon HD 2400 PRO",kNull},
{ 0x9501,0x30001002, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9501,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3870",kNull},
{ 0x9501,0x4750174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9501,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull},
{ 0x9501,0x30001787, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9505,0x30001002, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9505,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull},
{ 0x9505,0x30011043, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3000148C, CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull},
{ 0x9505,0x3002148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3001148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3003148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3004148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x4730174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull},
{ 0x9505,0x3010174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3001174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9505,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull},
{ 0x9505,0x30001787, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull},
{ 0x9505,0x301017AF, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull},
{ 0x9540,0x4590174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull},
{ 0x9540,0x30501787, CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull},
{ 0x954F,0x29201682, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull},
{ 0x954F,0x29211682, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull},
{ 0x954F,0x30901682, CHIP_FAMILY_RV710,"XFX Radeon HD 4570",kNull},
{ 0x954F,0x4450174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x954F,0x3000174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull},
{ 0x954F,0x30501787, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x954F,0x31001787, CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull},
{ 0x954F,0x4570174B, CHIP_FAMILY_RV710,"Sapphire Radeon HD4570",kNull},
{ 0x954F,0x301017AF, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull},
{ 0x9552,0x3000148C, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x3000174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x30001787, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9552,0x300017AF, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9581,0x95811002, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9581,0x3000148C, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9583,0x3000148C, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9588,0x01021A93, CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 XT",kNull},
{ 0x9589,0x30001462, CHIP_FAMILY_RV630,"ATI Radeon HD 3610",kNull},
{ 0x9589,0x30001642, CHIP_FAMILY_RV630,"ATI Radeon HD 3610",kNull},
{ 0x9589,0x0E41174B, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9589,0x30001787, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull},
{ 0x9589,0x01001A93, CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 PRO",kNull},
{ 0x9591,0x2303148C, CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kNull},
//Azi: most of the 9598 are rv630, according to http://developer.amd.com/gpu_assets/ATI_Device_IDs_xxx_xx.txt
{ 0x9598,0xB3831002, CHIP_FAMILY_RV635,"ATI All-in-Wonder HD",kNull},
{ 0x9598,0x30011043, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x30001043, CHIP_FAMILY_RV635,"HD3730",kNull},
{ 0x9598,0x3000148C, CHIP_FAMILY_RV635,"ATI Radeon HD 3730",kNull},
{ 0x9598,0x3031148C, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x3001148C, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x30011545, CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 Pro",kNull},
{ 0x9598,0x30001545, CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 XT",kNull},
{ 0x9598,0x4570174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x4580174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x4610174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull},
{ 0x9598,0x3000174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3730",kNull},
{ 0x9598,0x3001174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3750",kNull},
{ 0x9598,0x301017AF, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull},
{ 0x9598,0x301117AF, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull},
{ 0x9598,0x300117AF, CHIP_FAMILY_RV635,"ATI Radeon HD3750",kNull},
{ 0x9598,0x30501787, CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull},
{ 0x95C0,0x3000148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull},
{ 0x95C0,0xE3901745, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull},
{ 0x95C0,0x3002174B, CHIP_FAMILY_RV620,"ATI Radeon HD 3570",kNull},
{ 0x95C0,0x3020174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C0,0x3000174B, CHIP_FAMILY_RV620,"Sapphire Radeon HD 3550",kNull},
{ 0x95C5,0x3000148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3450",kNull},
{ 0x95C5,0x3001148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull},
{ 0x95C5,0x3002148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x3033148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x3003148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x3032148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x3010174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x4250174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x30501787, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull},
{ 0x95C5,0x301017AF, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull},
{ 0x95C5,0x01051A93, CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull},
{ 0x95C5,0x01041A93, CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull},
/* Evergreen */
{ 0x6898,0x032E1043,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari},
{ 0x6898,0xE140174B,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari},
{ 0x6898,0x29611682,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari},
{ 0x6898,0x0B001002,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kZonalis},
{ 0x6898,0x00D0106B,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kLangur},
{ 0x6899,0x21E41458,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0x200A1787,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0x22901787,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0xE140174B,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x689C,0x03521043,CHIP_FAMILY_HEMLOCK,"ASUS ARES",kUakari},
{ 0x689C,0x039E1043,CHIP_FAMILY_HEMLOCK,"ASUS EAH5870 Series",kUakari},
{ 0x689C,0x30201682,CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5970",kUakari},
{ 0x68B8,0xE147174B,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x21D71458,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x1482174B,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x29901682,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x29911682,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x200B1787,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x22881787,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x00CF106B,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kHoolock},
{ 0x68D8,0x301117AF,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull},
{ 0x68D8,0x301017AF,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x30001787,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x5690174B,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull},
{ 0x68D8,0x5730174B,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x21D91458,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D8,0x03561043,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D8,0xE151174B,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D9,0x301017AF,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x301017AF,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x30001787,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x5630174B,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68E0,0x04561028,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur},
{ 0x68E1,0x1426103C,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5430M",kEulemur},
{ 0x68F9,0x301317AF,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x301117AF,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x301217AF,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull},
{ 0x68F9,0x30001787,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x30021787,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull},
{ 0x68F9,0x30011787,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull},
{ 0x68F9,0x5470174B,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x5490174B,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull},
{ 0x68F9,0x5530174B,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull},
{ 0x6898,0x032E1043, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari},
{ 0x6898,0xE140174B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari},
{ 0x6898,0x29611682, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari},
{ 0x6898,0x0B001002, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kZonalis},
{ 0x6898,0x00D0106B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kLangur},
{ 0x6899,0x21E41458, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0x200A1787, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0x22901787, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x6899,0xE140174B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari},
{ 0x689C,0x03521043, CHIP_FAMILY_HEMLOCK,"ASUS ARES",kUakari},
{ 0x689C,0x039E1043, CHIP_FAMILY_HEMLOCK,"ASUS EAH5870 Series",kUakari},
{ 0x689C,0x30201682, CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5970",kUakari},
{ 0x68B8,0xE147174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x21D71458, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x1482174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x29901682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x29911682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x200B1787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x22881787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet},
{ 0x68B8,0x00CF106B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kHoolock},
{ 0x68D8,0x301117AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull},
{ 0x68D8,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x5690174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull},
{ 0x68D8,0x5730174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull},
{ 0x68D8,0x21D91458, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D8,0x03561043, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D8,0xE151174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon},
{ 0x68D9,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68DA,0x5630174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull},
{ 0x68E0,0x04561028, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur},
{ 0x68E1,0x1426103C, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5430M",kEulemur},
{ 0x68F9,0x301317AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x301117AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x301217AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull},
{ 0x68F9,0x30001787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x30021787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull},
{ 0x68F9,0x30011787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull},
{ 0x68F9,0x5470174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull},
{ 0x68F9,0x5490174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull},
{ 0x68F9,0x5530174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull},
/* Northen Islands */
{ 0x6718,0x0B001002,CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull},
{ 0x6718,0x31301682,CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull},
{ 0x6718,0x67181002,CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull},
{ 0x6738,0x67381002,CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed},
{ 0x6739,0x67391002,CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed},
{ 0x6739,0x21F81458,CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed},
{ 0x6759,0xE193174B,CHIP_FAMILY_TURKS,"AMD Radeon HD 6570",kNull},
/* standard/default models */
{ 0x9400,0x00000000,CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull},
{ 0x9405,0x00000000,CHIP_FAMILY_R600,"ATI Radeon HD 2900 GT",kNull},
{ 0x9440,0x00000000,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x9441,0x00000000,CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot},
{ 0x9442,0x00000000,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x9443,0x00000000,CHIP_FAMILY_RV770,"ATI Radeon HD 4850 X2",kMotmot},
{ 0x944C,0x00000000,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944E,0x00000000,CHIP_FAMILY_RV770,"ATI Radeon HD 4700 Series",kMotmot},
{ 0x944E,0x00000000,CHIP_FAMILY_RV770,"ATI Radeon HD 4700 Series",kMotmot},
{ 0x9450,0x00000000,CHIP_FAMILY_RV770,"AMD FireStream 9270",kMotmot},
{ 0x9452,0x00000000,CHIP_FAMILY_RV770,"AMD FireStream 9250",kMotmot},
{ 0x9460,0x00000000,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x9462,0x00000000,CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x9490,0x00000000,CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kFlicker},
{ 0x9498,0x00000000,CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kFlicker},
{ 0x94B3,0x00000000,CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94B4,0x00000000,CHIP_FAMILY_RV740,"ATI Radeon HD 4700 Series",kFlicker},
{ 0x94B5,0x00000000,CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94C1,0x00000000,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago},
{ 0x94C3,0x00000000,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago},
{ 0x94C7,0x00000000,CHIP_FAMILY_RV610,"ATI Radeon HD 2350",kIago},
{ 0x94CC,0x00000000,CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago},
{ 0x9501,0x00000000,CHIP_FAMILY_RV670,"ATI Radeon HD 3800 Series",kMegalodon},
{ 0x9505,0x00000000,CHIP_FAMILY_RV670,"ATI Radeon HD 3800 Series",kMegalodon},
{ 0x9507,0x00000000,CHIP_FAMILY_RV670,"ATI Radeon HD 3830",kMegalodon},
{ 0x950F,0x00000000,CHIP_FAMILY_RV670,"ATI Radeon HD 3870 X2",kMegalodon},
{ 0x9513,0x00000000,CHIP_FAMILY_RV670,"ATI Radeon HD 3850 X2",kMegalodon},
{ 0x9519,0x00000000,CHIP_FAMILY_RV670,"AMD FireStream 9170",kMegalodon},
{ 0x9540,0x00000000,CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull},
{ 0x954F,0x00000000,CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9588,0x00000000,CHIP_FAMILY_RV630,"ATI Radeon HD 2600 XT",kLamna},
{ 0x9589,0x00000000,CHIP_FAMILY_RV630,"ATI Radeon HD 2600 PRO",kLamna},
{ 0x958A,0x00000000,CHIP_FAMILY_RV630,"ATI Radeon HD 2600 X2 Series",kLamna},
{ 0x9598,0x00000000,CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kMegalodon},
{ 0x95C0,0x00000000,CHIP_FAMILY_RV620,"ATI Radeon HD 3400 Series",kIago},
{ 0x95C5,0x00000000,CHIP_FAMILY_RV620,"ATI Radeon HD 3400 Series",kIago},
{ 0x9610,0x00000000,CHIP_FAMILY_RS780,"ATI Radeon HD 3200 Graphics",kNull},
{ 0x9611,0x00000000,CHIP_FAMILY_RS780,"ATI Radeon 3100 Graphics",kNull},
{ 0x9614,0x00000000,CHIP_FAMILY_RS780,"ATI Radeon HD 3300 Graphics",kNull},
{ 0x9616,0x00000000,CHIP_FAMILY_RS780,"AMD 760G",kNull},
{ 0x9710,0x00000000,CHIP_FAMILY_RS880,"ATI Radeon HD 4200",kNull},
{ 0x9715,0x00000000,CHIP_FAMILY_RS880,"ATI Radeon HD 4250",kNull},
{ 0x9714,0x00000000,CHIP_FAMILY_RS880,"ATI Radeon HD 4290",kNull},
{ 0x9400,0x00000000, CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull},
{ 0x9405,0x00000000, CHIP_FAMILY_R600,"ATI Radeon HD 2900 GT",kNull},
{ 0x9440,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x9441,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot},
{ 0x9442,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x9443,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4850 X2",kMotmot},
{ 0x944C,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x944E,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4700 Series",kMotmot},
{ 0x9450,0x00000000, CHIP_FAMILY_RV770,"AMD FireStream 9270",kMotmot},
{ 0x9452,0x00000000, CHIP_FAMILY_RV770,"AMD FireStream 9250",kMotmot},
{ 0x9460,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x9462,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot},
{ 0x9490,0x00000000, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kFlicker},
{ 0x9498,0x00000000, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kFlicker},
{ 0x94B3,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94B4,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4700 Series",kFlicker},
{ 0x94B5,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker},
{ 0x94C1,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago},
{ 0x94C3,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago},
{ 0x94C7,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2350",kIago},
{ 0x94CC,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago},
{ 0x9501,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3800 Series",kMegalodon},
{ 0x9505,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3800 Series",kMegalodon},
{ 0x9507,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3830",kMegalodon},
{ 0x950F,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3870 X2",kMegalodon},
{ 0x9513,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3850 X2",kMegalodon},
{ 0x9519,0x00000000, CHIP_FAMILY_RV670,"AMD FireStream 9170",kMegalodon},
{ 0x9540,0x00000000, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull},
{ 0x954F,0x00000000, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull},
{ 0x9588,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 XT",kLamna},
{ 0x9589,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 PRO",kLamna},
{ 0x958A,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 X2 Series",kLamna},
{ 0x9598,0x00000000, CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kMegalodon},
{ 0x95C0,0x00000000, CHIP_FAMILY_RV620,"ATI Radeon HD 3400 Series",kIago},
{ 0x95C5,0x00000000, CHIP_FAMILY_RV620,"ATI Radeon HD 3400 Series",kIago},
{ 0x9610,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon HD 3200 Graphics",kNull},
{ 0x9611,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon 3100 Graphics",kNull},
{ 0x9614,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon HD 3300 Graphics",kNull},
{ 0x9616,0x00000000, CHIP_FAMILY_RS780,"AMD 760G",kNull},
{ 0x9710,0x00000000, CHIP_FAMILY_RS880,"ATI Radeon HD 4200",kNull},
{ 0x9715,0x00000000, CHIP_FAMILY_RS880,"ATI Radeon HD 4250",kNull},
{ 0x9714,0x00000000, CHIP_FAMILY_RS880,"ATI Radeon HD 4290",kNull},
/* Evergreen */
{ 0x688D,0x00000000,CHIP_FAMILY_CYPRESS,"AMD FireStream 9350",kUakari},
{ 0x6898,0x00000000,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari},
{ 0x6899,0x00000000,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari},
{ 0x689E,0x00000000,CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari},
{ 0x689C,0x00000000,CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5900 Series",kUakari},
{ 0x68B9,0x00000000,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5600 Series",kVervet},
{ 0x68B8,0x00000000,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5700 Series",kVervet},
{ 0x68BE,0x00000000,CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5700 Series",kVervet},
{ 0x68D8,0x00000000,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5600 Series",kBaboon},
{ 0x68D9,0x00000000,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5500 Series",kBaboon},
{ 0x68DA,0x00000000,CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5500 Series",kBaboon},
{ 0x68F9,0x00000000,CHIP_FAMILY_CEDAR,"ATI Radeon HD 5400 Series",kNull},
{ 0x688D,0x00000000, CHIP_FAMILY_CYPRESS,"AMD FireStream 9350",kUakari},
{ 0x6898,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari},
{ 0x6899,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari},
{ 0x689E,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari},
{ 0x689C,0x00000000, CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5900 Series",kUakari},
{ 0x68B9,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5600 Series",kVervet},
{ 0x68B8,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5700 Series",kVervet},
{ 0x68BE,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5700 Series",kVervet},
//Azi: from Slice { 0x100268C0, "ATI Radeon 5670 Series", "Galago"}
// http://www.insanelymac.com/forum/index.php?s=&showtopic=255866&view=findpost&p=1695482
{ 0x68D8,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5600 Series",kBaboon},
{ 0x68D9,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5500 Series",kBaboon},
{ 0x68DA,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5500 Series",kBaboon},
{ 0x68F9,0x00000000, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5400 Series",kNull},
/* Northen Islands */
{ 0x6718,0x00000000,CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970 Series",kNull},
{ 0x6738,0x00000000,CHIP_FAMILY_BARTS,"AMD Radeon HD 6870 Series",kDuckweed},
{ 0x6739,0x00000000,CHIP_FAMILY_BARTS,"AMD Radeon HD 6850 Series",kDuckweed},
{ 0x673E,0x00000000,CHIP_FAMILY_BARTS,"AMD Radeon HD 6790 Series",kNull},
{ 0x6758,0x00000000,CHIP_FAMILY_TURKS,"AMD Radeon HD 6670 Series",kNull},
{ 0x6759,0x00000000,CHIP_FAMILY_TURKS,"AMD Radeon HD 6500 Series",kNull},
{ 0x6770,0x00000000,CHIP_FAMILY_CAICOS,"AMD Radeon HD 6400 Series",kNull},
{ 0x6779,0x00000000,CHIP_FAMILY_CAICOS,"AMD Radeon HD 6450 Series",kNull},
{ 0x0000,0x00000000,CHIP_FAMILY_UNKNOW,NULL,kNull}
};
typedef struct {
struct DevPropDevice*device;
radeon_card_info_t*info;
pci_dt_t *pci_dev;
pci_dt_t*pci_dev;
uint8_t*fb;
uint8_t*mmio;
uint8_t*io;
card_t *card;
/* Flags */
#define MKFLAG(n)(1 << n)
#define FLAGTRUEMKFLAG(0)
#define EVERGREENMKFLAG(1)
#define MKFLAG(n)(1 << n)
#define FLAGTRUEMKFLAG(0)
#define EVERGREENMKFLAG(1)
static uint8_t atN = 0;
typedef struct {
type_ttype;
uint32_tsize;
uint8_t*data;
type_ttype;
uint32_tsize;
uint8_t*data;
} value_t;
static value_t aty_name;
static value_t aty_nameparent;
//static value_t aty_model;
#define DATVAL(x){kPtr, sizeof(x), (uint8_t *)x}
#define STRVAL(x){kStr, sizeof(x), (uint8_t *)x}
#define BYTVAL(x){kCst, 1, (uint8_t *)x}
#define WRDVAL(x){kCst, 2, (uint8_t *)x}
#define DWRVAL(x){kCst, 4, (uint8_t *)x}
#define QWRVAL(x){kCst, 8, (uint8_t *)x}
#define NULVAL{kNul, 0, (uint8_t *)NULL}
#define DATVAL(x){kPtr, sizeof(x), (uint8_t *)x}
#define STRVAL(x){kStr, sizeof(x), (uint8_t *)x}
#define BYTVAL(x){kCst, 1, (uint8_t *)x}
#define WRDVAL(x){kCst, 2, (uint8_t *)x}
#define DWRVAL(x){kCst, 4, (uint8_t *)x}
#define QWRVAL(x){kCst, 8, (uint8_t *)x}
#define NULVAL{kNul, 0, (uint8_t *)NULL}
bool get_bootdisplay_val(value_t *val);
bool get_vrammemory_val(value_t *val);
bool get_vramtotalsize_val(value_t *val);
typedef struct {
uint32_tflags;
boolall_ports;
char*name;
bool(*get_value)(value_t *val);
value_tdefault_val;
uint32_tflags;
boolall_ports;
char*name;
bool(*get_value)(value_t *val);
value_tdefault_val;
} dev_prop_t;
dev_prop_t ati_devprop_list[] = {
{FLAGTRUE,false,"@0,AAPL,boot-display",get_bootdisplay_val,NULVAL},
//{FLAGTRUE,false,"@0,ATY,EFIDisplay",NULL,STRVAL("TMDSA")},
//{FLAGTRUE,true,"@0,AAPL,vram-memory",get_vrammemory_val,NULVAL},
//{FLAGTRUE,true,"@0,compatible",get_name_val,NULVAL},
//{FLAGTRUE,true,"@0,connector-type",get_conntype_val,NULVAL},
//{FLAGTRUE,true,"@0,device_type",NULL,STRVAL("display")},
//{FLAGTRUE,false,"@0,display-connect-flags",NULL,DWRVAL((uint32_t)0)},
//{FLAGTRUE,false,"@0,display-connect-flags", NULL,DWRVAL((uint32_t)0)},
//{FLAGTRUE,true,"@0,display-type",NULL,STRVAL("NONE")},
{FLAGTRUE,true,"@0,name",get_name_val,NULVAL},
//{FLAGTRUE,true,"@0,VRAM,memsize",get_vrammemsize_val,NULVAL},
//{FLAGTRUE,false,"AAPL,aux-power-connected",NULL,DWRVAL((uint32_t)1)},
//{FLAGTRUE,false,"AAPL,aux-power-connected", NULL,DWRVAL((uint32_t)1)},
//{FLAGTRUE,false,"AAPL,backlight-control",NULL,DWRVAL((uint32_t)0)},
{FLAGTRUE,false,"ATY,bin_image",get_binimage_val,NULVAL},
{FLAGTRUE,false,"ATY,Copyright",NULL,STRVAL("Copyright AMD Inc. All Rights Reserved. 2005-2010")},
{FLAGTRUE,false,"ATY,Copyright",NULL,STRVAL("Copyright AMD Inc. All Rights Reserved. 2005-2010") },
{FLAGTRUE,false,"ATY,Card#",get_romrevision_val,NULVAL},
{FLAGTRUE,false,"ATY,VendorID",NULL,WRDVAL((uint16_t)0x1002)},
{FLAGTRUE,false,"ATY,DeviceID",get_deviceid_val,NULVAL},
//{FLAGTRUE,false,"ATY,MCLK",get_mclk_val,NULVAL},
//{FLAGTRUE,false,"ATY,SCLK",get_sclk_val,NULVAL},
//{FLAGTRUE,false,"ATY,RefCLK",get_refclk_val,DWRVAL((uint32_t)0x0a8c)},
//{FLAGTRUE,false,"ATY,PlatformInfo",get_platforminfo_val,NULVAL},
{FLAGTRUE,false,"name",get_nameparent_val,NULVAL},
{FLAGTRUE,false,"device_type",get_nameparent_val,NULVAL},
{FLAGTRUE,false,"model",get_model_val,STRVAL("ATI Radeon")},
//{FLAGTRUE,false,"VRAM,totalsize",get_vramtotalsize_val,NULVAL},
{FLAGTRUE,false,NULL,NULL,NULVAL}
};
bool get_bootdisplay_val(value_t *val)
{
static uint32_t v = 0;
if (v)
return false;
if (!card->posted)
return false;
v = 1;
val->type = kCst;
val->size = 4;
val->data = (uint8_t *)&v;
return true;
}
val->type = aty_name.type;
val->size = aty_name.size;
val->data = aty_name.data;
return true;
}
val->type = aty_nameparent.type;
val->size = aty_nameparent.size;
val->data = aty_nameparent.data;
return true;
}
{
if (!card->info->model_name)
return false;
val->type = kStr;
val->size = strlen(card->info->model_name) + 1;
val->data = (uint8_t *)card->info->model_name;
return true;
}
bool get_conntype_val(value_t *val)
{
/*
Connector types:
0x4 : DisplayPort
0x400: DL DVI-I
0x800: HDMI
*/
//Connector types:
//0x4 : DisplayPort
//0x400: DL DVI-I
//0x800: HDMI
return false;
}
{
static int idx = -1;
static uint64_t memsize;
idx++;
memsize = ((uint64_t)card->vram_size << 32);
if (idx == 0)
memsize = memsize | (uint64_t)card->vram_size;
val->type = kCst;
val->size = 8;
val->data = (uint8_t *)&memsize;
return true;
}
{
if (!card->rom)
return false;
val->type = kPtr;
val->size = card->rom_size;
val->data = card->rom;
return true;
}
uint8_t *rev;
if (!card->rom)
return false;
rev = card->rom + *(uint8_t *)(card->rom + OFFSET_TO_GET_ATOMBIOS_STRINGS_START);
val->type = kPtr;
val->size = strlen((char *)rev);
val->data = malloc(val->size);
if (!val->data)
return false;
memcpy(val->data, rev, val->size);
return true;
}
val->type = kCst;
val->size = 2;
val->data = (uint8_t *)&card->pci_dev->device_id;
return true;
}
val->data = malloc(0x80);
if (!val->data)
return false;
bzero(val->data, 0x80);
val->type= kPtr;
val->size= 0x80;
val->data[0]= 1;
return true;
}
val->type = kCst;
val->size = 4;
val->data = (uint8_t *)&card->vram_size;
return true;
}
{
if (val->type == kPtr)
free(val->data);
bzero(val, sizeof(value_t));
}
{
value_t *val = malloc(sizeof(value_t));
int i, pnum;
for (i = 0; devprop_list[i].name != NULL; i++)
{
if ((devprop_list[i].flags == FLAGTRUE) || (devprop_list[i].flags | card->flags))
{
if (devprop_list[i].get_value && devprop_list[i].get_value(val))
{
devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);
free_val(val);
if (devprop_list[i].all_ports)
{
for (pnum = 1; pnum < card->ports; pnum++)
else
{
if (devprop_list[i].default_val.type != kNul)
devprop_add_value(card->device, devprop_list[i].name,
devprop_list[i].default_val.type == kCst ?
(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data,
{
devprop_add_value(card->device, devprop_list[i].name,
devprop_list[i].default_val.type == kCst ?
(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data,
devprop_list[i].default_val.size);
}
if (devprop_list[i].all_ports)
{
for (pnum = 1; pnum < card->ports; pnum++)
if (devprop_list[i].default_val.type != kNul)
{
devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii
devprop_add_value(card->device, devprop_list[i].name,
devprop_list[i].default_val.type == kCst ?
(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data,
devprop_add_value(card->device, devprop_list[i].name,
devprop_list[i].default_val.type == kCst ?
(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data,
devprop_list[i].default_val.size);
}
}
devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card
}
}
}
}
free(val);
}
bool validate_rom(option_rom_header_t *rom_header, pci_dt_t *pci_dev)
{
option_rom_pci_header_t *rom_pci_header;
if (rom_header->signature != 0xaa55)
return false;
rom_pci_header = (option_rom_pci_header_t *)((uint8_t *)rom_header + rom_header->pci_header_offset);
if (rom_pci_header->signature != 0x52494350)
return false;
if (rom_pci_header->vendor_id != pci_dev->vendor_id || rom_pci_header->device_id != pci_dev->device_id)
return false;
return true;
}
bool load_vbios_file(const char *key, uint16_t vendor_id, uint16_t device_id, uint32_t subsys_id)
{
intfd;
int fd;
char file_name[24];
bool do_load = false;
getBoolForKey(key, &do_load, &bootInfo->bootConfig);
getBoolForKey(key, &do_load, &bootInfo->chameleonConfig);
if (!do_load)
return false;
sprintf(file_name, "/Extra/%04x_%04x_%08x.rom", vendor_id, device_id, subsys_id);
if ((fd = open_bvdev("bt(0,0)", file_name, 0)) < 0)
return false;
card->rom_size = file_size(fd);
card->rom = malloc(card->rom_size);
if (!card->rom)
return false;
read(fd, (char *)card->rom, card->rom_size);
if (!validate_rom((option_rom_header_t *)card->rom, card->pci_dev))
{
card->rom_size = 0;
card->rom = 0;
return false;
}
card->rom_size = ((option_rom_header_t *)card->rom)->rom_size * 512;
close(fd);
return true;
}
void get_vram_size(void)
{
chip_family_t chip_family = card->info->chip_family;
card->vram_size = 0;
if (chip_family >= CHIP_FAMILY_CEDAR)
/* size in MB on evergreen */
/* XXX watch for overflow!!! */
// size in MB on evergreen
// XXX watch for overflow!!!
card->vram_size = RegRead32(R600_CONFIG_MEMSIZE) * 1024 * 1024;
else
if (chip_family >= CHIP_FAMILY_R600)
bool read_vbios(bool from_pci)
{
option_rom_header_t *rom_addr;
if (from_pci)
{
rom_addr = (option_rom_header_t *)(pci_config_read32(card->pci_dev->dev.addr, PCI_ROM_ADDRESS) & ~0x7ff);
}
else
rom_addr = (option_rom_header_t *)0xc0000;
if (!validate_rom(rom_addr, card->pci_dev))
return false;
card->rom_size = rom_addr->rom_size * 512;
if (!card->rom_size)
return false;
card->rom = malloc(card->rom_size);
if (!card->rom)
return false;
memcpy(card->rom, (void *)rom_addr, card->rom_size);
return true;
}
{
bool ret = false;
chip_family_t chip_family = card->info->chip_family;
if (chip_family >= CHIP_FAMILY_RV770)
{
uint32_t viph_control= RegRead32(RADEON_VIPH_CONTROL);
uint32_t bus_cntl= RegRead32(RADEON_BUS_CNTL);
uint32_t d1vga_control= RegRead32(AVIVO_D1VGA_CONTROL);
uint32_t d2vga_control= RegRead32(AVIVO_D2VGA_CONTROL);
uint32_t vga_render_control= RegRead32(AVIVO_VGA_RENDER_CONTROL);
uint32_t vga_render_control = RegRead32(AVIVO_VGA_RENDER_CONTROL);
uint32_t rom_cntl= RegRead32(R600_ROM_CNTL);
uint32_t cg_spll_func_cntl= 0;
uint32_t cg_spll_status;
/* disable VIP */
// disable VIP
RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
/* enable the rom */
// enable the rom
RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
/* Disable VGA mode */
// Disable VGA mode
RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
if (chip_family == CHIP_FAMILY_RV730)
{
cg_spll_func_cntl = RegRead32(R600_CG_SPLL_FUNC_CNTL);
/* enable bypass mode */
// enable bypass mode
RegWrite32(R600_CG_SPLL_FUNC_CNTL, (cg_spll_func_cntl | R600_SPLL_BYPASS_EN));
/* wait for SPLL_CHG_STATUS to change to 1 */
// wait for SPLL_CHG_STATUS to change to 1
cg_spll_status = 0;
while (!(cg_spll_status & R600_SPLL_CHG_STATUS))
cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);
RegWrite32(R600_ROM_CNTL, (rom_cntl & ~R600_SCK_OVERWRITE));
}
else
RegWrite32(R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));
ret = read_vbios(true);
/* restore regs */
// restore regs
if (chip_family == CHIP_FAMILY_RV730)
{
RegWrite32(R600_CG_SPLL_FUNC_CNTL, cg_spll_func_cntl);
/* wait for SPLL_CHG_STATUS to change to 1 */
// wait for SPLL_CHG_STATUS to change to 1
cg_spll_status = 0;
while (!(cg_spll_status & R600_SPLL_CHG_STATUS))
cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);
uint32_t viph_control= RegRead32(RADEON_VIPH_CONTROL);
uint32_t bus_cntl= RegRead32(RADEON_BUS_CNTL);
uint32_t d1vga_control= RegRead32(AVIVO_D1VGA_CONTROL);
uint32_t d2vga_control = RegRead32(AVIVO_D2VGA_CONTROL);
uint32_t d2vga_control= RegRead32(AVIVO_D2VGA_CONTROL);
uint32_t vga_render_control= RegRead32(AVIVO_VGA_RENDER_CONTROL);
uint32_t rom_cntl= RegRead32(R600_ROM_CNTL);
uint32_t general_pwrmgt= RegRead32(R600_GENERAL_PWRMGT);
uint32_t low_vid_lower_gpio_cntl= RegRead32(R600_LOW_VID_LOWER_GPIO_CNTL);
uint32_t medium_vid_lower_gpio_cntl= RegRead32(R600_MEDIUM_VID_LOWER_GPIO_CNTL);
uint32_t medium_vid_lower_gpio_cntl = RegRead32(R600_MEDIUM_VID_LOWER_GPIO_CNTL);
uint32_t high_vid_lower_gpio_cntl= RegRead32(R600_HIGH_VID_LOWER_GPIO_CNTL);
uint32_t ctxsw_vid_lower_gpio_cntl= RegRead32(R600_CTXSW_VID_LOWER_GPIO_CNTL);
uint32_t lower_gpio_enable= RegRead32(R600_LOWER_GPIO_ENABLE);
/* disable VIP */
// disable VIP
RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
/* enable the rom */
// enable the rom
RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
/* Disable VGA mode */
// Disable VGA mode
RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, (high_vid_lower_gpio_cntl & ~0x400));
RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, (ctxsw_vid_lower_gpio_cntl & ~0x400));
RegWrite32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400));
ret = read_vbios(true);
/* restore regs */
// restore regs
RegWrite32(RADEON_VIPH_CONTROL, viph_control);
RegWrite32(RADEON_BUS_CNTL, bus_cntl);
RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);
RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl);
RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl);
RegWrite32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable);
}
return ret;
bool radeon_card_posted(void)
{
uint32_t reg;
/* first check CRTCs */
// first check CRTCs
reg = RegRead32(RADEON_CRTC_GEN_CNTL) | RegRead32(RADEON_CRTC2_GEN_CNTL);
if (reg & RADEON_CRTC_EN)
return true;
/* then check MEM_SIZE, in case something turned the crtcs off */
// then check MEM_SIZE, in case something turned the crtcs off
reg = RegRead32(R600_CONFIG_MEMSIZE);
if (reg)
return true;
return false;
}
#if 0
bool devprop_add_pci_config_space(void)
{
int offset;
uint8_t *config_space = malloc(0x100);
if (!config_space)
return false;
for (offset = 0; offset < 0x100; offset += 4)
config_space[offset / 4] = pci_config_read32(card->pci_dev->dev.addr, offset);
devprop_add_value(card->device, "ATY,PCIConfigSpace", config_space, 0x100);
free(config_space);
return true;
}
#endif
char name_parent[24];
int i;
bool add_vbios = true;
card = malloc(sizeof(card_t));
if (!card)
return false;
bzero(card, sizeof(card_t));
card->pci_dev = pci_dev;
for (i = 0; radeon_cards[i].device_id ; i++)
{
if (radeon_cards[i].device_id == pci_dev->device_id)
{
card->info = &radeon_cards[i];
if ((radeon_cards[i].subsys_id == 0x00000000) ||
if ((radeon_cards[i].subsys_id == 0x00000000) ||
(radeon_cards[i].subsys_id == pci_dev->subsys_id.subsys_id))
break;
}
}
if (!card->info->device_id || !card->info->cfg_name)
{
printf("Unsupported card!\n");
return false;
}
card->fb= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_0) & ~0x0f);
card->mmio= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_2) & ~0x0f);
card->io= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_4) & ~0x03);
verbose("Framebuffer @0x%08X MMIO @0x%08X I/O Port @0x%08X ROM Addr @0x%08X\n",
verbose("Framebuffer @0x%08X MMIO @0x%08XI/O Port @0x%08X ROM Addr @0x%08X\n",
card->fb, card->mmio, card->io, pci_config_read32(pci_dev->dev.addr, PCI_ROM_ADDRESS));
card->posted= radeon_card_posted();
card->posted = radeon_card_posted();
verbose("ATI card %s, ", card->posted ? "POSTed" : "non-POSTed");
get_vram_size();
getBoolForKey(kATYbinimage, &add_vbios, &bootInfo->bootConfig);
getBoolForKey(kATYbinimage, &add_vbios, &bootInfo->chameleonConfig);
if (add_vbios)
{
if (!load_vbios_file(kUseAtiROM, pci_dev->vendor_id, pci_dev->device_id, pci_dev->subsys_id.subsys_id))
{
verbose("reading VBIOS from %s", card->posted ? "legacy space" : "PCI ROM");
read_disabled_vbios();
verbose("\n");
}
}
card->ports = 2; // default
if (card->info->chip_family >= CHIP_FAMILY_CEDAR)
{
card->flags |= EVERGREEN;
card->ports = 3;
}
atN = 0;
card->cfg_name = getStringForKey(kAtiConfig, &bootInfo->bootConfig);
card->cfg_name = getStringForKey(kAtiConfig, &bootInfo->chameleonConfig);
if (!card->cfg_name)
{
card->cfg_name = card_configs[card->info->cfg_name].name;
if (strcmp(card->cfg_name, card_configs[i].name) == 0)
card->ports = card_configs[i].ports;
}
sprintf(name, "ATY,%s", card->cfg_name);
aty_name.type = kStr;
aty_name.size = strlen(name) + 1;
aty_name.data = (uint8_t *)name;
sprintf(name_parent, "ATY,%sParent", card->cfg_name);
aty_nameparent.type = kStr;
aty_nameparent.size = strlen(name_parent) + 1;
aty_nameparent.data = (uint8_t *)name_parent;
return true;
}
bool setup_ati_devprop(pci_dt_t *ati_dev)
{
char *devicepath;
if (!init_card(ati_dev))
return false;
/* ------------------------------------------------- */
/* Find a better way to do this (in device_inject.c) */
// -------------------------------------------------
// Find a better way to do this (in device_inject.c)
if (!string)
string = devprop_create_string();
devicepath = get_pci_dev_path(ati_dev);
card->device = devprop_add_device(string, devicepath);
if (!card->device)
return false;
/* ------------------------------------------------- */
// -------------------------------------------------
#if 0
uint64_t fb= (uint32_t)card->fb;
uint64_t mmio= (uint32_t)card->mmio;
devprop_add_value(card->device, "ATY,RegisterSpaceOffset", &mmio, 8);
devprop_add_value(card->device, "ATY,IOSpaceOffset", &io, 8);
#endif
devprop_add_list(ati_devprop_list);
/* ------------------------------------------------- */
/* Find a better way to do this (in device_inject.c) */
stringdata = malloc(string->length);
// -------------------------------------------------
// Find a better way to do this (in device_inject.c)
//Azi: XXX tried to fix a malloc error in vain; this is related to XCode 4 compilation!
stringdata = malloc(sizeof(uint8_t) * string->length);
memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);
stringlength = string->length;
/* ------------------------------------------------- */
verbose("ATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x]):: %s\n",
chip_family_name[card->info->chip_family], card->info->model_name,
(uint32_t)(card->vram_size / (1024 * 1024)), card->cfg_name,
// -------------------------------------------------
verbose("ATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x]):: %s\n",
chip_family_name[card->info->chip_family], card->info->model_name,
(uint32_t)(card->vram_size / (1024 * 1024)), card->cfg_name,
ati_dev->vendor_id, ati_dev->device_id,
ati_dev->subsys_id.subsys.vendor_id, ati_dev->subsys_id.subsys.device_id,
ati_dev->subsys_id.subsys.vendor_id, ati_dev->subsys_id.subsys.device_id,
devicepath);
free(card);
return true;
}
branches/iFabio/Chameleon/i386/libsaio/sys.c
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extern int multiboot_partition;
extern int multiboot_partition_set;
extern int multiboot_skip_partition;
extern int multiboot_skip_partition_set;
struct devsw {
const char * name;
for (idx = len; idx && (name[idx] != '/' && name[idx] != '\\'); idx--) {}
if (idx == 0) {
if(name[idx] == '/' || name[idx] == '\\') ++name; // todo: ensure other functions handel \ properly
gMakeDirSpec[0] = '/';
gMakeDirSpec[1] = '\0';
} else {
if ((iob[i].i_flgs != F_ALLOC) || (i == fdesc)) {
continue;
}
io->i_buf = max(iob[i].i_filesize + iob[i].i_buf, io->i_buf);
io->i_buf = MAX(iob[i].i_filesize + iob[i].i_buf, io->i_buf);
}
// Load entire file into memory. Unnecessary open() calls must be avoided.
int open_bvdev(const char *bvd, const char *path, int flags)
{
const struct devsw*dp;
const char*cp;
BVRefbvr;
inti;
intlen;
intunit;
intpartition;
const struct devsw*dp;
const char*cp;
BVRefbvr;
inti;
intlen;
intunit;
intpartition;
if ((i = open(path, flags)) >= 0) {
return i;
bvr = newBootVolumeRef(dp->biosdev + unit, partition);
return open_bvr(bvr, path, flags);
}
}
}
return -1;
}
* to override the default selection.
* We accept only kBVFlagSystemVolume or kBVFlagForeignBoot volumes.
*/
char *val = XMLDecode(getStringForKey(kDefaultPartition, &bootInfo->bootConfig));
char *val = XMLDecode(getStringForKey(kDefaultPartition, &bootInfo->chameleonConfig));
if (val) {
for ( bvr = chain; bvr; bvr = bvr->next ) {
if (matchVolumeToString(bvr, val, false)) {
*/
for ( bvr = chain; bvr; bvr = bvr->next )
{
if (multiboot_skip_partition_set) {
if (bvr->part_no == multiboot_skip_partition) continue;
}
if ( bvr->flags & kBVFlagPrimary && bvr->biosdev == gBIOSDev ) foundPrimary = true;
// zhell -- Undo a regression that was introduced from r491 to 492.
// if gBIOSBootVolume is set already, no change is required
branches/iFabio/Chameleon/i386/libsaio/load.c
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printf("ncmds: %x\n", (unsigned)mH->ncmds);
printf("sizeofcmds: %x\n", (unsigned)mH->sizeofcmds);
printf("flags: %x\n", (unsigned)mH->flags);
getc();
getchar();
#endif
ncmds = mH->ncmds;
case LC_SEGMENT:
ret = DecodeSegment(cmdBase, &load_addr, &load_size);
if (ret == 0 && load_size != 0 && load_addr >= KERNEL_ADDR) {
vmaddr = min(vmaddr, load_addr);
vmend = max(vmend, load_addr + load_size);
vmaddr = MIN(vmaddr, load_addr);
vmend = MAX(vmend, load_addr + load_size);
}
break;
fileaddr = (gBinaryAddress + segCmd->fileoff);
filesize = segCmd->filesize;
segname=segCmd->segname;
segname=segCmd->segname;
#ifdef DEBUG
printf("segname: %s, vmaddr: %x, vmsize: %x, fileoff: %x, filesize: %x, nsects: %d, flags: %x.\n",
segCmd->segname, (unsigned)vmaddr, (unsigned)vmsize, (unsigned)fileaddr, (unsigned)filesize,
(unsigned) segCmd->nsects, (unsigned)segCmd->flags);
getchar();
#endif
}
else
{
fileaddr = (gBinaryAddress + segCmd->fileoff);
filesize = segCmd->filesize;
segname=segCmd->segname;
segname=segCmd->segname;
#ifdef DEBUG
printf("segname: %s, vmaddr: %x, vmsize: %x, fileoff: %x, filesize: %x, nsects: %d, flags: %x.\n",
segCmd->segname, (unsigned)vmaddr, (unsigned)vmsize, (unsigned)fileaddr, (unsigned)filesize,
(unsigned) segCmd->nsects, (unsigned)segCmd->flags);
getchar();
#endif
}
if (vmsize == 0 || filesize == 0) {
return 0;
}
#if DEBUG
printf("segname: %s, vmaddr: %x, vmsize: %x, fileoff: %x, filesize: %x, nsects: %d, flags: %x.\n",
segCmd->segname, (unsigned)vmaddr, (unsigned)vmsize, (unsigned)fileaddr, (unsigned)filesize,
(unsigned) segCmd->nsects, (unsigned)segCmd->flags);
getc();
#endif
if (! ((vmaddr >= KERNEL_ADDR &&
(vmaddr + vmsize) <= (KERNEL_ADDR + KERNEL_LEN)) ||
(vmaddr >= HIB_ADDR &&
#if DEBUG
printf("symoff: %x, nsyms: %x, stroff: %x, strsize: %x\n",
symTab->symoff, symTab->nsyms, symTab->stroff, symTab->strsize);
getc ();
getchar();
#endif
symsSize = symTab->stroff - symTab->symoff;
branches/iFabio/Chameleon/i386/libsaio/platform.c
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static bool done = false;
if (done) return;
bool useAutodetection = true;
getBoolForKey(kUseMemDetect, &useAutodetection, &bootInfo->bootConfig);
/* our code only works on Intel chipsets so make sure here */
if (pci_config_read16(PCIADDR(0, 0x00, 0), 0x00) != 0x8086)
bootInfo->memDetect = false;
else
bootInfo->memDetect = true;
/* manually */
getBoolForKey(kUseMemDetect, &bootInfo->memDetect, &bootInfo->chameleonConfig);
if (useAutodetection) {
if (dram_controller_dev!=NULL) {
if (bootInfo->memDetect) {
if (dram_controller_dev != NULL) {
scan_dram_controller(dram_controller_dev); // Rek: pci dev ram controller direct and fully informative scan ...
}
scan_spd(&Platform);
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*/
if((tscEnd - tscStart) <= CALIBRATE_TIME_MSEC)
continue;
// tscDelta = min(tscDelta, (tscEnd - tscStart))
// tscDelta = MIN(tscDelta, (tscEnd - tscStart))
if( (tscEnd - tscStart) < tscDelta )
tscDelta = tscEnd - tscStart;
}
strlcpy(p->CPU.BrandString,s, sizeof(p->CPU.BrandString));
if (!strncmp(p->CPU.BrandString, CPU_STRING_UNKNOWN, min(sizeof(p->CPU.BrandString), strlen(CPU_STRING_UNKNOWN) + 1))) {
if (!strncmp(p->CPU.BrandString, CPU_STRING_UNKNOWN, MIN(sizeof(p->CPU.BrandString), strlen(CPU_STRING_UNKNOWN) + 1))) {
/*
* This string means we have a firmware-programmable brand string,
* and the firmware couldn't figure out what sort of CPU we have.
} else {
cpuFrequency = tscFrequency;
}
if ((getValueForKey(kbusratio, &newratio, &len, &bootInfo->bootConfig)) && (len <= 4)) {
if ((getValueForKey(kbusratio, &newratio, &len, &bootInfo->chameleonConfig)) && (len <= 4)) {
max_ratio = atoi(newratio);
max_ratio = (max_ratio * 10);
if (len >= 3) max_ratio = (max_ratio + 5);
/*if(bus_ratio_max > 0) bus_ratio = flex_ratio;*/
p->CPU.MaxRatio = max_ratio;
p->CPU.MinRatio = min_ratio;
myfsb = fsbFrequency / 1000000;
verbose("Sticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio);
currcoef = bus_ratio_max;
}
}
}
/* Mobile CPU ? */
if (rdmsr64(0x17) & (1<<28)) {
/* Mobile CPU */
if (rdmsr64(MSR_IA32_PLATFORM_ID) & (1<<28)) {
p->CPU.Features |= CPU_FEATURE_MOBILE;
}
}
p->CPU.FSBFrequency = fsbFrequency;
p->CPU.CPUFrequency = cpuFrequency;
DBG("CPU: Vendor/Model/ExtModel: 0x%x/0x%x/0x%x\n", p->CPU.Vendor, p->CPU.Model, p->CPU.ExtModel);
DBG("CPU: Family/ExtFamily: 0x%x/0x%x\n", p->CPU.Family, p->CPU.ExtFamily);
DBG("CPU: MaxCoef/CurrCoef: 0x%x/0x%x\n", p->CPU.MaxCoef, p->CPU.CurrCoef);
DBG("CPU: MaxDiv/CurrDiv: 0x%x/0x%x\n", p->CPU.MaxDiv, p->CPU.CurrDiv);
DBG("CPU: TSCFreq: %dMHz\n", p->CPU.TSCFrequency / 1000000);
DBG("CPU: FSBFreq: %dMHz\n", p->CPU.FSBFrequency / 1000000);
DBG("CPU: CPUFreq: %dMHz\n", p->CPU.CPUFrequency / 1000000);
DBG("CPU: NoCores/NoThreads: %d/%d\n", p->CPU.NoCores, p->CPU.NoThreads);
DBG("CPU: Features: 0x%08x\n", p->CPU.Features);
DBG("CPU: Brand String: %s\n",p->CPU.BrandString);
DBG("CPU: Vendor/Family/ExtFamily: 0x%x/0x%x/0x%x\n",p->CPU.Vendor, p->CPU.Family, p->CPU.ExtFamily);
DBG("CPU: Model/ExtModel/Stepping: 0x%x/0x%x/0x%x\n",p->CPU.Model, p->CPU.ExtModel, p->CPU.Stepping);
DBG("CPU: MaxCoef/CurrCoef: 0x%x/0x%x\n",p->CPU.MaxCoef, p->CPU.CurrCoef);
DBG("CPU: MaxDiv/CurrDiv: 0x%x/0x%x\n",p->CPU.MaxDiv, p->CPU.CurrDiv);
DBG("CPU: TSCFreq: %dMHz\n",p->CPU.TSCFrequency / 1000000);
DBG("CPU: FSBFreq: %dMHz\n",p->CPU.FSBFrequency / 1000000);
DBG("CPU: CPUFreq: %dMHz\n",p->CPU.CPUFrequency / 1000000);
DBG("CPU: NoCores/NoThreads: %d/%d\n",p->CPU.NoCores, p->CPU.NoThreads);
DBG("CPU: Features: 0x%08x\n",p->CPU.Features);
#if DEBUG_CPU
pause();
#endif
branches/iFabio/Chameleon/i386/libsaio/platform.h
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#define UUID_LEN16
typedef struct _RamSlotInfo_t {
uint32_tModuleSize;// Size of Module in MB
uint32_tFrequency;// in Mhz
uint32_tModuleSize;// Size of Module in MB
uint32_tFrequency;// in Mhz
const char*Vendor;
const char*PartNo;
const char*SerialNo;
char*spd;// SPD Dump
char*spd;// SPD Dump
boolInUse;
uint8_tType;
uint8_tBankConnections;// table type 6, see (3.3.7)
uint8_tBankConnections;// table type 6, see (3.3.7)
uint8_tBankConnCnt;
} RamSlotInfo_t;
typedef struct _PlatformInfo_t {
struct CPU {
uint32_tFeatures;// CPU Features like MMX, SSE2, VT, MobileCPU
uint32_tVendor;// Vendor
uint32_tSignature;// Signature
uint32_tStepping;// Stepping
uint32_tModel;// Model
uint32_tExtModel;// Extended Model
uint32_tFamily;// Family
uint32_tExtFamily;// Extended Family
uint32_tNoCores;// No Cores per Package
uint32_tNoThreads;// Threads per Package
uint8_tMaxCoef;// Max Multiplier
uint32_tFeatures;// CPU Features like MMX, SSE2, VT, MobileCPU
uint32_tVendor;// Vendor
uint32_tSignature;// Signature
uint32_tStepping;// Stepping
uint32_tModel;// Model
uint32_tExtModel;// Extended Model
uint32_tFamily;// Family
uint32_tExtFamily;// Extended Family
uint32_tNoCores;// No Cores per Package
uint32_tNoThreads;// Threads per Package
uint8_tMaxCoef;// Max Multiplier
uint8_tMaxDiv;
uint8_tCurrCoef;// Current Multiplier
uint8_tCurrCoef;// Current Multiplier
uint8_tCurrDiv;
uint64_tTSCFrequency;// TSC Frequency Hz
uint64_tFSBFrequency;// FSB Frequency Hz
uint64_tCPUFrequency;// CPU Frequency Hz
uint32_tMaxRatio;// Max Bus Ratio
uint32_tMinRatio;// Min Bus Ratio
charBrandString[48];// 48 Byte Branding String
uint32_tCPUID[CPUID_MAX][4];// CPUID 0..4, 80..81 Raw Values
uint64_tTSCFrequency;// TSC Frequency Hz
uint64_tFSBFrequency;// FSB Frequency Hz
uint64_tCPUFrequency;// CPU Frequency Hz
uint32_tMaxRatio;// Max Bus Ratio
uint32_tMinRatio;// Min Bus Ratio
charBrandString[48];// 48 Byte Branding String
uint32_tCPUID[CPUID_MAX][4];// CPUID 0..4, 80..81 Raw Values
} CPU;
struct RAM {
uint8_tChannels;// Channel Configuration Single,Dual or Triple
uint8_tNoSlots;// Maximum no of slots available
uint8_tType;// Standard SMBIOS v2.5 Memory Type
RamSlotInfo_tDIMM[MAX_RAM_SLOTS];// Information about each slot
RamSlotInfo_tDIMM[MAX_RAM_SLOTS];// Information about each slot
} RAM;
struct DMI {
intMaxMemorySlots;// number of memory slots polulated by SMBIOS
intCntMemorySlots;// number of memory slots counted
intMemoryModules;// number of memory modules installed
intDIMM[MAX_RAM_SLOTS];// Information and SPD mapping for each slot
intMaxMemorySlots;// number of memory slots populated by SMBIOS
intCntMemorySlots;// number of memory slots counted
intMemoryModules;// number of memory modules installed
intDIMM[MAX_RAM_SLOTS];// Information and SPD mapping for each slot
} DMI;
uint8_tType;// System Type: 1=Desktop, 2=Portable... according ACPI2.0 (FACP: PM_Profile)
uint8_tType; // System Type: 1=Desktop, 2=Portable... according ACPI2.0 (FACP: PM_Profile)
uint8_t*UUID;
} PlatformInfo_t;
branches/iFabio/Chameleon/i386/libsaio/openbsd.c
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return;
}
str[strMaxLen]=0;
strncpy (str, buf+0x478, min (strMaxLen, 32));
strncpy (str, buf+0x478, MIN (strMaxLen, 32));
free (buf);
}
}
branches/iFabio/Chameleon/i386/libsaio/disk.c
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* All rights reserved.
*/
/* Copyright 2007 VMware Inc.
"Preboot" ramdisk support added by David Elliott
GPT support added by David Elliott. Based on IOGUIDPartitionScheme.cpp.
/*
* Copyright 2007 VMware Inc.
* "Preboot" ramdisk support added by David Elliott
* GPT support added by David Elliott. Based on IOGUIDPartitionScheme.cpp.
*/
//Azi: style the rest later...
// Allow UFS_SUPPORT to be overridden with preprocessor option.
#ifndef UFS_SUPPORT
// zef: Disabled UFS support
#define UFS_SUPPORT 0
#endif
#if UFS_SUPPORT
#include "ufs.h"
#endif
#include <limits.h>
#include <IOKit/storage/IOApplePartitionScheme.h>
#include <IOKit/storage/IOGUIDPartitionScheme.h>
#include "libsaio.h"
#include "boot.h"
#include "bootstruct.h"
#include "memory.h"
#include "fdisk.h"
#if UFS_SUPPORT
#include "ufs.h"
#endif
#include "hfs.h"
#include "ntfs.h"
#include "msdos.h"
#include "befs.h"
#include "freebsd.h"
#include "openbsd.h"
#include "xml.h"
#include "disk.h"
// For EFI_GUID
#include "efi.h"
#include "efi_tables.h"
#include <limits.h>
#include <IOKit/storage/IOApplePartitionScheme.h>
#include <IOKit/storage/IOGUIDPartitionScheme.h>
typedef struct gpt_hdr gpt_hdr;
typedef struct gpt_ent gpt_ent;
// For EFI_GUID
#include "efi.h"
#include "efi_tables.h"
#define PROBEFS_SIZE BPS * 4 /* buffer size for filesystem probe */
#define CD_BPS 2048 /* CD-ROM block size */
#define N_CACHE_SECS (BIOS_LEN / BPS) /* Must be a multiple of 4 for CD-ROMs */
//==========================================================================
// HFS+ GUID in LE form
EFI_GUID const GPT_HFS_GUID= { 0x48465300, 0x0000, 0x11AA, { 0xAA, 0x11, 0x00, 0x30, 0x65, 0x43, 0xEC, 0xAC } };
// turbo - also our booter partition
EFI_GUID const GPT_BOOT_GUID= { 0x426F6F74, 0x0000, 0x11AA, { 0xAA, 0x11, 0x00, 0x30, 0x65, 0x43, 0xEC, 0xAC } };
// turbo - or an efi system partition
EFI_GUID const GPT_EFISYS_GUID= { 0xC12A7328, 0xF81F, 0x11D2, { 0xBA, 0x4B, 0x00, 0xA0, 0xC9, 0x3E, 0xC9, 0x3B } };
// zef - basic data partition EBD0A0A2-B9E5-4433-87C0-68B6B72699C7 for foreign OS support
EFI_GUID const GPT_BASICDATA_GUID = { 0xEBD0A0A2, 0xB9E5, 0x4433, { 0x87, 0xC0, 0x68, 0xB6, 0xB7, 0x26, 0x99, 0xC7 } };
// GUID's in LE form:
// HFS+ partition - 48465300-0000-11AA-AA11-00306543ECAC
EFI_GUID const GPT_HFS_GUID = { 0x48465300, 0x0000, 0x11AA, { 0xAA, 0x11, 0x00, 0x30, 0x65, 0x43, 0xEC, 0xAC } };
// turbo - Apple Boot Partition - 426F6F74-0000-11AA-AA11-00306543ECAC
EFI_GUID const GPT_BOOT_GUID = { 0x426F6F74, 0x0000, 0x11AA, { 0xAA, 0x11, 0x00, 0x30, 0x65, 0x43, 0xEC, 0xAC } };
// turbo - or an EFI System Partition - C12A7328-F81F-11D2-BA4B-00A0C93EC93B
EFI_GUID const GPT_EFISYS_GUID = { 0xC12A7328, 0xF81F, 0x11D2, { 0xBA, 0x4B, 0x00, 0xA0, 0xC9, 0x3E, 0xC9, 0x3B } };
// zef - Basic Data Partition - EBD0A0A2-B9E5-4433-87C0-68B6B72699C7 for foreign OS support
EFI_GUID const GPT_BASICDATA_GUID = { 0xEBD0A0A2, 0xB9E5, 0x4433, { 0x87, 0xC0, 0x68, 0xB6, 0xB7, 0x26, 0x99, 0xC7 } };
// Microsoft Reserved Partition - E3C9E316-0B5C-4DB8-817DF92DF00215AE
EFI_GUID const GPT_BASICDATA2_GUID = { 0xE3C9E316, 0x0B5C, 0x4DB8, { 0x81, 0x7D, 0xF9, 0x2D, 0xF0, 0x02, 0x15, 0xAE } };
// NOTE: EFI_GUID's are in LE and we know we're on an x86.
// The IOGUIDPartitionScheme.cpp code uses byte-based UUIDs, we don't.
if(isPartitionUsed(gptMap))
if (isPartitionUsed(gptMap))
{
char stringuuid[100];
efi_guid_unparse_upper((EFI_GUID*)gptMap->ent_type, stringuuid);
kBIOSDevTypeHardDrive, bvrFlags);
}
// zef - foreign OS support
// zef - foreign OS support
if ( (efi_guid_compare(&GPT_BASICDATA_GUID, (EFI_GUID const*)gptMap->ent_type) == 0) ||
(efi_guid_compare(&GPT_BASICDATA2_GUID, (EFI_GUID const*)gptMap->ent_type) == 0) )
{
char* val = 0;
int len;
getValueForKey(kHidePartition, &raw, &len, &bootInfo->bootConfig);
getValueForKey(kHidePartition, &raw, &len, &bootInfo->chameleonConfig);
if(raw)
{
val = XMLDecode(raw);
)
newBVR->visible = true;
/* Looking for "Hide Partition" entries in 'hd(x,y)|uuid|"label" hd(m,n)|uuid|"label"' format
/*
* Looking for "Hide Partition" entries in 'hd(x,y)|uuid|"label" hd(m,n)|uuid|"label"' format,
* to be able to hide foreign partitions from the boot menu.
*
*/
if ( (newBVR->flags & kBVFlagForeignBoot) )
{
}
}
#if DEBUG
#if DEBUG //Azi: warning - too big for boot-log.. far too big.. i mean HUGE!! :P
for (bvr = chain; bvr; bvr = bvr->next)
{
printf(" bvr: %d, dev: %d, part: %d, flags: %d, vis: %d\n", bvr, bvr->biosdev, bvr->part_no, bvr->flags, bvr->visible);
}
printf("count: %d\n", bvCount);
getc();
getchar();
#endif
*count = bvCount;
return false;
}
/* If Rename Partition has defined an alias, then extract it for description purpose
/* If Rename Partition has defined an alias, then extract it for description purpose.
* The format for the rename string is the following:
* hd(x,y)|uuid|"label" "alias";hd(m,n)|uuid|"label" etc; ...
* hd(x,y)|uuid|"label" "alias";hd(m,n)|uuid|"label" "alias"; etc...
*/
bool getVolumeLabelAlias(BVRef bvr, char* str, long strMaxLen)
if ( !str || strMaxLen <= 0)
return false;
aliasList = XMLDecode(getStringForKey(kRenamePartition, &bootInfo->bootConfig));
aliasList = XMLDecode(getStringForKey(kRenamePartition, &bootInfo->chameleonConfig));
if ( !aliasList )
return false;
if ( matchVolumeToString(bvr, volStart, volLen) )
{
strncat(str, aliasStart, min(strMaxLen, aliasLen));
strncat(str, aliasStart, MIN(strMaxLen, aliasLen));
free(aliasList);
return true;
return 0;
}
int diskIsCDROM(BVRef bvr)
{
struct driveInfo di;
branches/iFabio/Chameleon/i386/libsaio/pci_setup.c
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#include "boot.h"
#include "bootstruct.h"
#include "pci.h"
#include "gma.h"
#include "nvidia.h"
#include "modules.h"
char *devicepath;
bool do_eth_devprop, do_gfx_devprop, do_enable_hpet;
pci_dt_t *current = pci_dt;
do_eth_devprop = do_gfx_devprop = do_enable_hpet = false;
getBoolForKey(kEthernetBuiltIn, &do_eth_devprop, &bootInfo->bootConfig);
getBoolForKey(kGraphicsEnabler, &do_gfx_devprop, &bootInfo->bootConfig);
getBoolForKey(kForceHPET, &do_enable_hpet, &bootInfo->bootConfig);
getBoolForKey(kEthernetBuiltIn, &do_eth_devprop, &bootInfo->chameleonConfig);
getBoolForKey(kGraphicsEnabler, &do_gfx_devprop, &bootInfo->chameleonConfig);
getBoolForKey(kForceHPET, &do_enable_hpet, &bootInfo->chameleonConfig);
while (current)
{
devicepath = get_pci_dev_path(current);
switch (current->class_id)
{
case PCI_CLASS_BRIDGE_HOST:
setup_ati_devprop(current);
break;
case PCI_VENDOR_ID_INTEL:
/* message to be removed once support for these cards is added */
verbose("Intel VGA Controller [%04x:%04x] :: %s (currently NOT SUPPORTED)\n",
current->vendor_id, current->device_id, devicepath);
case PCI_VENDOR_ID_INTEL:
setup_gma_devprop(current);
break;
case PCI_VENDOR_ID_NVIDIA:
branches/iFabio/Chameleon/i386/libsaio/cpu.h
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#ifndef __LIBSAIO_CPU_H
#define __LIBSAIO_CPU_H
#include "libsaio.h"
//#include "libsaio.h"
extern void scan_cpu(PlatformInfo_t *);
#define bit(n)(1UL << (n))
#define bit(n)(1ULL << (n))
#define bitmask(h,l)((bit(h)|(bit(h)-1)) & ~(bit(l)-1))
#define bitfield(x,h,l)(((x) & bitmask(h,l)) >> l)
#define MSR_FLEX_RATIO0x194
#define MSR_TURBO_RATIO_LIMIT0x1AD
#defineMSR_PLATFORM_INFO0xCE
#define MSR_CORE_THREAD_COUNT0x35// Undocumented
#define MSR_CORE_THREAD_COUNT0x35// Undocumented
#define MSR_IA32_PLATFORM_ID0x17
#define K8_FIDVID_STATUS0xC0010042
#define K10_COFVID_STATUS0xC0010071
#define CPUID_MODEL_ATOM28// Intel Atom (45nm)
#define CPUID_MODEL_FIELDS30// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
#define CPUID_MODEL_DALES31// Havendale, Auburndale
#define CPUID_MODEL_NEHALEM_EX46// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
#define CPUID_MODEL_DALES_32NM37// Intel Core i3, i5 LGA1156 (32nm)
#define CPUID_MODEL_SANDY42// Intel Core i3, i5, i7 LGA1155 (32nm)
#define CPUID_MODEL_WESTMERE44// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
#define CPUID_MODEL_NEHALEM_EX46// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
#define CPUID_MODEL_WESTMERE_EX47// Intel Xeon E7
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// defaults for a Mac mini
#define kDefaultMacminiFamily"Macmini"
#define kDefaultMacmini"Macmini2,1"
#define kDefaultMacmini"Macmini1,1"
#define kDefaultMacminiBIOSVersion" MM21.88Z.009A.B00.0903051113"
// defaults for a MacBook
{
switch (Platform.CPU.Model)
{
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case 0x19:// ??? Intel Core i5 650 @3.20 GHz
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case 0x19:// ??? Intel Core i5 650 @3.20 GHz
defaultBIOSInfo.version= kDefaultiMacNehalemBIOSVersion;
defaultSystemInfo.productName= kDefaultiMacNehalem;
defaultSystemInfo.family= kDefaultiMacFamily;
break;
case CPU_MODEL_SANDY:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_SANDY_XEON:// Intel Xeon E3
case CPU_MODEL_SANDY:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_SANDY_XEON:// Intel Xeon E3
defaultBIOSInfo.version= kDefaultiMacSandyBIOSVersion;
defaultSystemInfo.productName= kDefaultiMacSandy;
defaultSystemInfo.family= kDefaultiMacFamily;
break;
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
defaultBIOSInfo.version= kDefaultMacProNehalemBIOSVersion;
defaultSystemInfo.productName= kDefaultMacProNehalem;
defaultSystemInfo.family= kDefaultMacProFamily;
break;
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
defaultBIOSInfo.version= kDefaultMacProWestmereBIOSVersion;
defaultBIOSInfo.releaseDate= kDefaulMacProWestmereBIOSReleaseDate;
defaultSystemInfo.productName= kDefaultMacProWestmere;
{
const char *string = 0;
int len;
bool parsed;
int val;
if (numOfSetters <= idx)
return false;
//case kSMBQWord:
if (SMBSetters[idx].keyString)
{
if (getIntForKey(SMBSetters[idx].keyString, (int *)&(value->dword), SMBPlist))
parsed = getIntForKey(SMBSetters[idx].keyString, &val, SMBPlist);
if (!parsed)
if (structPtr->orig->type == kSMBTypeMemoryDevice)// MemoryDevice only
parsed = getSMBValueForKey(structPtr->orig, SMBSetters[idx].keyString, NULL, (returnType *)&val);
if (parsed)
{
switch (SMBSetters[idx].valueType)
{
case kSMBByte:
value->byte = (uint8_t)val;
break;
case kSMBWord:
value->word = (uint16_t)val;
break;
case kSMBDWord:
default:
value->dword = (uint32_t)val;
break;
}
return true;
else
if (structPtr->orig->type == kSMBTypeMemoryDevice)// MemoryDevice only
if (getSMBValueForKey(structPtr->orig, SMBSetters[idx].keyString, NULL, value))
return true;
}
}
if (SMBSetters[idx].getSMBValue)
if (SMBSetters[idx].getSMBValue(value))
return true;
bzero(buffer, SMB_ALLOC_SIZE);
structPtr->new = (SMBStructHeader *)buffer;
getBoolForKey(kSMBIOSdefaults, &setSMB, &bootInfo->bootConfig);
getBoolForKey(kSMBIOSdefaults, &setSMB, &bootInfo->chameleonConfig);
if (setSMB)
setDefaultSMBData();
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{ 0x8086, 0x27bd, "ICH7M DH" },
{ 0x8086, 0x27bc, "NM10" },
{ 0x8086, 0x2810, "ICH8R" },
{ 0x8086, 0x2811, "ICH8M-E" },
{ 0x8086, 0x2812, "ICH8DH" },
#if DEBUG_HPET
printf("Press [Enter] to continue...\n");
getc();
getchar();
#endif
}
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return;
}
str[strMaxLen]=0;
strncpy (str, buf+0x478, min (strMaxLen, 32));
strncpy (str, buf+0x478, MIN (strMaxLen, 32));
free (buf);
}
}
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#include "bootstruct.h"
#include "libsaio.h"
#include "boot.h"
#include "xml.h"
extern char *Language;
if (config->canOverride)
{
if (getValueForConfigTableKey(&bootInfo->overrideConfig, key, &overrideVal, &overrideSize))
if (getValueForConfigTableKey(&bootInfo->chameleonConfig, key, &overrideVal, &overrideSize))
{
override = true;
if (ret && (strcmp(key, "Kernel") == 0) && (strcmp(overrideVal, "mach_kernel") == 0))
// NOTE: Values are defined by apple as being in com.apple.Boot.plist
// kHelperRootUUIDKey, kKernelArchKey, kMKextCacheKey, kKernelCacheKey, kKernelNameKey, kKernelFlagsKey
if (ret && (strcmp(key, kKernelNameKey) == 0) && (overrideSize == 0))
override = false;
if (ret && (strcmp(key, "Kernel Flags") == 0) && (overrideSize == 0))
if (ret && (strcmp(key, kKernelFlagsKey) == 0) && (overrideSize == 0))
override = false;
if (override)
int loadSystemConfig(config_file_t *config)
{
char *dirspec[] = {
"/Extra/com.apple.Boot.plist",
"bt(0,0)/Extra/com.apple.Boot.plist",
"/Library/Preferences/SystemConfiguration/com.apple.Boot.plist",
"/com.apple.boot.P/Library/Preferences/SystemConfiguration/com.apple.Boot.plist",
"/com.apple.boot.R/Library/Preferences/SystemConfiguration/com.apple.Boot.plist",
"/com.apple.boot.S/Library/Preferences/SystemConfiguration/com.apple.Boot.plist"
};
int i, fd, count, ret=-1;
return ret;
}
/* loadOverrideConfig
/* loadChameleonConfig
*
* Returns 0 - successful.
* -1 - unsuccesful.
*/
int loadOverrideConfig(config_file_t *config)
int loadChameleonConfig(config_file_t *config)
{
char *dirspec[] = {
"rd(0,0)/Extra/com.apple.Boot.plist",
"/Extra/com.apple.Boot.plist",
"/Library/Preferences/SystemConfiguration/com.apple.Boot.plist",
"/com.apple.boot.P/Library/Preferences/SystemConfiguration/com.apple.Boot.plist",
"/com.apple.boot.R/Library/Preferences/SystemConfiguration/com.apple.Boot.plist",
"/com.apple.boot.S/Library/Preferences/SystemConfiguration/com.apple.Boot.plist"
"rd(0,0)/Extra/org.chameleon.Boot.plist",
"/Extra/org.chameleon.Boot.plist",
"bt(0,0)/Extra/org.chameleon.Boot.plist",
"rd(0,0)/Extra/com.apple.Boot.plist", /* DEPRECIATED */
"/Extra/com.apple.Boot.plist" /* DEPRECIATED */
"bt(0,0)/Extra/com.apple.Boot.plist", /* DEPRECIATED */
};
int i, fd, count, ret=-1;
{
if ((fd = open(dirspec[i], 0)) >= 0)
{
// Check for depreciated file names and annoy the user about it.
if(strstr(dirspec[i], "com.apple.Boot.plist"))
{
printf("%s is depreciated.\n", dirspec[i]);
dirspec[i][strlen(dirspec[i]) - strlen("com.apple.Boot.plist")] = 0;
printf("Please use the file %sorg.chameleon.Boot.plist instead.\n", dirspec[i]);
pause();
}
// read file
count = read(fd, config->plist, IO_CONFIG_DATA_SIZE);
close(fd);
branches/iFabio/Chameleon/i386/libsaio/biosfn.c
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2007-12-29 dfe
- Added ebiosEjectMedia
*/
#include "bootstruct.h"
#include "libsaio.h"
#define MAX_DRIVES 8
static biosBuf_t bb;
// Some BIOSes will simply ignore the value of ECX on entry.
// Probably best to keep its value at 20 to avoid surprises.
//printf("Get memory map 0x%x, %d\n", rangeArray);getc();
//printf("Get memory map 0x%x, %d\n", rangeArray); getchar();
if (maxRangeCount > (BIOS_LEN / sizeof(MemoryRange))) {
maxRangeCount = (BIOS_LEN / sizeof(MemoryRange));
}
#if DEBUG
{
int i;
printf("%d total ranges\n", count);getc();
printf("%d total ranges\n", count); getchar();
for (i=0, range = rangeArray; i<count; i++, range++) {
printf("range: type %d, base 0x%x, length 0x%x\n",
range->type, (unsigned int)range->base, (unsigned int)range->length); getc();
range->type, (unsigned int)range->base, (unsigned int)range->length); getchar();
}
}
#endif
printf("media_type: %x\n", pkt.media_type);
printf("drive_num: %x\n", pkt.drive_num);
printf("device_spec: %x\n", pkt.device_spec);
printf("press a key->\n");getc();
pause();
#endif
/* Some BIOSes erroneously return cf = 1 */
print_drive_info(di);
printf("uses_ebios = 0x%x\n", dp->uses_ebios);
printf("result %d\n", ret);
printf("press a key->\n");getc();
pause();
#endif
if (ret == 0) {
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* Under PCI, each device has 256 bytes of configuration address space,
* of which the first 64 bytes are standardized as follows:
*/
#define PCI_VENDOR_ID0x00/* 16 bits */
#define PCI_DEVICE_ID0x02/* 16 bits */
#define PCI_COMMAND0x04/* 16 bits */
#define PCI_COMMAND_MEMORY0x2/* Enable response in Memory space */
#define PCI_COMMAND_MASTER0x4/* Enable bus mastering */
#define PCI_COMMAND_SPECIAL0x8/* Enable response to special cycles */
#define PCI_COMMAND_INVALIDATE0x10/* Use memory write and invalidate */
#define PCI_COMMAND_VGA_PALETTE0x20/* Enable palette snooping */
#define PCI_COMMAND_INVALIDATE0x10/* Use memory write and invalidate */
#define PCI_COMMAND_VGA_PALETTE0x20/* Enable palette snooping */
#define PCI_COMMAND_PARITY0x40/* Enable parity checking */
#define PCI_COMMAND_WAIT0x80/* Enable address/data stepping */
#define PCI_COMMAND_SERR0x100/* Enable SERR */
#define PCI_COMMAND_FAST_BACK0x200/* Enable back-to-back writes */
#define PCI_COMMAND_DISABLE_INTx0x400/* PCIE: Disable INTx interrupts */
#define PCI_COMMAND_FAST_BACK0x200/* Enable back-to-back writes */
#define PCI_COMMAND_DISABLE_INTx0x400/* PCIE: Disable INTx interrupts */
#define PCI_STATUS0x06/* 16 bits */
#define PCI_STATUS0x06/* 16 bits */
#define PCI_STATUS_INTx0x08/* PCIE: INTx interrupt pending */
#define PCI_STATUS_CAP_LIST0x10/* Support Capability List */
#define PCI_STATUS_66MHZ0x20/* Support 66 Mhz PCI 2.1 bus */
#define PCI_STATUS_UDF0x40/* Support User Definable Features [obsolete] */
#define PCI_STATUS_FAST_BACK0x80/* Accept fast-back to back */
#define PCI_STATUS_FAST_BACK0x80/* Accept fast-back to back */
#define PCI_STATUS_PARITY0x100/* Detected parity error */
#define PCI_STATUS_DEVSEL_MASK0x600/* DEVSEL timing */
#define PCI_STATUS_DEVSEL_FAST0x000
#define PCI_STATUS_DEVSEL_MEDIUM0x200
#define PCI_STATUS_DEVSEL_SLOW0x400
#define PCI_STATUS_SIG_TARGET_ABORT 0x800/* Set on target abort */
#define PCI_STATUS_REC_TARGET_ABORT 0x1000/* Master ack of " */
#define PCI_STATUS_REC_MASTER_ABORT 0x2000/* Set on master abort */
#define PCI_STATUS_SIG_SYSTEM_ERROR 0x4000/* Set when we drive SERR */
#define PCI_STATUS_DETECTED_PARITY0x8000/* Set on parity error */
#define PCI_STATUS_DEVSEL_MASK0x600/* DEVSEL timing */
#define PCI_STATUS_DEVSEL_FAST0x000
#define PCI_STATUS_DEVSEL_MEDIUM0x200
#define PCI_STATUS_DEVSEL_SLOW0x400
#define PCI_STATUS_SIG_TARGET_ABORT0x800/* Set on target abort */
#define PCI_STATUS_REC_TARGET_ABORT0x1000/* Master ack of " */
#define PCI_STATUS_REC_MASTER_ABORT0x2000/* Set on master abort */
#define PCI_STATUS_SIG_SYSTEM_ERROR0x4000/* Set when we drive SERR */
#define PCI_STATUS_DETECTED_PARITY0x8000/* Set on parity error */
#define PCI_CLASS_REVISION0x08/* High 24 bits are class, low 8 revision */
#define PCI_REVISION_ID0x08 /* Revision ID */
#define PCI_CACHE_LINE_SIZE0x0c/* 8 bits */
#define PCI_LATENCY_TIMER0x0d/* 8 bits */
#define PCI_HEADER_TYPE0x0e/* 8 bits */
#define PCI_HEADER_TYPE_NORMAL0
#define PCI_HEADER_TYPE_BRIDGE1
#define PCI_HEADER_TYPE_CARDBUS2
#define PCI_HEADER_TYPE_NORMAL0
#define PCI_HEADER_TYPE_BRIDGE1
#define PCI_HEADER_TYPE_CARDBUS2
#define PCI_BIST0x0f/* 8 bits */
#define PCI_BIST0x0f/* 8 bits */
#define PCI_BIST_CODE_MASK0x0f/* Return result */
#define PCI_BIST_START0x40/* 1 to start BIST, 2 secs or less */
#define PCI_BIST_CAPABLE0x80/* 1 if BIST capable */
#define PCI_BASE_ADDRESS_30x1c/* 32 bits */
#define PCI_BASE_ADDRESS_40x20/* 32 bits */
#define PCI_BASE_ADDRESS_50x24/* 32 bits */
#define PCI_BASE_ADDRESS_SPACE0x01/* 0 = memory, 1 = I/O */
#define PCI_BASE_ADDRESS_SPACE_IO0x01
#define PCI_BASE_ADDRESS_SPACE_MEMORY0x00
#define PCI_BASE_ADDRESS_MEM_TYPE_MASK0x06
#define PCI_BASE_ADDRESS_MEM_TYPE_320x00/* 32 bit address */
#define PCI_BASE_ADDRESS_MEM_TYPE_1M0x02/* Below 1M [obsolete] */
#define PCI_BASE_ADDRESS_MEM_TYPE_640x04/* 64 bit address */
#define PCI_BASE_ADDRESS_MEM_PREFETCH0x08/* prefetchable? */
#define PCI_BASE_ADDRESS_MEM_MASK(~(pciaddr_t)0x0f)
#define PCI_BASE_ADDRESS_IO_MASK(~(pciaddr_t)0x03)
#define PCI_BASE_ADDRESS_SPACE0x01/* 0 = memory, 1 = I/O */
#define PCI_BASE_ADDRESS_SPACE_IO0x01
#define PCI_BASE_ADDRESS_SPACE_MEMORY0x00
#define PCI_BASE_ADDRESS_MEM_TYPE_MASK0x06
#define PCI_BASE_ADDRESS_MEM_TYPE_320x00/* 32 bit address */
#define PCI_BASE_ADDRESS_MEM_TYPE_1M0x02/* Below 1M [obsolete] */
#define PCI_BASE_ADDRESS_MEM_TYPE_640x04/* 64 bit address */
#define PCI_BASE_ADDRESS_MEM_PREFETCH0x08/* prefetchable? */
#define PCI_BASE_ADDRESS_MEM_MASK(~(pciaddr_t)0x0f)
#define PCI_BASE_ADDRESS_IO_MASK(~(pciaddr_t)0x03)
/* bit 1 is reserved if address_space = 1 */
/* Header type 0 (normal devices) */
#define PCI_CARDBUS_CIS0x28
#define PCI_CARDBUS_CIS0x28
#define PCI_SUBSYSTEM_VENDOR_ID0x2c
#define PCI_SUBSYSTEM_ID0x2e
#define PCI_ROM_ADDRESS0x30/* Bits 31..11 are address, 10..1 reserved */
#define PCI_SUBSYSTEM_ID0x2e
#define PCI_ROM_ADDRESS0x30/* Bits 31..11 are address, 10..1 reserved */
#define PCI_ROM_ADDRESS_ENABLE0x01
#define PCI_ROM_ADDRESS_MASK(~(pciaddr_t)0x7ff)
#define PCI_ROM_ADDRESS_MASK(~(pciaddr_t)0x7ff)
#define PCI_CAPABILITY_LIST0x34/* Offset of first capability list entry */
#define PCI_CAPABILITY_LIST0x34/* Offset of first capability list entry */
/* 0x35-0x3b are reserved */
#define PCI_INTERRUPT_LINE0x3c/* 8 bits */
#define PCI_INTERRUPT_PIN0x3d/* 8 bits */
#define PCI_MIN_GNT0x3e/* 8 bits */
#define PCI_MAX_LAT0x3f/* 8 bits */
#define PCI_INTERRUPT_LINE0x3c/* 8 bits */
#define PCI_INTERRUPT_PIN0x3d/* 8 bits */
#define PCI_MIN_GNT0x3e/* 8 bits */
#define PCI_MAX_LAT0x3f/* 8 bits */
/* Header type 1 (PCI-to-PCI bridges) */
#define PCI_PRIMARY_BUS0x18/* Primary bus number */
#define PCI_SECONDARY_BUS0x19/* Secondary bus number */
#define PCI_SUBORDINATE_BUS0x1a/* Highest bus number behind the bridge */
#define PCI_PRIMARY_BUS0x18/* Primary bus number */
#define PCI_SECONDARY_BUS0x19/* Secondary bus number */
#define PCI_SUBORDINATE_BUS0x1a/* Highest bus number behind the bridge */
#define PCI_SEC_LATENCY_TIMER0x1b/* Latency timer for secondary interface */
#define PCI_IO_BASE0x1c/* I/O range behind the bridge */
#define PCI_IO_LIMIT0x1d
#define PCI_IO_BASE0x1c/* I/O range behind the bridge */
#define PCI_IO_LIMIT0x1d
#define PCI_IO_RANGE_TYPE_MASK0x0f/* I/O bridging type */
#define PCI_IO_RANGE_TYPE_160x00
#define PCI_IO_RANGE_TYPE_320x01
#define PCI_IO_RANGE_MASK~0x0f
#define PCI_SEC_STATUS0x1e/* Secondary status register */
#define PCI_MEMORY_BASE0x20/* Memory range behind */
#define PCI_MEMORY_LIMIT0x22
#define PCI_IO_RANGE_MASK~0x0f
#define PCI_SEC_STATUS0x1e/* Secondary status register */
#define PCI_MEMORY_BASE0x20/* Memory range behind */
#define PCI_MEMORY_LIMIT0x22
#define PCI_MEMORY_RANGE_TYPE_MASK0x0f
#define PCI_MEMORY_RANGE_MASK~0x0f
#define PCI_PREF_MEMORY_BASE0x24/* Prefetchable memory range behind */
#define PCI_PREF_RANGE_TYPE_MASK0x0f
#define PCI_PREF_RANGE_TYPE_320x00
#define PCI_PREF_RANGE_TYPE_640x01
#define PCI_PREF_RANGE_MASK~0x0f
#define PCI_PREF_RANGE_MASK~0x0f
#define PCI_PREF_BASE_UPPER320x28/* Upper half of prefetchable memory range */
#define PCI_PREF_LIMIT_UPPER320x2c
#define PCI_IO_BASE_UPPER160x30/* Upper half of I/O addresses */
#define PCI_IO_BASE_UPPER160x30/* Upper half of I/O addresses */
#define PCI_IO_LIMIT_UPPER160x32
/* 0x34 same as for htype 0 */
/* 0x35-0x3b is reserved */
#define PCI_ROM_ADDRESS10x38/* Same as PCI_ROM_ADDRESS, but for htype 1 */
#define PCI_ROM_ADDRESS10x38/* Same as PCI_ROM_ADDRESS, but for htype 1 */
/* 0x3c-0x3d are same as for htype 0 */
#define PCI_BRIDGE_CONTROL0x3e
#define PCI_BRIDGE_CONTROL0x3e
#define PCI_BRIDGE_CTL_PARITY0x01/* Enable parity detection on secondary interface */
#define PCI_BRIDGE_CTL_SERR0x02/* The same for SERR forwarding */
#define PCI_BRIDGE_CTL_SERR0x02/* The same for SERR forwarding */
#define PCI_BRIDGE_CTL_NO_ISA0x04/* Disable bridging of ISA ports */
#define PCI_BRIDGE_CTL_VGA0x08/* Forward VGA addresses */
#define PCI_BRIDGE_CTL_VGA0x08/* Forward VGA addresses */
#define PCI_BRIDGE_CTL_MASTER_ABORT0x20/* Report master aborts */
#define PCI_BRIDGE_CTL_BUS_RESET0x40/* Secondary bus reset */
#define PCI_BRIDGE_CTL_FAST_BACK0x80/* Fast Back2Back enabled on secondary interface */
#define PCI_BRIDGE_CTL_PRI_DISCARD_TIMER 0x100/* PCI-X? */
#define PCI_BRIDGE_CTL_SEC_DISCARD_TIMER 0x200/* PCI-X? */
#define PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS 0x400/* PCI-X? */
#define PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN 0x800/* PCI-X? */
#define PCI_BRIDGE_CTL_PRI_DISCARD_TIMER0x100/* PCI-X? */
#define PCI_BRIDGE_CTL_SEC_DISCARD_TIMER0x200/* PCI-X? */
#define PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS0x400/* PCI-X? */
#define PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN0x800/* PCI-X? */
/* Header type 2 (CardBus bridges) */
/* 0x14-0x15 reserved */
#define PCI_CB_SEC_STATUS0x16/* Secondary status */
#define PCI_CB_PRIMARY_BUS0x18/* PCI bus number */
#define PCI_CB_CARD_BUS0x19/* CardBus bus number */
#define PCI_CB_SEC_STATUS0x16/* Secondary status */
#define PCI_CB_PRIMARY_BUS0x18/* PCI bus number */
#define PCI_CB_CARD_BUS0x19/* CardBus bus number */
#define PCI_CB_SUBORDINATE_BUS0x1a/* Subordinate bus number */
#define PCI_CB_LATENCY_TIMER0x1b/* CardBus latency timer */
#define PCI_CB_MEMORY_BASE_00x1c
#define PCI_CB_MEMORY_LIMIT_00x20
#define PCI_CB_MEMORY_BASE_10x24
#define PCI_CB_MEMORY_LIMIT_10x28
#define PCI_CB_IO_BASE_00x2c
#define PCI_CB_IO_BASE_0_HI0x2e
#define PCI_CB_IO_LIMIT_00x30
#define PCI_CB_IO_BASE_00x2c
#define PCI_CB_IO_BASE_0_HI0x2e
#define PCI_CB_IO_LIMIT_00x30
#define PCI_CB_IO_LIMIT_0_HI0x32
#define PCI_CB_IO_BASE_10x34
#define PCI_CB_IO_BASE_1_HI0x36
#define PCI_CB_IO_LIMIT_10x38
#define PCI_CB_IO_BASE_10x34
#define PCI_CB_IO_BASE_1_HI0x36
#define PCI_CB_IO_LIMIT_10x38
#define PCI_CB_IO_LIMIT_1_HI0x3a
#define PCI_CB_IO_RANGE_MASK~0x03
/* 0x3c-0x3d are same as for htype 0 */
#define PCI_CB_BRIDGE_CTL_SERR0x02
#define PCI_CB_BRIDGE_CTL_ISA0x04
#define PCI_CB_BRIDGE_CTL_VGA0x08
#define PCI_CB_BRIDGE_CTL_MASTER_ABORT0x20
#define PCI_CB_BRIDGE_CTL_MASTER_ABORT0x20
#define PCI_CB_BRIDGE_CTL_CB_RESET0x40/* CardBus reset */
#define PCI_CB_BRIDGE_CTL_16BIT_INT0x80/* Enable interrupt for 16-bit cards */
#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 0x100/* Prefetch enable for both memory regions */
#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
#define PCI_CB_BRIDGE_CTL_POST_WRITES0x400
#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM00x100/* Prefetch enable for both memory regions */
#define PCI_CB_BRIDGE_CTL_PREFETCH_MEM10x200
#define PCI_CB_BRIDGE_CTL_POST_WRITES0x400
#define PCI_CB_SUBSYSTEM_VENDOR_ID0x40
#define PCI_CB_SUBSYSTEM_ID0x42
#define PCI_CB_SUBSYSTEM_ID0x42
#define PCI_CB_LEGACY_MODE_BASE0x44/* 16-bit PC Card legacy mode base address (ExCa) */
/* 0x48-0x7f reserved */
#define PCI_CAP_FLAGS2/* Capability defined flags (16 bits) */
#define PCI_CAP_SIZEOF4
/* Capabilities residing in the PCI Express extended configuration space */
/* Capabilities residing in the
PCI Express extended configuration space */
#define PCI_EXT_CAP_ID_AER0x01/* Advanced Error Reporting */
#define PCI_EXT_CAP_ID_VC0x02/* Virtual Channel */
#define PCI_EXT_CAP_ID_DSN0x03/* Device Serial Number */
#define PCI_EXT_CAP_ID_PB0x04/* Power Budgeting */
#define PCI_EXT_CAP_ID_RCLINK0x05/* Root Complex Link Declaration */
#define PCI_EXT_CAP_ID_RCILINK0x06/* Root Complex Internal Link Declaration */
#define PCI_EXT_CAP_ID_RCECOLL0x07/* Root Complex Event Collector */
#define PCI_EXT_CAP_ID_RCLINK0x05/* Root Complex Link Declaration */
#define PCI_EXT_CAP_ID_RCILINK0x06/* Root Complex Internal Link Declaration */
#define PCI_EXT_CAP_ID_RCECOLL0x07/* Root Complex Event Collector */
#define PCI_EXT_CAP_ID_MFVC0x08/* Multi-Function Virtual Channel */
#define PCI_EXT_CAP_ID_RBCB0x0a/* Root Bridge Control Block */
#define PCI_EXT_CAP_ID_VNDR0x0b/* Vendor specific */
#define PCI_EXT_CAP_ID_ACS0x0d/* Access Controls */
#define PCI_EXT_CAP_ID_ARI0x0e/* Alternative Routing-ID Interpretation */
#define PCI_EXT_CAP_ID_ATS0x0f/* Address Translation Service */
#define PCI_EXT_CAP_ID_SRIOV0x10/* Single Root I/O Virtualization */
#define PCI_EXT_CAP_ID_SRIOV0x10/* Single Root I/O Virtualization */
/* Power Management Registers */
#define PCI_PM_CAP_VER_MASK0x0007/* Version (2=PM1.1) */
#define PCI_PM_CAP_PME_CLOCK0x0008/* Clock required for PME generation */
#define PCI_PM_CAP_PME_CLOCK0x0008/* Clock required for PME generation */
#define PCI_PM_CAP_DSI0x0020/* Device specific initialization required */
#define PCI_PM_CAP_AUX_C_MASK0x01c0/* Maximum aux current required in D3cold */
#define PCI_PM_CAP_AUX_C_MASK0x01c0/* Maximum aux current required in D3cold */
#define PCI_PM_CAP_D10x0200/* D1 power state support */
#define PCI_PM_CAP_D20x0400/* D2 power state support */
#define PCI_PM_CAP_PME_D00x0800/* PME can be asserted from D0 */
#define PCI_PM_CAP_PME_D10x1000/* PME can be asserted from D1 */
#define PCI_PM_CAP_PME_D20x2000/* PME can be asserted from D2 */
#define PCI_PM_CAP_PME_D3_HOT0x4000/* PME can be asserted from D3hot */
#define PCI_PM_CAP_PME_D3_COLD0x8000/* PME can be asserted from D3cold */
#define PCI_PM_CTRL4/* PM control and status register */
#define PCI_PM_CTRL_STATE_MASK0x0003/* Current power state (D0 to D3) */
#define PCI_PM_CTRL_PME_ENABLE0x0100/* PME pin enable */
#define PCI_PM_CTRL_DATA_SEL_MASK0x1e00/* PM table data index */
#define PCI_PM_CTRL_DATA_SCALE_MASK0x6000/* PM table data scaling factor */
#define PCI_PM_CTRL_PME_STATUS0x8000/* PME pin status */
#define PCI_PM_PPB_EXTENSIONS6/* PPB support extensions */
#define PCI_PM_CAP_PME_D3_HOT0x4000/* PME can be asserted from D3hot */
#define PCI_PM_CAP_PME_D3_COLD0x8000/* PME can be asserted from D3cold */
#define PCI_PM_CTRL4/* PM control and status register */
#define PCI_PM_CTRL_STATE_MASK0x0003/* Current power state (D0 to D3) */
#define PCI_PM_CTRL_PME_ENABLE0x0100/* PME pin enable */
#define PCI_PM_CTRL_DATA_SEL_MASK0x1e00/* PM table data index */
#define PCI_PM_CTRL_DATA_SCALE_MASK0x6000/* PM table data scaling factor */
#define PCI_PM_CTRL_PME_STATUS0x8000/* PME pin status */
#define PCI_PM_PPB_EXTENSIONS6/* PPB support extensions */
#define PCI_PM_PPB_B2_B30x40/* If bridge enters D3hot, bus enters: 0=B3, 1=B2 */
#define PCI_PM_BPCC_ENABLE0x80/* Secondary bus is power managed */
#define PCI_PM_DATA_REGISTER7/* PM table contents read here */
#define PCI_PM_DATA_REGISTER7/* PM table contents read here */
#define PCI_PM_SIZEOF8
/* AGP registers */
#define PCI_AGP_VERSION2/* BCD version number */
#define PCI_AGP_RFU3/* Rest of capability flags */
#define PCI_AGP_RFU3/* Rest of capability flags */
#define PCI_AGP_STATUS4/* Status register */
#define PCI_AGP_STATUS_RQ_MASK0xff000000/* Maximum number of requests - 1 */
#define PCI_AGP_STATUS_ISOCH0x10000/* Isochronous transactions supported */
#define PCI_AGP_STATUS_ARQSZ_MASK0xe000/* log2(optimum async req size in bytes) - 4 */
#define PCI_AGP_STATUS_CAL_MASK0x1c00/* Calibration cycle timing */
#define PCI_AGP_STATUS_RQ_MASK0xff000000/* Maximum number of requests - 1 */
#define PCI_AGP_STATUS_ISOCH0x10000/* Isochronous transactions supported */
#define PCI_AGP_STATUS_ARQSZ_MASK0xe000/* log2(optimum async req size in bytes) - 4 */
#define PCI_AGP_STATUS_CAL_MASK0x1c00/* Calibration cycle timing */
#define PCI_AGP_STATUS_SBA0x0200/* Sideband addressing supported */
#define PCI_AGP_STATUS_ITA_COH0x0100/* In-aperture accesses always coherent */
#define PCI_AGP_STATUS_GART640x0080/* 64-bit GART entries supported */
#define PCI_AGP_STATUS_HTRANS0x0040/* If 0, core logic can xlate host CPU accesses thru aperture */
#define PCI_AGP_STATUS_64BIT0x0020/* 64-bit addressing cycles supported */
#define PCI_AGP_STATUS_ITA_COH0x0100/* In-aperture accesses always coherent */
#define PCI_AGP_STATUS_GART640x0080/* 64-bit GART entries supported */
#define PCI_AGP_STATUS_HTRANS0x0040/* If 0, core logic can xlate host CPU accesses thru aperture */
#define PCI_AGP_STATUS_64BIT0x0020/* 64-bit addressing cycles supported */
#define PCI_AGP_STATUS_FW0x0010/* Fast write transfers supported */
#define PCI_AGP_STATUS_AGP30x0008/* AGP3 mode supported */
#define PCI_AGP_STATUS_RATE40x0004/* 4x transfer rate supported (RFU in AGP3 mode) */
#define PCI_AGP_STATUS_RATE20x0002/* 2x transfer rate supported (8x in AGP3 mode) */
#define PCI_AGP_STATUS_RATE10x0001/* 1x transfer rate supported (4x in AGP3 mode) */
#define PCI_AGP_STATUS_RATE40x0004/* 4x transfer rate supported (RFU in AGP3 mode) */
#define PCI_AGP_STATUS_RATE20x0002/* 2x transfer rate supported (8x in AGP3 mode) */
#define PCI_AGP_STATUS_RATE10x0001/* 1x transfer rate supported (4x in AGP3 mode) */
#define PCI_AGP_COMMAND8/* Control register */
#define PCI_AGP_COMMAND_RQ_MASK0xff000000 /* Master: Maximum number of requests */
#define PCI_AGP_COMMAND_ARQSZ_MASK0xe000/* log2(optimum async req size in bytes) - 4 */
#define PCI_AGP_COMMAND_CAL_MASK0x1c00/* Calibration cycle timing */
#define PCI_AGP_COMMAND_RQ_MASK0xff000000 /* Master: Maximum number of requests */
#define PCI_AGP_COMMAND_ARQSZ_MASK0xe000/* log2(optimum async req size in bytes) - 4 */
#define PCI_AGP_COMMAND_CAL_MASK0x1c00/* Calibration cycle timing */
#define PCI_AGP_COMMAND_SBA0x0200/* Sideband addressing enabled */
#define PCI_AGP_COMMAND_AGP0x0100/* Allow processing of AGP transactions */
#define PCI_AGP_COMMAND_GART640x0080/* 64-bit GART entries enabled */
#define PCI_AGP_COMMAND_64BIT0x0020/* Allow generation of 64-bit addr cycles */
#define PCI_AGP_COMMAND_GART640x0080/* 64-bit GART entries enabled */
#define PCI_AGP_COMMAND_64BIT0x0020/* Allow generation of 64-bit addr cycles */
#define PCI_AGP_COMMAND_FW0x0010/* Enable FW transfers */
#define PCI_AGP_COMMAND_RATE40x0004/* Use 4x rate (RFU in AGP3 mode) */
#define PCI_AGP_COMMAND_RATE20x0002/* Use 2x rate (8x in AGP3 mode) */
#define PCI_AGP_COMMAND_RATE10x0001/* Use 1x rate (4x in AGP3 mode) */
#define PCI_AGP_COMMAND_RATE40x0004/* Use 4x rate (RFU in AGP3 mode) */
#define PCI_AGP_COMMAND_RATE20x0002/* Use 2x rate (8x in AGP3 mode) */
#define PCI_AGP_COMMAND_RATE10x0001/* Use 1x rate (4x in AGP3 mode) */
#define PCI_AGP_SIZEOF12
/* Vital Product Data */
#define PCI_VPD_ADDR2/* Address to access (15 bits!) */
#define PCI_VPD_ADDR_MASK0x7fff/* Address mask */
#define PCI_VPD_ADDR_F0x8000/* Write 0, 1 indicates completion */
#define PCI_VPD_DATA4/* 32-bits of data returned here */
/* Slot Identification */
#define PCI_SID_ESR2/* Expansion Slot Register */
#define PCI_SID_ESR2/* Expansion Slot Register */
#define PCI_SID_ESR_NSLOTS0x1f/* Number of expansion slots available */
#define PCI_SID_ESR_FIC0x20/* First In Chassis Flag */
#define PCI_SID_CHASSIS_NR3/* Chassis Number */
/* Message Signaled Interrupts registers */
#define PCI_MSI_FLAGS2/* Various flags */
#define PCI_MSI_FLAGS_MASK_BIT0x100/* interrupt masking & reporting supported */
#define PCI_MSI_FLAGS_64BIT0x080/* 64-bit addresses allowed */
#define PCI_PCIX_STATUS_533MHZ0x80000000/* 533 MHz capable */
#define PCI_PCIX_SIZEOF4
//Azi: check this gui top to bottom!!
/* PCI-X Bridges */
#define PCI_PCIX_BRIDGE_SEC_STATUS2 /* Secondary bus status register offset */
#define PCI_ERR_UNC_TRAIN0x00000001/* Undefined in PCIe rev1.1 & 2.0 spec */
#define PCI_ERR_UNC_DLP0x00000010/* Data Link Protocol */
#define PCI_ERR_UNC_SDES0x00000020/* Surprise Down Error */
#define PCI_ERR_UNC_POISON_TLP0x00001000/* Poisoned TLP */
#define PCI_ERR_UNC_POISON_TLP0x00001000/* Poisoned TLP */
#define PCI_ERR_UNC_FCP0x00002000/* Flow Control Protocol */
#define PCI_ERR_UNC_COMP_TIME0x00004000/* Completion Timeout */
#define PCI_ERR_UNC_COMP_ABORT0x00008000/* Completer Abort */
#define PCI_ERR_UNC_UNX_COMP0x00010000/* Unexpected Completion */
#define PCI_ERR_UNC_COMP_TIME0x00004000/* Completion Timeout */
#define PCI_ERR_UNC_COMP_ABORT0x00008000/* Completer Abort */
#define PCI_ERR_UNC_UNX_COMP0x00010000/* Unexpected Completion */
#define PCI_ERR_UNC_RX_OVER0x00020000/* Receiver Overflow */
#define PCI_ERR_UNC_MALF_TLP0x00040000/* Malformed TLP */
#define PCI_ERR_UNC_MALF_TLP0x00040000/* Malformed TLP */
#define PCI_ERR_UNC_ECRC0x00080000/* ECRC Error Status */
#define PCI_ERR_UNC_UNSUP0x00100000/* Unsupported Request */
#define PCI_ERR_UNC_ACS_VIOL0x00200000/* ACS Violation */
#define PCI_ERR_UNC_ACS_VIOL0x00200000/* ACS Violation */
#define PCI_ERR_UNCOR_MASK8/* Uncorrectable Error Mask */
/* Same bits as above */
#define PCI_ERR_UNCOR_SEVER12/* Uncorrectable Error Severity */
#define PCI_ERR_COR_STATUS16/* Correctable Error Status */
#define PCI_ERR_COR_RCVR0x00000001/* Receiver Error Status */
#define PCI_ERR_COR_BAD_TLP0x00000040/* Bad TLP Status */
#define PCI_ERR_COR_BAD_DLLP0x00000080/* Bad DLLP Status */
#define PCI_ERR_COR_REP_ROLL0x00000100/* REPLAY_NUM Rollover */
#define PCI_ERR_COR_REP_TIMER0x00001000/* Replay Timer Timeout */
#define PCI_ERR_COR_REP_ANFE0x00002000/* Advisory Non-Fatal Error */
#define PCI_ERR_COR_BAD_DLLP0x00000080/* Bad DLLP Status */
#define PCI_ERR_COR_REP_ROLL0x00000100/* REPLAY_NUM Rollover */
#define PCI_ERR_COR_REP_TIMER0x00001000/* Replay Timer Timeout */
#define PCI_ERR_COR_REP_ANFE0x00002000/* Advisory Non-Fatal Error */
#define PCI_ERR_COR_MASK20/* Correctable Error Mask */
/* Same bits as above */
#define PCI_ERR_CAP24/* Advanced Error Capabilities */
#define PCI_ERR_CAP24/* Advanced Error Capabilities */
#define PCI_ERR_CAP_FEP(x)((x) & 31)/* First Error Pointer */
#define PCI_ERR_CAP_ECRC_GENC0x00000020/* ECRC Generation Capable */
#define PCI_ERR_CAP_ECRC_GENE0x00000040/* ECRC Generation Enable */
#define PCI_ERR_CAP_ECRC_CHKC0x00000080/* ECRC Check Capable */
#define PCI_ERR_CAP_ECRC_CHKE0x00000100/* ECRC Check Enable */
#define PCI_ERR_CAP_ECRC_GENC0x00000020/* ECRC Generation Capable */
#define PCI_ERR_CAP_ECRC_GENE0x00000040/* ECRC Generation Enable */
#define PCI_ERR_CAP_ECRC_CHKC0x00000080/* ECRC Check Capable */
#define PCI_ERR_CAP_ECRC_CHKE0x00000100/* ECRC Check Enable */
#define PCI_ERR_HEADER_LOG28/* Header Log Register (16 bytes) */
#define PCI_ERR_ROOT_COMMAND44/* Root Error Command */
#define PCI_ERR_ROOT_COMMAND44/* Root Error Command */
#define PCI_ERR_ROOT_STATUS48
#define PCI_ERR_ROOT_COR_SRC52
#define PCI_ERR_ROOT_COR_SRC52
#define PCI_ERR_ROOT_SRC54
/* Virtual Channel */
/* Power Budgeting */
#define PCI_PWR_DSR4/* Data Select Register */
#define PCI_PWR_DATA8/* Data Register */
#define PCI_PWR_DATA_BASE(x)((x) & 0xff) /* Base Power */
#define PCI_PWR_DATA_SCALE(x)(((x) >> 8) & 3) /* Data Scale */
#define PCI_PWR_DATA_PM_SUB(x)(((x) >> 10) & 7) /* PM Sub State */
#define PCI_PWR_DATA_PM_STATE(x) (((x) >> 13) & 3) /* PM State */
#define PCI_PWR_DATA_TYPE(x)(((x) >> 15) & 7) /* Type */
#define PCI_PWR_DATA_RAIL(x)(((x) >> 18) & 7) /* Power Rail */
#define PCI_PWR_CAP12/* Capability */
#define PCI_PWR_CAP_BUDGET(x)((x) & 1)/* Included in system budget */
#define PCI_PWR_DATA_BASE(x)((x) & 0xff) /* Base Power */
#define PCI_PWR_DATA_SCALE(x)(((x) >> 8) & 3) /* Data Scale */
#define PCI_PWR_DATA_PM_SUB(x)(((x) >> 10) & 7) /* PM Sub State */
#define PCI_PWR_DATA_PM_STATE(x)(((x) >> 13) & 3) /* PM State */
#define PCI_PWR_DATA_TYPE(x)(((x) >> 15) & 7) /* Type */
#define PCI_PWR_DATA_RAIL(x)(((x) >> 18) & 7) /* Power Rail */
#define PCI_PWR_CAP12/* Capability */
#define PCI_PWR_CAP_BUDGET(x)((x) & 1)/* Included in system budget */
/* Access Control Services */
#define PCI_ACS_CAP0x04/* ACS Capability Register */
#define PCI_ACS_CAP0x04/* ACS Capability Register */
#define PCI_ACS_CAP_VALID0x0001/* ACS Source Validation */
#define PCI_ACS_CAP_BLOCK0x0002/* ACS Translation Blocking */
#define PCI_ACS_CAP_REQ_RED0x0004/* ACS P2P Request Redirect */
#define PCI_ACS_CAP_CMPLT_RED0x0008/* ACS P2P Completion Redirect */
#define PCI_ACS_CAP_CMPLT_RED0x0008/* ACS P2P Completion Redirect */
#define PCI_ACS_CAP_FORWARD0x0010/* ACS Upstream Forwarding */
#define PCI_ACS_CAP_EGRESS0x0020/* ACS P2P Egress Control */
#define PCI_ACS_CAP_TRANS0x0040/* ACS Direct Translated P2P */
#define PCI_ACS_CAP_VECTOR(x)(((x) >> 8) & 0xff) /* Egress Control Vector Size */
#define PCI_ACS_CAP_VECTOR(x)(((x) >> 8) & 0xff) /* Egress Control Vector Size */
#define PCI_ACS_CTRL0x06/* ACS Control Register */
#define PCI_ACS_CTRL_VALID0x0001/* ACS Source Validation Enable */
#define PCI_ACS_CTRL_BLOCK0x0002/* ACS Translation Blocking Enable */
#define PCI_ACS_CTRL_REQ_RED0x0004/* ACS P2P Request Redirect Enable */
#define PCI_ACS_CTRL_CMPLT_RED0x0008/* ACS P2P Completion Redirect Enable */
#define PCI_ACS_CTRL_FORWARD0x0010/* ACS Upstream Forwarding Enable */
#define PCI_ACS_CTRL_REQ_RED0x0004/* ACS P2P Request Redirect Enable */
#define PCI_ACS_CTRL_CMPLT_RED0x0008/* ACS P2P Completion Redirect Enable */
#define PCI_ACS_CTRL_FORWARD0x0010/* ACS Upstream Forwarding Enable */
#define PCI_ACS_CTRL_EGRESS0x0020/* ACS P2P Egress Control Enable */
#define PCI_ACS_CTRL_TRANS0x0040/* ACS Direct Translated P2P Enable */
#define PCI_ACS_EGRESS_CTRL0x08/* Egress Control Vector */
/* Alternative Routing-ID Interpretation */
#define PCI_ARI_CAP0x04/* ARI Capability Register */
#define PCI_ARI_CAP0x04/* ARI Capability Register */
#define PCI_ARI_CAP_MFVC0x0001/* MFVC Function Groups Capability */
#define PCI_ARI_CAP_ACS0x0002/* ACS Function Groups Capability */
#define PCI_ARI_CAP_NFN(x)(((x) >> 8) & 0xff) /* Next Function Number */
#define PCI_ATS_CTRL_ENABLE0x8000/* ATS Enable */
/* Single Root I/O Virtualization */
#define PCI_IOV_CAP0x04/* SR-IOV Capability Register */
#define PCI_IOV_CAP0x04/* SR-IOV Capability Register */
#define PCI_IOV_CAP_VFM0x00000001 /* VF Migration Capable */
#define PCI_IOV_CAP_IMN(x)((x) >> 21) /* VF Migration Interrupt Message Number */
#define PCI_IOV_CTRL0x08/* SR-IOV Control Register */
#define PCI_IOV_INITIALVF0x0c/* Number of VFs that are initially associated */
#define PCI_IOV_TOTALVF0x0e/* Maximum number of VFs that could be associated */
#define PCI_IOV_NUMVF0x10/* Number of VFs that are available */
#define PCI_IOV_FDL0x12/* Function Dependency Link */
#define PCI_IOV_FDL0x12/* Function Dependency Link */
#define PCI_IOV_OFFSET0x14/* First VF Offset */
#define PCI_IOV_STRIDE0x16/* Routing ID offset from one VF to the next one */
#define PCI_IOV_DID0x1a/* VF Device ID */
#define PCI_IOV_DID0x1a/* VF Device ID */
#define PCI_IOV_SUPPS0x1c/* Supported Page Sizes */
#define PCI_IOV_SYSPS0x20/* System Page Size */
#define PCI_IOV_BAR_BASE0x24/* VF BAR0, VF BAR1, ... VF BAR5 */
#define PCI_IOV_NUM_BAR6/* Number of VF BARs */
#define PCI_IOV_MSAO0x3c/* VF Migration State Array Offset */
#define PCI_IOV_MSA_BIR(x)((x) & 7) /* VF Migration State BIR */
#define PCI_IOV_MSA_OFFSET(x)((x) & 0xfffffff8) /* VF Migration State Offset */
#define PCI_IOV_MSA_OFFSET(x)((x) & 0xfffffff8) /* VF Migration State Offset */
/*
* The PCI interface treats multi-function devices as independent
*7:3 = slot
*2:0 = function
*/
#define PCI_DEVFN(slot,func)((((slot) & 0x1f) << 3) | ((func) & 0x07))
#define PCI_DEVFN(slot,func)((((slot) & 0x1f) << 3) | ((func) & 0x07))
#define PCI_SLOT(devfn)(((devfn) >> 3) & 0x1f)
#define PCI_FUNC(devfn)((devfn) & 0x07)
#define PCI_CLASS_BRIDGE_IB_TO_PCI0x060a
#define PCI_CLASS_BRIDGE_OTHER0x0680
#define PCI_BASE_CLASS_COMMUNICATION0x07
#define PCI_CLASS_COMMUNICATION_SERIAL0x0700
#define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701
#define PCI_CLASS_COMMUNICATION_MSERIAL0x0702
#define PCI_CLASS_COMMUNICATION_MODEM0x0703
#define PCI_CLASS_COMMUNICATION_OTHER0x0780
#define PCI_BASE_CLASS_COMMUNICATION0x07
#define PCI_CLASS_COMMUNICATION_SERIAL0x0700
#define PCI_CLASS_COMMUNICATION_PARALLEL0x0701
#define PCI_CLASS_COMMUNICATION_MSERIAL0x0702
#define PCI_CLASS_COMMUNICATION_MODEM0x0703
#define PCI_CLASS_COMMUNICATION_OTHER0x0780
#define PCI_BASE_CLASS_SYSTEM0x08
#define PCI_CLASS_SYSTEM_PIC0x0800
#define PCI_CLASS_SYSTEM_DMA0x0801
#define PCI_CLASS_SYSTEM_TIMER0x0802
#define PCI_CLASS_SYSTEM_RTC0x0803
#define PCI_CLASS_SYSTEM_PCI_HOTPLUG0x0804
#define PCI_BASE_CLASS_SYSTEM0x08
#define PCI_CLASS_SYSTEM_PIC0x0800
#define PCI_CLASS_SYSTEM_DMA0x0801
#define PCI_CLASS_SYSTEM_TIMER0x0802
#define PCI_CLASS_SYSTEM_RTC0x0803
#define PCI_CLASS_SYSTEM_PCI_HOTPLUG0x0804
#define PCI_CLASS_SYSTEM_OTHER0x0880
#define PCI_BASE_CLASS_INPUT0x09
#define PCI_BASE_CLASS_WIRELESS0x0d
#define PCI_CLASS_WIRELESS_IRDA0x0d00
#define PCI_CLASS_WIRELESS_CONSUMER_IR0x0d01
#define PCI_CLASS_WIRELESS_CONSUMER_IR0x0d01
#define PCI_CLASS_WIRELESS_RF0x0d10
#define PCI_CLASS_WIRELESS_OTHER0x0d80
#define PCI_BASE_CLASS_SIGNAL0x11
#define PCI_CLASS_SIGNAL_DPIO0x1100
#define PCI_CLASS_SIGNAL_PERF_CTR0x1101
#define PCI_CLASS_SIGNAL_SYNCHRONIZER0x1110
#define PCI_CLASS_SIGNAL_SYNCHRONIZER0x1110
#define PCI_CLASS_SIGNAL_OTHER0x1180
#define PCI_CLASS_OTHERS0xff
#define PCI_CLASS_OTHERS0xff
/* Several ID's we need in the library */
#define PCI_VENDOR_ID_APPLE0x106b
#define PCI_VENDOR_ID_AMD0x1022
#define PCI_VENDOR_ID_ATI0x1002
#define PCI_VENDOR_ID_INTEL0x8086
#define PCI_VENDOR_ID_NVIDIA0x10de
#define PCI_VENDOR_ID_REALTEK0x10ec
#define PCI_VENDOR_ID_TEXAS_INSTRUMENTS0x104c
#define PCI_VENDOR_ID_NVIDIA0x10de
#define PCI_VENDOR_ID_REALTEK0x10ec
#define PCI_VENDOR_ID_TEXAS_INSTRUMENTS0x104c
#define PCI_VENDOR_ID_VIA0x1106
#endif /* !__LIBSAIO_PCI_H */
branches/iFabio/Chameleon/i386/libsaio/saio_types.h
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* Portions Copyright (c) 1999-2003 Apple Computer, Inc. All Rights
* Reserved. This file contains Original Code and/or Modifications of
* Original Code as defined in and that are subject to the Apple Public
* Source License Version 2.0 (the "License"). You may not use this file
* Source License Version 2.0 (the "License").You may not use this file
* except in compliance with the License. Please obtain a copy of the
* License at http://www.apple.com/publicsource and read it before using
* this file.
#include <sys/reboot.h>
#include <sys/types.h>
#include <sys/param.h>
#include "bios.h"
#include "nbp_cmd.h"
#include "bootargs.h"
typedef unsigned long entry_t;
typedef struct {
unsigned int sectors:8;
unsigned int heads:8;
unsigned int cylinders:16;
unsigned int sectors:8;
unsigned int heads:8;
unsigned int cylinders:16;
} compact_diskinfo_t;
struct driveParameters {
int cylinders;
int sectors;
int heads;
int totalDrives;
int cylinders;
int sectors;
int heads;
int totalDrives;
};
struct Tag {
long type;
char *string;
long offset;
longtype;
char *string;
longoffset;
struct Tag *tag;
struct Tag *tagNext;
};
typedef struct {
charplist[4096];// buffer for plist
TagPtrdictionary;// buffer for xml dictionary
bool canOverride; // flag to mark a dictionary can be overriden
boolcanOverride;// flag to mark a dictionary can be overriden
} config_file_t;
/*
* BIOS drive information.
*/
struct boot_drive_info {
struct drive_params {
struct drive_params {
unsigned short buf_size;
unsigned short info_flags;
unsigned long phys_cyls;
unsigned char dev_path[8];
unsigned char reserved3;
unsigned char checksum;
} params;
struct drive_dpte {
} params;
struct drive_dpte {
unsigned short io_port_base;
unsigned short control_port_base;
unsigned char head_flags;
unsigned char vendor_info;
unsigned char irq : 4;
unsigned char irq : 4;
unsigned char irq_unused : 4;
unsigned char block_count;
unsigned char dma_channel : 4;
unsigned char dma_type : 4;
unsigned char pio_type : 4;
unsigned char dma_type : 4;
unsigned char pio_type : 4;
unsigned char pio_unused : 4;
unsigned short option_flags;
unsigned short reserved;
unsigned char revision;
unsigned char checksum;
} dpte;
} dpte;
} __attribute__((packed));
typedef struct boot_drive_info boot_drive_info_t;
struct driveInfo {
boot_drive_info_t di;
int uses_ebios;
int no_emulation;
int biosdev;
int valid;
boot_drive_info_t di;
int uses_ebios;
int no_emulation;
int biosdev;
int valid;
};
typedef struct FinderInfo {
unsigned char data[16];
unsigned char data[16];
} FinderInfo;
struct BootVolume;
struct BootVolume;
typedef struct BootVolume * BVRef;
typedef struct BootVolume * CICell;
typedef long (*FSReadFile)(CICell ih, char *filePath, void *base, uint64_t offset, uint64_t length);
typedef long (*FSGetFileBlock)(CICell ih, char *filePath, unsigned long long *firstBlock);
typedef long (*FSGetDirEntry)(CICell ih, char * dirPath, long long * dirIndex,
char ** name, long * flags, long * time,
FinderInfo * finderInfo, long * infoValid);
char ** name, long * flags, long * time,
FinderInfo * finderInfo, long * infoValid);
typedef long (*FSGetUUID)(CICell ih, char *uuidStr);
typedef void (*BVGetDescription)(CICell ih, char * str, long strMaxLen);
// Can be just pointed to free or a special free function
typedef void (*BVFree)(CICell ih);
struct iob {
unsigned int i_flgs; /* see F_* below */
unsigned int i_offset; /* seek byte offset in file */
int i_filesize; /* size of file */
char * i_buf; /* file load address */
unsigned int i_flgs;/* see F_* below */
unsigned int i_offset;/* seek byte offset in file */
int i_filesize;/* size of file */
char * i_buf;/* file load address */
};
#define BPS 512 /* sector size of the device */
#define F_READ 0x1 /* file opened for reading */
#define F_WRITE 0x2 /* file opened for writing */
#define F_ALLOC 0x4 /* buffer allocated */
#define F_FILE 0x8 /* file instead of device */
#define F_NBSF 0x10 /* no bad sector forwarding */
#define F_SSI 0x40 /* set skip sector inhibit */
#define F_MEM 0x80 /* memory instead of file or device */
#define BPS 512/* sector size of the device */
#define F_READ 0x1/* file opened for reading */
#define F_WRITE 0x2/* file opened for writing */
#define F_ALLOC 0x4/* buffer allocated */
#define F_FILE 0x8/* file instead of device */
#define F_NBSF 0x10/* no bad sector forwarding */
#define F_SSI 0x40/* set skip sector inhibit */
#define F_MEM 0x80/* memory instead of file or device */
struct dirstuff {
char * dir_path; /* directory path */
long long dir_index; /* directory entry index */
BVRef dir_bvr; /* volume reference */
char * dir_path;/* directory path */
long long dir_index;/* directory entry index */
BVRef dir_bvr;/* volume reference */
};
#define BVSTRLEN 32
struct BootVolume {
BVRef next; /* list linkage pointer */
int biosdev; /* BIOS device number */
int type; /* device type (floppy, hd, network) */
unsigned int flags; /* attribute flags */
BVGetDescription description; /* BVGetDescription function */
int part_no; /* partition number (1 based) */
unsigned int part_boff; /* partition block offset */
unsigned int part_type; /* partition type */
unsigned int fs_boff; /* 1st block # of next read */
unsigned int fs_byteoff; /* Byte offset for read within block */
FSLoadFile fs_loadfile; /* FSLoadFile function */
FSReadFile fs_readfile; /* FSReadFile function */
FSGetDirEntry fs_getdirentry; /* FSGetDirEntry function */
FSGetFileBlock fs_getfileblock; /* FSGetFileBlock function */
FSGetUUID fs_getuuid; /* FSGetUUID function */
unsigned int bps; /* bytes per sector for this device */
char name[BVSTRLEN]; /* (name of partition) */
char type_name[BVSTRLEN]; /* (type of partition, eg. Apple_HFS) */
BVFree bv_free; /* BVFree function */
uint32_t modTime;
char label[BVSTRLEN]; /* partition volume label */
char altlabel[BVSTRLEN]; /* partition volume label */
bool filtered; /* newFilteredBVChain() will set to TRUE */
bool visible; /* will shown in the device list */
BVRef next; /* list linkage pointer */
int biosdev; /* BIOS device number */
int type; /* device type (floppy, hd, network) */
unsigned int flags; /* attribute flags */
BVGetDescription description; /* BVGetDescription function */
int part_no; /* partition number (1 based) */
unsigned int part_boff; /* partition block offset */
unsigned int part_type; /* partition type */
unsigned int fs_boff; /* 1st block # of next read */
unsigned int fs_byteoff; /* Byte offset for read within block */
FSLoadFile fs_loadfile; /* FSLoadFile function */
FSReadFile fs_readfile; /* FSReadFile function */
FSGetDirEntry fs_getdirentry; /* FSGetDirEntry function */
FSGetFileBlock fs_getfileblock; /* FSGetFileBlock function */
FSGetUUID fs_getuuid; /* FSGetUUID function */
unsigned int bps; /* bytes per sector for this device */
char name[BVSTRLEN]; /* (name of partition) */
char type_name[BVSTRLEN]; /* (type of partition, eg. Apple_HFS) */
BVFree bv_free; /* BVFree function */
uint32_t modTime;
char label[BVSTRLEN]; /* partition volume label */
char altlabel[BVSTRLEN]; /* partition volume label */
bool filtered; /* newFilteredBVChain() will set to TRUE */
bool visible; /* will shown in the device list */
};
enum {
kBVFlagPrimary = 0x01,
kBVFlagNativeBoot = 0x02,
kBVFlagForeignBoot = 0x04,
kBVFlagBootable = 0x08,
kBVFlagEFISystem = 0x10,
kBVFlagBooter = 0x20,
kBVFlagSystemVolume = 0x40
kBVFlagPrimary= 0x01,
kBVFlagNativeBoot= 0x02,
kBVFlagForeignBoot= 0x04,
kBVFlagBootable= 0x08,
kBVFlagEFISystem= 0x10,
kBVFlagBooter= 0x20,
kBVFlagSystemVolume= 0x40
};
enum {
kBIOSDevTypeFloppy = 0x00,
kBIOSDevTypeHardDrive = 0x80,
kBIOSDevTypeNetwork = 0xE0,
kBIOSDevUnitMask = 0x0F,
kBIOSDevTypeMask = 0xF0,
kBIOSDevMask = 0xFF
kBIOSDevTypeFloppy= 0x00,
kBIOSDevTypeHardDrive= 0x80,
kBIOSDevTypeNetwork= 0xE0,
kBIOSDevUnitMask= 0x0F,
kBIOSDevTypeMask= 0xF0,
kBIOSDevMask= 0xFF
};
enum {
kPartitionTypeOpenBSD = 0xa6,
};
//#define BIOS_DEV_TYPE(d) ((d) & kBIOSDevTypeMask)
#define BIOS_DEV_UNIT(bvr) ((bvr)->biosdev - (bvr)->type)
//#define BIOS_DEV_TYPE(d)((d) & kBIOSDevTypeMask)
#define BIOS_DEV_UNIT(bvr)((bvr)->biosdev - (bvr)->type)
/*
* KernBootStruct device types.
*/
enum {
DEV_SD = 0,
DEV_HD = 1,
DEV_FD = 2,
DEV_EN = 3
DEV_SD = 0,
DEV_HD = 1,
DEV_FD = 2,
DEV_EN = 3
};
#ifndef max
#define max(a,b) ((a) > (b) ? (a) : (b))
/*
* min/max Macros.
* counting and rounding Macros.
*
* Azi: defined on <sys/param.h>,
*i386/include/IOKit/IOLib.h (min/max), and others...
*
#ifndef MIN
#define MIN(a,b) ( ((a) < (b)) ? (a) : (b) )
#endif
#ifndef min
#define min(a,b) ((a) < (b) ? (a) : (b))
#ifndef MAX
#define MAX(a,b) ( ((a) > (b)) ? (a) : (b) )
#endif
#defineround2(x, m)(((x) + (m / 2)) & ~(m - 1))
#define roundup2(x, m) (((x) + m - 1) & ~(m - 1))
#define round2(x, m)(((x) + (m / 2)) & ~(m - 1))
#define roundup2(x, m)(((x) + m - 1) & ~(m - 1))*/
#define MAKEKERNDEV(t, u, p) MAKEBOOTDEV(t, 0, 0, u, p)
enum {
kNetworkDeviceType = kBIOSDevTypeNetwork,
kBlockDeviceType = kBIOSDevTypeHardDrive
kNetworkDeviceType = kBIOSDevTypeNetwork,
kBlockDeviceType = kBIOSDevTypeHardDrive
}; //gBootFileType_t;
enum {
kCursorTypeHidden = 0x0100,
kCursorTypeUnderline = 0x0607
kCursorTypeHidden = 0x0100,
kCursorTypeUnderline = 0x0607
};
#endif /* !__LIBSAIO_SAIO_TYPES_H */
branches/iFabio/Chameleon/i386/libsaio/msdos.c
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#define tolower(c) (((c)>='A' && c<='Z')?((c) | 0x20):(c))
#include "libsaio.h"
#include "sl.h"
#include "msdos_private.h"
#include "msdos.h"
#defineCLUST_RSRVD160xfff8/* reserved cluster range */
#defineCLUST_RSRVD120xff8/* reserved cluster range */
#define tolower(c) (((c)>='A' && c<='Z')?((c) | 0x20):(c))
static int msdosressector=0;
static int msdosnfats = 0;
static int msdosfatsecs = 0;
if (length==0 || length>size-offset)
toread=size-offset;
wastoread=toread;
bcopy (buf+(offset%msdosclustersize),ptr,min(msdosclustersize-(offset%msdosclustersize), toread));
bcopy (buf+(offset%msdosclustersize),ptr,MIN(msdosclustersize-(offset%msdosclustersize), toread));
ptr+=msdosclustersize-(offset%msdosclustersize);
toread-=msdosclustersize-(offset%msdosclustersize);
while (toread>0 && msdosreadcluster (ih, (uint8_t *)ptr, min(msdosclustersize,toread), &cluster))
while (toread>0 && msdosreadcluster (ih, (uint8_t *)ptr, MIN(msdosclustersize,toread), &cluster))
{
ptr+=msdosclustersize;
toread-=msdosclustersize;
branches/iFabio/Chameleon/i386/libsaio/fake_efi.c
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/*
* Copyright 2007 David F. Elliott. All rights reserved.
* Copyright 2007 David F. Elliott. All rights reserved.
*/
#include "libsaio.h"
// unable to determine UUID for host. Error: 35 fix
// Rek: new SMsystemid option conforming to smbios notation standards, this option should
// belong to smbios config only ...
const char *sysId = getStringForKey(kSystemID, &bootInfo->bootConfig);
const char *sysId = getStringForKey(kSystemID, &bootInfo->chameleonConfig);
EFI_CHAR8*ret = getUUIDFromString(sysId);
if (!sysId || !ret) // try bios dmi info UUID extraction
extern void scan_mem();
// Take in account user overriding
if (getValueForKey(kSMBIOSKey, &override_pathname, &len, &bootInfo->bootConfig) && len > 0)
if (getValueForKey(kSMBIOSKey, &override_pathname, &len, &bootInfo->chameleonConfig) && len > 0)
{
// Specify a path to a file, e.g. SMBIOS=/Extra/macProXY.plist
sprintf(dirSpecSMBIOS, override_pathname);
verbose("No SMBIOS replacement found.\n");
}
// get a chance to scan mem dynamically if user asks for it while having the config options loaded as well,
// as opposed to when it was in scan_platform(); also load the orig. smbios so that we can access dmi info without
// patching the smbios yet
// get a chance to scan mem dynamically if user asks for it while having the config options
// loaded as well, as opposed to when it was in scan_platform(); also load the orig. smbios
// so that we can access dmi info, without patching the smbios yet.
scan_mem();
}
branches/iFabio/Chameleon/i386/libsaio/smbios_getters.c
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*/
#include "smbios_getters.h"
#include "bootstruct.h"
#ifndef DEBUG_SMBIOS
#define DEBUG_SMBIOS 0
switch (Platform.CPU.Model)
{
case 0x0D:// ???
case CPU_MODEL_YONAH:// Yonah0x0E
case CPU_MODEL_MEROM:// Merom0x0F
case CPU_MODEL_PENRYN:// Penryn0x17
case CPU_MODEL_ATOM:// Atom 45nm0x1C
case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
case CPU_MODEL_ATOM:// Intel Atom (45nm)
return false;
case 0x19:// ??? Intel Core i5 650 @3.20 GHz
case CPU_MODEL_NEHALEM:// Intel Core i7 LGA1366 (45nm)
case CPU_MODEL_FIELDS:// Intel Core i5, i7 LGA1156 (45nm)
case CPU_MODEL_DALES:// Intel Core i5, i7 LGA1156 (45nm) ???
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5, i7 LGA1156 (32nm)
case CPU_MODEL_WESTMERE:// Intel Core i7 LGA1366 (32nm) 6 Core
case CPU_MODEL_NEHALEM_EX:// Intel Core i7 LGA1366 (45nm) 6 Core ???
case CPU_MODEL_WESTMERE_EX:// Intel Core i7 LGA1366 (45nm) 6 Core ???
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
{
// thanks to dgobe for i3/i5/i7 bus speed detection
int nhm_bus = 0x3F;
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))
value->word = 0x601;// Core i5
value->word = 0x0601;// Core i5
else
value->word = 0x0701;// Core i7
value->word = 0x0701;// Core i7
return true;
case CPU_MODEL_DALES:// Havendale, Auburndale
case CPU_MODEL_DALES:
if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))
value->word = 0x601;// Core i5
value->word = 0x0601;// Core i5
else
value->word = 0x0701;// Core i7
value->word = 0x0701;// Core i7
return true;
case CPU_MODEL_SANDY:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_SANDY_XEON:// Intel Xeon E3
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
if (strstr(Platform.CPU.BrandString, "Core(TM) i3"))
value->word = 0x901;// Core i3
value->word = 0x0901;// Core i3
else
if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))
value->word = 0x601;// Core i5
value->word = 0x0601;// Core i5
else
value->word = 0x0701;// Core i7
value->word = 0x0701;// Core i7
return true;
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
value->word = 0x0501;// Core i7
value->word = 0x0501;// Core i7
return true;
case 0x19:// ??? Intel Core i5 650 @3.20 GHz
value->word = 0x601;// Core i5
value->word = 0x0601;// Core i5
return true;
}
}
}
}
return false;
//value->string = NOT_AVAILABLE;
//return true;
if (!bootInfo->memDetect)
return false;
value->string = NOT_AVAILABLE;
return true;
}
bool getSMBMemoryDeviceSerialNumber(returnType *value)
intmap;
idx++;
DBG("getSMBMemoryDeviceSerialNumber index: %d, MAX_RAM_SLOTS: %d\n",idx,MAX_RAM_SLOTS);
if (idx < MAX_RAM_SLOTS)
{
map = Platform.DMI.DIMM[idx];
}
}
return false;
//value->string = NOT_AVAILABLE;
//return true;
if (!bootInfo->memDetect)
return false;
value->string = NOT_AVAILABLE;
return true;
}
bool getSMBMemoryDevicePartNumber(returnType *value)
}
}
return false;
//value->string = NOT_AVAILABLE;
//return true;
if (!bootInfo->memDetect)
return false;
value->string = NOT_AVAILABLE;
return true;
}
branches/iFabio/Chameleon/i386/libsaio/saio_internal.h
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extern int ebiosEjectMedia(int biosdev);
extern void bios_putchar(int ch);
extern void putca(int ch, int attr, int repeat);
extern void pause();
extern int readKeyboardStatus(void);
extern int readKeyboardShiftFlags(void);
extern unsigned int time18(void);
extern bool gVerboseMode;
extern bool gErrors;
extern void initBooterLog(void);
extern void msglog(const char * format, ...);
extern void setupBooterLog(void);
extern int putchar(int ch);
extern int getchar(void);
extern void msglog(const char * format, ...);
extern int printf(const char *format, ...);
extern int error(const char *format, ...);
extern int verbose(const char *format, ...);
extern void stop(const char *format, ...);
//Azi: replace getc/getchar with ? console.c
extern void pause();
/* disk.c */
extern void rescanBIOSDevice(int biosdev);
extern int loadConfigFile(const char *configFile, config_file_t *configBuff);
extern int loadSystemConfig(config_file_t *configBuff);
extern int loadHelperConfig(config_file_t *configBuff);
extern int loadOverrideConfig(config_file_t *configBuff);
extern int loadChameleonConfig(config_file_t *configBuff);
extern char * newString(const char *oldString);
extern char * getNextArg(char ** ptr, char * val);
extern int ParseXMLFile( char * buffer, TagPtr * dict );
branches/iFabio/Chameleon/i386/boot0/chain0.s
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dw kBootSignature
;END
; END
branches/iFabio/Chameleon/i386/boot0/boot0.s
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.Pass1:
%if CONFIG_BOOT0_HFSFIRST
cmp BYTE [si + part.type], kPartTypeHFS; In pass 1 we're going to find a HFS+ partition
; equipped with boot1h in its boot record
; regardless if it's active or not.
; equipped with boot1h in its boot record
; regardless if it's active or not.
jne .continue
mov dh, 1 ; Argument for loadBootSector to check HFS+ partition signature.
movdh, 1 ; Argument for loadBootSector to check HFS+ partition signature.
%else
cmp BYTE [si + part.bootid], kPartActive; In pass 1 we are walking on the standard path
; by trying to hop on the active partition.
; by trying to hop on the active partition.
jne .continue
xor dh, dh ; Argument for loadBootSector to skip HFS+ partition
; signature check.
xor dh, dh ; Argument for loadBootSector to skip HFS+ partition
; signature check.
%endif
jmp .tryToBoot
jmp .tryToBoot
.Pass2:
%if CONFIG_BOOT0_HFSFIRST
cmp BYTE [si + part.bootid], kPartActive; In pass 2 we are walking on the standard path
; by trying to hop on the active partition.
; by trying to hop on the active partition.
jne .continue
xor dh, dh ; Argument for loadBootSector to skip HFS+ partition
; signature check.
xordh, dh ; Argument for loadBootSector to skip HFS+ partition
; signature check.
%else
cmp BYTE [si + part.type], kPartTypeHFS; In pass 2 we're going to find a HFS+ partition
; equipped with boot1h in its boot record
; regardless if it's active or not.
; equipped with boot1h in its boot record
; regardless if it's active or not.
jne .continue
mov dh, 1 ; Argument for loadBootSector to check HFS+ partition signature.
mov dh, 1 ; Argument for loadBootSector to check HFS+ partition signature.
%endif
DebugChar('*')
jmp SHORT initBootLoader
.continue:
add si, BYTE part_size; advance SI to next partition entry
add si, BYTE part_size ; advance SI to next partition entry
loop .loop ; loop through all partition entries
;
;
dec bl
jnz .switchPass2; didn't find Protective MBR before
call checkGPT
call checkGPT
.switchPass2:
;
;
checkGPT:
push bx
mov di, kLBA1Buffer; address of GUID Partition Table Header
cmp DWORD [di], kGPTSignatureLow; looking for 'EFI '
jne .exit; not found. Giving up.
.exit:
pop bx
ret; no more GUID partitions. Giving up.
;--------------------------------------------------------------------------
; loadBootSector - Load boot sector
;
; According to EFI specification, maximum boot code size is 440 bytes
;
;
; XXX - compilation errors with debug enabled (see comment above about nasm)
; Azi: boot0.s:808: error: TIMES value -111 is negative
; boot0.s:811: error: TIMES value -41 is negative
;
pad_boot:
times 440-($-$$) db 0
branches/iFabio/Chameleon/i386/boot0/Cconfig
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bool "boot0 debug support"
default n
help
Say Y here if you want to compile in boot0
debug messages. On an error, boot0 will print
one of thefollowing:
Say Y here if you want to enable boot0 debug messages.
On an error, boot0 will print one of the following:
>start_reloc was called
*Boot partition found
JJumping to partition booter
<read_lba
RINT13/F42 error
config BOOT0_VERBOSE
bool "boot0 verbose support"
default y
help
Say Y here if you want to enable boot0 verbose messages.
boot0 will pronto out status updates as it executes to
boot0 will print out status updates as it executes to
notify the user of progress in the initial boot sequence.
When in doubt, say "Y".
branches/iFabio/Chameleon/i386/boot1/Cconfig
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#
#boot1
#boot1h
#
config BOOT1_HFS
bool "boot1 second stage booter"
bool "boot1h second stage booter"
default y
help
Say Y here if you want to compile the default boot1
bootloader stage.
Say Y here if you want to compile the default second
stage bootloader.
config BOOT1_HFS_DEBUG
bool "debug support"
default n
depends on BOOT1_HFS
help
Say Y here if you want to compile in debug support.
Say Y here if you want to enable boot1h debug messages.
config BOOT1_HFS_VERBOSE
bool "verbose support"
default y
depends on BOOT1_HFS
help
Say Y here if you want to compile in verbose support.
Say Y here if you want to enable boot1h verbose messages.
#
#boot1h
#boot1he
#
config BOOT1_HFS_ACTIVE
bool "boot1h second stage boater"
bool "boot1he second stage booter"
default y
help
Say Y here if you want to compile the default boot1
bootloader stage.
Say Y here if you want to compile the boot1he second
stage bootloader.
config BOOT1_HFS_ACTIVE_DEBUG
bool "debug support"
default n
depends on BOOT1_HFS_ACTIVE
help
Say Y here if you want to compile in debug support.
Say Y here if you want to enable boot1he debug messages.
config BOOT1_HFS_ACTIVE_VERBOSE
bool "verbose support"
default y
depends on BOOT1_HFS_ACTIVE
help
Say Y here if you want to compile in debug support.
Say Y here if you want to enable boot1he verbose messages.
branches/iFabio/Chameleon/i386/boot1/boot1h.s
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; If the booter code becomes too large, then nasm will complain
; that the 'times' argument is negative.
;
; XXX - compilation errors with debug enabled (see comment above about nasm)
; Azi: boot1h.s:994: error: TIMES value -67 is negative
;
pad_table_and_sig:
times510-($-$$) db 0
dwkBootSignature
; Pad the rest of the 512 byte sized sector with zeroes. The last
; two bytes is the mandatory boot sector signature.
;
;
; XXX - compilation errors with debug enabled
; Azi: boot1h.s:1452: error: TIMES value -64 is negative
;
pad_sector_1:
times1022-($-$$) db 0
dwkBootSignature
branches/iFabio/Chameleon/i386/boot2/graphics.c
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uint8_t *previewSaveunder = 0;
#define VIDEO(x) (bootArgs->Video.v_ ## x)
#define MIN(x, y) ((x) < (y) ? (x) : (y))
//==========================================================================
// getVBEInfoString
char * propStr;
unsigned long count = 0;
propStr = newStringForKey( (char *) propKey , &bootInfo->bootConfig );
propStr = newStringForKey( (char *) propKey , &bootInfo->chameleonConfig );
if ( propStr )
{
char * delimiter = propStr;
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/*static*/ unsigned long Adler32( unsigned char * buffer, long length );
static long FileLoadDrivers(char *dirSpec, long plugin);
static long NetLoadDrivers(char *dirSpec);
static long LoadDriverMKext(char *fileSpec);
static long LoadDriverPList(char *dirSpec, char *name, long bundleType);
static long LoadMatchedModules(void);
long FileLoadDrivers(char *dirSpec, long plugin);
long NetLoadDrivers(char *dirSpec);
long LoadDriverMKext(char *fileSpec);
long LoadDriverPList(char *dirSpec, char *name, long bundleType);
long LoadMatchedModules(void);
static long MatchPersonalities(void);
static long MatchLibraries(void);
#ifdef NOTDEF
static long ParseXML(char *buffer, ModulePtr *module, TagPtr *personalities);
static long InitDriverSupport(void);
static ModulePtr gModuleHead, gModuleTail;
ModulePtr gModuleHead, gModuleTail;
static TagPtr gPersonalityHead, gPersonalityTail;
static char * gExtensionsSpec;
static char * gDriverSpec;
}
}
else if ( gBootFileType == kBlockDeviceType )
{
if(!gHaveKernelCache)
{
// First try to load Extra extensions from the ramdisk if isn't aliased as bt(0,0).
if (gRAMDiskVolume && !gRAMDiskBTAliased)
{
// Non-prelinked kernel, load system mkext.
// NOTE: In it's default state, XNU cannot be both prelinked, and load additional drivers
// from the bootloader. There is, however, a patch that changes this and allows
// for both to occure.
strcpy(dirSpecExtra, "rd(0,0)/Extra/");
FileLoadDrivers(dirSpecExtra, 0);
}
// Next try to load Extra extensions from the selected root partition.
strcpy(dirSpecExtra, "/Extra/");
if (FileLoadDrivers(dirSpecExtra, 0) != 0)
{
// If failed, then try to load Extra extensions from the boot partition
// in case we have a separate booter partition or a bt(0,0) aliased ramdisk.
if ( !(gBIOSBootVolume->biosdev == gBootVolume->biosdev && gBIOSBootVolume->part_no == gBootVolume->part_no)
|| (gRAMDiskVolume && gRAMDiskBTAliased) )
{
// Next try a specfic OS version folder ie 10.5
sprintf(dirSpecExtra, "bt(0,0)/Extra/%s/", &gMacOSVersion);
if (FileLoadDrivers(dirSpecExtra, 0) != 0)
{
// Next we'll try the base
strcpy(dirSpecExtra, "bt(0,0)/Extra/");
FileLoadDrivers(dirSpecExtra, 0);
}
}
}
if(!gHaveKernelCache)
{
// Don't load main driver (from /System/Library/Extentions) if gHaveKernelCache is set.
// since these drivers will already be in the kernel cache.
// NOTE: when gHaveKernelCache, xnu cannot (by default) load *any* extra kexts from the bootloader.
// The /Extra code is not disabled in this case due to a kernel patch that allows for this to happen.
// Also try to load Extensions from boot helper partitions.
if (gBootVolume->flags & kBVFlagBooter)
}
}
// First try to load Extra extensions from the ramdisk if isn't aliased as bt(0,0).
if (gRAMDiskVolume && !gRAMDiskBTAliased)
{
strcpy(dirSpecExtra, "rd(0,0)/Extra/");
FileLoadDrivers(dirSpecExtra, 0);
}
// Next try to load Extra extensions from the selected root partition.
strcpy(dirSpecExtra, "/Extra/");
if (FileLoadDrivers(dirSpecExtra, 0) != 0)
{
// If failed, then try to load Extra extensions from the boot partition
// in case we have a separate booter partition or a bt(0,0) aliased ramdisk.
if ( !(gBIOSBootVolume->biosdev == gBootVolume->biosdev && gBIOSBootVolume->part_no == gBootVolume->part_no)
|| (gRAMDiskVolume && gRAMDiskBTAliased) )
{
// Next try a specfic OS version folder ie 10.5
sprintf(dirSpecExtra, "bt(0,0)/Extra/%s/", &gMacOSVersion);
if (FileLoadDrivers(dirSpecExtra, 0) != 0)
{
// Next we'll try the base
strcpy(dirSpecExtra, "bt(0,0)/Extra/");
FileLoadDrivers(dirSpecExtra, 0);
}
}
}
}
else
{
static long
FileLoadMKext( const char * dirSpec, const char * extDirSpec )
{
long ret, flags, time, time2;
char altDirSpec[512];
longret, flags, time, time2;
charaltDirSpec[512];
sprintf (altDirSpec, "%s%s", dirSpec, extDirSpec);
ret = GetFileInfo(altDirSpec, "Extensions.mkext", &flags, &time);
if ((ret == 0) && ((flags & kFileTypeMask) == kFileTypeFlat))
{
ret = GetFileInfo(dirSpec, "Extensions", &flags, &time2);
if ((ret != 0) || ((flags & kFileTypeMask) != kFileTypeDirectory) ||
(((gBootMode & kBootModeSafe) == 0) && (time == (time2 + 1))))
{
sprintf(gDriverSpec, "%sExtensions.mkext", altDirSpec);
verbose("LoadDrivers: Loading from [%s]\n", gDriverSpec);
if (LoadDriverMKext(gDriverSpec) == 0) return 0;
}
}
return -1;
sprintf (altDirSpec, "%s%s", dirSpec, extDirSpec);
ret = GetFileInfo(altDirSpec, "Extensions.mkext", &flags, &time);
if ((ret == 0) && ((flags & kFileTypeMask) == kFileTypeFlat))
{
ret = GetFileInfo(dirSpec, "Extensions", &flags, &time2);
if ((ret != 0)
|| ((flags & kFileTypeMask) != kFileTypeDirectory)
|| (((gBootMode & kBootModeSafe) == 0) && (time == (time2 + 1))))
{
sprintf(gDriverSpec, "%sExtensions.mkext", altDirSpec);
verbose("LoadDrivers: Loading from [%s]\n", gDriverSpec);
if (LoadDriverMKext(gDriverSpec) == 0)
return 0;
}
}
return -1;
}
//==========================================================================
// FileLoadDrivers
static long
long
FileLoadDrivers( char * dirSpec, long plugin )
{
long ret, length, flags, time, bundleType;
{
// First try 10.6's path for loading Extensions.mkext.
if (FileLoadMKext(dirSpec, "Caches/com.apple.kext.caches/Startup/") == 0)
return 0;
return 0;
// Next try the legacy path.
else if (FileLoadMKext(dirSpec, "") == 0)
return result;
}
//==========================================================================
//
static long
long
NetLoadDrivers( char * dirSpec )
{
long tries;
//==========================================================================
// loadDriverMKext
static long
long
LoadDriverMKext( char * fileSpec )
{
unsigned long driversAddr, driversLength;
//==========================================================================
// LoadDriverPList
static long
long
LoadDriverPList( char * dirSpec, char * name, long bundleType )
{
long length, executablePathLength, bundlePathLength;
do {
// Save the driver path.
sprintf(gFileSpec, "%s/%s/%s", dirSpec, name,
if(name) sprintf(gFileSpec, "%s/%s/%s", dirSpec, name,
(bundleType == kCFBundleType2) ? "Contents/MacOS/" : "");
else sprintf(gFileSpec, "%s/%s", dirSpec,
(bundleType == kCFBundleType2) ? "Contents/MacOS/" : "");
executablePathLength = strlen(gFileSpec) + 1;
tmpExecutablePath = malloc(executablePathLength);
if (tmpExecutablePath == 0) break;
strcpy(tmpExecutablePath, gFileSpec);
sprintf(gFileSpec, "%s/%s", dirSpec, name);
if(name) sprintf(gFileSpec, "%s/%s", dirSpec, name);
else sprintf(gFileSpec, "%s", dirSpec);
bundlePathLength = strlen(gFileSpec) + 1;
tmpBundlePath = malloc(bundlePathLength);
// Construct the file spec to the plist, then load it.
sprintf(gFileSpec, "%s/%s/%sInfo.plist", dirSpec, name,
if(name) sprintf(gFileSpec, "%s/%s/%sInfo.plist", dirSpec, name,
(bundleType == kCFBundleType2) ? "Contents/" : "");
else sprintf(gFileSpec, "%s/%sInfo.plist", dirSpec,
(bundleType == kCFBundleType2) ? "Contents/" : "");
length = LoadFile(gFileSpec);
if (length == -1) break;
length = length + 1;
buffer = malloc(length);
if (buffer == 0) break;
strlcpy(buffer, (char *)kLoadAddr, length);
// Parse the plist.
ret = ParseXML(buffer, &module, &personalities);
if (ret != 0) { break; }
// Allocate memory for the driver path and the plist.
module->executablePath = tmpExecutablePath;
if ((module->executablePath == 0) || (module->bundlePath == 0) || (module->plistAddr == 0))
break;
// Save the driver path in the module.
//strcpy(module->driverPath, tmpDriverPath);
tmpExecutablePath = 0;
//==========================================================================
// LoadMatchedModules
static long
long
LoadMatchedModules( void )
{
TagPtr prop;
ModulePtr module;
char *fileName, segName[32];
DriverInfoPtr driver;
long length, driverAddr, driverLength;
void *executableAddr = 0;
TagPtr prop;
ModulePtr module;
char *fileName, segName[32];
DriverInfoPtr driver;
long length, driverAddr, driverLength;
void *executableAddr = 0;
module = gModuleHead;
module = gModuleHead;
while (module != 0)
{
if (module->willLoad)
{
prop = XMLGetProperty(module->dict, kPropCFBundleExecutable);
while (module != 0)
{
if (module->willLoad)
{
prop = XMLGetProperty(module->dict, kPropCFBundleExecutable);
if (prop != 0)
{
fileName = prop->string;
sprintf(gFileSpec, "%s%s", module->executablePath, fileName);
length = LoadThinFatFile(gFileSpec, &executableAddr);
if (prop != 0)
{
fileName = prop->string;
sprintf(gFileSpec, "%s%s", module->executablePath, fileName);
length = LoadThinFatFile(gFileSpec, &executableAddr);
if (length == 0)
{
length = LoadFile(gFileSpec);
executableAddr = (void *)kLoadAddr;
}
//printf("%s length = %d addr = 0x%x\n", gFileSpec, length, driverModuleAddr); getc();
}
else
length = 0;
//printf("%s length = %d addr = 0x%x\n", gFileSpec, length, driverModuleAddr); getchar();
}
else
length = 0;
if (length != -1)
{
//driverModuleAddr = (void *)kLoadAddr;
//if (length != 0)
//{
// ThinFatFile(&driverModuleAddr, &length);
//}
if (length != -1)
{
//driverModuleAddr = (void *)kLoadAddr;
//if (length != 0)
//{
//ThinFatFile(&driverModuleAddr, &length);
//}
// Make make in the image area.
driverLength = sizeof(DriverInfo) + module->plistLength + length + module->bundlePathLength;
driverAddr = AllocateKernelMemory(driverLength);
// Make make in the image area.
execute_hook("LoadMatchedModules", module, &length, executableAddr, NULL);
// Set up the DriverInfo.
driver = (DriverInfoPtr)driverAddr;
driver->plistAddr = (char *)(driverAddr + sizeof(DriverInfo));
driver->plistLength = module->plistLength;
if (length != 0)
{
driver->executableAddr = (void *)(driverAddr + sizeof(DriverInfo) +
module->plistLength);
driver->executableLength = length;
}
else
{
driver->executableAddr = 0;
driver->executableLength = 0;
}
driver->bundlePathAddr = (void *)(driverAddr + sizeof(DriverInfo) +
module->plistLength + driver->executableLength);
driver->bundlePathLength = module->bundlePathLength;
driverLength = sizeof(DriverInfo) + module->plistLength + length + module->bundlePathLength;
driverAddr = AllocateKernelMemory(driverLength);
// Save the plist, module and bundle.
strcpy(driver->plistAddr, module->plistAddr);
if (length != 0)
{
memcpy(driver->executableAddr, executableAddr, length);
}
strcpy(driver->bundlePathAddr, module->bundlePath);
// Set up the DriverInfo.
driver = (DriverInfoPtr)driverAddr;
driver->plistAddr = (char *)(driverAddr + sizeof(DriverInfo));
driver->plistLength = module->plistLength;
if (length != 0)
{
driver->executableAddr = (void *)(driverAddr + sizeof(DriverInfo) +
module->plistLength);
driver->executableLength = length;
}
else
{
driver->executableAddr = 0;
driver->executableLength = 0;
}
driver->bundlePathAddr = (void *)(driverAddr + sizeof(DriverInfo) +
module->plistLength + driver->executableLength);
driver->bundlePathLength = module->bundlePathLength;
// Add an entry to the memory map.
sprintf(segName, "Driver-%lx", (unsigned long)driver);
AllocateMemoryRange(segName, driverAddr, driverLength,
kBootDriverTypeKEXT);
}
}
module = module->nextModule;
}
// Save the plist, module and bundle.
strcpy(driver->plistAddr, module->plistAddr);
if (length != 0)
{
memcpy(driver->executableAddr, executableAddr, length);
}
strcpy(driver->bundlePathAddr, module->bundlePath);
return 0;
// Add an entry to the memory map.
sprintf(segName, "Driver-%lx", (unsigned long)driver);
AllocateMemoryRange(segName, driverAddr, driverLength,
kBootDriverTypeKEXT);
}
}
module = module->nextModule;
}
return 0;
}
//==========================================================================
ParseXML( char * buffer, ModulePtr * module, TagPtr * personalities )
{
long length, pos;
TagPtr moduleDict, required;
TagPtr moduleDict;
ModulePtr tmpModule;
pos = 0;
if (length == -1) return -1;
required = XMLGetProperty(moduleDict, kPropOSBundleRequired);
if ( (required == 0) ||
(required->type != kTagTypeString) ||
!strcmp(required->string, "Safe Boot"))
#if 0 /** remove this check. **/
if (strcmp(XMLCastString(XMLGetProperty(moduleDict, kPropOSBundleRequired)), "Safe Boot") == 0)
{
// Don't load Safe Boot kexts. NOTE: -x should be check too.
XMLFreeTag(moduleDict);
return -2;
}
#endif
tmpModule = malloc(sizeof(Module));
if (tmpModule == 0)
long
DecodeKernel(void *binary, entry_t *rentry, char **raddr, int *rsize)
{
long ret;
compressed_kernel_header * kernel_header = (compressed_kernel_header *) binary;
u_int32_t uncompressed_size, size;
void *buffer;
long ret;
compressed_kernel_header * kernel_header = (compressed_kernel_header *) binary;
u_int32_t uncompressed_size, size;
void *buffer;
unsigned long len;
#if 0
printf("kernel header:\n");
printf("signature: 0x%x\n", kernel_header->signature);
printf("compress_type: 0x%x\n", kernel_header->compress_type);
printf("adler32: 0x%x\n", kernel_header->adler32);
printf("uncompressed_size: 0x%x\n", kernel_header->uncompressed_size);
printf("compressed_size: 0x%x\n", kernel_header->compressed_size);
getc();
printf("kernel header:\n");
printf("signature: 0x%x\n", kernel_header->signature);
printf("compress_type: 0x%x\n", kernel_header->compress_type);
printf("adler32: 0x%x\n", kernel_header->adler32);
printf("uncompressed_size: 0x%x\n", kernel_header->uncompressed_size);
printf("compressed_size: 0x%x\n", kernel_header->compressed_size);
getchar();
#endif
if (kernel_header->signature == OSSwapBigToHostConstInt32('comp')) {
if (kernel_header->compress_type != OSSwapBigToHostConstInt32('lzss')) {
error("kernel compression is bad\n");
return -1;
}
if (kernel_header->signature == OSSwapBigToHostConstInt32('comp'))
{
if (kernel_header->compress_type != OSSwapBigToHostConstInt32('lzss'))
{
error("kernel compression is bad\n");
return -1;
}
#if NOTDEF
if (kernel_header->platform_name[0] && strcmp(gPlatformName, kernel_header->platform_name))
return -1;
if (kernel_header->root_path[0] && strcmp(gBootFile, kernel_header->root_path))
return -1;
if (kernel_header->platform_name[0] && strcmp(gPlatformName, kernel_header->platform_name))
return -1;
if (kernel_header->root_path[0] && strcmp(gBootFile, kernel_header->root_path))
return -1;
#endif
uncompressed_size = OSSwapBigToHostInt32(kernel_header->uncompressed_size);
binary = buffer = malloc(uncompressed_size);
size = decompress_lzss((u_int8_t *) binary, &kernel_header->data[0],
OSSwapBigToHostInt32(kernel_header->compressed_size));
if (uncompressed_size != size) {
error("size mismatch from lzss: %x\n", size);
return -1;
}
if (OSSwapBigToHostInt32(kernel_header->adler32) !=
Adler32(binary, uncompressed_size))
{
printf("adler mismatch\n");
return -1;
}
}
ret = ThinFatFile(&binary, &len);
if (ret == 0 && len == 0 && archCpuType==CPU_TYPE_X86_64)
{
archCpuType=CPU_TYPE_I386;
ret = ThinFatFile(&binary, &len);
}
uncompressed_size = OSSwapBigToHostInt32(kernel_header->uncompressed_size);
binary = buffer = malloc(uncompressed_size);
// Notify modules that the kernel has been decompressed, thinned and is about to be decoded
execute_hook("DecodeKernel", (void*)binary, NULL, NULL, NULL);
size = decompress_lzss((u_int8_t *) binary, &kernel_header->data[0],
OSSwapBigToHostInt32(kernel_header->compressed_size));
if (uncompressed_size != size) {
error("size mismatch from lzss: %x\n", size);
return -1;
}
if (OSSwapBigToHostInt32(kernel_header->adler32) !=
Adler32(binary, uncompressed_size)) {
printf("adler mismatch\n");
return -1;
}
ret = DecodeMachO(binary, rentry, raddr, rsize);
if (ret<0 && archCpuType==CPU_TYPE_X86_64)
{
archCpuType=CPU_TYPE_I386;
ret = DecodeMachO(binary, rentry, raddr, rsize);
}
// Notify modules that the kernel has been decompressed, is about to be decoded
execute_hook("DecodeKernel", (void*)binary, NULL, NULL, NULL);
ret = ThinFatFile(&binary, &len);
if (ret == 0 && len == 0 && archCpuType==CPU_TYPE_X86_64)
{
archCpuType=CPU_TYPE_I386;
ret = ThinFatFile(&binary, &len);
}
ret = DecodeMachO(binary, rentry, raddr, rsize);
if (ret<0 && archCpuType==CPU_TYPE_X86_64)
{
archCpuType=CPU_TYPE_I386;
ret = DecodeMachO(binary, rentry, raddr, rsize);
}
return ret;
return ret;
}
branches/iFabio/Chameleon/i386/boot2/mboot.c
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int multiboot_timeout_set=0;
int multiboot_partition=0;
int multiboot_partition_set=0;
int multiboot_skip_partition=0;
int multiboot_skip_partition_set=0;
// Global multiboot info, if using multiboot.
struct multiboot_info *gMI;
int intVal = strtol(val, &endptr, 0);
if(*val != '\0' && (*endptr == '\0' || *endptr == ' ' || *endptr == '\t'))
{
printf("Default partition overridden to %d with timeout=%s\n", intVal, val);
printf("Default partition overridden to %d with partno=%s\n", intVal, val);
multiboot_partition = intVal;
multiboot_partition_set = 1;
}
}
if(getValueForBootKey(mi->mi_cmdline, "skip_partno", &val, &size))
{
char *endptr;
int intVal = strtol(val, &endptr, 0);
if(*val != '\0' && (*endptr == '\0' || *endptr == ' ' || *endptr == '\t'))
{
printf("Skipping partition %d with skip_partno=%s\n", intVal, val);
multiboot_skip_partition = intVal;
multiboot_skip_partition_set = 1;
}
}
}
if(doSelectDevice)
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# The ordering is important;
# boot2.o must be first.
OBJS = boot2.o boot.o graphics.o drivers.o prompt.o options.o lzss.o mboot.o \
ramdisk.o picopng.o resume.o bmdecompress.o graphic_utils.o gui.o modules.o modules_support.o boot_modules.o
ramdisk.o picopng.o resume.o bmdecompress.o graphic_utils.o gui.o modules.o \
modules_support.o boot_modules.o
# button.o browser.o scrollbar.o == NOTYET
UTILDIR = ../util
@${RM} $(SYMROOT)/${SYMBOLS_MODULE}
@$(LD) -arch i386 \
-undefined dynamic_lookup \
-dylib -read_only_relocs suppress \
-macosx_version_min 10.6 \
-o $(OBJROOT)/Symbols_LINKER_ONLY.dylib
endif
@make embed_symbols# this is done in a sub process after boot.sys exists so the strings are populated correctly
@# this is done in a sub process after boot.sys exists so the strings are populated correctly
@make embed_symbols
@${RM} $(SYMROOT)/boot2.sys
@( size=`ls -l $(SYMROOT)/boot | awk '{ print $$5}'` ; \
if expr "$$size" ">" "$(MAXBOOTSIZE)" > /dev/null ;\
then \
echo "\t******* boot is $$size bytes *******"; \
fi)
embed_symbols:
ifeq (${CONFIG_MODULES}, y)
@echo ================= Embedding Symbols.dylib =================
@$(SYMROOT)/machOconv $(SYMROOT)/boot2.sys $(SYMROOT)/boot &> /dev/null
@echo "\t******* Patching at $(PATCH_ADDR) ******"
@stat -f%z $(SYMROOT)/boot | perl -ane "print pack('V',@F[0]);" | dd conv=notrunc of=${SYMROOT}/boot.sys bs=1 count=4 seek=$(PATCH_ADDR) &> /dev/null
@stat -f%z $(SYMROOT)/boot | perl -ane "print pack('V',@F[0]);" | dd conv=notrunc of=${SYMROOT}/boot.sys bs=1 count=4 seek=$(PATCH_ADDR) &> /dev/null
endif
@echo "\t[MACHOCONV] boot"
@$(SYMROOT)/machOconv $(SYMROOT)/boot.sys $(SYMROOT)/boot
$(SYMROOT)/art.h:
@if [ "$(PNGCRUSH)" ]; then\
echo "optimizing art files ...\n$(PNGCRUSH) $(PNGOPTIONS) artwork/$(THEME)"; \
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*/
#define kBootErrorTimeout 5
/*
* Default path to kernel cache file
*/
//Slice - first one for Leopard
#define kDefaultCachePathLeo "/System/Library/Caches/com.apple.kernelcaches/"
#define kDefaultCachePathSnow "/System/Library/Caches/com.apple.kext.caches/Startup/"
//==========================================================================
// Zero the BSS.
// Notify modules that the kernel has been decoded
execute_hook("DecodedKernel", (void*)binary, NULL, NULL, NULL);
setupFakeEfi();
// Load boot drivers from the specifed root path.
LoadDrivers("/");
//if (!gHaveKernelCache)
LoadDrivers("/");
execute_hook("DriversLoaded", (void*)binary, NULL, NULL, NULL);
clearActivityIndicator();
if (gErrors) {
printf("Pausing %d seconds...\n", kBootErrorTimeout);
sleep(kBootErrorTimeout);
}
setupFakeEfi();
md0Ramdisk();
verbose("Starting Darwin %s\n",( archCpuType == CPU_TYPE_I386 ) ? "x86" : "x86_64");
}
bool dummyVal;
if (getBoolForKey(kWaitForKeypressKey, &dummyVal, &bootInfo->bootConfig) && dummyVal) {
printf("Press any key to continue...");
getchar();
if (getBoolForKey(kWaitForKeypressKey, &dummyVal, &bootInfo->chameleonConfig) && dummyVal) {
printf("(Wait) ");
pause();
}
usb_loop();
finalizeBootStruct();
if (checkOSVersion("10.7")) {
if (checkOSVersion("10.7")) {
// Masking out so that Lion doesn't doublefault
// outb(0x21, 0xff);/* Maskout all interrupts Pic1 */
// outb(0xa1, 0xff);/* Maskout all interrupts Pic2 */
bool firstRun = true;
bool instantMenu;
bool rescanPrompt;
unsigned int allowBVFlags = kBVFlagSystemVolume|kBVFlagForeignBoot;
unsigned int allowBVFlags = kBVFlagSystemVolume | kBVFlagForeignBoot;
unsigned int denyBVFlags = kBVFlagEFISystem;
// Set reminder to unload the PXE base code. Neglect to unload
setBootGlobals(bvChain);
// Load boot.plist config file
status = loadSystemConfig(&bootInfo->bootConfig);
status = loadChameleonConfig(&bootInfo->chameleonConfig);
if (getBoolForKey(kQuietBootKey, &quiet, &bootInfo->bootConfig) && quiet) {
if (getBoolForKey(kQuietBootKey, &quiet, &bootInfo->chameleonConfig) && quiet) {
gBootMode |= kBootModeQuiet;
}
// Override firstRun to get to the boot menu instantly by setting "Instant Menu"=y in system config
if (getBoolForKey(kInsantMenuKey, &instantMenu, &bootInfo->bootConfig) && instantMenu) {
if (getBoolForKey(kInsantMenuKey, &instantMenu, &bootInfo->chameleonConfig) && instantMenu) {
firstRun = false;
}
gEnableCDROMRescan = false;
// Enable it with Rescan=y in system config
if (getBoolForKey(kRescanKey, &gEnableCDROMRescan, &bootInfo->bootConfig) && gEnableCDROMRescan) {
if (getBoolForKey(kRescanKey, &gEnableCDROMRescan, &bootInfo->chameleonConfig) && gEnableCDROMRescan) {
gEnableCDROMRescan = true;
}
// Ask the user for Rescan option by setting "Rescan Prompt"=y in system config.
rescanPrompt = false;
if (getBoolForKey(kRescanPromptKey, &rescanPrompt , &bootInfo->bootConfig) && rescanPrompt && biosDevIsCDROM(gBIOSDev)) {
if (getBoolForKey(kRescanPromptKey, &rescanPrompt , &bootInfo->chameleonConfig) && rescanPrompt && biosDevIsCDROM(gBIOSDev)) {
gEnableCDROMRescan = promptForRescanOption();
}
// Enable touching a single BIOS device only if "Scan Single Drive"=y is set in system config.
if (getBoolForKey(kScanSingleDriveKey, &gScanSingleDrive, &bootInfo->bootConfig) && gScanSingleDrive) {
if (getBoolForKey(kScanSingleDriveKey, &gScanSingleDrive, &bootInfo->chameleonConfig) && gScanSingleDrive) {
gScanSingleDrive = true;
}
useGUI = true;
// Override useGUI default
getBoolForKey(kGUIKey, &useGUI, &bootInfo->bootConfig);
getBoolForKey(kGUIKey, &useGUI, &bootInfo->chameleonConfig);
if (useGUI && initGUI())
{
// initGUI() returned with an error, disabling GUI.
bool tryresume;
bool tryresumedefault;
bool forceresume;
bool usecache;
bool usecache = false;//true;
// additional variable for testing alternate kernel image locations on boot helper partitions.
char bootFileSpec[512];
} else {
archCpuType = CPU_TYPE_I386;
}
if (getValueForKey(karch, &val, &len, &bootInfo->bootConfig)) {
if (getValueForKey(karch, &val, &len, &bootInfo->chameleonConfig)) {
if (strncmp(val, "i386", 4) == 0) {
archCpuType = CPU_TYPE_I386;
}
}
if (getValueForKey(kKernelArchKey, &val, &len, &bootInfo->chameleonConfig)) {
if (strncmp(val, "i386", 4) == 0) {
archCpuType = CPU_TYPE_I386;
}
}
//archCpuType = CPU_TYPE_I386;
// Notify moduals that we are attempting to boot
execute_hook("PreBoot", NULL, NULL, NULL, NULL);
if (!getBoolForKey (kWake, &tryresume, &bootInfo->bootConfig)) {
if (!getBoolForKey (kWake, &tryresume, &bootInfo->chameleonConfig)) {
tryresume = true;
tryresumedefault = true;
} else {
tryresumedefault = false;
}
if (!getBoolForKey (kForceWake, &forceresume, &bootInfo->bootConfig)) {
if (!getBoolForKey (kForceWake, &forceresume, &bootInfo->chameleonConfig)) {
forceresume = false;
}
while (tryresume) {
const char *tmp;
BVRef bvr;
if (!getValueForKey(kWakeImage, &val, &len, &bootInfo->bootConfig))
if (!getValueForKey(kWakeImage, &val, &len, &bootInfo->chameleonConfig))
val="/private/var/vm/sleepimage";
// Do this first to be sure that root volume is mounted
HibernateBoot((char *)val);
break;
}
if(getBoolForKey(kUseKernelCache, &usecache, &bootInfo->bootConfig) && usecache) {
getBoolForKey(kUseKernelCache, &usecache, &bootInfo->chameleonConfig);
if(usecache) {
if (getValueForKey(kKernelCacheKey, &val, &len, &bootInfo->bootConfig)) {
strlcpy(gBootKernelCacheFile, val, len+1);
if(val[0] == '\\')
{
len--;
val++;
}
strlcpy(gBootKernelCacheFile, val, len+1);
}
else {
//Lion
// Reset cache name.
bzero(gCacheNameAdler + 64, sizeof(gCacheNameAdler) - 64);
sprintf(gCacheNameAdler + 64, "%s,%s", gRootDevice, bootInfo->bootFile);
sprintf(gCacheNameAdler + 64, "%s,%s", gRootDevice, bootInfo->chameleonConfig);
adler32 = Adler32((unsigned char *)gCacheNameAdler, sizeof(gCacheNameAdler));
// Check for cache file.
trycache = (usecache &&
((gBootMode & kBootModeSafe) == 0) &&
((gBootMode & kBootModeSafe) == 0) &&
!gOverrideKernel &&
(gBootFileType == kBlockDeviceType) &&
(gMKextName[0] == '\0') &&
verbose("Loading Darwin %s\n", gMacOSVersion);
if (trycache) do {
// if we haven't found the kernel yet, don't use the cache
ret = GetFileInfo(NULL, bootInfo->bootFile, &flags, &kerneltime);
if ((ret != 0) || ((flags & kFileTypeMask) != kFileTypeFlat)) {
if(ret != 0) kerneltime = 0;
else if ((flags & kFileTypeMask) != kFileTypeFlat) {
trycache = 0;
break;
}
ret = GetFileInfo(NULL, gBootKernelCacheFile, &flags, &cachetime);
if ((ret != 0) || ((flags & kFileTypeMask) != kFileTypeFlat)
|| (cachetime < kerneltime)) {
trycache = 0;
break;
}
if (kerneltime > exttime) {
if (ret == 0 && kerneltime > exttime) {
exttime = kerneltime;
}
if (cachetime != (exttime + 1)) {
if (ret == 0 && cachetime != (exttime + 1)) {
trycache = 0;
break;
}
do {
if (trycache) {
bootFile = gBootKernelCacheFile;
verbose("Loading kernel cache %s\n", bootFile);
verbose("Loading kernel cache %s\n", bootFile);
if (checkOSVersion("10.7")) {
ret = LoadThinFatFile(bootFile, &binary);
}
else {
ret = LoadFile(bootFile);
binary = (void *)kLoadAddr;
binary = (void *)kLoadAddr;
}
if (ret >= 0)
break;
verbose("Kernel cache did not loaded %s\n ", bootFile);
verbose("Kernel cache did not load %s\n ", bootFile);
}
bootFile = bootInfo->bootFile;
// Try to load kernel image from alternate locations on boot helper partitions.
ret = GetFileInfo(NULL, bootFileSpec, &flags, &time);
if (ret == -1)
{
// No alternate location found. Using the original kernel image path instead.
strcpy(bootFileSpec, bootFile);
// No alternate location found, using the original kernel image path.
strcpy(bootFileSpec, bootFile);
}
}
}
}
}
/*
* Selects a new BIOS device, taking care to update the global state appropriately.
/*!
Selects a new BIOS device, taking care to update the global state appropriately.
*/
/*
static void selectBiosDevice(void)
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#define __BOOT2_BOOT_H
#include "libsaio.h"
/*
* Paths used by chameleon
*/
//kernel cache
#define kDefaultCachePathLeo "/System/Library/Caches/com.apple.kernelcaches/"
#define kDefaultCachePathSnow "/System/Library/Caches/com.apple.kext.caches/Startup/"
// Lion installer
#define kLionInstallerDataFolder "/Mac OS X Install Data/"
#define kLionInstallerPlist kLionInstallerDataFolder "com.apple.Boot.plist"
/*
* Keys used in system Boot.plist
*/
#define kTextModeKey"Text Mode"
#define kQuietBootKey"Quiet Boot"
#define kKernelFlagsKey"Kernel Flags"
#define kKernelArchKey"Kernel Architecture"
#define karch"arch"/* boot.c */
#define kProductVersion"ProductVersion"/* boot.c */
#define kMKextCacheKey"MKext Cache"
#define kKernelNameKey"Kernel"
#define kKernelCacheKey"Kernel Cache"
#define kUseKernelCache"UseKernelCache"/* boot.c */
#define kBootDeviceKey"Boot Device"
#define kTimeoutKey"Timeout"
#define kRootDeviceKey"rd"
#define kDefaultKernel"mach_kernel"
#define kGUIKey"GUI"
#define kBootBannerKey"Boot Banner"
#define kShowInfoKey"ShowInfo"// gui.c
#define kWaitForKeypressKey"Wait"
#define kDSDT"DSDT"/* acpi_patcher.c */
#define kRestartFix"RestartFix"/* acpi_patcher.c */
#define kGeneratePStates"GeneratePStates"/* acpi_patcher.c */
#define kGenerateCStates"GenerateCStates"/* acpi_patcher.c */
#define kCSTUsingSystemIO"CSTUsingSystemIO"/* acpi_patcher.c */
#define kEnableC2States"EnableC2State"/* acpi_patcher.c */
#define kEnableC3States"EnableC3State"/* acpi_patcher.c */
#define kEnableC4States"EnableC4State"/* acpi_patcher.c */
#define kUseAtiROM"UseAtiROM"/* ati.c */
#define kAtiConfig"AtiConfig"/* ati.c */
#define kATYbinimage"ATYbinimage"/* ati.c */
#define kWake"Wake"/* boot.c */
#define kForceWake"ForceWake"/* boot.c */
#define kWakeImage"WakeImage"/* boot.c */
#define kProductVersion"ProductVersion"/* boot.c */
#define karch"arch"/* boot.c */
#define kUseKernelCache"UseKernelCache"/* boot.c */
#define kbusratio"busratio"/* cpu.c */
#define kHidePartition"Hide Partition"/* disk.c */
#define kRenamePartition"Rename Partition"/* disk.c */
#define kDefaultPartition"Default Partition"/* sys.c */
#define kSMBIOSKey"SMBIOS"/* fake_efi.c */
#define kSMBIOSdefaults"SMBIOSdefaults"/* smbios_patcher.c */
#define kSystemID"SystemId"/* fake_efi.c */
#define kSystemType"SystemType"/* fake_efi.c */
#define kUseMemDetect"UseMemDetect" /* platform.c */
#define kPCIRootUID"PCIRootUID"/* pci_root.c */
#define kUseAtiROM"UseAtiROM"/* ati.c */
#define kAtiConfig"AtiConfig"/* ati.c */
#define kATYbinimage"ATYbinimage"/* ati.c */
#define kUseNvidiaROM"UseNvidiaROM"/* nvidia.c */
#define kVBIOS"VBIOS"/* nvidia.c */
#define kDcfg0"display_0"/* nvidia.c */
#define kDcfg1"display_1"/* nvidia.c */
#define kPCIRootUID"PCIRootUID"/* pci_root.c */
#define kEthernetBuiltIn"EthernetBuiltIn"/* pci_setup.c */
#define kGraphicsEnabler"GraphicsEnabler"/* pci_setup.c */
#define kForceHPET"ForceHPET"/* pci_setup.c */
#define kUseMemDetect"UseMemDetect" /* platform.c */
#define kMD0Image"md0"/* ramdisk.h */
#define kSMBIOSdefaults"SMBIOSdefaults"/* smbios_patcher.c */
#define kDefaultPartition"Default Partition"/* sys.c */
#define kUSBBusFix"USBBusFix"/* usb.c */
#define kEHCIacquire"EHCIacquire"/* usb.c */
#define kUHCIreset"UHCIreset"/* usb.c */
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if(module_start && module_start != (void*)0xFFFFFFFF)
{
// Notify the system that it was laoded
module_loaded(module, NULL, NULL, 0, 0 /*moduleName, moduleVersion, moduleCompat*/);
module_loaded(module, NULL, NULL, 0, 0 /*moduleName, NULL, moduleVersion, moduleCompat*/);
(*module_start)();// Start the module
DBG("Module %s Loaded.\n", module); DBGPAUSE();
}
*/
long long add_symbol(char* symbol, long long addr, char is64)
{
if(is64) return 0xFFFFFFFF; // Fixme
// This only can handle 32bit symbols
symbolList_t* entry;
//DBG("Adding symbol %s at 0x%X\n", symbol, addr);
entry->addr = (UInt32)addr;
entry->symbol = symbol;
if(strcmp(symbol, "start") == 0)
if(!is64 && strcmp(symbol, "start") == 0)
{
return addr;
}
case LC_LOAD_DYLIB:
case LC_LOAD_WEAK_DYLIB ^ LC_REQ_DYLD:
// Required modules
dylibCommand = binary + binaryIndex;
char* module = binary + binaryIndex + ((UInt32)*((UInt32*)&dylibCommand->dylib.name));
// Possible enhancments: verify version
break;
case LC_ID_DYLIB:
dylibCommand = binary + binaryIndex;
//dylibCommand = binary + binaryIndex;
/*moduleName =binary + binaryIndex + ((UInt32)*((UInt32*)&dylibCommand->dylib.name));
moduleVersion =dylibCommand->dylib.current_version;
moduleCompat =dylibCommand->dylib.compatibility_version;
i++;
}
}
inline void bind_location(UInt32* location, char* value, UInt32 addend, int type)
{
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*
* @APPLE_LICENSE_HEADER_END@
*/
#include "boot.h"
#include "libsa.h"
static void
PreviewDecompress16(uint32_t * compressBuffer,
uint32_t width, uint32_t height, uint32_t row,
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#define LOADPNG(img, alt_img) if (loadThemeImage(#img, alt_img) != 0) { return 1; }
#define MIN(x, y) ((x) < (y) ? (x) : (y))
#define MAX(x, y) ((x) > (y) ? (x) : (y))
#define VIDEO(x) (bootArgs->Video.v_ ## x)
#define vram VIDEO(baseAddr)
int lasttime = 0; // we need this for animating maybe
extern int gDeviceCount;
/*
* ATTENTION: the enum and the following array images[] MUST match !!!
*/
iDeviceFreeBSD_o,/* FreeBSD/OpenBSD detection,nawcom's code by valv, Icon credits to blackosx */
iDeviceOpenBSD,/* FreeBSD/OpenBSD detection,nawcom's code by valv, Icon credits to blackosx */
iDeviceOpenBSD_o,/* FreeBSD/OpenBSD detection,nawcom's code by valv, Icon credits to blackosx */
iDeviceBEFS,/* Haiku detection and Icon credits to scorpius */
iDeviceBEFS_o,/* Haiku detection and Icon credits to scorpius */
iDeviceFAT,
iDeviceFAT_o,
iDeviceFAT16,
iDeviceFAT32_o,
iDeviceNTFS,
iDeviceNTFS_o,
iDeviceBEFS,/* Haiku detection and Icon credits to scorpius */
iDeviceBEFS_o,/* Haiku detection and Icon credits to scorpius */
iDeviceCDROM,
iDeviceCDROM_o,
{.name = "device_freebsd_o", .image = NULL},/* FreeBSD/OpenBSD detection,nawcom's code by valv, Icon credits to blackosx */
{.name = "device_openbsd", .image = NULL},/* FreeBSD/OpenBSD detection,nawcom's code by valv, Icon credits to blackosx */
{.name = "device_openbsd_o", .image = NULL},/* FreeBSD/OpenBSD detection,nawcom's code by valv, Icon credits to blackosx */
{.name = "device_befs", .image = NULL},/* Haiku detection and Icon credits to scorpius */
{.name = "device_befs_o", .image = NULL},/* Haiku detection and Icon credits to scorpius */
{.name = "device_fat", .image = NULL},
{.name = "device_fat_o", .image = NULL},
{.name = "device_fat16", .image = NULL},
{.name = "device_fat32_o", .image = NULL},
{.name = "device_ntfs", .image = NULL},
{.name = "device_ntfs_o", .image = NULL},
{.name = "device_befs", .image = NULL},/* Haiku detection and Icon credits to scorpius */
{.name = "device_befs_o", .image = NULL},/* Haiku detection and Icon credits to scorpius */
{.name = "device_cdrom", .image = NULL},
{.name = "device_cdrom_o", .image = NULL},
LOADPNG(device_freebsd_o, iDeviceFreeBSD);/* FreeBSD/OpenBSD detection,nawcom's code by valv, Icon credits to blackosx */
LOADPNG(device_openbsd, iDeviceGeneric);/* FreeBSD/OpenBSD detection,nawcom's code by valv, Icon credits to blackosx */
LOADPNG(device_openbsd_o, iDeviceOpenBSD);/* FreeBSD/OpenBSD detection,nawcom's code by valv, Icon credits to blackosx */
LOADPNG(device_befs, iDeviceGeneric);/* Haiku detection and Icon credits to scorpius */
LOADPNG(device_befs_o, iDeviceBEFS);/* Haiku detection and Icon credits to scorpius */
LOADPNG(device_fat, iDeviceGeneric);
LOADPNG(device_fat_o, iDeviceFAT);
LOADPNG(device_fat16, iDeviceFAT);
LOADPNG(device_fat32_o, iDeviceFAT_o);
LOADPNG(device_ntfs, iDeviceGeneric);
LOADPNG(device_ntfs_o, iDeviceNTFS);
LOADPNG(device_befs, iDeviceGeneric);/* Haiku detection and Icon credits to scorpius */
LOADPNG(device_befs_o, iDeviceBEFS);/* Haiku detection and Icon credits to scorpius */
LOADPNG(device_cdrom, iDeviceGeneric);
LOADPNG(device_cdrom_o, iDeviceCDROM);
intlen;
chardirspec[256];
getValueForKey( "Theme", &theme_name, &len, &bootInfo->bootConfig );
getValueForKey( "Theme", &theme_name, &len, &bootInfo->chameleonConfig );
if ((strlen(theme_name) + 27) > sizeof(dirspec)) {
return 1;
}
devicetype = iDeviceBEFS;// Use BEFS / Haiku icon
break;
case kPartitionTypeFreeBSD:/* FreeBSD/OpenBSD detection,nawcom's code by valv, Icon credits to blackosx */
devicetype = iDeviceFreeBSD;// Use FreeBSD icon
break;
case kPartitionTypeOpenBSD:/* FreeBSD/OpenBSD detection,nawcom's code by valv, Icon credits to blackosx */
devicetype = iDeviceOpenBSD;// Use OpenBSD icon
break;
case kPartitionTypeFAT16:
devicetype = iDeviceFAT16;// Use FAT16 icon
break;
devicetype = iDeviceEXT3;// Use EXT2/3 icon
break;
case kPartitionTypeFreeBSD:/* FreeBSD/OpenBSD detection,nawcom's code by valv, Icon credits to blackosx */
devicetype = iDeviceFreeBSD;// Use FreeBSD icon
break;
case kPartitionTypeOpenBSD:/* FreeBSD/OpenBSD detection,nawcom's code by valv, Icon credits to blackosx */
devicetype = iDeviceOpenBSD;// Use OpenBSD icon
break;
default:
devicetype = iDeviceGeneric;// Use Generic icon
break;
void drawDeviceList (int start, int end, int selection)
{
int i;
position_t p, p_prev, p_next;
inti;
boolshoWinfo = true; //Azi:showinfo
extern bool showBootBanner; //
position_tp, p_prev, p_next;
//uint8_tmaxDevices = MIN( gui.maxdevices, menucount );
if(gui.menu.draw)
drawInfoMenuItems();
#if DEBUG
gui.debug.cursor = pos( 10, 100);
dprintf( &gui.screen, "label %s\n", param->label );
dprintf( &gui.screen, "biosdev 0x%x\n", param->biosdev );
dprintf(&gui.screen, "width %d\n", gui.screen.width);
dprintf(&gui.screen, "height %d\n", gui.screen.height);
dprintf( &gui.screen, "type 0x%x\n", param->type );
dprintf( &gui.screen, "flags 0x%x\n", param->flags );
dprintf( &gui.screen, "part_no %d\n", param->part_no );
dprintf( &gui.screen, "part_boff 0x%x\n", param->part_boff );
dprintf( &gui.screen, "part_type 0x%x\n", param->part_type );
dprintf( &gui.screen, "bps 0x%x\n", param->bps );
dprintf( &gui.screen, "name %s\n", param->name );
dprintf( &gui.screen, "type_name %s\n", param->type_name );
dprintf( &gui.screen, "modtime %d\n", param->modTime );
#endif
//Azi: make this info more accessible.
getBoolForKey(kShowInfoKey, &shoWinfo, &bootInfo->chameleonConfig);
if (shoWinfo && showBootBanner) // no boot banner, no showinfo.
{
gui.debug.cursor = pos( 10, 100);
dprintf( &gui.screen, "label: %s\n", param->label );
dprintf( &gui.screen, "biosdev: 0x%x\n", param->biosdev );
dprintf( &gui.screen, "type: 0x%x\n", param->type );
dprintf( &gui.screen, "flags: 0x%x\n", param->flags );
dprintf( &gui.screen, "part_no: %d\n", param->part_no );
dprintf( &gui.screen, "part_boff: 0x%x\n", param->part_boff );
dprintf( &gui.screen, "part_type: 0x%x\n", param->part_type );
dprintf( &gui.screen, "bps: 0x%x\n", param->bps );
dprintf( &gui.screen, "name: %s\n", param->name );
dprintf( &gui.screen, "type_name: %s\n", param->type_name );
dprintf( &gui.screen, "modtime: %d\n", param->modTime );
dprintf( &gui.screen, "width: %d\n", gui.screen.width );
dprintf( &gui.screen, "height: %d\n", gui.screen.height );
//dprintf( &gui.screen, "attr: 0x%x\n", gui.screen.attr ); //Azi: reminder
//dprintf( &gui.screen, "mm: %d\n", gui.screen.mm );
}
}
drawDeviceIcon( param, gui.devicelist.pixmap, p, isSelected);
return;
}
void updateGraphicBootPrompt(int key)
void updateGraphicBootPrompt()
{
fillPixmapWithColor( gui.bootprompt.pixmap, gui.bootprompt.bgcolor);
// get the position of the end of the boot prompt text to display user input
position_t p_prompt = pos( p_text.x + ( ( strlen(prompt_text) ) * font_console.chars[0]->width ), p_text.y );
// calculate the position of the cursor
intoffset = ( strlen(gBootArgs) - ( ( gui.bootprompt.width / font_console.chars[0]->width ) - strlen(prompt_text) - 2 ) );
if ( offset < 0)
offset = 0;
drawStr( gBootArgs, &font_console, gui.bootprompt.pixmap, p_prompt);
}
}
struct putc_info //Azi: same as below
struct putc_info //Azi: exists on console.c & printf.c
{
char * str;
char * last_str;
};
static int
sputc(int c, struct putc_info * pi) //Azi: exists on console.c & printf.c
sputc(int c, struct putc_info * pi) //Azi: same as above
{
if (pi->last_str)
if (pi->str == pi->last_str) {
bool legacy_logo;
uint16_t x, y;
if (getBoolForKey("Legacy Logo", &legacy_logo, &bootInfo->bootConfig) && legacy_logo) {
if (getBoolForKey("Legacy Logo", &legacy_logo, &bootInfo->chameleonConfig) && legacy_logo) {
usePngImage = false;
} else if (bootImageData == NULL) {
loadBootGraphics();
setVideoMode(GRAPHICS_MODE, 0);
}
if (getValueForKey("-checkers", &dummyVal, &length, &bootInfo->bootConfig)) {
if (getValueForKey("-checkers", &dummyVal, &length, &bootInfo->chameleonConfig)) {
drawCheckerBoard();
} else {
// Fill the background to 75% grey (same as BootX).
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bool "Module System"
default y
---help---
Say Y here if you want to enable to use of modules.
Say Y here if you want to enable the use of modules.
config MODULE_DEBUG
bool "debug support"
bool "Embed Theme"
default n
---help---
Say Y here if you want compile in a default theme.
Say Y here if you want compile in the default theme (Embed).
config EMBEDED_THEME
string "Theme name"
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*/
#ifndef __BOOT2_GUI_H
#define __BOOT2_GUI_H
#include "boot.h"
#include "bootstruct.h"
#include "graphics.h"
#include "graphic_utils.h"
#include "picopng.h"
#ifndef __BOOT2_GUI_H
#define __BOOT2_GUI_H
#define CHARACTERS_COUNT223
#define BOOT_NORMAL0
#define BOOT_NORMAL0
#define BOOT_VERBOSE1
#define BOOT_IGNORECACHE2
#define BOOT_SINGLEUSER3
#define DO_NOT_BOOT4
#define DO_NOT_BOOT4
#define CLOSE_INFO_MENU5
#define INFOMENU_NATIVEBOOT_START 1
#define INFOMENU_NATIVEBOOT_END3
#define INFOMENU_NATIVEBOOT_START1
#define INFOMENU_NATIVEBOOT_END3
#define MENU_SHOW_MEMORY_INFO4
#define MENU_SHOW_VIDEO_INFO5
#define MENU_SHOW_HELP6
#define MENU_SHOW_MEMORY_INFO4
#define MENU_SHOW_VIDEO_INFO5
#define MENU_SHOW_HELP6
enum {
HorizontalLayout= 0,
VerticalLayout= 1,
VerticalLayout= 1
};
enum {
kBackspaceKey= 0x08,
kTabKey= 0x09,
kReturnKey= '\n',
kEscapeKey= 0x1b,
kUpArrowkey= 0x4800,
kTabKey= 0x09,
kReturnKey= '\r',
kEscapeKey= 0x1b,
kUpArrowkey= 0x4800,
kDownArrowkey= 0x5000,
kASCIIKeyMask= 0x7f,
kF5Key= 0x3f00,
kF10Key= 0x4400
kF5Key= 0x3f00,
kF10Key= 0x4400
};
/*
void showGraphicBootPrompt();
void clearGraphicBootPrompt();
void updateGraphicBootPrompt(int key);
void updateGraphicBootPrompt();
void updateVRAM();
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if(getValueForKey(kMD0Image, &override_filename, &len,
&bootInfo->bootConfig))
&bootInfo->chameleonConfig))
{
// Use user specified md0 file
sprintf(filename, "%s", override_filename);
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#include "embedded.h"
#include "pci.h"
bool showBootBanner = true; //Azi:showinfo
static bool shouldboot = false;
extern int multiboot_timeout;
}
}
if( bootArgs->Video.v_display == GRAPHICS_MODE )
if( bootArgs->Video.v_display != VGA_TEXT_MODE )
{
drawProgressBar( gui.screen.pixmap, 100, gui.progressbar.pos , ( multi * 100 / multi_buff ) );
gui.redraw = true;
gBootArgsPtr = gBootArgs;
memset(gBootArgs, '\0', BOOT_STRING_LEN);
if (bootArgs->Video.v_display == GRAPHICS_MODE) {
if (bootArgs->Video.v_display != VGA_TEXT_MODE) {
clearGraphicBootPrompt();
}
}
extern char bootRescanPrompt[];
if( bootArgs->Video.v_display == VGA_TEXT_MODE ) {
changeCursor( strlen(gBootArgs), row, kCursorTypeUnderline, 0 );
//clearScreenRows( row, kScreenLastRow );
changeCursor( 0, row, kCursorTypeUnderline, 0 );
clearScreenRows( row, kScreenLastRow );
}
//clearBootArgs();
}
}
} else {
if (bootArgs->Video.v_display == GRAPHICS_MODE) {
if (bootArgs->Video.v_display != VGA_TEXT_MODE) {
//clearGraphicBootPrompt();
} else {
printf("Press Enter to start up the foreign OS. ");
case kBackspaceKey:
if ( gBootArgsPtr > gBootArgs )
{
*--gBootArgsPtr = '\0';
int x, y, t;
getCursorPositionAndType( &x, &y, &t );
if ( x == 0 && y )
{
x = 80; y--;
}
if (x)
x--;
if (x) x--;
if( bootArgs->Video.v_display == VGA_TEXT_MODE )
{
setCursorPosition( x, y, 0 );
putca(' ', 0x07, 1);
}
*gBootArgsPtr-- = '\0';
updateGraphicBootPrompt(kBackspaceKey);
}
else
{
*gBootArgsPtr = '\0';
if( bootArgs->Video.v_display == VGA_TEXT_MODE ) putca(' ', 0x07, 1);
updateGraphicBootPrompt(kBackspaceKey);
}
else
{
updateGraphicBootPrompt();
}
}
break;
default:
if ( key >= ' ' && gBootArgsPtr < gBootArgsEnd)
{
*gBootArgsPtr++ = key;
updateGraphicBootPrompt(key);
if( bootArgs->Video.v_display != VGA_TEXT_MODE ) updateGraphicBootPrompt();
else if ( key >= ' ' && key < 0x7f) putchar(key);
}
break;
gMenuHeight= height;
gMenuItemCount= count;
gMenuTop= 0;
gMenuBottom= min( count, height ) - 1;
gMenuBottom= MIN( count, height ) - 1;
gMenuSelection= selection;
gMenuStart= 0;
gMenuEnd = min( count, gui.maxdevices ) - 1;
gMenuEnd = MIN( count, gui.maxdevices ) - 1;
// If the selected item is not visible, shift the list down.
// Draw the visible items.
if( bootArgs->Video.v_display == GRAPHICS_MODE )
if( bootArgs->Video.v_display != VGA_TEXT_MODE )
drawDeviceList(gMenuStart, gMenuEnd, gMenuSelection);
if ( gMenuItems == NULL )
return 0;
if( bootArgs->Video.v_display == GRAPHICS_MODE )
if( bootArgs->Video.v_display != VGA_TEXT_MODE )
{
int res;
}
// ensure we're in graphics mode if gui is setup
if (gui.initialised && bootArgs->Video.v_display == VGA_TEXT_MODE)
if (firstRun && gui.initialised && bootArgs->Video.v_display == VGA_TEXT_MODE)
{
setVideoMode(GRAPHICS_MODE, 0);
}
// Allow user to override default timeout.
if (multiboot_timeout_set) {
timeout = multiboot_timeout;
} else if (!getIntForKey(kTimeoutKey, &timeout, &bootInfo->bootConfig)) {
} else if (!getIntForKey(kTimeoutKey, &timeout, &bootInfo->chameleonConfig)) {
/* If there is no timeout key in the file use the default timeout
which is different for CDs vs. hard disks. However, if not booting
a CD and no config file could be loaded set the timeout
int cnt;
int optionKey;
if (getValueForKey(kCDROMPromptKey, &val, &cnt, &bootInfo->bootConfig)) {
if (getValueForKey(kCDROMPromptKey, &val, &cnt, &bootInfo->chameleonConfig)) {
prompt = malloc(cnt + 1);
strncat(prompt, val, cnt);
} else {
free(name);
}
if (getIntForKey( kCDROMOptionKey, &optionKey, &bootInfo->bootConfig )) {
if (getIntForKey( kCDROMOptionKey, &optionKey, &bootInfo->chameleonConfig )) {
// The key specified is a special key.
} else {
// Default to F8.
}
}
if (bootArgs->Video.v_display == GRAPHICS_MODE) {
if (bootArgs->Video.v_display != VGA_TEXT_MODE) {
// redraw the background buffer
gui.logo.draw = true;
drawBackground();
gui.devicelist.draw = true;
gui.redraw = true;
if (!(gBootMode & kBootModeQuiet)) {
bool showBootBanner = true;
// Check if "Boot Banner"=N switch is present in config file.
getBoolForKey(kBootBannerKey, &showBootBanner, &bootInfo->bootConfig);
getBoolForKey(kBootBannerKey, &showBootBanner, &bootInfo->chameleonConfig);
if (showBootBanner) {
// Display banner and show hardware info.
gprintf(&gui.screen, bootBanner + 1, (bootInfo->convmem + bootInfo->extmem) / 1024);
printf("Use \30\31 keys to select the startup volume.");
}
showMenu( menuItems, gDeviceCount, selectIndex, kMenuTopRow + 2, kMenuMaxItems );
nextRow += min( gDeviceCount, kMenuMaxItems ) + 3;
nextRow += MIN( gDeviceCount, kMenuMaxItems ) + 3;
}
// Show the boot prompt.
showBootPrompt( nextRow, showPrompt );
do {
if (bootArgs->Video.v_display == GRAPHICS_MODE) {
if (bootArgs->Video.v_display != VGA_TEXT_MODE) {
// redraw background
memcpy( gui.backbuffer->pixels, gui.screen.pixmap->pixels, gui.backbuffer->width * gui.backbuffer->height * 4 );
// reset cursor co-ords
* TODO: this needs to be refactored.
*/
if (strcmp( booterCommand, "video" ) == 0) {
if (bootArgs->Video.v_display == GRAPHICS_MODE) {
if (bootArgs->Video.v_display != VGA_TEXT_MODE) {
showInfoBox(getVBEInfoString(), getVBEModeInfoString());
} else {
printVBEModeInfo();
}
} else if ( strcmp( booterCommand, "memory" ) == 0) {
if (bootArgs->Video.v_display == GRAPHICS_MODE ) {
if (bootArgs->Video.v_display != VGA_TEXT_MODE ) {
showInfoBox("Memory Map", getMemoryInfoString());
} else {
printMemoryInfo();
// Switch between text & graphic interfaces
// Only Permitted if started in graphics interface
if (useGUI) {
if (bootArgs->Video.v_display == GRAPHICS_MODE) {
if (bootArgs->Video.v_display != VGA_TEXT_MODE) {
setVideoMode(VGA_TEXT_MODE, 0);
setCursorPosition(0, 0, 0);
if (gDeviceCount) {
printf("Use \30\31 keys to select the startup volume.");
showMenu(menuItems, gDeviceCount, selectIndex, kMenuTopRow + 2, kMenuMaxItems);
nextRow += min(gDeviceCount, kMenuMaxItems) + 3;
nextRow += MIN(gDeviceCount, kMenuMaxItems) + 3;
}
showPrompt = (gDeviceCount == 0) || (menuBVR->flags & kBVFlagNativeBoot);
gui.redraw = true;
setVideoMode(GRAPHICS_MODE, 0);
updateVRAM();
updateGraphicBootPrompt();
}
}
key = 0;
} else if (getValueForBootKey(kernelFlags, argName, &val, &cnt)) {
// Don't copy; these values will be copied at the end of argument processing.
found = true;
} else if (getValueForKey(argName, &val, &cnt, &bootInfo->bootConfig)) {
} else if (getValueForKey(argName, &val, &cnt, &bootInfo->chameleonConfig)) {
copyArgument(argName, val, cnt, argP, cntRemainingP);
found = true;
}
// Load com.apple.Boot.plist from the selected volume
// and use its contents to override default bootConfig.
// This is not a mandatory opeartion anymore.
loadOverrideConfig(&bootInfo->overrideConfig);
loadSystemConfig(&bootInfo->bootConfig);
loadChameleonConfig(&bootInfo->chameleonConfig);
// Use the kernel name specified by the user, or fetch the name
// in the config table, or use the default if not specified.
uuidSet = true;
}
}
if (!uuidSet && gBootVolume->fs_getuuid && gBootVolume->fs_getuuid (gBootVolume, uuidStr) == 0) {
verbose("Setting boot-uuid to: %s\n", uuidStr);
copyArgument(kBootUUIDKey, uuidStr, strlen(uuidStr), &argP, &cntRemaining);
uuidSet = true;
}
}
if (!processBootArgument(kRootDeviceKey, cp, configKernelFlags, bootInfo->config, &argP, &cntRemaining, gRootDevice)) {
cnt = 0;
if ( getValueForKey( kBootDeviceKey, &val, &cnt, &bootInfo->bootConfig)) {
if ( getValueForKey( kBootDeviceKey, &val, &cnt, &bootInfo->chameleonConfig)) {
valueBuffer[0] = '*';
cnt++;
strlcpy(valueBuffer + 1, val, cnt);
if(!shouldboot)
{
gVerboseMode = getValueForKey( kVerboseModeFlag, &val, &cnt, &bootInfo->bootConfig ) ||
getValueForKey( kSingleUserModeFlag, &val, &cnt, &bootInfo->bootConfig );
gVerboseMode = getValueForKey( kVerboseModeFlag, &val, &cnt, &bootInfo->chameleonConfig ) ||
getValueForKey( kSingleUserModeFlag, &val, &cnt, &bootInfo->chameleonConfig );
gBootMode = ( getValueForKey( kSafeModeFlag, &val, &cnt, &bootInfo->bootConfig ) ) ?
gBootMode = ( getValueForKey( kSafeModeFlag, &val, &cnt, &bootInfo->chameleonConfig ) ) ?
kBootModeSafe : kBootModeNormal;
if ( getValueForKey( kIgnoreCachesFlag, &val, &cnt, &bootInfo->bootConfig ) ) {
if ( getValueForKey( kIgnoreCachesFlag, &val, &cnt, &bootInfo->chameleonConfig ) ) {
gBootMode = kBootModeSafe;
}
}
intline_offset;
intc;
if (bootArgs->Video.v_display == GRAPHICS_MODE) {
if (bootArgs->Video.v_display != VGA_TEXT_MODE) {
showInfoBox( "Press q to quit\n",buf );
return;
}
void showHelp(void)
{
if (bootArgs->Video.v_display == GRAPHICS_MODE) {
if (bootArgs->Video.v_display != VGA_TEXT_MODE) {
showInfoBox("Help. Press q to quit.\n", (char *)BootHelp_txt);
} else {
showTextBuffer((char *)BootHelp_txt, BootHelp_txt_len);
branches/iFabio/Chameleon/i386/config/Makefile
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DIR = util
include ${SRCROOT}/Make.rules
OBJECTS = cconfig.o32 cconfig.o64 zconf.tab.o32 zconf.tab.o64 \
yesno.o32 yesno.o64 textbox.o32 textbox.o64 menubox.o32 \
menubox.o64 checklist.o32 checklist.o64 inputbox.o32 inputbox.o64
OBJECTS = cconfig.o32 cconfig.o64 zconf.tab.o32 zconf.tab.o64 yesno.o32 yesno.o64 textbox.o32 textbox.o64 menubox.o32 menubox.o64 checklist.o32 checklist.o64 inputbox.o32 inputbox.o64
DEFINES = -DKBUILD_NO_NLS -DCURSES_LOC=\<ncurses.h\> -DPATH_MAX=256 -DPACKAGE=\"chameleon\"
LDFLAGS = -lncurses -lmenu
PROGRAMS = cconfig
SYMPROG = $(addprefix $(SYMROOT)/, $(PROGRAMS))
DIRS_NEEDED = $(OBJROOT) $(SYMROOT)
all: $(DIRS_NEEDED) $(SYMPROG)
$(SYMPROG): $(addprefix $(OBJROOT)/, $(OBJECTS))
@echo "\t[LD32] $(@F)_32"
@$(CC) $(CFLAGS) $(LDFLAGS) $(DEFINES) -arch i386 -o $(SYMROOT)/$(@F)_32 $(OBJROOT)/*.o32
branches/iFabio/Chameleon/i386/modules/uClibcxx/Cconfig
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default m
depends on KLIBC_MODULE
---help---
Say Y here if you want to enable to use of this module.
Say Y here if you want to enable the use of this module.
branches/iFabio/Chameleon/i386/modules/Resolution/915resolution.c
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if((id & 0x0000FFFF) == 0x00008086) // Intel chipset
{
//printf("Unknown chipset 0x%llX, please email id to meklort@gmail.com", id);
//getchar();
//getc();
type = CT_UNKNOWN_INTEL;
//type = CT_UNKNOWN;
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//int val;
static UInt32 xResolution, yResolution, bpResolution;
/*
if(getIntForKey(kScreenWidth, &val, &bootInfo->bootConfig))
if(getIntForKey(kScreenWidth, &val, &bootInfo->chameleonConfig))
{
xResolution = val;
}
if(getIntForKey(kScreenHeight, &val, &bootInfo->bootConfig))
if(getIntForKey(kScreenHeight, &val, &bootInfo->chameleonConfig))
{
yResolution = val;
}
branches/iFabio/Chameleon/i386/modules/Resolution/Cconfig
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tristate "Resolution Module"
default m
---help---
Say Y here if you want to enable to use of this module.
Say Y here if you want to enable the use of this module.
branches/iFabio/Chameleon/i386/modules/klibc/Cconfig
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tristate "klibc Module"
default m
---help---
Say Y here if you want to enable to use of this module.
Say Y here if you want to enable the use of this module.
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* family is built
*/
#include "libsaio.h"
//#include "libsaio.h"
//Azi: "UCHAR_MAX" & "UINT_MAX" redefined error - limits.h is also present in i386/include.
#include "libsa.h"
#include "limits.h"
enum flags {
FL_ZERO= 0x01,/* Zero modifier */
FL_MINUS= 0x02,/* Minus modifier */
branches/iFabio/Chameleon/i386/modules/klibc/vsscanf.c
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*/
#include "libsaio.h"
//#include "libsaio.h"
//Azi: "UCHAR_MAX" & "UINT_MAX" redefined error - limits.h is also present in i386/include.
#include "libsa.h"
#include "limits.h"
extern uintmax_t strntoumax(const char *nptr, char **endptr, int base, size_t n);
#ifndef LONG_BIT
branches/iFabio/Chameleon/i386/modules/HelloWorld/Cconfig
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default n
depends on UCLIBCXX_MODULE
---help---
Say Y here if you want to enable to use of this module.
Say Y here if you want to enable the use of this module.
branches/iFabio/Chameleon/i386/modules/HelloWorld/HelloWorld.cpp
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printf("Hello world from ExecKernel hook. Binary located at 0x%X\n", binary);
getchar();
//
}
void HelloWorld_start()
//printf("Hooking 'ExecKernel'\n");
register_hook_callback("ExecKernel", &helloWorld);
register_hook_callback("Kernel Start", &helloWorld);
}
void HW::printHello()
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DEFINES=
CONFIG = hd
LIBSAIODIR = $(SRCROOT)/i386/libsaio
INC = -I$(LIBSAIODIR)
INC = -I$(LIBSAIODIR)
ifeq (${CONFIG_MODULES}, y)
branches/iFabio/Chameleon/i386/libsa/printf.c
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#include "libsa.h"
struct putc_info //Azi: same as below
struct putc_info //Azi: exists on console.c & gui.c
{
char * str;
char * last_str;
};
static int
sputc(int c, struct putc_info * pi) //Azi: exists on console.c & gui.c
sputc(int c, struct putc_info * pi) //Azi: same as above
{
if (pi->last_str)
if (pi->str == pi->last_str) {
branches/iFabio/Chameleon/i386/libsa/zalloc.c
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size_t zalloced_size;
#endif
#define ZALLOC_NODES16384
#define ZALLOC_NODES32767 /* was 16384 */
static void malloc_error(char *addr, size_t size, const char *file, int line)
{
branches/iFabio/Chameleon/i386/libsa/qsort.c
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#include <sys/types.h>
#include <stdlib.h>
#include <sys/param.h>
static inline char*med3 __P((char *, char *, char *, int (*)()));
static inline void swapfunc __P((char *, char *, int, int));
#define min(a, b)(a) < (b) ? a : b
/*
* Qsort routine from Bentley & McIlroy's "Engineering a Sort Function".
*/
}
pn = a + n * es;
r = min(pa - (char *)a, pb - pa);
r = MIN(pa - (char *)a, pb - pa);
vecswap(a, pb - r, r);
r = min(pd - pc, (pn - pd) - (int)es);
r = MIN(pd - pc, (pn - pd) - (int)es);
vecswap(pb, pn - r, r);
if ((r = pb - pa) > (int)es)
qsort(a, r / es, es, cmp);
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"RC_CFLAGS=$(RC_CFLAGS)" $@ \
) || exit $$?; \
done
config rebuild_config:
@for i in config; \
do \
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#include "part.h"
#include "cmd.h"
#include "auto.h"
#define MAX(a, b) ((a) >= (b) ? (a) : (b))
int
branches/iFabio/Chameleon/package/smbios.plist
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<dict>
<key>SMbiosversion</key>
<string>MP31.88Z.00C1.B00.0802091544</string>
<key>SMmanufacter</key>
<key>SMmanufacturer</key>
<string>Apple Inc.</string>
<key>SMproductname</key>
<string>MacPro3,1</string>
<string>19</string>
<key>SMmemspeed</key>
<string>800</string>
<key>SMmemmanufacter_1</key>
<key>SMmemmanufacturer_1</key>
<string>0xAD00000000000000</string>
<key>SMmemserial_1</key>
<string>0x00001020</string>
<key>SMmempart_1</key>
<string>0x48594D503131325336344350362D59352020</string>
<key>SMmemmanufacter_2</key>
<key>SMmemmanufacturer_2</key>
<string>0xAD00000000000000</string>
<key>SMmemserial_2</key>
<string>0x00003021</string>
<key>SMmempart_2</key>
<string>0x48594D503131325336344350362D59352020</string>
<key>SMmemmanufacter_3</key>
<key>SMmemmanufacturer_3</key>
<string>0xAD00000000000000</string>
<key>SMmemserial_3</key>
<string>0x00003021</string>
<key>SMmempart_3</key>
<string>0x48594D503131325336344350362D59352020</string>
<key>SMmemmanufacter_4</key>
<key>SMmemmanufacturer_4</key>
<string>0xAD00000000000000</string>
<key>SMmemserial_4</key>
<string>0x00003021</string>
<string>0x48594D503131325336344350362D59352020</string>
</dict>
</plist>
<!--
missing on the example above:
SMbiosvendor
SMbiosdate
SMfamily
SMboardmanufacturer
SMboardproduct
SMmemdevloc
SMmembankloc
SMcputype
SMbusspeed
-->
branches/iFabio/Chameleon/package/Kexts/AHCIPortInjector.kext/Contents/Info.plist
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<key>Vendor Name</key>
<string>Unknown </string>
</dict>
<key>MCP79BAHCI</key>
<dict>
<key>CFBundleIdentifier</key>
<string>com.apple.driver.AppleAHCIPort</string>
<key>Chipset Name</key>
<string>MCP79 AHCI</string>
<key>IOClass</key>
<string>AppleMCP79AHCI</string>
<key>IOPCIPrimaryMatch</key>
<string>0x0ab810de</string>
<key>IOProbeScore</key>
<integer>2000</integer>
<key>IOProviderClass</key>
<string>IOPCIDevice</string>
<key>Vendor Name</key>
<string>NVidia</string>
</dict>
<key>JMicronAHCI</key>
<dict>
<key>CFBundleIdentifier</key>
<key>Vendor Name</key>
<string>Intel</string>
</dict>
<key>MCP79BAHCI</key>
<dict>
<key>CFBundleIdentifier</key>
<string>com.apple.driver.AppleAHCIPort</string>
<key>Chipset Name</key>
<string>MCP79 AHCI</string>
<key>IOClass</key>
<string>AppleMCP79AHCI</string>
<key>IOPCIPrimaryMatch</key>
<string>0x0ab810de</string>
<key>IOProbeScore</key>
<integer>2000</integer>
<key>IOProviderClass</key>
<string>IOPCIDevice</string>
<key>Vendor Name</key>
<string>NVidia</string>
</dict>
</dict>
<key>OSBundleRequired</key>
<string>Local-Root</string>
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TODO List for Chameleon Boot Loader
====================================
- Fix boot prompt parsing.
- Bring code closer to coding_standards.txt.
- Create a dummy module for any modules that are compiled in. This is needed for linking modules with
dependencies that are not compiled in.
- Fix the module system when booting chameleon with multiboot. Cleanup the xcode 4 fix.
- Integrate Prasys current work on options and quick shortcut modified version of 18seven
DONE
- Create a dummy module for any modules that are compiled in. This is needed for linking modules with
dependencies that are not compiled in.
- Add a more sophisticated acpi loading mechanism to enable loading custom acpi tables when dsdtdrop=y
Here's a specification to think about:
First we must care about if a forced DSDT full path has been specified
The preferred internal behavior of the log info ioreg buffer
would be to store the messages in a consolidated buffer then only write once,
this buffer (i.e just before call the kernel) with flushLogToIOREG();
this buffer (i.e just before call the kernel) with flushLogToIOREG();
The other public function for writing chameleon boot info data would be:
verbose() should incorporate a call to logMessageToIOREG()
branches/iFabio/Chameleon/doc/BootHelp.txt
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The boot: prompt waits for you to type advanced startup options.
If you don't type anything, the computer continues starting up normally. It
uses the kernel and configuration files on the startup device, which it also
uses as the root device.
uses as the root device.
Advanced startup options use the following syntax:
Example: mach_kernel rd=disk0s1 -v "Graphics Mode"="1920x1200x32"
If the computer won't start up properly, you may be able to start it up
using safe mode. Type -x to start up in safe mode, which ignores all
If the computer won't start up properly, you may be able to start it up
using safe mode. Type -x to start up in safe mode, which ignores all
cached driver files.
Special booter hotkeys:
-----------------------
F5 Rescan optical drive.
F10 Scan and display all BIOS accessible drives.
F5 Rescans optical drive.
F10 Scans and displays all BIOS accessible drives.
Special booter commands:
-----------------------
?memory Displays information about the computer's memory.
?video Displays VESA video modes supported by the computer's BIOS.
?norescan Leaves optical drive rescan mode.
Additional useful command-line options:
---------------------------------------
config=<file> Use an alternate Boot.plist file.
Options useful in the com.apple.Boot.plist file:
------------------------------------------------
Options useful in the org.chameleon.Boot.plist file:
Wait=Yes|No Prompt for a key press before starting the kernel.
"Quiet Boot"=Yes|No Use quiet boot mode (no messages or prompt).
Timeout=8 Number of seconds to pause at the boot: prompt.
"Instant Menu"=Yes Force displaying the partition selection menu.
"Instant Menu"=Yes Force displaying the partition selection menu.
"Default Partition" Sets the default boot partition,
=hd(x,y)|UUID|"Label" Specified as a disk/partition pair, an UUID, or a
=hd(x,y)|UUID|"Label" Specified as a disk/partition pair, an UUID, or a
label enclosed in quotes.
"Hide Partition" Remove unwanted partition(s) from the boot menu.
=partition Specified, possibly multiple times, as hd(x,y), an
[;partition2 ...] UUID or label enclosed in quotes.
"Rename Partition" Rename partition(s) for the boot menu.
=partition <alias> Where partition is hd(x,y), UUID or label enclosed
[;partition2 <alias2> in quotes. The alias can optionally be quoted too.
[;partition2 <alias2> in quotes. The alias can optionally be quoted too.
...]
GUI=No Disable the GUI (enabled by default).
"Boot Banner"=Yes|No Show boot banner in GUI mode (enabled by default).
ShowInfo=No Disables display of partition and resolution details.
"Boot Banner"=No will also disable this info.
"Legacy Logo"=Yes|No Use the legacy grey apple logo (disabled by default).
PciRoot=<value> Use an alternate value for PciRoot (default value 0).
UseKernelCache=Yes|No Default is No. Yes will load pre-linked kernel and will
UseKernelCache=Yes|No Default is No. Yes will load pre-linked kernel and will
ignore /E/E and /S/L/E/Extensions.mkext.
GraphicsEnabler=Yes|No Automatic device-properties generation for gfx cards.
AtiConfig=<cardcfg> Use a different card config
UseAtiROM=Yes|No Use an alternate Ati ROM image
(path: /Extra/<vendorid>_<devid>_<subsysid>.rom)
UseNvidiaROM=Yes|No Use an alternate Nvidia ROM image
(path: /Extra/<vendorid>_<devid>.rom)
UseAtiROM=Yes|No Use an alternate Ati ROM image
(path: /Extra/<vendorid>_<devid>_<subsysid>.rom)
UseNvidiaROM=Yes|No Use an alternate Nvidia ROM image
(path: /Extra/<vendorid>_<devid>.rom)
VBIOS=Yes|No Inject NVIDIA VBIOS into device-properties.
display_0=<value> Inject alternate value of display-cfg into NVDA,Display-A@0 (HEX).
display_1=<value> Inject alternate value of display-cfg into NVDA,Display-B@1 (HEX).
EthernetBuiltIn=Yes|No Automatic "built-in"=yes device-properties generation
for ethernet interfaces.
Wake=No Disable wake up after hibernation (default: enabled).
ForceWake=Yes Force using the sleepimage (disabled by default).
WakeImage=<file> Use an alternate sleepimage file.
WakeImage=<file> Use an alternate sleepimage file.
(default path is /private/var/vm/sleepimage).
DropSSDT=Yes Skip the SSDT tables while relocating the ACPI tables.
DSDT=<file> Use an alternate DSDT.aml file
DSDT=<file> Use an alternate DSDT.aml file
(default paths:
/DSDT.aml /Extra/DSDT.aml bt(0,0)/Extra/DSDT.aml).
GenerateCStates=Yes Enable auto generation of processor idle sleep states
(C-States).
(C-States).
GeneratePStates=Yes Enable auto generation of processor power performance
states (P-States).
states (P-States).
EnableC2State=Yes Enable specific Processor power state, C2.
EnableC3State=Yes Enable specific Processor power state, C3.
EnableC4State=Yes Enable specific Processor power state, C4.
SMBIOS=<file> Use an alternate SMBIOS.plist file
SMBIOS=<file> Use an alternate SMBIOS.plist file
(default paths:
/Extra/SMBIOS.plist bt(0,0)/Extra/SMBIOS.plist).
smbios.plist doesn't exist, factory values are kept.
"Scan Single Drive" Scan the drive only where the booter got loaded from.
=Yes|No Fix rescan pbs when using a DVD reader in AHCI mode.
=Yes|No Fix rescan pbs when using a DVD reader in AHCI mode.
Rescan=Yes Enable CD-ROM rescan mode.
"Rescan Prompt"=Yes Prompts for enable CD-ROM rescan mode.
SystemId=<UUID> Set manually the system id UUID,
SMUUID in smbios config (reserved field) isn't used.
SystemType=<n> Set the system type where n is between 0..6
(default =1 (Desktop)
(default =1 (Desktop)
md0=<file> Load raw img file into memory for use as XNU's md0
ramdisk. /Extra/Postboot.img is used otherwise.
branches/iFabio/Chameleon/doc/README
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Features
--------
- Device Property Injection via device-properties string in com.apple.Boot.plist
- Device Property Injection via device-properties string in org.chameleon.Boot.plist
- hybrid boot0+boot1h loaders for both MBR and GPT partitioned disks.
- automatic FSB detection code even for recent AMD CPUs.
- Apple Software RAID support.
branches/iFabio/Chameleon/CHANGES
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- Added NVidia ION AHCI controllers dev id to AHCIPortInjector kext.
Forgot to mention source on the commit: http://forum.voodooprojects.org/index.php/topic,1170.0.html
- Renamed com.apple.Boot.plist to org.chameleon.Boot.plist.
- Added "ShowInfo" key (enabled by default for now), which enables/disables the display of
partition and resolution related info, on the Gui.
This info may not play well with some custom themes.
- Modules can now be selected between not compiled, compiled into chameleon, or compiled as modules.
- New makefile + configuration system.
- Added the BOOT2_MAX_LENGTH constant in memory.h. This is now used in mboot.c to relocate the correct
number of bytes for boot2.
- Added new ATi/AMD Graphics Card Enabler.
- Added new SMBIOS patcher.
Includes changes to "manufacter" keys, from SM*manufacter to SM*manufacturer.
- Added module system.
- Added automatic P-States & C-States generation for native power management.
- Added Booter Log Dump Tool
- Optimized cursor spinout in textmode if no verbose mode is set
- Added ram table structures definitions
- Added getSmbios() a param permitting to select between orig and new smbios entries
- Changed "Default Partition" behaviour to accept only native system volumes or foreign partitions.
- Changed "Default Partition" behavior to accept only native system volumes or foreign partitions.
- Added NVIDIA new NVCAP customization support and support for ION gfx cards from aserebln
- Added ATI new framebuffers support and new cards from PCEFI10.6
- improved ACPI file search algo by implementing a cache.
- Nvidia injection fix
- pciroot would not always return correct UID in autodection mode
- pciroot would not always return correct UID in auto detection mode
- Fixed the hibernation problem in boot2/resume.c
- Fixed all new booter versions with SystemType would override the facp value even if correct,
now keeps the facp value if correct and no override has been done, implemented a best effort algo.

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