Index: trunk/me.jpg =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Property changes on: trunk/me.jpg ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream Index: trunk/sdhci.h =================================================================== --- trunk/sdhci.h (revision 0) +++ trunk/sdhci.h (revision 2) @@ -0,0 +1,278 @@ +#ifndef SDHCI_H +#include "License.h" + +/*Controller registers*/ +#define SDHCI_DMA_ADDRESS 0x00 + +#define SDHCI_BLOCK_SIZE 0x04 +#define SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF)) + +#define SDHCI_BLOCK_COUNT 0x06 + +#define SDHCI_ARGUMENT 0x08 + +#define SDHCI_TRANSFER_MODE 0x0C +#define SDHCI_TRNS_DMA 0x01 +#define SDHCI_TRNS_BLK_CNT_EN 0x02 +#define SDHCI_TRNS_ACMD12 0x04 +#define SDHCI_TRNS_READ 0x10 +#define SDHCI_TRNS_MULTI 0x20 + +#define SDHCI_COMMAND 0x0E +#define SDHCI_CMD_RESP_MASK 0x03 +#define SDHCI_CMD_CRC 0x08 +#define SDHCI_CMD_INDEX 0x10 +#define SDHCI_CMD_DATA 0x20 + +#define SDHCI_CMD_RESP_NONE 0x00 +#define SDHCI_CMD_RESP_LONG 0x01 +#define SDHCI_CMD_RESP_SHORT 0x02 +#define SDHCI_CMD_RESP_SHORT_BUSY 0x03 + +#define SDHCI_MAKE_CMD(c, f) (((c & 0xff) << 8) | (f & 0xff)) + +#define SDHCI_RESPONSE 0x10 + +#define SDHCI_BUFFER 0x20 + +#define SDHCI_PRESENT_STATE 0x24 +#define SDHCI_CMD_INHIBIT 0x00000001 +#define SDHCI_DATA_INHIBIT 0x00000002 +#define SDHCI_DOING_WRITE 0x00000100 +#define SDHCI_DOING_READ 0x00000200 +#define SDHCI_SPACE_AVAILABLE 0x00000400 +#define SDHCI_DATA_AVAILABLE 0x00000800 +#define SDHCI_CARD_PRESENT 0x00010000 +#define SDHCI_WRITE_PROTECT 0x00080000 + +#define SDHCI_HOST_CONTROL 0x28 +#define SDHCI_CTRL_LED 0x01 +#define SDHCI_CTRL_4BITBUS 0x02 +#define SDHCI_CTRL_HISPD 0x04 +#define SDHCI_CTRL_DMA_MASK 0x18 +#define SDHCI_CTRL_SDMA 0x00 +#define SDHCI_CTRL_ADMA1 0x08 +#define SDHCI_CTRL_ADMA32 0x10 +#define SDHCI_CTRL_ADMA64 0x18 + +#define SDHCI_POWER_CONTROL 0x29 +#define SDHCI_POWER_ON 0x01 +#define SDHCI_POWER_180 0x0A +#define SDHCI_POWER_300 0x0C +#define SDHCI_POWER_330 0x0E + +#define SDHCI_BLOCK_GAP_CONTROL 0x2A + +#define SDHCI_WAKE_UP_CONTROL 0x2B + +#define SDHCI_CLOCK_CONTROL 0x2C +#define SDHCI_DIVIDER_SHIFT 8 +#define SDHCI_CLOCK_CARD_EN 0x0004 +#define SDHCI_CLOCK_INT_STABLE 0x0002 +#define SDHCI_CLOCK_INT_EN 0x0001 + +#define SDHCI_TIMEOUT_CONTROL 0x2E + +#define SDHCI_SOFTWARE_RESET 0x2F +#define SDHCI_RESET_ALL 0x01 +#define SDHCI_RESET_CMD 0x02 +#define SDHCI_RESET_DATA 0x04 + +#define SDHCI_INT_STATUS 0x30 +#define SDHCI_INT_ENABLE 0x34 +#define SDHCI_SIGNAL_ENABLE 0x38 +#define SDHCI_INT_RESPONSE 0x00000001 +#define SDHCI_INT_DATA_END 0x00000002 +#define SDHCI_INT_DMA_END 0x00000008 +#define SDHCI_INT_SPACE_AVAIL 0x00000010 +#define SDHCI_INT_DATA_AVAIL 0x00000020 +#define SDHCI_INT_CARD_INSERT 0x00000040 +#define SDHCI_INT_CARD_REMOVE 0x00000080 +#define SDHCI_INT_CARD_INT 0x00000100 +#define SDHCI_INT_ERROR 0x00008000 +#define SDHCI_INT_TIMEOUT 0x00010000 +#define SDHCI_INT_CRC 0x00020000 +#define SDHCI_INT_END_BIT 0x00040000 +#define SDHCI_INT_INDEX 0x00080000 +#define SDHCI_INT_DATA_TIMEOUT 0x00100000 +#define SDHCI_INT_DATA_CRC 0x00200000 +#define SDHCI_INT_DATA_END_BIT 0x00400000 +#define SDHCI_INT_BUS_POWER 0x00800000 +#define SDHCI_INT_ACMD12ERR 0x01000000 +#define SDHCI_INT_ADMA_ERROR 0x02000000 + +#define SDHCI_INT_NORMAL_MASK 0x00007FFF +#define SDHCI_INT_ERROR_MASK 0xFFFF8000 + +#define SDHCI_INT_CMD_MASK (SDHCI_INT_RESPONSE | SDHCI_INT_TIMEOUT | \ + SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX) +#define SDHCI_INT_DATA_MASK (SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \ + SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | \ + SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \ + SDHCI_INT_DATA_END_BIT) + +#define SDHCI_ACMD12_ERR 0x3C + +/* 3E-3F reserved */ + +#define SDHCI_CAPABILITIES 0x40 +#define SDHCI_TIMEOUT_CLK_MASK 0x0000003F +#define SDHCI_TIMEOUT_CLK_SHIFT 0 +#define SDHCI_TIMEOUT_CLK_UNIT 0x00000080 +#define SDHCI_CLOCK_BASE_MASK 0x00003F00 +#define SDHCI_CLOCK_BASE_SHIFT 8 +#define SDHCI_MAX_BLOCK_MASK 0x00030000 +#define SDHCI_MAX_BLOCK_SHIFT 16 +#define SDHCI_CAN_DO_ADMA2 0x00080000 +#define SDHCI_CAN_DO_ADMA1 0x00100000 +#define SDHCI_CAN_DO_HISPD 0x00200000 +#define SDHCI_CAN_DO_DMA 0x00400000 +#define SDHCI_CAN_VDD_330 0x01000000 +#define SDHCI_CAN_VDD_300 0x02000000 +#define SDHCI_CAN_VDD_180 0x04000000 +#define SDHCI_CAN_64BIT 0x10000000 + +/* 44-47 reserved for more caps */ + +#define SDHCI_MAX_CURRENT 0x48 + +/* 4C-4F reserved for more max current */ + +#define SDHCI_SET_ACMD12_ERROR 0x50 +#define SDHCI_SET_INT_ERROR 0x52 + +#define SDHCI_ADMA_ERROR 0x54 + +/* 55-57 reserved */ + +#define SDHCI_ADMA_ADDRESS 0x58 + +/* 60-FB reserved */ + +#define SDHCI_SLOT_INT_STATUS 0xFC + +#define SDHCI_HOST_VERSION 0xFE +#define SDHCI_VENDOR_VER_MASK 0xFF00 +#define SDHCI_VENDOR_VER_SHIFT 8 +#define SDHCI_SPEC_VER_MASK 0x00FF +#define SDHCI_SPEC_VER_SHIFT 0 +#define SDHCI_SPEC_100 0 +#define SDHCI_SPEC_200 1 + +#ifdef LINUX_STRUCTURE +struct sdhci_ops; + +struct sdhci_host { + /* Data set by hardware interface driver */ + const char *hw_name; /* Hardware bus name */ + + unsigned int quirks; /* Deviations from spec. */ + +/* Controller doesn't honor resets unless we touch the clock register */ +#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0) +/* Controller has bad caps bits, but really supports DMA */ +#define SDHCI_QUIRK_FORCE_DMA (1<<1) +/* Controller doesn't like to be reset when there is no card inserted. */ +#define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2) +/* Controller doesn't like clearing the power reg before a change */ +#define SDHCI_QUIRK_SINGLE_POWER_WRITE (1<<3) +/* Controller has flaky internal state so reset it on each ios change */ +#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1<<4) +/* Controller has an unusable DMA engine */ +#define SDHCI_QUIRK_BROKEN_DMA (1<<5) +/* Controller has an unusable ADMA engine */ +#define SDHCI_QUIRK_BROKEN_ADMA (1<<6) +/* Controller can only DMA from 32-bit aligned addresses */ +#define SDHCI_QUIRK_32BIT_DMA_ADDR (1<<7) +/* Controller can only DMA chunk sizes that are a multiple of 32 bits */ +#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<8) +/* Controller can only ADMA chunks that are a multiple of 32 bits */ +#define SDHCI_QUIRK_32BIT_ADMA_SIZE (1<<9) +/* Controller needs to be reset after each request to stay stable */ +#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<10) +/* Controller needs voltage and power writes to happen separately */ +#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1<<11) +/* Controller provides an incorrect timeout value for transfers */ +#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1<<12) +/* Controller has an issue with buffer bits for small transfers */ +#define SDHCI_QUIRK_BROKEN_SMALL_PIO (1<<13) + + int irq; /* Device IRQ */ + void __iomem * ioaddr; /* Mapped address */ + + const struct sdhci_ops *ops; /* Low level hw interface */ + + /* Internal data */ + struct mmc_host *mmc; /* MMC structure */ + u64 dma_mask; /* custom DMA mask */ + +#ifdef CONFIG_LEDS_CLASS + struct led_classdev led; /* LED control */ +#endif + + spinlock_t lock; /* Mutex */ + + int flags; /* Host attributes */ +#define SDHCI_USE_DMA (1<<0) /* Host is DMA capable */ +#define SDHCI_USE_ADMA (1<<1) /* Host is ADMA capable */ +#define SDHCI_REQ_USE_DMA (1<<2) /* Use DMA for this req. */ +#define SDHCI_DEVICE_DEAD (1<<3) /* Device unresponsive */ + + unsigned int version; /* SDHCI spec. version */ + + unsigned int max_clk; /* Max possible freq (MHz) */ + unsigned int timeout_clk; /* Timeout freq (KHz) */ + + unsigned int clock; /* Current clock (MHz) */ + unsigned short power; /* Current voltage */ + + struct mmc_request *mrq; /* Current request */ + struct mmc_command *cmd; /* Current command */ + struct mmc_data *data; /* Current data request */ + unsigned int data_early:1; /* Data finished before cmd */ + + struct sg_mapping_iter sg_miter; /* SG state for PIO */ + unsigned int blocks; /* remaining PIO blocks */ + + int sg_count; /* Mapped sg entries */ + + u8 *adma_desc; /* ADMA descriptor table */ + u8 *align_buffer; /* Bounce buffer */ + + dma_addr_t adma_addr; /* Mapped ADMA descr. table */ + dma_addr_t align_addr; /* Mapped bounce buffer */ + + struct tasklet_struct card_tasklet; /* Tasklet structures */ + struct tasklet_struct finish_tasklet; + + struct timer_list timer; /* Timer for timeouts */ + + unsigned long private[0] ____cacheline_aligned; +}; + + +struct sdhci_ops { + int (*enable_dma)(struct sdhci_host *host); +}; + + +extern struct sdhci_host *sdhci_alloc_host(struct device *dev, + size_t priv_size); +extern void sdhci_free_host(struct sdhci_host *host); + +static inline void *sdhci_priv(struct sdhci_host *host) +{ + return (void *)host->private; +} + +extern int sdhci_add_host(struct sdhci_host *host); +extern void sdhci_remove_host(struct sdhci_host *host, int dead); + +#ifdef CONFIG_PM +extern int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state); +extern int sdhci_resume_host(struct sdhci_host *host); +#endif + +#endif /* LINUX_STRUCTURE */ + + #endif /* SDHCI_H */ Property changes on: trunk/sdhci.h ___________________________________________________________________ Added: svn:executable + * Index: trunk/SDHCI_Register_Map.h =================================================================== --- trunk/SDHCI_Register_Map.h (revision 0) +++ trunk/SDHCI_Register_Map.h (revision 2) @@ -0,0 +1,142 @@ +#include "License.h" +#include "SD_Misc.h" + +struct __attribute__ ((__packed__)) SDHCIRegMap_t { + volatile UInt32 SDMASysAddr; //0x00 + volatile UInt16 BlockSize; //0x04 + volatile UInt16 BlockCount; //0x06 + volatile UInt32 Argument; //0x08 + volatile UInt16 TransferMode; //0x0C + volatile UInt16 Command; //0x0E + volatile UInt32 Response[4]; //0x10 + volatile UInt32 BufferDataPort; //0x20 + volatile UInt32 PresentState; //0x24 + volatile UInt8 HostControl; //0x28 + volatile UInt8 PowerControl; //0x29 + volatile UInt8 BlockGapControl; //0x2A + volatile UInt8 WakeupControl; //0x2B + volatile UInt16 ClockControl; //0x2C + volatile UInt8 TimeoutControl; //0x2E + volatile UInt8 SoftwareReset; //0x2F + volatile UInt16 NormalIntStatus; //0x30 + volatile UInt16 ErrorIntStatus; //0x32 + volatile UInt16 NormalIntStatusEn; //0x34 + volatile UInt16 ErrorIntStatusEn; //0x36 + volatile UInt16 NormalIntSignalEn; //0x38 + volatile UInt16 ErrorIntSignalEn; //0x3A + volatile UInt16 CMD12ErrorStatus; //0x3C + volatile UInt16 Reserved0; //0x3E + volatile UInt32 Capabilities[2]; //0x40 + volatile UInt32 MaxCurrentCap[2]; //0x48 + volatile UInt16 ForceEventCMD12ErrStatus; //0x50 + volatile UInt16 ForceEventErrorIntStatus; //0x52 + volatile UInt8 AMDAErrorStatus; //0x54 + volatile UInt8 Reserved1; //0x55 + volatile UInt16 Reserved2; //0x56 + volatile UInt32 ADMASystemAddr[2]; //0x58 + volatile UInt16 ReservedArray[78]; //0x60 + volatile UInt16 SlotIntStatus; //0xFC + volatile UInt16 HostControllerVer; //0xFE +}; + +//PresentState +#define CMDLineLevel BIT24 +#define DAT3Level BIT23 +#define DAT2Level BIT22 +#define DAT1Level BIT21 +#define DAT0Level BIT20 +#define WPSwitchLevel BIT19 +#define CardDetectLevel BIT18 +#define CardStateStable BIT17 +#define CardInserted BIT16 +#define BuffReadEn BIT11 +#define BuffWriteEn BIT10 +#define ReadXferActive BIT9 +#define WriteXferActive BIT8 +#define DATLineActive BIT2 +#define ComInhibitDAT BIT1 +#define ComInhibitCMD BIT0 + +//HostControl +#define CDSigSelection BIT7 +#define CDTestLevel BIT6 +#define DMASelSDMA 0 +#define DMASel32ADMA2 BIT3 +#define DMASel64ADMA2 BIT4|BIT3 +#define HighSpeedEn BIT2 +#define DataXferWidth BIT1 +#define LedControl BIT0 + +//PowerControl +#define HC3v3 0xE +#define HC3v0 0xD +#define HC1v8 0xA +#define SDPower BIT0 + +//ClockControl +#define DIV256 BIT16 +#define DIV128 BIT15 +#define DIV64 BIT14 +#define DIV32 BIT13 +#define DIV16 BIT12 +#define DIV8 BIT11 +#define DIV4 BIT10 +#define DIV2 BIT9 +#define SDClockEn BIT2 +#define SDClockStable BIT1 +#define InternalClockEn BIT0 + +//Capabilities +#define CR64SysBus BIT28 +#define CR1v8Support BIT26 +#define CR3v0Support BIT25 +#define CR3v3Support BIT24 +#define SusRsmSupport BIT23 +#define SDMASupport BIT22 +#define HighSpSupport BIT21 +#define ADMA2Support BIT19 +#define BlockLen512 0 +#define BlockLen1024 BIT16 +#define BlockLen2048 BIT17 +#define BaseClockMask BIT13|BIT12|BIT11|BIT10|BIT9|BIT8 +#define TOutClockUnit BIT7 +#define TOutClockMask BIT5|BIT4|BIT3|BIT2|BIT1|BIT0 + +//MaxCurrentCap +#define MaxCur1v8Mask BIT23|BIT22|BIT21|BIT20|BIT19|BIT18|BIT17|BIT16 +#define MaxCur3v0Mask BIT15|BIT14|BIT13|BIT12|BIT11|BIT10|BIT9|BIT8 +#define MaxCur3v3Mask BIT7|BIT6|BIT5|BIT4|BIT3|BIT2|BIT1|BIT0 + +//HostControllerVer +#define VendorVerMask BIT15|BIT14|BIT13|BIT12|BIT11|BIT10|BIT9|BIT8 +#define SpecVerMask BIT7|BIT6|BIT5|BIT4|BIT3|BIT2|BIT1|BIT0 + +//SoftwareReset +#define CMD_RESET BIT1 +#define DAT_RESET BIT2 +#define FULL_RESET BIT0 + +//NormalIntStatus +#define ErrorInterrupt BIT15 +#define CardInterrupt BIT8 +#define CardRemoval BIT7 +#define CardInsertion BIT6 +#define BuffReadReady BIT5 +#define BuffWriteReady BIT4 +#define DMAInterrupt BIT3 +#define BlockGapEvent BIT2 +#define XferComplete BIT1 +#define CmdComplete BIT0 + +//ErrorIntStatus +#define ADMAError BIT9 +#define AutoCMD12Error BIT8 +#define CurLimitError BIT7 +#define DatEndBitError BIT6 +#define DatCRCError BIT5 +#define DatTimeoutError BIT4 +#define CmdIndexError BIT3 +#define CmdEndBitError BIT2 +#define CmdCRCError BIT1 +#define CmdTimeoutError BIT0 + Property changes on: trunk/SDHCI_Register_Map.h ___________________________________________________________________ Added: svn:executable + * Index: trunk/VoodooSDHC.xcodeproj/james.pbxuser =================================================================== --- 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+ PBXMemberBookColumnIdentifier + 22 + + PBXModuleWindowStatusBarHidden2 + 1 + RubberWindowFrame + 385 179 630 352 0 0 1440 878 + + Module + PBXClassBrowserModule + Proportion + 332pt + + + Proportion + 332pt + + + Name + Class Browser + ServiceClasses + + PBXClassBrowserModule + + StatusbarIsVisible + 0 + TableOfContents + + 1C0AD2AF069F1E9B00FABCE6 + 1C0AD2B0069F1E9B00FABCE6 + 1CA6456E063B45B4001379D8 + + ToolbarConfiguration + xcode.toolbar.config.classbrowser + WindowString + 385 179 630 352 0 0 1440 878 + WindowToolGUID + 1C0AD2AF069F1E9B00FABCE6 + WindowToolIsVisible + 0 + + + Identifier + windowTool.refactoring + IncludeInToolsMenu + 0 + Layout + + + Dock + + + BecomeActive + 1 + GeometryConfiguration + + Frame + {0, 0}, {500, 335} + RubberWindowFrame + {0, 0}, {500, 335} + + Module + XCRefactoringModule + Proportion + 100% + + + Proportion + 100% + + + Name + Refactoring + ServiceClasses + + XCRefactoringModule + + WindowString + 200 200 500 356 0 0 1920 1200 + + + + Index: trunk/Info.plist =================================================================== --- trunk/Info.plist (revision 0) +++ trunk/Info.plist (revision 2) @@ -0,0 +1,49 @@ + + + + + CFBundleDevelopmentRegion + English + CFBundleExecutable + VoodooSDHC + CFBundleIconFile + me.jpg + CFBundleIdentifier + VoodooSDHC + CFBundleInfoDictionaryVersion + 6.0 + CFBundleName + VoodooSDHC + CFBundlePackageType + KEXT + CFBundleSignature + Voodoo + CFBundleVersion + 1.1d1 + IOKitPersonalities + + SD Card Host Controller + + IOClass + VoodooSDHC + IOPCIMatch + 0x08221180 + IOProviderClass + IOPCIDevice + + + OSBundleLibraries + + com.apple.iokit.IOPCIFamily + 2.6 + com.apple.iokit.IOStorageFamily + 1.6 + com.apple.kpi.iokit + 8.0.0 + com.apple.kpi.libkern + 8.0.0 + com.apple.kpi.mach + 8.0.0 + + + Property changes on: trunk/Info.plist ___________________________________________________________________ Added: svn:executable + * Index: trunk/SD_Misc.h =================================================================== --- trunk/SD_Misc.h (revision 0) +++ trunk/SD_Misc.h (revision 2) @@ -0,0 +1,34 @@ +#include "License.h" + +#define BIT0 1<<0 +#define BIT1 1<<1 +#define BIT2 1<<2 +#define BIT3 1<<3 +#define BIT4 1<<4 +#define BIT5 1<<5 +#define BIT6 1<<6 +#define BIT7 1<<7 +#define BIT8 1<<8 +#define BIT9 1<<9 +#define BIT10 1<<10 +#define BIT11 1<<11 +#define BIT12 1<<12 +#define BIT13 1<<13 +#define BIT14 1<<14 +#define BIT15 1<<15 +#define BIT16 1<<16 +#define BIT17 1<<17 +#define BIT18 1<<18 +#define BIT19 1<<19 +#define BIT20 1<<20 +#define BIT21 1<<21 +#define BIT22 1<<22 +#define BIT23 1<<23 +#define BIT24 1<<24 +#define BIT25 1<<25 +#define BIT26 1<<26 +#define BIT27 1<<27 +#define BIT28 1<<28 +#define BIT29 1<<29 +#define BIT30 1<<30 +#define BIT31 1<<31 Property changes on: trunk/SD_Misc.h ___________________________________________________________________ Added: svn:executable + * Index: trunk/License.h =================================================================== --- trunk/License.h (revision 0) +++ trunk/License.h (revision 2) @@ -0,0 +1,36 @@ +/* + * License.h + * IOSDHCIBlockDevice + * + * Created by james francis toy iv on 4/18/09. + * Copyright 2009 VoodooLabs. All rights reserved. + * + * previously worked on by : Forest Godfrey, type11, Reggie McMurtrey + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA + * + * Full text of agreement at http://www.gnu.org/licenses/gpl-2.0.txt + **************************************************************************** + * Original Linux Code Copyrights + * + * Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved. + * Copyright (C) 2002 Hewlett-Packard Company + * + * Many thanks to Alessandro Rubini and Jonathan Corbet! + * Based strongly on code by: + * Author: Yong-iL Joh + * Author: Andrew Christian 15 May 2002 + **************************************************************************** + */ Property changes on: trunk/License.h ___________________________________________________________________ Added: svn:executable + * Index: trunk/VoodooSDHC.cpp =================================================================== --- trunk/VoodooSDHC.cpp (revision 0) +++ trunk/VoodooSDHC.cpp (revision 2) @@ -0,0 +1,1778 @@ +#include "License.h" +/*****************************************************************************/ +/* Build Configuration Defines */ + +/* Debug - mostly turns on more logging */ +//#define __DEBUG__ 1 + +/* + * Builds the driver to prohibit writes to the card. Useful while building + * confidence in changes without corrupting data. + */ +//#define READONLY_DRIVER 1 + +/* + * Builds the driver with High Speed Card support. + */ +//#define HIGHSPEED_CARD_MODE 1 + +/* + * Builds the driver with 4-bit Bus support. + */ +#define WIDE_BUS_MODE 1 + +/* + * Use multiblock reads/writes. Define to either 0 or 1 + */ +#define USE_MULTIBLOCK 1 + +/* + * Use SDMA reads/writes. Define to either 0 or 1 + */ +#define USE_SDMA 1 + +/* + * The Linux driver for this device claimed that the card needs to be reset + * after every command. That doesn't seem to be necessary so we turn on + * NO_RESET_WAR. + */ +#define NO_RESET_WAR 1 + +#define SDMA_BUFFER_SIZE 32768 +#define SDMA_BUFFER_SIZE_IN_REG 0x3000 /* see def. of Block Size Register */ +#define SDMA_RETRY_COUNT 5 + + +/*****************************************************************************/ +//#include + +#include "VoodooSDHC.h" +#include "SDHCI_Register_Map.h" +#include "SD_Commands.h" +#include "sdhci.h" + +#define MAX(a, b) ((a) > (b) ? (a) : (b)) +#define MIN(a, b) ((a) < (b) ? (a) : (b)) + +#define super IOBlockStorageDevice + +OSDefineMetaClassAndStructors ( VoodooSDHC, IOBlockStorageDevice ); + +/*****************************************************************************/ +/* Helper Functions */ +/* + * read_block_pio: Read a single 512 byte block of data with no error + * checking from a PIO address to memory. + * volatile UInt32 *reg_addr: Address of card's PIO register + * UInt8 *buf: Buffer in which to place data - m + */ +static inline void read_block_pio(volatile UInt32 *reg_addr, UInt32 *buf) { + UInt32 *bufp = buf; + + for (int i = 0; i < 512 / sizeof(UInt32); i++) { + *bufp++ = *reg_addr; + } +} + +/*****************************************************************************/ +/* Main Driver Code */ + +/* + * init: Initialize driver. Returns true on success, false on failure + * OSDictionary *properties: Driver properties passed in + */ +bool VoodooSDHC::init ( OSDictionary * properties ) +{ + IOLog("VoodooSDHCI ::: an SDHCI driver for Ricoh, TI, and JMicron SD Host Controllers ::: rev 20091008\n"); + IOLog("VoodooSDHCI: initializing SD host controller\n"); + /* Run by our superclass */ + if ( super::init ( properties ) == false ) + { + return false; + } + +#ifdef USE_SDMA + if ((workLoop = IOWorkLoop::workLoop()) == NULL) + return false; +#endif + + return true; +} + +void VoodooSDHC::free() +{ +#ifdef USE_SDMA + if (workLoop != NULL) { + workLoop->release(); + workLoop = NULL; + } +#endif + super::free(); +} + +/* + * start: Starts driver. Called upon insertion of card. Returns true + * on success, false on failure. + * IOService *provider: Provider structure + */ +bool VoodooSDHC::start ( IOService * provider ) +{ +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: running start()\n"); + IOLog("VoodooSDHCI: we have found %d SD Host Controllers\n",provider->getDeviceMemoryCount()); +#endif + super::start ( provider ); + lock.init(); +#ifdef USE_SDMA + sdmaCond = IOLockAlloc(); + mediaStateLock = IOLockAlloc(); +#endif +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: starting card power management\n"); +#endif + // initialize superclass variables from IOService.h + PMinit(); + static const IOPMPowerState powerStates[] = { + {kIOPMPowerStateVersion1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, + {kIOPMPowerStateVersion1, kIOPMDeviceUsable, IOPMPowerOn, IOPMPowerOn, 0, 0, 0, 0, 0, 0, 0, 0} + }; + registerPowerDriver(this, const_cast(powerStates), + sizeof(powerStates) / sizeof(powerStates[0])); + // join the tree from IOService.h + provider->joinPMtree(this); + +#ifdef USE_SDMA + sdmaBuffDesc = IOBufferMemoryDescriptor::withCapacity(SDMA_BUFFER_SIZE * 2, kIODirectionInOut, true); + physSdmaBuff = sdmaBuffDesc->getPhysicalAddress(); + virtSdmaBuff = (char*)sdmaBuffDesc->getBytesNoCopy() + SDMA_BUFFER_SIZE - physSdmaBuff % SDMA_BUFFER_SIZE; + physSdmaBuff += SDMA_BUFFER_SIZE - physSdmaBuff % SDMA_BUFFER_SIZE; +#endif + + cardPresence = kCardNotPresent; + if (! setup(provider)) { + return false; + } + +#ifdef USE_SDMA + IOWorkLoop *workLoop; + if ((workLoop = getWorkLoop()) == NULL) { + IOLog("VoodooSDHCI: unable to get a workloop; getWorkLoop() == NULL\n"); + return false; + } + if ((interruptSrc = IOFilterInterruptEventSource::filterInterruptEventSource( + this, interruptHandler, interruptFilter, provider + )) == NULL) { + IOLog("VoodooSDHCI: failed to create an interrupt source\n"); + return false; + } + if (workLoop->addEventSource(interruptSrc) != kIOReturnSuccess) { + IOLog("VoodooSDHCI: failed to add FIES to work loop\n"); + return false; + } + if ((timerSrc = IOTimerEventSource::timerEventSource(this, timerHandler)) == NULL) { + IOLog("VoodooSDHCI: failed to create a timer event source\n"); + return false; + } + if (workLoop->addEventSource(timerSrc) != kIOReturnSuccess) { + IOLog("VoodooSDHCI: failed ot add TES to work loop\n"); + return false; + } +#endif + + this->attach(this); + registerService(); + +#ifdef USE_SDMA + interruptSrc->enable(); + timerSrc->enable(); + timerSrc->setTimeoutMS(50); // intial timeout is small, to detect card insertion ASAP +#endif + + // The controller is now initialized and ready for operation + return true; +} + +/* + * setup: Initializes I/O, called upon start and resume, returns true on success. + * IOService *provider: Provider structure + */ +bool VoodooSDHC::setup(IOService * provider) +{ + IODeviceMemory * pMem; + UInt8 slot = 0; + + for (slot=0; slotgetDeviceMemoryCount(); slot++) { + pMem = provider->getDeviceMemoryWithIndex(0); + this->PCIRegMap = provider->mapDeviceMemoryWithIndex(0); + if (!this->PCIRegMap) { + IOLog("VoodooSDHCI: PCI Register Mapping for Device %d Failed!\n", (int)slot); + return false; + } + + this->PCIRegP[slot] = + (SDHCIRegMap_t *)PCIRegMap->getVirtualAddress(); +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: controller slot == %d\n", slot); + IOLog("VoodooSDHCI: unit memory (pMem) == %d\n", pMem->getLength()); +#endif + this->PCIRegP[slot]->PowerControl = 0; + Reset(slot, FULL_RESET); + IODelay(10000); + if (cardPresence == kCardIsPresent && isCardPresent(slot)) { + SDCIDReg_t oldCID = SDCIDReg[slot]; + cardInit(slot); + if (memcmp(&oldCID, SDCIDReg + slot, sizeof(oldCID)) != 0) { + IOLog("VoodooSDHCI: oops! we found a different card :: remount?\n"); + cardPresence = kCardRemount; + } + } + } + + return true; +} + +/* + * stop: Called on completion of service, such as ejection of card's + * filesystem. + * IOService *provider: Our provider structure + */ +void VoodooSDHC::stop(IOService *provider) +{ +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: card is in stop() function\n"); +#endif +#ifdef USE_SDMA + if (timerSrc != NULL) { + timerSrc->disable(); + timerSrc->cancelTimeout(); + getWorkLoop()->removeEventSource(timerSrc); + timerSrc->release(); + timerSrc = NULL; + } + if (interruptSrc != NULL) { + interruptSrc->disable(); + getWorkLoop()->removeEventSource(interruptSrc); + interruptSrc->release(); + interruptSrc = NULL; + } + sdmaBuffDesc->release(); +#endif + + PMstop(); +#ifdef USE_SDMA + IOLockFree(sdmaCond); + IOLockFree(mediaStateLock); +#endif + lock.free(); + + // Call our superclass + super::stop ( provider ); + +} +/* + * dumpRegs: Dump selected Host registers. Only used for driver + * debugging. + * UInt8 slot: Which card slot to dump + */ +void VoodooSDHC::dumpRegs(UInt8 slot) { + IOLog("VoodooSDHCI: Register Dump ******************************************************\n"); + IOLog("VoodooSDHCI: SDMASysAddr: 0x%08X PresentState: 0x%08X\n", + this->PCIRegP[slot]->SDMASysAddr, this->PCIRegP[slot]->PresentState); + IOLog("VoodooSDHCI: BlockSize: 0x%04X BlockCount: 0x%04X\n", + this->PCIRegP[slot]->BlockSize, this->PCIRegP[slot]->BlockCount); + IOLog("VoodooSDHCI: TransferMode: 0x%04X Command: 0x%04X\n", + this->PCIRegP[slot]->TransferMode, this->PCIRegP[slot]->Command); + IOLog("VoodooSDHCI: HostControl: 0x%02X PowerControl: 0x%02X\n", + this->PCIRegP[slot]->HostControl, this->PCIRegP[slot]->PowerControl); + IOLog("VoodooSDHCI: BlockGapControl: 0x%02X WakeupControl: 0x%02X\n", + this->PCIRegP[slot]->BlockGapControl, this->PCIRegP[slot]->WakeupControl); + IOLog("VoodooSDHCI: ClockControl: 0x%04X TimeoutControl: 0x%02X\n", + this->PCIRegP[slot]->ClockControl, this->PCIRegP[slot]->TimeoutControl); + IOLog("VoodooSDHCI: SoftwareReset: 0x%02X NormalIntStatus: 0x%04X\n", + this->PCIRegP[slot]->SoftwareReset, this->PCIRegP[slot]->NormalIntStatus); + IOLog("VoodooSDHCI: ErrorIntStatus: 0x%04X NormalIntStatusEn: 0x%04X\n", + this->PCIRegP[slot]->ErrorIntStatus, this->PCIRegP[slot]->NormalIntStatusEn); + IOLog("VoodooSDHCI: ErrorIntStatusEn: 0x%04X NormalIntSignalEn: 0x%04X\n", + this->PCIRegP[slot]->ErrorIntStatusEn, this->PCIRegP[slot]->NormalIntSignalEn); + IOLog("VoodooSDHCI: ErrorIntSignalEn: 0x%04X CMD12ErrorStatus: 0x%04X\n", + this->PCIRegP[slot]->ErrorIntSignalEn, this->PCIRegP[slot]->CMD12ErrorStatus); + IOLog("VoodooSDHCI: Capabilities[1]: 0x%08X Capabilities[0]: 0x%08X\n", + this->PCIRegP[slot]->Capabilities[1], this->PCIRegP[slot]->Capabilities[0]); + IOLog("VoodooSDHCI: MaxCurrentCap[1]: 0x%08X MaxCurrentCap[0]: 0x%08X\n", + this->PCIRegP[slot]->MaxCurrentCap[1], this->PCIRegP[slot]->MaxCurrentCap[0]); + IOLog("VoodooSDHCI: ForceEventCMD12ErrStatus: 0x%04X ForceEventErrorIntStatus: 0x%04X\n", + this->PCIRegP[slot]->ForceEventCMD12ErrStatus, this->PCIRegP[slot]->ForceEventErrorIntStatus); + IOLog("VoodooSDHCI: AMDAErrorStatus: 0x%02X Argument 0x%08X\n", + this->PCIRegP[slot]->AMDAErrorStatus, PCIRegP[slot]->Argument); + IOLog("VoodooSDHCI: ADMASystemAddr[1]: 0x%08X ADMASystemAddr[0]: 0x%08lX\n", + this->PCIRegP[slot]->ADMASystemAddr[1], this->PCIRegP[slot]->ADMASystemAddr[0]); + IOLog("VoodooSDHCI: SlotIntStatus: 0x%04X HostControllerVer: 0x%04X\n", + this->PCIRegP[slot]->SlotIntStatus, this->PCIRegP[slot]->HostControllerVer); + IOLog("VoodooSDHCI: Response[1]: 0x%08X Response[0]: 0x%08X\n", + this->PCIRegP[slot]->Response[1], this->PCIRegP[slot]->Response[0]); + IOLog("VoodooSDHCI: Response[3]: 0x%08X Response[2]: 0x%08X\n", + this->PCIRegP[slot]->Response[3], this->PCIRegP[slot]->Response[2]); + IOLog("VoodooSDHCI: End of Register Dump************************************************\n"); +} + +/* + * cardInit: Initialize a card. Called upon insertion. When complete, + * card should be running at full speed and card data + * populated. + * UInt8 slot: Which slot the card is in. + */ +bool VoodooSDHC::cardInit(UInt8 slot) +{ + isHighCapacity = false; + calcClock(slot, 400000); + powerSD(slot); + SDCommand(slot, SD_GO_IDLE_STATE, SDCR0, 0); + IODelay(30000); + SDCommand(slot, SD_SEND_IF_COND, SDCR8, 0x000001AA); + for (int i = 0; i < 100; i++) { + IODelay(10000); + if (!(PCIRegP[slot]->PresentState & ComInhibitCMD)) { + break; + } + } + + if(this->PCIRegP[slot]->PresentState & ComInhibitCMD) { + IOLog("VoodooSDHCI: no response from CMD_8 -- ComInhibitCMD\n"); + Reset(slot, CMD_RESET); + Reset(slot, DAT_RESET); + SDCommand(slot, SD_GO_IDLE_STATE, SDCR0, 0); + do { + SDCommand(slot, SD_APP_CMD, SDCR55, 0); + SDCommand(slot, SD_APP_OP_COND, SDACR41, 0x00FF8000); + IODelay(1000); + } while (!(this->PCIRegP[slot]->Response[0] & BIT31)); + } else { + // check and init SDHC (wait for 2 secs; spec requires 1 sec) + IOLog("VoodooSDHCI: initializing spec 2.0 SD card\n"); + for (int i = 0; i < 80; i++) { +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: sending CMD_55\n"); +#endif //me + SDCommand(slot, SD_APP_CMD, SDCR55, 0); +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: sending APP_CMD_41\n"); +#endif //me + SDCommand(slot, SD_APP_OP_COND, SDACR41, 0x40FF8000); + IODelay(25000); + if (this->PCIRegP[slot]->Response[0] & BIT31) { + goto OP_COND_COMPLETE; + } + } +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: no response to APP_CMD_41: 0x%08x\n", PCIRegP[slot]->Response[0]); +#endif + return false; + OP_COND_COMPLETE: +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: got response to APP_CMD_41: 0x%08x\n", PCIRegP[slot]->Response[0]); +#endif + if (this->PCIRegP[slot]->Response[0] & BIT30) { + IOLog("VoodooSDHCI: we have HC card\n"); + isHighCapacity = true; + } else { + IOLog("VoodooSDHCI: standard SD (without HC)\n"); + } + } + + + SDCommand(slot, SD_ALL_SEND_CID, SDCR2, 0); + IODelay(1000); + parseCID(slot); + SDCommand(slot, SD_SET_RELATIVE_ADDR, SDCR3, 0); + IODelay(1000); + calcClock(slot, 25000000); + this->RCA = this->PCIRegP[slot]->Response[0] >> 16; +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: RCA == 0x%08X\n", this->RCA); +#endif//me + SDCommand(slot, SD_SEND_CSD, SDCR9, this->RCA << 16); + IODelay(2000000); + parseCSD(slot); +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: PCIRegP response order (3,2,1,0) :: 0x%08X 0x%08X 0x%08X 0x%08X\n", + this->PCIRegP[slot]->Response[3], + this->PCIRegP[slot]->Response[2], + this->PCIRegP[slot]->Response[1], + this->PCIRegP[slot]->Response[0]); +#endif//me + SDCommand(slot, SD_SELECT_CARD, SDCR7, this->RCA << 16); + IODelay(10000); + +#ifdef WIDE_BUS_MODE + /* XXX - Need to check whether the card is capable before enabiling this */ +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: WIDE_BUS_MODE :: setting 4 bit mode\n"); +#endif //me + SDCommand(0, SD_APP_CMD, SDCR55, this->RCA << 16); + SDCommand(slot, SD_APP_SET_BUS_WIDTH, SDCR6, 2); + IODelay(30000); +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: PCIRegP response order (3,2,1,0) :: 0x%08X 0x%08X 0x%08X 0x%08X\n", + this->PCIRegP[slot]->Response[3], + this->PCIRegP[slot]->Response[2], + this->PCIRegP[slot]->Response[1], + this->PCIRegP[slot]->Response[0]); +#endif//me + if (!(this->PCIRegP[slot]->Response[0] & 0x480000)) { /* check ERROR and ILLEGAL COMMAND */ + this->PCIRegP[slot]->HostControl |= SDHCI_CTRL_4BITBUS; +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: properly switched to 4 bit mode\n"); +#endif//me + } else { +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: unable to switch to 4 bit mode -- calling Reset(slot, {CMD,DAT}_RESET)\n"); +#endif//me + Reset(slot, CMD_RESET); + Reset(slot, DAT_RESET); + } + IODelay(30000); +#endif /* WIDE_BUS_MODE */ +#ifdef HIGHSPEED_CARD_MODE + /* XXX - Need to check whether the card is capable before enabiling this */ +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: HIGHSPEED_CARD_MODE \n"); +#endif //me + SDCommand(slot, SD_SWITCH, SDCR6, 0x01fffff1); + IODelay(10000); + calcClock(slot, 50000000); + this->PCIRegP[slot]->HostControl |= SDHCI_CTRL_HISPD; +#endif /* HIGHSPEED_CARD_MODE */ + + this->PCIRegP[slot]->BlockSize = 512; + this->PCIRegP[slot]->BlockCount = 1; +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: Card Init: Host Control = 0x%x\n", this->PCIRegP[slot]->HostControl); +#endif + this->PCIRegP[slot]->HostControl |= 0x1; +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: Card Init: Host Control = 0x%x\n", this->PCIRegP[slot]->HostControl); +#endif + return true; +} + +/* + * isCardPresent: Return true if card is present, false otherwise + * UInt8 slot: Which slot the card is in + */ +bool VoodooSDHC::isCardPresent(UInt8 slot) { + return PCIRegP[slot]->PresentState & CardInserted; +} + +/* + * isCardWP: Return true if card is write protected, false otherwise + * UInt8 slot: Which slot the card is in. + */ +bool VoodooSDHC::isCardWP(UInt8 slot) { +#ifndef READONLY_DRIVER + return !(this->PCIRegP[slot]->PresentState & WPSwitchLevel); +#else + return true; +#endif +} + +IOReturn VoodooSDHC::setPowerState ( unsigned long state, IOService * provider ) +// Note that it is safe to ignore the whatDevice parameter. +{ + switch (state) { + case 0: // sleep +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: sleep requested by thread: 0x%08x\n", (int)IOThreadSelf()); +#endif //me + lock.lock(); + break; + case 1: // wakeup +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: wakeup requested by thread: 0x%08x\n", (int)IOThreadSelf()); +#endif //me + setup(getProvider()); + lock.unlock(); + break; + } + return kIOPMAckImplied; +} + +/* + * LEDControl: Turns on/off LED on card slot. Not present on Dell Mini 9. + * UInt8 slot: Which slot the card is in. + * bool state: True for on, false for off + */ +void VoodooSDHC::LEDControl(UInt8 slot, bool state) { + if (state) { + this->PCIRegP[slot]->HostControl |= LedControl; + } else { + this->PCIRegP[slot]->HostControl &= ~LedControl; + } +} + +/* + * Reset: Reset SDHCI host controller. Reset levels are defined by SDHCI + * standard. + * UInt8 slot: Which host controller to reset + * UInt8 type: Reset type (Command, Data, or Full) + */ +void VoodooSDHC::Reset(UInt8 slot, UInt8 type) +{ + switch(type) { + case CMD_RESET: + this->PCIRegP[slot]->SoftwareReset = CMD_RESET; + break; + case DAT_RESET: + this->PCIRegP[slot]->SoftwareReset = DAT_RESET; + break; + default: + this->PCIRegP[slot]->SoftwareReset = FULL_RESET; + break; + } + while(this->PCIRegP[slot]->SoftwareReset); +} + +/* + * SDCommand: Send a single command to the SDHCI Host controller. Return true on + * success, false on failure. Will spin wait indefinitely if device is + * busy. + * UInt8 slot: Which slot the card to send to is in + * UInt8 command: SDHC command as defined in SDHC Physical Interface + * UInt16 response: Response type to expect for command passed in + * UInt32 arg: Command argument as defined in SDHC Physical Interface + */ +bool VoodooSDHC::SDCommand(UInt8 slot, UInt8 command, UInt16 response, + UInt32 arg) { + if (command != 0) { + while(this->PCIRegP[slot]->PresentState & ComInhibitCMD); + } + + //if(command 1= COMMANDS?) + //{ + //Wait for DAT to free up + //while(this->PCIRegP[slot]->PresentState & ComInhibitDAT); + //} + + switch(response) { //See SD Host Controller Spec Version 2.00 Page 30 + case R0: + response = 0; + break; + case R1: + response = BIT4|BIT3|BIT1; + break; + case R1b: + response = BIT4|BIT3|BIT1|BIT0; + break; + case R2: + response = BIT3|BIT0; + break; + case R3: + response = BIT1; + break; + case R4: + response = BIT1; + break; + case R5: + response = BIT4|BIT3|BIT1; + break; + case R5b: + response = BIT4|BIT3|BIT1|BIT0; + break; + case R6: + response = BIT4|BIT3|BIT1; + break; + case R7: + response = BIT4|BIT3|BIT1; + break; + } + this->PCIRegP[slot]->Argument = arg; + + if (command == 17 || command == 24) + response |= BIT5; + + if (command == SD_READ_MULTIPLE_BLOCK) { + response |= BIT5; + this->PCIRegP[0]->TransferMode = + SDHCI_TRNS_READ | SDHCI_TRNS_MULTI | + SDHCI_TRNS_BLK_CNT_EN | SDHCI_TRNS_ACMD12 +#ifdef USE_SDMA + | SDHCI_TRNS_DMA +#endif + ; + } + + if (command == SD_WRITE_MULTIPLE_BLOCK) { + response |= BIT5; + this->PCIRegP[0]->TransferMode = SDHCI_TRNS_MULTI | + SDHCI_TRNS_BLK_CNT_EN | SDHCI_TRNS_ACMD12 +#ifdef USE_SDMA + | SDHCI_TRNS_DMA +#endif + ; + } + + this->PCIRegP[slot]->Command = (command << 8) | response; + +// IOLog("Command: %d", (command << 8) | response); + return true; +} + +/* + * calcClock: Calculate card clock rate. See SDHCI Host Controller spec + * for details on calculation. Must be called after cardInit. + * UInt8 slot: Host controller/slot number + * UInt32 clockspeed: Maximum desired clock speed + */ +bool VoodooSDHC::calcClock(UInt8 slot, UInt32 clockspeed) { + UInt32 baseClock; + UInt32 div; + + this->PCIRegP[slot]->ClockControl = 0; + this->PCIRegP[slot]->ClockControl = 0; + this->PCIRegP[slot]->ClockControl |= BIT0; + while(!this->PCIRegP[slot]->ClockControl & BIT1); + baseClock = ((this->PCIRegP[slot]->Capabilities[0] & 0x3F00) >> 8); + baseClock *= 1000000; + +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: BaseClock :: %dMHz\n", baseClock/1000000); +#endif //me + + for(div=1;(baseClock / div) > clockspeed;div <<= 1); + +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: SD Clock :: %dKHz\n", (baseClock/div)/1000); +#endif //me + + div = (div<<7) & 0xFF000; + this->PCIRegP[slot]->ClockControl |= div; + this->PCIRegP[slot]->ClockControl |= BIT2; + return true; +} + +/* + * powerSD: Turn on power to SD Card. Must pay attention to voltage + * level supported. This is determined from the Host capability + * register. + * UInt8 slot: Slot the card is in. + */ +bool VoodooSDHC::powerSD(UInt8 slot) { + this->PCIRegP[slot]->PowerControl = 0; +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: in power_sd(slot) function :: 0x%x\n", this->PCIRegP[slot]->Capabilities[0]); +#endif + if(this->PCIRegP[slot]->Capabilities[0] & CR3v3Support) { + this->PCIRegP[slot]->PowerControl |= HC3v3; + } else if(this->PCIRegP[slot]->Capabilities[0] & CR3v0Support) { + this->PCIRegP[slot]->PowerControl |= HC3v0; + } else if(this->PCIRegP[slot]->Capabilities[0] & CR1v8Support) { + this->PCIRegP[slot]->PowerControl |= HC1v8; + } + this->PCIRegP[slot]->PowerControl |= SDPower; + + return true; +} + +/* + * parseCID: Parse Card Idenitification information + * UInt8 slot: slot the card is in + */ +void VoodooSDHC::parseCID(UInt8 slot) { + this->SDCIDReg[slot].MID = (UInt8)(this->PCIRegP[slot]->Response[3] & 0xFF000000) >> 24; + this->SDCIDReg[slot].OID = (UInt16)(this->PCIRegP[slot]->Response[3] & 0xFFFF00) >> 8; + this->SDCIDReg[slot].PNM[0] = (UInt8)(this->PCIRegP[slot]->Response[3] & 0xFF); + this->SDCIDReg[slot].PNM[1] = (UInt8)((this->PCIRegP[slot]->Response[2] & 0xFF000000) >> 24); + this->SDCIDReg[slot].PNM[2] = (UInt8)((this->PCIRegP[slot]->Response[2] & 0xFF0000) >> 16); + this->SDCIDReg[slot].PNM[3] = (UInt8)((this->PCIRegP[slot]->Response[2] & 0xFF00) >> 8); + this->SDCIDReg[slot].PNM[4] = (UInt8)(this->PCIRegP[slot]->Response[2] & 0xFF); + this->SDCIDReg[slot].PNM[5] = 0; + this->SDCIDReg[slot].PRV[0] = (UInt8)(this->PCIRegP[slot]->Response[1] & 0xF0000000) >> 28; + this->SDCIDReg[slot].PRV[1] = (UInt8)(this->PCIRegP[slot]->Response[1] & 0xF000000) >> 24; + this->SDCIDReg[slot].PSN = (this->PCIRegP[slot]->Response[1] & 0xFFFFFF) << 8; + this->SDCIDReg[slot].PSN |= (this->PCIRegP[slot]->Response[0] & 0xFF000000) >> 24; + this->SDCIDReg[slot].MDT[0] = (UInt8)(this->PCIRegP[slot]->Response[0] & 0xFF000) >> 12; + this->SDCIDReg[slot].MDT[1] = (UInt8)(this->PCIRegP[slot]->Response[1] & 0xF00) >> 8; +} + +/* + * parseCSD: Parse CSD information + * UInt8 slot: slot the card is in + */ +void VoodooSDHC::parseCSD(UInt8 slot) { + switch ((UInt8)((this->PCIRegP[slot]->Response[3] & 0xC00000) >> 22)) { + case 0: // version 1 + { + UInt8 blLen = (UInt8)((PCIRegP[slot]->Response[2] & 0xF00) >> 8); + UInt16 cSize = (UInt16)((PCIRegP[slot]->Response[2] & 0x3) << 10); + cSize |= (UInt16)((PCIRegP[slot]->Response[1] & 0xFFC00000) >> 22); + UInt8 cSizeMult = (UInt8)((PCIRegP[slot]->Response[1] & 0x000380) >> 7); + int large_to_small = (1 << (blLen)) / 512; + maxBlock = (cSize+1) * large_to_small * + (1 << (cSizeMult+2)) - 1; + } + break; + case 1: // version 2 + { + int units = (UInt16)(PCIRegP[slot]->Response[1] >> 24); + units |= (PCIRegP[slot]->Response[1] & 0x00ff0000) >> 8; + units |= (PCIRegP[slot]->Response[2] & 0x3f) << 16; + maxBlock = (units + 1) * 1024; + } + break; + default: + // donno how to bail out... + ; + } +} + +/* + * reportRemovability: Apple API function. An SD Card is a removeable + * device. Returns an I/O success. + * bool *isRemovable: Passed back. Always return true. + */ +IOReturn VoodooSDHC::reportRemovability(bool *isRemovable) { + *isRemovable = true; +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: reportRemovability\n"); +#endif + return kIOReturnSuccess; +} + +/* + * reportWriteProtection: Apple API function. Returns whether the card is + * write protected. Returns an I/O success. + * bool *isWriteProtected: Passed back. Always return true. + */ +IOReturn VoodooSDHC::reportWriteProtection(bool *isWriteProtected) { +// XXX - how is this supposed to work for multi-slot??? + *isWriteProtected = isCardWP( 0 ); + //*isWriteProtected = true; +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: reportWriteProtection\n"); +#endif + return kIOReturnSuccess; +} + +/* + * setWriteCacheState: Apple API function. This driver does not support + * write cacheing. Returns an I/O success. + * bool enabled: Enable/disable cache + */ +IOReturn VoodooSDHC::setWriteCacheState(bool enabled) { +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: setWriteCacheState\n"); +#endif + return kIOReturnSuccess; +} + +/* + * reportPollRequirements: Apple API function. Report back requirements for + * polling. This driver must be polled, but the poll + * is cheap. + * bool *pollRequired: This is a return value from this function + * bool *pollIsExpensive: This is a return value from this function + */ +IOReturn VoodooSDHC::reportPollRequirements(bool *pollRequired, bool *pollIsExpensive) +{ + *pollRequired = false; + *pollIsExpensive = false; + return kIOReturnSuccess; +} + +IOReturn VoodooSDHC::reportMediaState(bool *mediaPresent, bool *changedState) +{ + IOLockLock(mediaStateLock); + + bool presence = isCardPresent(0); + if (cardPresence == kCardRemount) { + *changedState = true; + cardPresence = kCardNotPresent; + } else if ((cardPresence == kCardIsPresent) == presence) { + *changedState = false; + } else { + *changedState = true; + if (presence) { + Reset(0, FULL_RESET); + cardInit(0); + ::OSSynchronizeIO(); + cardPresence = kCardIsPresent; + } else { + cardPresence = kCardNotPresent; + } + } + *mediaPresent = cardPresence == kCardIsPresent; + + IOLockUnlock(mediaStateLock); + return kIOReturnSuccess; +} + +#ifndef __LP64__ +IOReturn VoodooSDHC::reportMaxWriteTransfer(UInt64 blockSize, + UInt64 *max) { + //Max blocks we can read at once (see Block Count Register) + *max = 64 * blockSize; + +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: reportMaxWriteTransfer\n"); +#endif /* end DEBUG */ + + return kIOReturnSuccess; +} + +IOReturn VoodooSDHC::reportMaxReadTransfer (UInt64 blockSize, + UInt64 *max) { + //Max blocks we can read at once (see Block Count Register) + *max = 65536 * blockSize; + +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: reportMaxReadTransfer\n"); +#endif /* end DEBUG */ + + return kIOReturnSuccess; +} +#endif /* !__LP64__ */ + +IOReturn VoodooSDHC::reportMaxValidBlock(UInt64 *maxBlock) { + *maxBlock = this->maxBlock; + +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: reportMaxValidBlock\n"); +#endif + + return kIOReturnSuccess; +} + +IOReturn VoodooSDHC::reportLockability(bool *isLockable) { + *isLockable = false; +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: reportLockability\n"); +#endif + return kIOReturnSuccess; +} + +IOReturn VoodooSDHC::reportEjectability(bool *isEjectable) { + *isEjectable = false; +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: reportEjectability\n"); +#endif + return kIOReturnSuccess; +} + + +IOReturn VoodooSDHC::reportBlockSize(UInt64 *blockSize) { + // Read/write block size is always 512 bytes. Card's block size + // is reported but only used in computations of size, not access. + *blockSize = 512; +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: reportBlockSize: %d\n", *blockSize); +#endif + return kIOReturnSuccess; +} + +IOReturn VoodooSDHC::getWriteCacheState(bool *enabled) { + *enabled = false; +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: getWriteCacheState\n"); +#endif + return kIOReturnSuccess; +} + +char * VoodooSDHC::getVendorString(void) { +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: getVendorString\n"); +#endif + return("Generic"); +} + +char * VoodooSDHC::getRevisionString(void) { +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: getRevisionString\n"); +#endif + return("2"); +} + +char * VoodooSDHC::getProductString(void) { +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: getProductString\n"); +#endif + return("SDHCI Controller"); +} + +char * VoodooSDHC::getAdditionalDeviceInfoString(void) { +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: getAdditionalDeviceInfoString\n"); +#endif + return("VoodooSDHCI:getAdditionalDeviceInfoString"); +} + +IOReturn VoodooSDHC::doSynchronizeCache(void) { +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: doSynchronizeCache\n"); +#endif + return kIOReturnSuccess; +} + +IOReturn VoodooSDHC::doLockUnlockMedia(bool doLock) { +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: doLockUnlockMedia\n"); +#endif + return kIOReturnUnsupported; +} + +UInt32 VoodooSDHC::doGetFormatCapacities(UInt64 *capacities, UInt32 capacitiesMaxCount) const { +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: doGetFormatCapacities\n"); +#endif + return kIOReturnSuccess; +} + +IOReturn VoodooSDHC::doFormatMedia(UInt64 byteCapacity) { +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: doFormatMedia\n"); +#endif + return kIOReturnUnsupported; +} + +IOReturn VoodooSDHC::doEjectMedia(void) { +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: doEjectMedia\n"); +#endif + return kIOReturnUnsupported; +} + +bool VoodooSDHC::waitIntStatus(UInt32 maskBits) +{ + // roughly 5 seconds before timeout + for (int cnt = 0; cnt < 500000; cnt++) { + while (1) { + UInt32 nis = PCIRegP[0]->NormalIntStatus; + if (nis & ErrorInterrupt) { + return false; + } + if (nis & maskBits) { + PCIRegP[0]->NormalIntStatus = nis | maskBits; + return true; + } + } + ::IODelay(10); + } + return false; +} + +/* + * readBlockMulti_pio: Read a set of blocks using multi-block reads and PIO + * not DMA mode. The host controller must be locked when + * this function is called. + * IOMemoryDescriptor *buffer: Buffer operation class. Defines + * read/write, address of operation, etc. + * UInt32 block: Block offset to read/write + * UInt32 nblks: Block count to read/write + * UInt32 offset: Offset from beginning of transfer - where in + * final buffer we should begin placing data + */ +IOReturn VoodooSDHC::readBlockMulti_pio(IOMemoryDescriptor *buffer, + UInt32 block, UInt32 nblks, + UInt32 offset) { + UInt8 buff[512]; // Temporary storage for one block + UInt32 *pBuff; + IOReturn ret = kIOReturnError; + +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: readBlockMulti_pio: block = %d, nblks = %d\n", block, nblks); +#endif /* __DEBUG__ */ + + pBuff = (UInt32*)buff; + +#ifndef NO_RESET_WAR + // Reset card before every operation. The Linux driver + // does this for this host controller. Not sure why. + Reset(0, CMD_RESET); + Reset(0, DAT_RESET); +#endif + + /* Enable all interrupts */ + this->PCIRegP[0]->NormalIntStatusEn = -1; + this->PCIRegP[0]->ErrorIntStatusEn = -1; + + /* Clear pending interrupts */ + this->PCIRegP[0]->NormalIntStatus = + (BuffReadReady | XferComplete | CmdComplete); + + /* Set maximum timeout value */ + this->PCIRegP[0]->TimeoutControl = 0xe; + + *(volatile UInt32 *)&(this->PCIRegP[0]->NormalIntStatus) = + *(volatile UInt32 *)&(this->PCIRegP[0]->NormalIntStatus); + + this->PCIRegP[0]->BlockSize = 512; + this->PCIRegP[0]->BlockCount = nblks; + + this->PCIRegP[0]->TransferMode = SDHCI_TRNS_READ | SDHCI_TRNS_MULTI | + SDHCI_TRNS_BLK_CNT_EN | SDHCI_TRNS_ACMD12; + + + // Issue read command to host controller + SDCommand(0, SD_READ_MULTIPLE_BLOCK, SDCR18, isHighCapacity ? block : block * 512); + + // wait for CmdComplete + if (! waitIntStatus(CmdComplete)) { + IOLog("VoodooSDHCI: I/O error after command 18: It Status: 0x%x\n", PCIRegP[0]->NormalIntStatus); + goto out; + } + + for (int i = 0; i < nblks; i++) { + // wait for BufferReadReady + if (! waitIntStatus(BuffReadReady)) { + IOLog("VoodooSDHCI: I/O timeout while waiting for data, Status: 0x%0x\n", PCIRegP[0]->NormalIntStatus); + goto out; + + } + /* Read block from card */ + read_block_pio(&this->PCIRegP[0]->BufferDataPort, pBuff); + + /* Copy buffer to final location */ + buffer->writeBytes((i + offset) * 512, buff, 1 * 512); + } + + // wait for transfer complete + if (! waitIntStatus(XferComplete)) { + IOLog("VoodooSDHCI: I/O timeout during completion... status == 0x%x\n", PCIRegP[0]->NormalIntStatus); + } + ret = kIOReturnSuccess; +out: + return ret; +} + +/* + * sdma_access: Read / write a set of blocks using multi-block reads in SDMA mode. + * The host controller must be locked when this function is called. + * IOMemoryDescriptor *buffer: Buffer operation class. Defines + * read/write, address of operation, etc. + * UInt32 block: Block offset to read/write + * UInt32 nblks: Block count to read/write + * bool read: true if read, false if write + */ +IOReturn VoodooSDHC::sdma_access(IOMemoryDescriptor *buffer, + UInt32 block, UInt32 nblks, bool read) { + IOReturn ret = kIOReturnError; + UInt32 nis, offset = 0; + AbsoluteTime deadline; + +#ifdef __DEBUG__ +IOLog("VoodooSDHCI readBlockMulti_sdma: block = %d, nblks = %d\n", block, nblks); +#endif /* __DEBUG__ */ +#ifndef NO_RESET_WAR + // Reset card before every operation. The Linux driver + // does this for this host controller. Not sure why. + Reset(0, CMD_RESET); + Reset(0, DAT_RESET); +#endif + + /* write: fill in data */ + if (! read) { + buffer->readBytes(offset * 512, virtSdmaBuff, min(SDMA_BUFFER_SIZE, nblks * 512)); + offset += min(SDMA_BUFFER_SIZE / 512, nblks); + } + + /* Set maximum timeout value */ + this->PCIRegP[0]->TimeoutControl = 0xe; // 2^27clks / 50MHz = 2.7 seconds + + /* Enable all interrupts */ + this->PCIRegP[0]->NormalIntSignalEn = 0x01ff; + this->PCIRegP[0]->NormalIntStatusEn = -1; + this->PCIRegP[0]->ErrorIntSignalEn = 0x01ff; + this->PCIRegP[0]->ErrorIntStatusEn = -1; + + /* Clear pending interrupts */ + this->PCIRegP[0]->NormalIntStatus = + (BuffReadReady | XferComplete | CmdComplete); + this->PCIRegP[0]->ErrorIntStatus = 0xf3ff; + + ::OSSynchronizeIO(); + PCIRegP[0]->SDMASysAddr = physSdmaBuff; + ::OSSynchronizeIO(); + this->PCIRegP[0]->BlockSize = 512 | SDMA_BUFFER_SIZE_IN_REG; + this->PCIRegP[0]->BlockCount = nblks; + ::OSSynchronizeIO(); + + // Issue read command to host controller + SDCommand(0, + read ? SD_READ_MULTIPLE_BLOCK : SD_WRITE_MULTIPLE_BLOCK, + SDCR18, + isHighCapacity ? block : block * 512); + ::OSSynchronizeIO(); + + // wait for CmdComplete + if (! waitIntStatus(CmdComplete)) { + IOLog("VoodooSDHCI: I/O error after command %d (SDMA): Status: 0x%x, Error: 0x%x\n", + read ? SD_READ_MULTIPLE_BLOCK : SD_WRITE_MULTIPLE_BLOCK, PCIRegP[0]->NormalIntStatus, PCIRegP[0]->ErrorIntStatus); + Reset(0, FULL_RESET); + if (! cardInit(0)) { + IOLog("VoodooSDHCI: reset failed, disabling access\n"); + cardPresence = kCardRemount; + } + ret = kIOReturnTimeout; + goto out; + } + // check response + if (PCIRegP[0]->Response[0] & (read ? 0xcff80000 : 0xeff80000)) { + IOLog("VoodooSDHCI: Unexpected response from command %d (SDMA): Response: 0x%x\n", + read ? SD_READ_MULTIPLE_BLOCK : SD_WRITE_MULTIPLE_BLOCK, PCIRegP[0]->Response[0]); + goto out; + } + + clock_interval_to_deadline(5000, kMillisecondScale, (uint64_t*)&deadline); + IOLockLock(sdmaCond); + while ((PCIRegP[0]->NormalIntStatus & ErrorInterrupt) == 0) { + if (IOLockSleepDeadline(sdmaCond, sdmaCond, deadline, THREAD_UNINT) == THREAD_TIMED_OUT) { + IOLockUnlock(sdmaCond); + // timeout + IOLog("VoodooSDHCI: I/O timeout during SDMA transfer: Status: 0x%x, Error: 0x%x, Block: %d, Offset: %d, Blocks: %d\n", + PCIRegP[0]->NormalIntStatus, PCIRegP[0]->ErrorIntStatus, (int)block, (int)offset, (int)nblks); + ret = kIOReturnTimeout; + goto out; + } + nis = PCIRegP[0]->NormalIntStatus; + if (nis & XferComplete) { + IOLockUnlock(sdmaCond); + if (read) { + buffer->writeBytes(offset * 512, virtSdmaBuff, nblks * 512); + } + PCIRegP[0]->NormalIntStatus = XferComplete | DMAInterrupt; + ret = kIOReturnSuccess; + goto out; + } else if (nis & DMAInterrupt) { + IOLockUnlock(sdmaCond); + if (read) { + buffer->writeBytes(offset * 512, virtSdmaBuff, SDMA_BUFFER_SIZE); + offset += SDMA_BUFFER_SIZE / 512; + nblks -= SDMA_BUFFER_SIZE / 512; + } else { + buffer->readBytes(offset * 512, virtSdmaBuff, min(SDMA_BUFFER_SIZE, (nblks - offset) * 512)); + offset += min(SDMA_BUFFER_SIZE / 512, nblks - offset); + } + IOLockLock(sdmaCond); + PCIRegP[0]->NormalIntStatus = DMAInterrupt; + ::OSSynchronizeIO(); + PCIRegP[0]->SDMASysAddr = physSdmaBuff; + } + } + IOLockUnlock(sdmaCond); + // error + IOLog("VoodooSDHCI: I/O error during SDMA transfer: Status: 0x%x, Error: 0x%x, Block: %d, Offset: %d, Blocks: %d\n", + PCIRegP[0]->NormalIntStatus, PCIRegP[0]->ErrorIntStatus, (int)block, (int)offset, (int)nblks); + goto out; + + ret = kIOReturnSuccess; +out: + PCIRegP[0]->NormalIntSignalEn = 0; + PCIRegP[0]->ErrorIntSignalEn = 0; + return ret; +} + + + +/* + * readBlockSingle_pio: Read a single block from the card using PIO not DMA + * mode. The host controller must be locked when this + * function is called. + * UInt8 *buff: Temporary buffer for data + * UInt32 block: Block offset to read/write + */ +IOReturn VoodooSDHC::readBlockSingle_pio(UInt8 *buff, UInt32 block) { + UInt32 *pBuff; + int cnt, pass; + IOReturn ret; + +#ifndef NO_RESET_WAR + // Reset card before every operation. The Linux driver does this for + // this host controller. Not sure why + Reset(0, CMD_RESET); + Reset(0, DAT_RESET); +#endif /* NO_RESET_WAR */ + + pBuff = (UInt32*)buff; + + /* Set transfer mode to single block */ + this->PCIRegP[0]->TransferMode = BIT4; + + /* Enable interrupt flags */ + this->PCIRegP[0]->NormalIntStatusEn = -1; + this->PCIRegP[0]->ErrorIntStatusEn = -1; + + /* Clear pending interrupts */ + this->PCIRegP[0]->NormalIntStatus = + (BuffReadReady | XferComplete | CmdComplete); + + /* Set maximum timeout value */ + this->PCIRegP[0]->TimeoutControl = 0xe; + +#ifdef __DEBUG__ + IOLog("VoodooSDHCI Int Status 0x%x Timeout = 0x%x\n", + *(volatile UInt32 *)&(this->PCIRegP[0]->NormalIntStatus), + this->PCIRegP[0]->TimeoutControl); + + //IOLog("VoodooSDHCI: state1 = 0x%x response = 0x%x\n", + // this->PCIRegP[0]->PresentState, this->PCIRegP[0]->Response[0]); +#endif /* __DEBUG__ */ + + *(volatile UInt32 *)&(this->PCIRegP[0]->NormalIntStatus) = + *(volatile UInt32 *)&(this->PCIRegP[0]->NormalIntStatus); + + SDCommand(0, SD_READ_SINGLE_BLOCK, SDCR17, isHighCapacity ? block : block * 512); + + cnt = pass = 0; + + //IOLog("VoodooSDHCI: state2 = 0x%x response = 0x%x\n", + // this->PCIRegP[0]->PresentState, this->PCIRegP[0]->Response[0]); + + while((this->PCIRegP[0]->NormalIntStatus & BuffReadReady) != + BuffReadReady) { + if (this->PCIRegP[0]->NormalIntStatus & 0x8000) { + IOLog("VoodooSDHCI: S Returning error: 0x%x\n", *(volatile UInt32 *) & (this->PCIRegP[0]->NormalIntStatus)); + ret = kIOReturnError; + goto out; + } + cnt++; + if (cnt > 100000) { + cnt = 0; + pass++; + IOLog("VoodooSDHCI: Stuck in while loop 1: pass = %d" + " status = 0x%x state = 0x%x\n", pass, + *(volatile UInt32 *)&(this->PCIRegP[0]-> + NormalIntStatus), + this->PCIRegP[0]->PresentState); + if (pass > 10) { + ret = kIOReturnError; + goto out; + } + } + ::IODelay(10); + } + + /* Read block from card */ + read_block_pio(&this->PCIRegP[0]->BufferDataPort, pBuff); + + ret = kIOReturnSuccess; + +out: + this->PCIRegP[0]->NormalIntStatus = + (BuffReadReady|XferComplete|CmdComplete); + return ret; +} + +/* + * writeBlockMulti_pio: Write multiple blocks to the card using PIO not DMA + * mode. The host controller must be locked when this + * function is called. + * IOMemoryDescriptor *buffer: Buffer operation class. Defines + * read/write, address of operation, etc. + * UInt32 block: Block offset to read/write + * UInt32 nblks: Number of blocks to read/write + * UInt32 offset: Offset from beginning of transfer - where in + * final buffer we should begin placing data + */ +IOReturn VoodooSDHC::writeBlockMulti_pio(IOMemoryDescriptor *buffer, + UInt32 block, UInt32 nblks, UInt32 offset) { + UInt8 buff[512]; // Temporary storage for data block + int cnt, pass; + UInt32 *pBuff; + IOReturn ret; + +#ifndef NO_RESET_WAR + // Reset card before every operation. The Linux driver does this + // for this host controller. Not sure why. + Reset(0, CMD_RESET); + Reset(0, DAT_RESET); +#endif + + this->PCIRegP[0]->NormalIntStatusEn = -1; + this->PCIRegP[0]->ErrorIntStatusEn = -1; + this->PCIRegP[0]->NormalIntStatus = + BuffWriteReady | XferComplete | CmdComplete; + this->PCIRegP[0]->TimeoutControl = 0xe; + + this->PCIRegP[0]->BlockSize = 512; + this->PCIRegP[0]->BlockCount = nblks; + + SDCommand(0, SD_APP_CMD, SDCR55, this->RCA << 16); + SDCommand(0, SD_APP_SET_WR_BLK_ERASE_COUNT, SDCR23, nblks); + SDCommand(0, SD_WRITE_MULTIPLE_BLOCK, SDCR24, isHighCapacity ? block : block * 512); + + for (int i = 0; i < nblks; i++) { + buffer->readBytes((offset + i) * 512, buff, 1 * 512); + + pBuff = (UInt32*)buff; + + cnt = pass = 0; + while(!(this->PCIRegP[0]->PresentState & + SDHCI_SPACE_AVAILABLE)) { + cnt++; + + if (this->PCIRegP[0]->NormalIntStatus & 0x8000) { + IOLog("VoodooSDHCI 2 Returning error: 0x%x\n", + *(volatile UInt32 *) + &(this->PCIRegP[0]->NormalIntStatus)); + ret = kIOReturnError; + goto out; + } + if (cnt > 100000) { + cnt = 0; + pass++; + IOLog("VoodooSDHCI: Stuck in while loop 2: pass = %d" + " status = 0x%x\n", pass, + this->PCIRegP[0]->NormalIntStatus); + if (pass > 10) { + ret = kIOReturnError; + goto out; + } + } + ::IODelay(10); + } + + this->PCIRegP[0]->NormalIntStatus = + this->PCIRegP[0]->NormalIntStatus; + + for (int j = 0; j < 128; j++) { + this->PCIRegP[0]->BufferDataPort = *pBuff; + pBuff++; + } + + } + + cnt = pass = 0; + while ((this->PCIRegP[0]->NormalIntStatus & XferComplete) != + XferComplete) { + cnt++; + if (this->PCIRegP[0]->NormalIntStatus & 0x8000) { + IOLog("VoodooSDHCI 3 Returning error: 0x%x\n", + *(volatile UInt32 *) + &(this->PCIRegP[0]->NormalIntStatus)); + ret = kIOReturnError; + goto out; + } + + if (cnt > 100000) { + cnt = 0; + pass++; + IOLog("VoodooSDHCI: Stuck in while loop 3: pass = %d" + " status = 0x%x\n", pass, + this->PCIRegP[0]->NormalIntStatus); + if (pass > 10) { + ret = kIOReturnError; + goto out; + } + } + } + this->PCIRegP[0]->NormalIntStatus = + BuffWriteReady | XferComplete | CmdComplete; + ret = kIOReturnSuccess; + +out: + return ret; +} + +/* + * writeBlockSingle_pio: Read a single block from the card using PIO not DMA + * mode. The host controller must be locked when this + * function is called. + * IOMemoryDescriptor *buffer: Buffer operation class. Defines + * read/write, address of operation, etc. + * UInt32 block: Block offset to read/write + * UInt32 offset: Offset from beginning of transfer - where in + * final buffer we should begin placing data + */ +IOReturn VoodooSDHC::writeBlockSingle_pio(IOMemoryDescriptor *buffer, + UInt32 block, UInt32 offset) { + UInt8 buff[512]; // Temporary storage for data block + int cnt, pass; + UInt32 *pBuff; + IOReturn ret; + + pBuff = (UInt32*)buff; + + buffer->readBytes(offset * 512, buff, 1 * 512); + +#ifndef NO_RESET_WAR + // Reset card before every operation. The Linux driver does this + // for this host controller. Not sure why. + Reset(0, CMD_RESET); + Reset(0, DAT_RESET); +#endif + + this->PCIRegP[0]->TransferMode = 0; + this->PCIRegP[0]->NormalIntStatusEn = -1; + this->PCIRegP[0]->ErrorIntStatusEn = -1; + this->PCIRegP[0]->NormalIntStatus = + BuffWriteReady | XferComplete | CmdComplete; + this->PCIRegP[0]->TimeoutControl = 0xe; + + SDCommand(0, SD_WRITE_BLOCK, SDCR24, isHighCapacity ? block : block * 512); + + cnt = pass = 0; + while ((this->PCIRegP[0]->NormalIntStatus & BuffWriteReady) != + BuffWriteReady) { + cnt++; + + if (this->PCIRegP[0]->NormalIntStatus & 0x8000) { + IOLog("VoodooSDHCI: 2 Returning error: 0x%x\n", + *(volatile UInt32 *) + &(this->PCIRegP[0]->NormalIntStatus)); + ret = kIOReturnError; + goto out; + } + + if (cnt > 100000) { + cnt = 0; + pass++; + IOLog("VoodooSDHCI: Stuck in while loop 2: pass = %d" + " status = 0x%x\n", pass, + this->PCIRegP[0]->NormalIntStatus); + if (pass > 10) { + ret = kIOReturnError; + goto out; + } + } + } + + for (int j = 0; j < 128; j++) { + this->PCIRegP[0]->BufferDataPort = *pBuff; + pBuff++; + } + + cnt = pass = 0; + while ((this->PCIRegP[0]->NormalIntStatus & XferComplete) != + XferComplete) { + cnt++; + + if (this->PCIRegP[0]->NormalIntStatus & 0x8000) { + IOLog("VoodooSDHCI 3 Returning error: 0x%x\n", + *(volatile UInt32 *) + &(this->PCIRegP[0]->NormalIntStatus)); + ret = kIOReturnError; + goto out; + } + + if (cnt > 100000) { + cnt = 0; + pass++; + IOLog("VoodooSDHCI: stuck in while loop #3: pass = %d" + " status = 0x%x\n", pass, + this->PCIRegP[0]->NormalIntStatus); + if (pass > 10) { + ret = kIOReturnError; + goto out; + } + } + } + this->PCIRegP[0]->NormalIntStatus = + BuffWriteReady | XferComplete | CmdComplete; + ret = kIOReturnSuccess; + +out: + return ret; +} + +/* + * doAsyncReadWrite: Guts of the driver. Perform reads and writes. This + * function must be reentrant. Further, the completion + * action may result in another call to this function. + * This function may block. + * Returns success or failure. + * IOMemoryDescriptor *buffer: Buffer operation class. Defines + * read/write, address of operation, etc. + * UInt32 block: Block offset to read/write + * + * IOStorageCompletion completion: Action to perform upon + * completion of operation + */ +#ifdef __LP64__ +IOReturn VoodooSDHC::doAsyncReadWrite(IOMemoryDescriptor *buffer, + UInt64 block, UInt64 nblks, + IOStorageAttributes *attributes, + IOStorageCompletion *completion) { + UInt8 buff[512]; // Temporary storage for data block + int ret = 0; + int locked; + UInt64 blk, n; + + // All access to the card must be done while this lock is held + lock.lock(); + locked = 1; + + if (cardPresence != kCardIsPresent || ! isCardPresent(0)) { + ret = kIOReturnNoMedia; + goto out; + } +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: in doAsyncReadWrite function :: block == %d, nblks == %d, ", block, nblks); +#endif + if (buffer->getDirection() == kIODirectionIn) { + /* Read from Card */ +#ifdef __DEBUG__ + IOLog("READING FROM CARD!\n"); +#endif + blk = block; + n = nblks; + while (n) { + if (USE_SDMA) { + int i; + for (i = 0; i < SDMA_RETRY_COUNT; i++) + if ((ret = sdma_access(buffer, block, nblks, true)) != kIOReturnTimeout) + break; + if (i != 0) + IOLog("VoodooSDHCI: retry succeeded\n"); + n = 0; + } else if ((nblks > 1) && USE_MULTIBLOCK) { + int b = MIN(2048 /* should fit in sdma buff */, n); + + ret = readBlockMulti_pio(buffer, blk, b, + blk - block); + n -= b; + blk += b; + } else { + ret = readBlockSingle_pio(buff, blk); + buffer->writeBytes((blk - block) * 512, + buff, 1 * 512); + n--; + blk++; + } + if (ret != kIOReturnSuccess) goto out; +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: ret = 0x%x block = %d\n", ret, blk);; +#endif /* __DEBUG__ */ + } + } else { + /* Write to Card */ +#ifdef __DEBUG__ + IOLog("WRITING TO CARD!\n"); +#endif + +#ifdef READONLY_DRIVER + // When compiled in this mode, the driver fails all write + // operations. Useful for testing to gain confidence in + // code without trashing data. Define must be set at top + // of file. + ret = kIOReturnError; + goto out; +#endif + blk = block; + n = nblks; + while (n) { + if (USE_SDMA) { + int i; + for (i = 0; i < SDMA_RETRY_COUNT; i++) + if ((ret = sdma_access(buffer, block, nblks, false)) != kIOReturnTimeout) + break; + if (i != 0) + IOLog("VoodooSDHCI: retry succeeded\n"); + n = 0; + } + else if ((nblks > 1) && USE_MULTIBLOCK) { + int b = MIN(2048, n); + ret = writeBlockMulti_pio(buffer, blk, b, + blk - block); + n -= b; + blk += b; + } else { + ret = writeBlockSingle_pio(buffer, blk, + blk - block); + n--; + blk++; + } + if (ret != kIOReturnSuccess) goto out; + } + + } + + locked = 0; + lock.unlock(); + + if(completion->action) { + (completion->action)(completion->target, completion->parameter, kIOReturnSuccess, nblks * 512); + } else { + IOLog("VoodooSDHCI ERROR!\n"); + ret = kIOReturnError; + goto out; + } + ret = kIOReturnSuccess; + +out: + switch (ret) { + case kIOReturnSuccess: + break; + case kIOReturnNoMedia: + /* require remount */ + cardPresence = kCardRemount; + IOLog("VoodooSDHCI: media not present, require remount\n"); + break; + } + if (locked) + lock.unlock(); + // in_read_write = 0; + return ret; +} +#else /* !__LP64__ */ +IOReturn VoodooSDHC::doAsyncReadWrite(IOMemoryDescriptor *buffer, + UInt32 block, UInt32 nblks, IOStorageCompletion completion) { + UInt8 buff[512]; // Temporary storage for data block + int ret = 0; + int locked; + UInt32 blk, n; + + // All access to the card must be done while this lock is held + lock.lock(); + locked = 1; + + if (cardPresence != kCardIsPresent || ! isCardPresent(0)) { + ret = kIOReturnNoMedia; + goto out; + } +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: in doAsyncReadWrite function :: block == %d, nblks == %d, ", block, nblks); +#endif + if (buffer->getDirection() == kIODirectionIn) { + /* Read from Card */ +#ifdef __DEBUG__ + IOLog("READING FROM CARD!\n"); +#endif + blk = block; + n = nblks; + while (n) { + if (USE_SDMA) { + int i; + for (i = 0; i < SDMA_RETRY_COUNT; i++) + if ((ret = sdma_access(buffer, block, nblks, true)) != kIOReturnTimeout) + break; + if (i != 0) + IOLog("VoodooSDHCI: retry succeeded\n"); + n = 0; + } else if ((nblks > 1) && USE_MULTIBLOCK) { + int b = MIN(2048 /* should fit in sdma buff */, n); + + ret = readBlockMulti_pio(buffer, blk, b, + blk - block); + n -= b; + blk += b; + } else { + ret = readBlockSingle_pio(buff, blk); + buffer->writeBytes((blk - block) * 512, + buff, 1 * 512); + n--; + blk++; + } + if (ret != kIOReturnSuccess) goto out; +#ifdef __DEBUG__ + IOLog("VoodooSDHCI: ret = 0x%x block = %d\n", ret, blk);; +#endif /* __DEBUG__ */ + } + } else { + /* Write to Card */ +#ifdef __DEBUG__ + IOLog("WRITING TO CARD!\n"); +#endif + +#ifdef READONLY_DRIVER + // When compiled in this mode, the driver fails all write + // operations. Useful for testing to gain confidence in + // code without trashing data. Define must be set at top + // of file. + ret = kIOReturnError; + goto out; +#endif + blk = block; + n = nblks; + while (n) { + if (USE_SDMA) { + int i; + for (i = 0; i < SDMA_RETRY_COUNT; i++) + if ((ret = sdma_access(buffer, block, nblks, false)) != kIOReturnTimeout) + break; + if (i != 0) + IOLog("VoodooSDHCI: retry succeeded\n"); + n = 0; + } + else if ((nblks > 1) && USE_MULTIBLOCK) { + int b = MIN(2048, n); + ret = writeBlockMulti_pio(buffer, blk, b, + blk - block); + n -= b; + blk += b; + } else { + ret = writeBlockSingle_pio(buffer, blk, + blk - block); + n--; + blk++; + } + if (ret != kIOReturnSuccess) goto out; + } + + } + + locked = 0; + lock.unlock(); + + if(completion.action) { + (*completion.action)(completion.target, completion.parameter, kIOReturnSuccess, nblks * 512); + } else { + IOLog("VoodooSDHCI ERROR!\n"); + ret = kIOReturnError; + goto out; + } + ret = kIOReturnSuccess; + +out: + switch (ret) { + case kIOReturnSuccess: + break; + case kIOReturnNoMedia: + /* require remount */ + cardPresence = kCardRemount; + IOLog("VoodooSDHCI: media not present, require remount\n"); + break; + } + if (locked) + lock.unlock(); +// in_read_write = 0; + return ret; +} +#endif /* !__LP64__ */ + + +void VoodooSDHC::handleInterrupt() +{ + IOLockLock(sdmaCond); + IOLockWakeup(sdmaCond, sdmaCond, true); + IOLockUnlock(sdmaCond); +} + +void VoodooSDHC::handleTimer() +{ + bool mediaPresent, changedState; + reportMediaState(&mediaPresent, &changedState); + if (changedState) + messageClients( + kIOMessageMediaStateHasChanged, + (void*)(mediaPresent ? kIOMediaStateOnline: kIOMediaStateOffline), + 0); + timerSrc->setTimeoutMS(1000); +} + +void VoodooSDHC::interruptHandler(OSObject *owner, IOInterruptEventSource *, int) +{ + VoodooSDHC *self = static_cast(owner); + self->handleInterrupt(); +} + +bool VoodooSDHC::interruptFilter(OSObject *owner, IOFilterInterruptEventSource *) +{ + if (OSDynamicCast(VoodooSDHC, owner)) { + return true; + } + return false; +} + +void VoodooSDHC::timerHandler(OSObject *owner, IOTimerEventSource *) +{ + VoodooSDHC *self = static_cast(owner); + self->handleTimer(); +} Property changes on: trunk/VoodooSDHC.cpp ___________________________________________________________________ Added: svn:executable + * Index: trunk/SD_DataTypes.h =================================================================== --- trunk/SD_DataTypes.h (revision 0) +++ trunk/SD_DataTypes.h (revision 2) @@ -0,0 +1,72 @@ +#include "License.h" + +struct SDCIDReg_t + { + UInt8 MID; + UInt16 OID; + char PNM[6]; + UInt8 PRV[2]; + UInt32 PSN; + UInt8 MDT[2]; + }; + +struct SDCSDReg1_t + { + UInt8 CSD_STRUCTURE; + UInt8 TAAC; + UInt8 NSAC; + UInt8 TRAN_SPEED; + UInt16 CCC; + UInt8 READ_BL_LEN; + UInt8 READ_BL_PARTIAL; + UInt8 READ_BLK_MISALIGN; + UInt8 DSR_IMP; + UInt16 C_SIZE; + UInt8 VDD_R_CURR_MIN; + UInt8 VDD_R_CURR_MAX; + UInt8 VDD_W_CURR_MIN; + UInt8 VDD_W_CURR_MAX; + UInt8 C_SIZE_MULT; + UInt8 ERASE_BLK_EN; + UInt8 SECTOR_SIZE; + UInt8 WP_GRP_SIZE; + UInt8 WP_GRP_ENABLE; + UInt8 R2W_FACTOR; + UInt8 WRITE_BL_LEN; + UInt8 WRITE_BL_PARTIAL; + UInt8 FILE_FORMAT_GRP; + UInt8 COPY; + UInt8 PERM_WRITE_PROTECT; + UInt8 TMP_WRITE_PROTECT; + UInt8 FILE_FORMAT; + UInt8 CRC; + }; + +struct SDCSDReg2_t + { + UInt8 CSD_STRUCTURE; + UInt8 TAAC; + UInt8 NSAC; + UInt8 TRAN_SPEED; + UInt16 CCC; + UInt8 READ_BL_LEN; + UInt8 READ_BL_PARTIAL; + UInt8 READ_BLK_MISALIGN; + UInt8 DSR_IMP; + UInt32 C_SIZE; + UInt8 ERASE_BLK_EN; + UInt8 SECTOR_SIZE; + UInt8 WP_GRP_SIZE; + UInt8 WP_GRP_ENABLE; + UInt8 R2W_FACTOR; + UInt8 WRITE_BL_LEN; + UInt8 WRITE_BL_PARTIAL; + UInt8 FILE_FORMAT_GRP; + UInt8 COPY; + UInt8 PERM_WRITE_PROTECT; + UInt8 TMP_WRITE_PROTECT; + UInt8 FILE_FORMAT; + UInt8 CRC; + }; + + \ No newline at end of file Property changes on: trunk/SD_DataTypes.h ___________________________________________________________________ Added: svn:executable + * Index: trunk/SD_Commands.h =================================================================== --- trunk/SD_Commands.h (revision 0) +++ trunk/SD_Commands.h (revision 2) @@ -0,0 +1,474 @@ +#ifndef SD_H +#define SD_H + +#include "License.h" +#include "SD_Misc.h" + +/* SD commands type argument response */ + /* class 0 */ +/* This is basically the same command as for MMC with some quirks. */ +#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */ +#define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */ + + /* class 10 */ +#define SD_SWITCH 6 /* adtc [31:0] See below R1 */ + + /* Application commands */ +#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */ +#define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */ +#define SD_APP_SET_WR_BLK_ERASE_COUNT 23 /* R1 */ +#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */ +#define SD_APP_SEND_SCR 51 /* adtc R1 */ + +/* Standard MMC commands (4.1) type argument response */ + /* class 1 */ +#define SD_GO_IDLE_STATE 0 /* bc */ +#define SD_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */ +#define SD_ALL_SEND_CID 2 /* bcr R2 */ +#define SD_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */ +#define SD_SET_DSR 4 /* bc [31:16] RCA */ +#define SD_SWITCH 6 /* ac [31:0] See below R1b */ +#define SD_SELECT_CARD 7 /* ac [31:16] RCA R1 */ +#define SD_SEND_EXT_CSD 8 /* adtc R1 */ +#define SD_SEND_CSD 9 /* ac [31:16] RCA R2 */ +#define SD_SEND_CID 10 /* ac [31:16] RCA R2 */ +#define SD_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */ +#define SD_STOP_TRANSMISSION 12 /* ac R1b */ +#define SD_SEND_STATUS 13 /* ac [31:16] RCA R1 */ +#define SD_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */ +#define SD_SPI_READ_OCR 58 /* spi spi_R3 */ +#define SD_SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */ + + /* class 2 */ +#define SD_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */ +#define SD_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */ +#define SD_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */ + + /* class 3 */ +#define SD_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */ + + /* class 4 */ +#define SD_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */ +#define SD_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */ +#define SD_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */ +#define SD_PROGRAM_CID 26 /* adtc R1 */ +#define SD_PROGRAM_CSD 27 /* adtc R1 */ + + /* class 6 */ +#define SD_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */ +#define SD_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */ +#define SD_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */ + + /* class 5 */ +#define SD_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */ +#define SD_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */ +#define SD_ERASE 38 /* ac R1b */ + + /* class 9 */ +#define SD_FAST_IO 39 /* ac R4 */ +#define SD_GO_IRQ_STATE 40 /* bcr R5 */ + + /* class 7 */ +#define SD_LOCK_UNLOCK 42 /* adtc R1b */ + + /* class 8 */ +#define SD_APP_CMD 55 /* ac [31:16] RCA R1 */ +#define SD_GEN_CMD 56 /* adtc [0] RD/WR R1 */ + +/* + * MMC_SWITCH argument format: + * + * [31:26] Always 0 + * [25:24] Access Mode + * [23:16] Location of target Byte in EXT_CSD + * [15:08] Value Byte + * [07:03] Always 0 + * [02:00] Command Set + */ + +/* + MMC status in R1, for native mode (SPI bits are different) + Type + e : error bit + s : status bit + r : detected and set for the actual command response + x : detected and set during command execution. the host must poll + the card by sending status command in order to read these bits. + Clear condition + a : according to the card state + b : always related to the previous command. Reception of + a valid command will clear it (with a delay of one command) + c : clear by read + */ + +#define R1_OUT_OF_RANGE (1 << 31) /* er, c */ +#define R1_ADDRESS_ERROR (1 << 30) /* erx, c */ +#define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */ +#define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */ +#define R1_ERASE_PARAM (1 << 27) /* ex, c */ +#define R1_WP_VIOLATION (1 << 26) /* erx, c */ +#define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */ +#define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */ +#define R1_COM_CRC_ERROR (1 << 23) /* er, b */ +#define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */ +#define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */ +#define R1_CC_ERROR (1 << 20) /* erx, c */ +#define R1_ERROR (1 << 19) /* erx, c */ +#define R1_UNDERRUN (1 << 18) /* ex, c */ +#define R1_OVERRUN (1 << 17) /* ex, c */ +#define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */ +#define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */ +#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */ +#define R1_ERASE_RESET (1 << 13) /* sr, c */ +#define R1_STATUS(x) (x & 0xFFFFE000) +#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */ +#define R1_READY_FOR_DATA (1 << 8) /* sx, a */ +#define R1_APP_CMD (1 << 5) /* sr, c */ + +/* + * MMC/SD in SPI mode reports R1 status always, and R2 for SEND_STATUS + * R1 is the low order byte; R2 is the next highest byte, when present. + */ +#define R1_SPI_IDLE (1 << 0) +#define R1_SPI_ERASE_RESET (1 << 1) +#define R1_SPI_ILLEGAL_COMMAND (1 << 2) +#define R1_SPI_COM_CRC (1 << 3) +#define R1_SPI_ERASE_SEQ (1 << 4) +#define R1_SPI_ADDRESS (1 << 5) +#define R1_SPI_PARAMETER (1 << 6) +/* R1 bit 7 is always zero */ +#define R2_SPI_CARD_LOCKED (1 << 8) +#define R2_SPI_WP_ERASE_SKIP (1 << 9) /* or lock/unlock fail */ +#define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP +#define R2_SPI_ERROR (1 << 10) +#define R2_SPI_CC_ERROR (1 << 11) +#define R2_SPI_CARD_ECC_ERROR (1 << 12) +#define R2_SPI_WP_VIOLATION (1 << 13) +#define R2_SPI_ERASE_PARAM (1 << 14) +#define R2_SPI_OUT_OF_RANGE (1 << 15) /* or CSD overwrite */ +#define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE + +/* These are unpacked versions of the actual responses */ + +struct _mmc_csd { + UInt8 csd_structure; + UInt8 spec_vers; + UInt8 taac; + UInt8 nsac; + UInt8 tran_speed; + UInt16 ccc; + UInt8 read_bl_len; + UInt8 read_bl_partial; + UInt8 write_blk_misalign; + UInt8 read_blk_misalign; + UInt8 dsr_imp; + UInt16 c_size; + UInt8 vdd_r_curr_min; + UInt8 vdd_r_curr_max; + UInt8 vdd_w_curr_min; + UInt8 vdd_w_curr_max; + UInt8 c_size_mult; + union { + struct { /* MMC system specification version 3.1 */ + UInt8 erase_grp_size; + UInt8 erase_grp_mult; + } v31; + struct { /* MMC system specification version 2.2 */ + UInt8 sector_size; + UInt8 erase_grp_size; + } v22; + } erase; + UInt8 wp_grp_size; + UInt8 wp_grp_enable; + UInt8 default_ecc; + UInt8 r2w_factor; + UInt8 write_bl_len; + UInt8 write_bl_partial; + UInt8 file_format_grp; + UInt8 copy; + UInt8 perm_write_protect; + UInt8 tmp_write_protect; + UInt8 file_format; + UInt8 ecc; +}; + +/* + * OCR bits are mostly in host.h + */ +#define MMC_CARD_BUSY 0x80000000 /* Card Power up status bit */ + +/* + * Card Command Classes (CCC) + */ +#define CCC_BASIC (1<<0) /* (0) Basic protocol functions */ + /* (CMD0,1,2,3,4,7,9,10,12,13,15) */ + /* (and for SPI, CMD58,59) */ +#define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */ + /* (CMD11) */ +#define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */ + /* (CMD16,17,18) */ +#define CCC_STREAM_WRITE (1<<3) /* (3) Stream write commands */ + /* (CMD20) */ +#define CCC_BLOCK_WRITE (1<<4) /* (4) Block write commands */ + /* (CMD16,24,25,26,27) */ +#define CCC_ERASE (1<<5) /* (5) Ability to erase blocks */ + /* (CMD32,33,34,35,36,37,38,39) */ +#define CCC_WRITE_PROT (1<<6) /* (6) Able to write protect blocks */ + /* (CMD28,29,30) */ +#define CCC_LOCK_CARD (1<<7) /* (7) Able to lock down card */ + /* (CMD16,CMD42) */ +#define CCC_APP_SPEC (1<<8) /* (8) Application specific */ + /* (CMD55,56,57,ACMD*) */ +#define CCC_IO_MODE (1<<9) /* (9) I/O mode */ + /* (CMD5,39,40,52,53) */ +#define CCC_SWITCH (1<<10) /* (10) High speed switch */ + /* (CMD6,34,35,36,37,50) */ + /* (11) Reserved */ + /* (CMD?) */ + +/* + * CSD field definitions + */ + +#define CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */ +#define CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */ +#define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */ +#define CSD_STRUCT_EXT_CSD 3 /* Version is coded in CSD_STRUCTURE in EXT_CSD */ + +#define CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */ +#define CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */ +#define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */ +#define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 - 3.2 - 3.31 */ +#define CSD_SPEC_VER_4 4 /* Implements system specification 4.0 - 4.1 */ + +/* + * EXT_CSD fields + */ + +#define EXT_CSD_BUS_WIDTH 183 /* R/W */ +#define EXT_CSD_HS_TIMING 185 /* R/W */ +#define EXT_CSD_CARD_TYPE 196 /* RO */ +#define EXT_CSD_REV 192 /* RO */ +#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ + +/* + * EXT_CSD field definitions + */ + +#define EXT_CSD_CMD_SET_NORMAL (1<<0) +#define EXT_CSD_CMD_SET_SECURE (1<<1) +#define EXT_CSD_CMD_SET_CPSECURE (1<<2) + +#define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ +#define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ + +#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ +#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ +#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ + +/* + * MMC_SWITCH access modes + */ + +#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ +#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */ +#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */ +#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */ + +/* + * SD_SWITCH argument format: + * + * [31] Check (0) or switch (1) + * [30:24] Reserved (0) + * [23:20] Function group 6 + * [19:16] Function group 5 + * [15:12] Function group 4 + * [11:8] Function group 3 + * [7:4] Function group 2 + * [3:0] Function group 1 + */ + +/* + * SD_SEND_IF_COND argument format: + * + * [31:12] Reserved (0) + * [11:8] Host Voltage Supply Flags + * [7:0] Check Pattern (0xAA) + */ + +/* + * SCR field definitions + */ + +#define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */ +#define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */ +#define SCR_SPEC_VER_2 2 /* Implements system specification 2.00 */ + +/* + * SD bus widths + */ +#define SD_BUS_WIDTH_1 0 +#define SD_BUS_WIDTH_4 2 + +/* + * SD_SWITCH mode + */ +#define SD_SWITCH_CHECK 0 +#define SD_SWITCH_SET 1 + +/* + * SD_SWITCH function groups + */ +#define SD_SWITCH_GRP_ACCESS 0 + +/* + * SD_SWITCH access modes + */ +#define SD_SWITCH_ACCESS_DEF 0 +#define SD_SWITCH_ACCESS_HS 1 + +/**********************************/ +/* From original SDHCI OSX driver */ +/**********************************/ +#define R0 0 +#define R1 1 +#define R1b 2 +#define R2 3 +#define R3 4 +#define R4 5 +#define R5 6 +#define R5b 7 +#define R6 8 +#define R7 9 + +#define SDCR0 R0 +#define SDCR1 R0 +#define SDCR2 R2 +#define SDCR3 R6 +#define SDCR4 R0 +#define SDCR5 R0 +#define SDCR6 R1 +#define SDCR7 R1b +#define SDCR8 R7 +#define SDCR9 R2 +#define SDCR10 R2 +#define SDCR11 R0 +#define SDCR12 R1b +#define SDCR13 R1 +#define SDCR14 R0 +#define SDCR15 R0 +#define SDCR16 R1 +#define SDCR17 R1 +#define SDCR18 R1 +#define SDCR19 R0 +#define SDCR20 R0 +#define SDCR21 R0 +#define SDCR22 R0 +#define SDCR23 R0 +#define SDCR24 R1 +#define SDCR25 R1 +#define SDCR26 R0 +#define SDCR27 R1 +#define SDCR28 R1b +#define SDCR29 R1b +#define SDCR30 R1 +#define SDCR31 R0 +#define SDCR32 R1 +#define SDCR33 R1 +#define SDCR34 R0 +#define SDCR35 R0 +#define SDCR36 R0 +#define SDCR37 R0 +#define SDCR38 R1b +#define SDCR39 R0 +#define SDCR40 R0 +#define SDCR41 R0 +#define SDCR42 R1 +#define SDCR43 R0 +#define SDCR44 R0 +#define SDCR45 R0 +#define SDCR46 R0 +#define SDCR47 R0 +#define SDCR48 R0 +#define SDCR49 R0 +#define SDCR50 R0 +#define SDCR51 R0 +#define SDCR52 R0 +#define SDCR53 R0 +#define SDCR54 R0 +#define SDCR55 R1 +#define SDCR56 R1 +#define SDCR57 R0 +#define SDCR58 R0 +#define SDCR59 R0 +#define SDCR60 R0 +#define SDCR61 R0 +#define SDCR62 R0 +#define SDCR63 R0 + +#define SDACR0 R0 +#define SDACR1 R0 +#define SDACR2 R0 +#define SDACR3 R0 +#define SDACR4 R0 +#define SDACR5 R0 +#define SDACR6 R1 +#define SDACR7 R0 +#define SDACR8 R0 +#define SDACR9 R0 +#define SDACR10 R0 +#define SDACR11 R0 +#define SDACR12 R0 +#define SDACR13 R1 +#define SDACR14 R0 +#define SDACR15 R0 +#define SDACR16 R0 +#define SDACR17 R0 +#define SDACR18 R0 +#define SDACR19 R0 +#define SDACR20 R0 +#define SDACR21 R1 +#define SDACR22 R1 +#define SDACR23 R0 +#define SDACR24 R0 +#define SDACR25 R0 +#define SDACR26 R0 +#define SDACR27 R0 +#define SDACR28 R0 +#define SDACR29 R0 +#define SDACR30 R0 +#define SDACR31 R0 +#define SDACR32 R0 +#define SDACR33 R0 +#define SDACR34 R0 +#define SDACR35 R0 +#define SDACR36 R0 +#define SDACR37 R0 +#define SDACR38 R0 +#define SDACR39 R0 +#define SDACR40 R0 +#define SDACR41 R3 +#define SDACR42 R1 +#define SDACR43 R0 +#define SDACR44 R0 +#define SDACR45 R0 +#define SDACR46 R0 +#define SDACR47 R0 +#define SDACR48 R0 +#define SDACR49 R0 +#define SDACR50 R0 +#define SDACR51 R1 +#define SDACR52 R0 +#define SDACR53 R0 +#define SDACR54 R0 +#define SDACR55 R0 +#define SDACR56 R0 +#define SDACR57 R0 +#define SDACR58 R0 +#define SDACR59 R0 +#define SDACR60 R0 +#define SDACR61 R0 +#define SDACR62 R0 +#define SDACR63 R0 + +#endif /* SD_H */ Property changes on: trunk/SD_Commands.h ___________________________________________________________________ Added: svn:executable + * Index: trunk/VoodooSDHC.h =================================================================== --- trunk/VoodooSDHC.h (revision 0) +++ trunk/VoodooSDHC.h (revision 2) @@ -0,0 +1,164 @@ +#ifndef _VoodooSDHC_H_ +#define _VoodooSDHC_H_ +#include "License.h" +#define SLOT1 0 +#define SLOT2 1 +#define SLOT3 2 +#define SLOT4 3 +#define SLOT5 4 +#define SLOT6 5 + +/* General IOKit includes */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "SD_DataTypes.h" + +class VoodooSDHC : public IOBlockStorageDevice +{ + + OSDeclareDefaultStructors ( VoodooSDHC ) + +protected: + +public: + + // Overrides from IOService + + virtual bool init ( OSDictionary * propertyTable ); + virtual void free (); + virtual bool start ( IOService * provider ); + virtual void stop ( IOService * provider ); + +private: + // This lock protects block I/O access to the card reader + class Lock { + IOLock *mutex_; + bool locked_; + int waiting_; + public: + void init() { + mutex_ = IOLockAlloc(); + locked_ = false; + waiting_ = 0; + } + void free() { + IOLockFree(mutex_); + } + void lock() { + IOLockLock(mutex_); + if (locked_) { + waiting_++; + do { + IOLockSleep(mutex_, mutex_, THREAD_UNINT); + } while (locked_); + waiting_--; + } + locked_ = true; + IOLockUnlock(mutex_); + } + void unlock() { + IOLockLock(mutex_); + locked_ = false; + if (waiting_) + IOLockWakeup(mutex_, mutex_, true); + IOLockUnlock(mutex_); + } + } lock; + +#ifdef USE_SDMA + IOLock *sdmaCond; // this lock handles I/O interrupt + IOLock *mediaStateLock; // this lock serializes reportMediaState + IOBufferMemoryDescriptor *sdmaBuffDesc; + UInt32 physSdmaBuff; + void *virtSdmaBuff; + IOWorkLoop *workLoop; + IOFilterInterruptEventSource *interruptSrc; + IOTimerEventSource *timerSrc; + virtual IOWorkLoop *getWorkLoop() const { return workLoop; } +#endif + + IOMemoryMap *PCIRegMap; + struct SDHCIRegMap_t *PCIRegP[6]; + struct SDCIDReg_t SDCIDReg[6]; + UInt32 RCA; + UInt32 maxBlock; + enum { + kCardNotPresent, + kCardIsPresent, + kCardRemount + } cardPresence; + bool isHighCapacity; + + bool setup(IOService *provider); + void dumpRegs(UInt8 slot); + bool isCardPresent(UInt8 slot); + bool isCardWP(UInt8 slot); + bool cardInit( UInt8 slot ); + void LEDControl(UInt8 slot, bool state); + void Reset( UInt8 slot, UInt8 type ); + bool SDCommand( UInt8 slot, UInt8 command, UInt16 response, UInt32 arg); + bool calcClock(UInt8 slot, UInt32 clockspeed); + bool powerSD(UInt8 slot); + void parseCID(UInt8 slot); + void parseCSD(UInt8 slot); + +// IOReturn requestIdle(void); /* 10.6.0 */ +// IOReturn doDiscard(UInt64 block, UInt64 nblks); /* 10.6.0 */ + IOReturn reportRemovability(bool *isRemovable); + IOReturn reportWriteProtection(bool *isWriteProtected); + IOReturn setWriteCacheState(bool enabled); + IOReturn reportPollRequirements(bool *pollRequired, bool *pollIsExpensive); + IOReturn reportMediaState(bool *mediaPresent, bool *changedState); + IOReturn reportMaxValidBlock(UInt64 *maxBlock); + IOReturn reportLockability(bool *isLockable); + IOReturn reportEjectability(bool *isEjectable); + IOReturn reportBlockSize(UInt64 *blockSize); + IOReturn getWriteCacheState(bool *enabled); + IOReturn setPowerState( unsigned long whichState, IOService * whatDevice ); + char * getVendorString(void); + char * getRevisionString(void); + char * getProductString(void); + char * getAdditionalDeviceInfoString(void); + IOReturn doSynchronizeCache(void); + IOReturn doLockUnlockMedia(bool doLock); + UInt32 doGetFormatCapacities(UInt64 *capacities, UInt32 capacitiesMaxCount) const; + IOReturn doFormatMedia(UInt64 byteCapacity); + IOReturn doEjectMedia(void); +#ifdef __LP64__ + virtual IOReturn doAsyncReadWrite(IOMemoryDescriptor *buffer, + UInt64 block, UInt64 nblks, + IOStorageAttributes *attributes, + IOStorageCompletion *completion); +#endif +#ifndef __LP64__ + IOReturn doAsyncReadWrite(IOMemoryDescriptor *buffer, + UInt32 block, UInt32 nblks, + IOStorageCompletion completion); //completion was start + IOReturn reportMaxWriteTransfer(UInt64 blockSize, UInt64 *max); + IOReturn reportMaxReadTransfer (UInt64 blockSize, UInt64 *max); +#endif + IOReturn sdma_access(IOMemoryDescriptor *buffer, UInt32 block, UInt32 nblks, bool read); + IOReturn readBlockMulti_pio(IOMemoryDescriptor *buffer, UInt32 block, UInt32 nblks, + UInt32 offset); + IOReturn readBlockSingle_pio(UInt8 *buff, UInt32 block); + IOReturn writeBlockMulti_pio(IOMemoryDescriptor *buffer, UInt32 block, UInt32 nblks, + UInt32 offset); + IOReturn writeBlockSingle_pio(IOMemoryDescriptor *buffer, UInt32 block, + UInt32 offset); + bool waitIntStatus(UInt32 maskBits); + void handleInterrupt(); + void handleTimer(); + + static void interruptHandler(OSObject *owner, IOInterruptEventSource *source, int count); + static bool interruptFilter(OSObject *owner, IOFilterInterruptEventSource *source); + static void timerHandler(OSObject *owner, IOTimerEventSource *sender); +}; + +#endif /* _VoodooSDHC_H_ */ Property changes on: trunk/VoodooSDHC.h ___________________________________________________________________ Added: svn:executable + * Index: trunk/English.lproj/InfoPlist.strings =================================================================== Cannot display: file marked as a binary type. svn:mime-type = application/octet-stream Property changes on: trunk/English.lproj/InfoPlist.strings ___________________________________________________________________ Added: svn:executable + * Added: svn:mime-type + application/octet-stream