Chameleon

Issue 52: CPU Detection for AMD

Reported by Fumo Mofu, Dec 19, 2010

The part for AMD CPU detection in cpu.c is essentially commented out 
(#if 0…#endif).  This leads to a CPU and FSB frequency of 0.

In addition (I don't know if this is related), my TSC is 
unsynchronized which leads to random EXC_I386_DIV crashes a few 
hours after booting.  I have an AMD Athlon 64 X2.  Should TSC 
syncing be performed by the bootloader or by the kernel?

Comment 1 by Fumo Mofu, Dec 19, 2010

Unsynchronized  TSC for cpu 1: 0x0000002774723755, delta 
0xfffffffffff27682

Comment 2 by Fumo Mofu, Jan 14, 2011

I stopped the EXC_I386_DIV crashes by modifying VoodooTSCSync.kext 
to run every 10 seconds.

There are a few bugs in cpu.c that I would like to point out:
1. The number of cores for AMD is in CPUID 0x80000008 ECX[7:0]; 
CPUID 0x00000004 EAX[31:26] is only for Intel.
2. For AMD K8, there is no divisor ID so currdiv should just be left 
alone (set to 0).
3. Why are a lot of bit-extracting operations not using the macro 
bitfield?

Comment 3 by Fumo Mofu, Jan 14, 2011

4. There is no support for multipliers that are non-integers such as 
11.5x.

Comment 4 by valv, Jan 14, 2011

All these (and more) are going to fixed (hopefully) next.
Till then, be patient or help me with beta-testing.
If interested you can pm me on IM.

Comment 5 by Cosmosis Jones, Jun 2, 2011

still an issue reopen referencing TRUNK
Status: Invalid

Created: 8 years 9 months ago by Fumo Mofu

Updated: 8 years 4 months ago

Status: Invalid

Followed by: 2 persons

Labels:
Priority:Medium
Type:Defect