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View 0001-tidy-up-of-nvidia-scanning.patch

1From 8d77151a4a28553826a703835244d81e6d48d3c5 Mon Sep 17 00:00:00 2001
2From: Michael Seydl <michael.seydl@hlw-software.com>
3Date: Wed, 25 Apr 2012 11:55:48 +0200
4Subject: [PATCH 2/2] - tidy up of nvidia scanning
5
6---
7 i386/libsaio/nvidia.c | 93 ++++++++++++++++---------------------------------
8 1 file changed, 30 insertions(+), 63 deletions(-)
9
10diff --git a/i386/libsaio/nvidia.c b/i386/libsaio/nvidia.c
11index fe1f7a8..21cd894 100644
12--- a/i386/libsaio/nvidia.c
13+++ b/i386/libsaio/nvidia.c
14@@ -919,44 +919,12 @@ static struct nv_chipsets_t NVKnownChipsets[] = {
15 // 12F0 - 12FF
16 };
17
18-static uint16_t swap16(uint16_t x)
19-{
20-return (((x & 0x00FF) << 8) | ((x & 0xFF00) >> 8));
21-}
22-
23-static uint16_t read16(uint8_t *ptr, uint16_t offset)
24-{
25-uint8_t ret[2];
26-
27-ret[0] = ptr[offset+1];
28-ret[1] = ptr[offset];
29-
30-return *((uint16_t*)&ret);
31-}
32
33-#if 0
34-static uint32_t swap32(uint32_t x)
35-{
36-return ((x & 0x000000FF) << 24) | ((x & 0x0000FF00) << 8 ) | ((x & 0x00FF0000) >> 8 ) | ((x & 0xFF000000) >> 24);
37-}
38-
39-static uint8_tread8(uint8_t *ptr, uint16_t offset)
40-{
41-return ptr[offset];
42-}
43-
44-static uint32_t read32(uint8_t *ptr, uint16_t offset)
45-{
46-uint8_t ret[4];
47-
48-ret[0] = ptr[offset+3];
49-ret[1] = ptr[offset+2];
50-ret[2] = ptr[offset+1];
51-ret[3] = ptr[offset];
52-
53-return *((uint32_t*)&ret);
54-}
55-#endif
56+#define READ_BYTE(rom, offset) (*(u_char *)(rom + offset))
57+#define READ_LE_SHORT(rom, offset) (READ_BYTE(rom, offset+1) << 8 | READ_BYTE(rom, offset))
58+#define READ_LE_INT(rom, offset) (READ_LE_SHORT(rom, offset+2) << 16 | READ_LE_SHORT(rom, offset))
59+#define WRITE_LE_SHORT(data) (((data) << 8 & 0xff00) | ((data) >> 8 & 0x00ff ))
60+#define WRITE_LE_INT(data) (WRITE_LE_SHORT(data) << 16 | WRITE_LE_SHORT(data >> 16))
61
62 static int patch_nvidia_rom(uint8_t *rom)
63 {
64@@ -965,14 +933,14 @@ static int patch_nvidia_rom(uint8_t *rom)
65 return PATCH_ROM_FAILED;
66 }
67
68-uint16_t dcbptr = swap16(read16(rom, 0x36));
69+uint16_t dcbptr = READ_LE_SHORT(rom, 0x36);
70
71 if (!dcbptr) {
72 printf("no dcb table found\n");
73 return PATCH_ROM_FAILED;
74 }
75-//else
76-//printf("dcb table at offset 0x%04x\n", dcbptr);
77+else
78+printf("dcb table at offset 0x%04x\n", dcbptr);
79
80 uint8_t *dcbtable = &rom[dcbptr];
81 uint8_t dcbtable_version = dcbtable[0];
82@@ -990,11 +958,11 @@ static int patch_nvidia_rom(uint8_t *rom)
83 numentries = dcbtable[2];
84 recordlength = dcbtable[3];
85
86-sig = *(uint32_t *)&dcbtable[6];
87+sig = READ_LE_INT(dcbtable, 6);
88 }
89 else
90 {
91-sig = *(uint32_t *)&dcbtable[4];
92+sig = READ_LE_INT(dcbtable, 4);
93 headerlength = 8;
94 }
95
96@@ -1038,7 +1006,7 @@ static int patch_nvidia_rom(uint8_t *rom)
97 for (i = 0; i < numentries; i++)
98 {
99 uint32_t connection;
100-connection = *(uint32_t *)&dcbtable[headerlength + recordlength * i];
101+connection = READ_LE_INT(dcbtable,headerlength + recordlength * i);
102
103 /* Should we allow discontinuous DCBs? Certainly DCB I2C tables can be discontinuous */
104 if ((connection & 0x0000000f) == 0x0000000f) /* end of records */
105@@ -1139,7 +1107,7 @@ static int patch_nvidia_rom(uint8_t *rom)
106 }
107 }
108 }
109-
110+
111 // if we have left ungrouped outputs merge them to the empty channel
112 uint8_t *togroup;// = (channel1 ? (channel2 ? NULL : &channel2) : &channel1);
113 togroup = &channel2;
114@@ -1355,10 +1323,10 @@ bool setup_nvidia_devprop(pci_dt_t *nvda_dev)
115 videoRam = mem_detect(regs, nvCardType, nvda_dev);
116 model = get_nvidia_model((nvda_dev->vendor_id << 16) | nvda_dev->device_id);
117
118-verbose("nVidia %s %dMB NV%02x [%04x:%04x] :: %s\n",
119+verbose("nVidia %s %dMB NV%02x [%04x:%04x] :: %s device number: %d\n",
120 model, (uint32_t)(videoRam / 1024 / 1024),
121 (REG32(0) >> 20) & 0x1ff, nvda_dev->vendor_id, nvda_dev->device_id,
122-devicepath);
123+devicepath, devices_number);
124
125 rom = malloc(NVIDIA_ROM_SIZE);
126 sprintf(nvFilename, "/Extra/%04x_%04x.rom", (uint16_t)nvda_dev->vendor_id,
127@@ -1382,28 +1350,27 @@ bool setup_nvidia_devprop(pci_dt_t *nvda_dev)
128 }
129 else
130 {
131-// Otherwise read bios from card
132+ // Otherwise read bios from card
133 nvBiosOveride = 0;
134
135 // TODO: we should really check for the signature before copying the rom, i think.
136-
137-// PRAMIN first
138-nvRom = (uint8_t*)&regs[NV_PRAMIN_OFFSET];
139-bcopy((uint32_t *)nvRom, rom, NVIDIA_ROM_SIZE);
140-
141+ // PROM next
142+ // Enable PROM access
143+ (REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED;
144+
145+ nvRom = (uint8_t*)&regs[NV_PROM_OFFSET];
146+ bcopy((uint8_t *)nvRom, rom, NVIDIA_ROM_SIZE);
147+
148+ // disable PROM access
149+ (REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED;
150+
151 // Valid Signature ?
152 if (rom[0] != 0x55 && rom[1] != 0xaa)
153 {
154-// PROM next
155-// Enable PROM access
156-(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED;
157-
158-nvRom = (uint8_t*)&regs[NV_PROM_OFFSET];
159-bcopy((uint8_t *)nvRom, rom, NVIDIA_ROM_SIZE);
160-
161-// disable PROM access
162-(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED;
163-
164+ // PRAMIN first
165+ nvRom = (uint8_t*)&regs[NV_PRAMIN_OFFSET];
166+ bcopy((uint32_t *)nvRom, rom, NVIDIA_ROM_SIZE);
167+
168 // Valid Signature ?
169 if (rom[0] != 0x55 && rom[1] != 0xaa)
170 {
171@@ -1436,7 +1403,7 @@ bool setup_nvidia_devprop(pci_dt_t *nvda_dev)
172 printf("ERROR: nVidia ROM Patching Failed!\n");
173 //return false;
174 }
175-
176+
177 rom_pci_header = (option_rom_pci_header_t*)(rom + *(uint16_t *)&rom[24]);
178
179 // check for 'PCIR' sig
180--
1811.7.9.4
182
183

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