Chameleon

Chameleon Commit Details

Date:2011-06-18 14:21:00 (7 years 3 months ago)
Author:Azimutz
Commit:1028
Parents: 1027
Message:... part r969... Please notice the comment on BootHelp.txt about UseKernelCache key...
Changes:
M/branches/azimutz/Chazi/i386/libsaio/acpi_patcher.c
M/branches/azimutz/Chazi/doc/BootHelp.txt
M/branches/azimutz/Chazi
M/branches/azimutz/Chazi/i386/libsaio/memvendors.h
M/branches/azimutz/Chazi/i386/boot2/boot.c
M/branches/azimutz/Chazi/i386/libsaio/platform.h
M/branches/azimutz/Chazi/i386/libsaio/smbios_getters.c
M/branches/azimutz/Chazi/i386/boot2/boot.h
M/branches/azimutz/Chazi/i386/boot2/modules.c
M/branches/azimutz/Chazi/i386/libsaio/smbios.c

File differences

branches/azimutz/Chazi/i386/libsaio/acpi_patcher.c
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switch (Platform.CPU.Model)
{
case 0x0D: // ? - Azi: pentium M - Slice
case CPU_MODEL_YONAH: // Yonah
case CPU_MODEL_MEROM: // Merom
case CPU_MODEL_PENRYN: // Penryn
case CPU_MODEL_ATOM: // Intel Atom (45nm)
case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
case CPU_MODEL_ATOM:// Intel Atom (45nm)
{
bool cpu_dynamic_fsb = false;
break;
}
case CPU_MODEL_FIELDS:
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:
case CPU_MODEL_NEHALEM:
case CPU_MODEL_NEHALEM_EX:
case CPU_MODEL_WESTMERE:
case CPU_MODEL_WESTMERE_EX:
case CPU_MODEL_SANDY:
case CPU_MODEL_SANDY_XEON:
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
case CPU_MODEL_SANDY:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_SANDY_XEON:// Intel Xeon E3
{
maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff;
minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
branches/azimutz/Chazi/i386/libsaio/memvendors.h
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} VenIdName;
VenIdName vendorMap[] = {
{ 0, 0x01, "AMD"},
{ 0, 0x01, "AMD"},
{ 0, 0x02, "AMI"},
{ 0, 0x83, "Fairchild"},
{ 0, 0x04, "Fujitsu"},
branches/azimutz/Chazi/i386/libsaio/platform.h
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#define CPUID_816
#define CPUID_MAX7
#define CPU_MODEL_YONAH0x0E
#define CPU_MODEL_MEROM0x0F
#define CPU_MODEL_PENRYN0x17
#define CPU_MODEL_NEHALEM0x1A
#define CPU_MODEL_ATOM0x1C
#define CPU_MODEL_FIELDS0x1E// Lynnfield, Clarksfield, Jasper
#define CPU_MODEL_YONAH0x0E// Sossaman, Yonah
#define CPU_MODEL_MEROM0x0F// Allendale, Conroe, Kentsfield, Woodcrest, Clovertown, Tigerton, Merom
#define CPU_MODEL_PENRYN0x17// Wolfdale, Yorkfield, Harpertown, Penryn
#define CPU_MODEL_NEHALEM0x1A// Bloomfield. Nehalem-EP, Nehalem-WS, Gainestown
#define CPU_MODEL_ATOM0x1C// Atom
#define CPU_MODEL_FIELDS0x1E// Lynnfield, Clarksfield, Jasper Forest
#define CPU_MODEL_DALES0x1F// Havendale, Auburndale
#define CPU_MODEL_DALES_32NM0x25// Clarkdale, Arrandale
#define CPU_MODEL_SANDY0x2a// Sandy bridge
#define CPU_MODEL_SANDY0x2A// Sandy Bridge
#define CPU_MODEL_WESTMERE0x2C// Gulftown, Westmere-EP, Westmere-WS
#define CPU_MODEL_SANDY_XEON0x2D
#define CPU_MODEL_NEHALEM_EX0x2E
#define CPU_MODEL_SANDY_XEON0x2D// Sandy Bridge Xeon
#define CPU_MODEL_NEHALEM_EX0x2E// Beckton
#define CPU_MODEL_WESTMERE_EX0x2F
/* CPU Features */
branches/azimutz/Chazi/i386/libsaio/smbios.c
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{
switch (Platform.CPU.Model)
{
case CPU_MODEL_FIELDS:// Intel Core i5, i7 LGA1156 (45nm)
case CPU_MODEL_DALES:// Intel Core i5, i7 LGA1156 (45nm) ???
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5, i7 LGA1156 (32nm) (Clarkdale, Arrandale)
case 0x19:// Intel Core i5 650 @3.20 Ghz
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case 0x19:// ??? Intel Core i5 650 @3.20 GHz
defaultBIOSInfo.version= kDefaultiMacNehalemBIOSVersion;
defaultSystemInfo.productName= kDefaultiMacNehalem;
defaultSystemInfo.family= kDefaultiMacFamily;
defaultBaseBoard.product= kDefaultiMacNehalemBoardProduct;
break;
case CPU_MODEL_SANDY:
case CPU_MODEL_SANDY_XEON:
case CPU_MODEL_SANDY:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_SANDY_XEON:// Intel Xeon E3
defaultBIOSInfo.version= kDefaultiMacSandyBIOSVersion;
defaultSystemInfo.productName= kDefaultiMacSandy;
defaultSystemInfo.family= kDefaultiMacFamily;
defaultBaseBoard.product= kDefaultiMacSandyBoardProduct; // ??
break;
case CPU_MODEL_NEHALEM:
case CPU_MODEL_NEHALEM_EX:
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
defaultBIOSInfo.version= kDefaultMacProNehalemBIOSVersion;
defaultSystemInfo.productName= kDefaultMacProNehalem;
defaultSystemInfo.family= kDefaultMacProFamily;
defaultBaseBoard.product= kDefaultMacProNehalemBoardProduct;
break;
case CPU_MODEL_WESTMERE:
case CPU_MODEL_WESTMERE_EX:
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
defaultBIOSInfo.version= kDefaultMacProWestmereBIOSVersion;
defaultBIOSInfo.releaseDate= kDefaulMacProWestmereBIOSReleaseDate; //***
defaultSystemInfo.productName= kDefaultMacProWestmere;
{
switch (Platform.CPU.Model)
{
case 0x19:// Intel Core i5 650 @3.20 Ghz
case CPU_MODEL_FIELDS:// Intel Core i5, i7 LGA1156 (45nm)
case CPU_MODEL_DALES:// Intel Core i5, i7 LGA1156 (45nm) ???
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5, i7 LGA1156 (32nm)
case CPU_MODEL_NEHALEM:// Intel Core i7 LGA1366 (45nm)
case CPU_MODEL_NEHALEM_EX:// Intel Core i7 LGA1366 (45nm) 6 Core ???
case CPU_MODEL_WESTMERE:// Intel Core i7 LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX: // Intel Core i7 LGA1366 (45nm) 6 Core ???
case 0x19:// ??? Intel Core i5 650 @3.20 GHz
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
case CPU_MODEL_DALES:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65x
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
break;
default:
return;
branches/azimutz/Chazi/i386/libsaio/smbios_getters.c
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{
switch (Platform.CPU.Model)
{
case 0x0D:// ?
case 0x0D:// ???
case CPU_MODEL_YONAH:// Yonah0x0E
case CPU_MODEL_MEROM:// Merom0x0F
case CPU_MODEL_PENRYN:// Penryn0x17
case CPU_MODEL_ATOM:// Atom 45nm0x1C
return false;
case 0x19:// Intel Core i5 650 @3.20 Ghz
case 0x19:// ??? Intel Core i5 650 @3.20 GHz
case CPU_MODEL_NEHALEM:// Intel Core i7 LGA1366 (45nm)
case CPU_MODEL_FIELDS:// Intel Core i5, i7 LGA1156 (45nm)
case CPU_MODEL_DALES:// Intel Core i5, i7 LGA1156 (45nm) ???
{
switch (Platform.CPU.Model)
{
case 0x0D:// ?
case CPU_MODEL_YONAH:// Yonah
case CPU_MODEL_MEROM:// Merom
case CPU_MODEL_PENRYN:// Penryn
case 0x0D:// ???
case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
case CPU_MODEL_ATOM:// Intel Atom (45nm)
return true;
case CPU_MODEL_NEHALEM:// Intel Core i7 LGA1366 (45nm)
case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
if (strstr(Platform.CPU.BrandString, "Xeon(R)"))
value->word = 0x0501;// Xeon
else
value->word = 0x0701;// Core i7
return true;
case CPU_MODEL_FIELDS:// Lynnfield, Clarksfield, Jasper
case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))
value->word = 0x601;// Core i5
else
value->word = 0x0701;// Core i7
return true;
case CPU_MODEL_DALES:// Intel Core i5, i7 LGA1156 (45nm) (Havendale, Auburndale)
case CPU_MODEL_DALES:// Havendale, Auburndale
if (strstr(Platform.CPU.BrandString, "Core(TM) i5"))
value->word = 0x601;// Core i5
else
value->word = 0x0701;// Core i7
return true;
case CPU_MODEL_SANDY:// Intel Core i3, i5, i7 LGA1155 sandy bridge
case CPU_MODEL_SANDY_XEON:
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5, i7 LGA1156 (32nm) (Clarkdale, Arrandale)
case CPU_MODEL_SANDY:// Intel Core i3, i5, i7 LGA1155 (32nm)
case CPU_MODEL_SANDY_XEON:// Intel Xeon E3
case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
if (strstr(Platform.CPU.BrandString, "Core(TM) i3"))
value->word = 0x901;// Core i3
else
value->word = 0x0701;// Core i7
return true;
case CPU_MODEL_WESTMERE:// Intel Core i7 LGA1366 (32nm) 6 Core (Gulftown, Westmere-EP, Westmere-WS)
case CPU_MODEL_WESTMERE_EX:// Intel Core i7 LGA1366 (45nm) 6 Core ???
case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
value->word = 0x0501;// Core i7
return true;
case 0x19:// Intel Core i5 650 @3.20 Ghz
case 0x19:// ??? Intel Core i5 650 @3.20 GHz
value->word = 0x601;// Core i5
return true;
}
branches/azimutz/Chazi/i386/boot2/boot.c
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getBoolForKey(kKPatcherKey, &patchKernel, &bootInfo->bootConfig);
//Azi: avoiding having to use -f to ignore kernel cache
//Azi: ignore kernel cache but still use kext cache (E/E.mkext & S/L/E.mkext). - explain...
getBoolForKey(kIgnoreKCKey, &ignoreKC, &bootInfo->bootConfig); // equivalent to UseKernelCache
getBoolForKey(kUseKCKey, &ignoreKC, &bootInfo->bootConfig); // equivalent to UseKernelCache
if (ignoreKC)
{
verbose("KC: cache ignored by user.\n");
branches/azimutz/Chazi/i386/boot2/boot.h
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#define kKernelNameKey "Kernel" // options.cgetValFK- kFlag*** bFlag ?
#define kKernelCacheKey "Kernel Cache" // boot.cgetValFK- kFlag
#define kKernelFlagsKey "Kernel Flags" // options.cgetValFK- kFlags***
#define kIgnoreKCKey "ignoreKC" // boot.cgetBoolFK- testing***
#define kUseKCKey "UseKC" // boot.cgetBoolFK- testing***
#define kKPatcherKey "PatchKernel" // kernel_patcher.cgetBoolFK
#define kAltExtensionsKey "kext" // drivers.cgetValFK
branches/azimutz/Chazi/i386/boot2/modules.c
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#if CONFIG_MODULE_DEBUG
#define DBG(x...)printf(x);
#define DBGPAUSE()getc() // getchar()
#define DBGPAUSE()getc() // getchar() - ";" needed ?
#else
#define DBG(x...)
#define DBGPAUSE()
branches/azimutz/Chazi/doc/BootHelp.txt
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Use an alternate/backup "Kernel" cache file.
Ex: "Kernel Cache"=bt(0,0)/kernelcache_i386.A701C40B
Note: damn long keys to type at the boot prompt!? :-/ UseKC would be enough!!
Doesn't anyone use the prompt anymore? Going to keep this here just
because i hope this file ends up on the trunk, but my Chazi will use
UseKC :P - update above***
UseKernelCache=Yes
Yes will load the system prelinked kernel or the one specified by the user
with "Kernel Cache" arg, and ignore /E/E kexts/mkext and system kext cache.
- Devices/Other:???
UseMemDetect=No

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Revision: 1028