1 | /*␊ |
2 | * Copyright 2010,2011 valv, cparm <armelcadetpetit@gmail.com>. All rights reserved.␊ |
3 | */␊ |
4 | #include "boot.h"␊ |
5 | #include "bootstruct.h"␊ |
6 | #include "libsaio.h"␊ |
7 | #include "modules.h"␊ |
8 | #include "Platform.h"␊ |
9 | #include "cpu.h"␊ |
10 | ␊ |
11 | #define kFixFSB␉␉ "FixFSB"␊ |
12 | #define MSR_FSB_FREQ␉␉0x000000cd␊ |
13 | #define AMD_10H_11H_CONFIG 0xc0010064␊ |
14 | ␊ |
15 | void CPUfreq_hook(void* arg1, void* arg2, void* arg3, void* arg4, void* arg5, void* arg6)␊ |
16 | {␉␊ |
17 | ␉int bus_ratio;␉␉␉␉ ␊ |
18 | ␉uint64_t␉msr , fsbFrequency , cpuFrequency , minfsb , maxfsb ;␊ |
19 | ␉␊ |
20 | ␉if ((Platform->CPU.Vendor == 0x756E6547 /* Intel */) && ((Platform->CPU.Family == 0x06) || (Platform->CPU.Family == 0x0f))) {␊ |
21 | ␉␉if ((Platform->CPU.Family == 0x06 && Platform->CPU.Model >= 0x0c) || (Platform->CPU.Family == 0x0f && Platform->CPU.Model >= 0x03)) {␊ |
22 | ␉␉␉␊ |
23 | ␉␉␉if (Platform->CPU.Family == 0x06) {␊ |
24 | ␉␉␉␉␊ |
25 | ␉␉␉␉bus_ratio = 0; ␉␉␉␉␉␉␉␉ ␊ |
26 | ␉␉␉␉msr = rdmsr64(MSR_FSB_FREQ); ␊ |
27 | ␉␉␉␉fsbFrequency = 0;␊ |
28 | ␉␉␉␉cpuFrequency = 0; ␊ |
29 | ␉␉␉␉minfsb = 183000000; ␊ |
30 | ␉␉␉␉maxfsb = 185000000;␊ |
31 | ␉␉␉␉␊ |
32 | ␉␉␉␉bool␉␉fix_fsb = false;␉␉␉␉␊ |
33 | ␉␉␉␉uint16_t idlo;␊ |
34 | ␉␉␉␉uint8_t crlo, crhi = 0;␉␉␉␉␊ |
35 | ␉␉␉␉␊ |
36 | ␉␉␉␉switch (Platform->CPU.Model) {␊ |
37 | ␉␉␉␉␉case CPU_MODEL_YONAH:␉␉// Core Duo/Solo, Pentium M DC␊ |
38 | ␉␉␉␉␉case CPU_MODEL_MEROM:␉␉// Core Xeon, Core 2 DC, 65nm␊ |
39 | ␉␉␉␉␉case 0x16:␉␉␉␉␉// Celeron, Core 2 SC, 65nm␊ |
40 | ␉␉␉␉␉case CPU_MODEL_PENRYN:␉␉// Core 2 Duo/Extreme, Xeon, 45nm␊ |
41 | ␉␉␉␉␉case CPU_MODEL_ATOM:␉␉// Atom :)␊ |
42 | ␉␉␉␉␉case 0x27:␉␉␉␉␉// Atom Lincroft, 45nm ␊ |
43 | ␉␉␉␉␉␉␊ |
44 | ␉␉␉␉␉␉getBoolForKey(kFixFSB, &fix_fsb, &bootInfo->bootConfig); ␊ |
45 | ␉␉␉␉␉␉␊ |
46 | ␉␉␉␉␉␉if (fix_fsb) {␊ |
47 | ␉␉␉␉␉␉␉␊ |
48 | ␉␉␉␉␉␉␉int bus = (msr >> 0) & 0x7; ␊ |
49 | ␉␉␉␉␉␉␉switch (bus) {␊ |
50 | ␉␉␉␉␉␉␉␉case 0:␊ |
51 | ␉␉␉␉␉␉␉␉␉fsbFrequency = 266666667;␊ |
52 | ␉␉␉␉␉␉␉␉␉break;␊ |
53 | ␉␉␉␉␉␉␉␉case 1:␊ |
54 | ␉␉␉␉␉␉␉␉␉fsbFrequency = 133333333;␊ |
55 | ␉␉␉␉␉␉␉␉␉break;␊ |
56 | ␉␉␉␉␉␉␉␉case 2:␊ |
57 | ␉␉␉␉␉␉␉␉␉fsbFrequency = 200000000;␊ |
58 | ␉␉␉␉␉␉␉␉␉break;␊ |
59 | ␉␉␉␉␉␉␉␉case 3:␊ |
60 | ␉␉␉␉␉␉␉␉␉fsbFrequency = 166666667;␊ |
61 | ␉␉␉␉␉␉␉␉␉break;␊ |
62 | ␉␉␉␉␉␉␉␉case 4:␊ |
63 | ␉␉␉␉␉␉␉␉␉fsbFrequency = 333333333;␊ |
64 | ␉␉␉␉␉␉␉␉␉break;␊ |
65 | ␉␉␉␉␉␉␉␉case 5:␊ |
66 | ␉␉␉␉␉␉␉␉␉fsbFrequency = 100000000;␊ |
67 | ␉␉␉␉␉␉␉␉␉break;␊ |
68 | ␉␉␉␉␉␉␉␉case 6:␊ |
69 | ␉␉␉␉␉␉␉␉␉fsbFrequency = 400000000;␊ |
70 | ␉␉␉␉␉␉␉␉␉break;␊ |
71 | ␉␉␉␉␉␉␉␉default:␊ |
72 | ␉␉␉␉␉␉␉␉␉fsbFrequency = 200000000;␉␉␉␉␉␉␉␉␉␊ |
73 | ␉␉␉␉␉␉␉␉␉break;␊ |
74 | ␉␉␉␉␉␉␉}␊ |
75 | ␉␉␉␉␉␉␉␊ |
76 | ␉␉␉␉␉␉␉␊ |
77 | ␉␉␉␉␉␉␉if (((fsbFrequency) > (minfsb) && (fsbFrequency) < (maxfsb)) || (!fsbFrequency)) {␊ |
78 | ␉␉␉␉␉␉␉␉fsbFrequency = 200000000;␊ |
79 | ␉␉␉␉␉␉␉}␊ |
80 | ␉␉␉␉␉␉␉Platform->CPU.FSBFrequency = fsbFrequency;␊ |
81 | ␉␉␉␉␉␉}␊ |
82 | ␉␉␉␉␉␉␉␊ |
83 | ␉␉␉␉␉␉if (getIntForKey("MaxBusRatio", &bus_ratio, &bootInfo->bootConfig)) ␊ |
84 | ␉␉␉␉␉␉{ ␊ |
85 | ␉␉␉␉␉␉␉␉msr = rdmsr64(MSR_IA32_PERF_STATUS);␊ |
86 | ␉␉␉␉␉␉␉␉idlo = (msr >> 48) & 0xffff;␉␉␉␉␉␉␉␉␊ |
87 | ␉␉␉␉␉␉␉␉crlo = (idlo >> 8) & 0xff;␊ |
88 | ␉␉␉␉␉␉␉␉␊ |
89 | ␉␉␉␉␉␉␉␉//printf("CPUfreq: MinCoef: 0x%x\n",crlo);␊ |
90 | ␉␉␉␉␉␉␉␉␊ |
91 | ␉␉␉␉␉␉␉␉if (Platform->CPU.MaxCoef) ␊ |
92 | ␉␉␉␉␉␉␉␉{␊ |
93 | ␉␉␉␉␉␉␉␉␉if (Platform->CPU.MaxDiv) ␊ |
94 | ␉␉␉␉␉␉␉␉␉{␊ |
95 | ␉␉␉␉␉␉␉␉␉␉crhi = (Platform->CPU.MaxCoef * 10) + 5;␊ |
96 | ␉␉␉␉␉␉␉␉␉}␊ |
97 | ␉␉␉␉␉␉␉␉␉else ␊ |
98 | ␉␉␉␉␉␉␉␉␉{␊ |
99 | ␉␉␉␉␉␉␉␉␉␉crhi = Platform->CPU.MaxCoef * 10;␊ |
100 | ␉␉␉␉␉␉␉␉␉}␊ |
101 | ␉␉␉␉␉␉␉␉}␊ |
102 | ␉␉␉␉␉␉␉␉if (crlo == 0 || crhi == crlo) goto out;␉␉␉␉␉␉␉␉␊ |
103 | ␉␉␉␉␉␉␉␉␊ |
104 | ␉␉␉␉␉␉␉␉if ((bus_ratio >= (crlo *10)) && (crhi >= bus_ratio) ) ␊ |
105 | ␉␉␉␉␉␉␉␉//if (bus_ratio >= 60) ␊ |
106 | ␉␉␉␉␉␉␉␉{␉␉␉␉␉␉␉␉␊ |
107 | ␉␉␉␉␉␉␉␉␉uint8_t currdiv = 0, currcoef = 0;␊ |
108 | ␉␉␉␉␉␉␉␉␉␊ |
109 | ␉␉␉␉␉␉␉␉␉currcoef = (int)(bus_ratio / 10);␊ |
110 | ␉␉␉␉␉␉␉␉␉␊ |
111 | ␉␉␉␉␉␉␉␉␉uint8_t fdiv = bus_ratio - (currcoef * 10);␊ |
112 | ␉␉␉␉␉␉␉␉␉if (fdiv > 0)␊ |
113 | ␉␉␉␉␉␉␉␉␉␉currdiv = 1;␊ |
114 | ␉␉␉␉␉␉␉␉␉␊ |
115 | ␉␉␉␉␉␉␉␉␉Platform->CPU.CurrCoef = currcoef;␊ |
116 | ␉␉␉␉␉␉␉␉␉Platform->CPU.CurrDiv = currdiv;␉␉␉␉␉␉␉␉␉␊ |
117 | ␉␉␉␉␉␉␉␉}␊ |
118 | ␉␉␉␉␉␉␉␉␊ |
119 | ␉␉␉␉␉␉␉␉␊ |
120 | ␉␉␉␉␉␉}␉␉␉␉␉␉␉␉␊ |
121 | ␉␉␉␉␉␉␉␊ |
122 | out:␊ |
123 | ␉␉␉␉␉␉␉if (Platform->CPU.CurrDiv) ␊ |
124 | ␉␉␉␉␉␉␉{␊ |
125 | ␉␉␉␉␉␉␉␉cpuFrequency = (Platform->CPU.FSBFrequency * ((Platform->CPU.CurrCoef * 2) + 1) / 2);␊ |
126 | ␉␉␉␉␉␉␉}␊ |
127 | ␉␉␉␉␉␉␉else ␊ |
128 | ␉␉␉␉␉␉␉{␊ |
129 | ␉␉␉␉␉␉␉␉cpuFrequency = (Platform->CPU.FSBFrequency * Platform->CPU.CurrCoef);␊ |
130 | ␉␉␉␉␉␉␉}␉␉␉␉␉␉␉␊ |
131 | ␉␉␉␉␉␉␉␊ |
132 | ␉␉␉␉␉␉␉Platform->CPU.CPUFrequency = cpuFrequency;␊ |
133 | ␉␉␉␉␉␉␉verbose("CPU: FSBFreq changed to: %dMHz\n", Platform->CPU.FSBFrequency / 1000000);␊ |
134 | ␉␉␉␉␉␉␉verbose("CPU: CPUFreq changed to: %dMHz\n", Platform->CPU.CPUFrequency / 1000000);␊ |
135 | ␉␉␉␉␉␉␉//verbose("CPUfreq: FSB Fix applied !\n");␉␉␉␉␉␉␉␊ |
136 | ␉␉␉␉␉␉ ␉␉␉␉␉␉␊ |
137 | ␉␉␉␉␉␉break;␊ |
138 | ␉␉␉␉␉case 0x1d:␉␉// Xeon MP MP 7400␊ |
139 | ␉␉␉␉␉default:␉␉␉␉␉␉␊ |
140 | ␉␉␉␉␉␉break;␊ |
141 | ␉␉␉␉}␊ |
142 | ␉␉␉}␊ |
143 | ␉␉}␊ |
144 | ␉}␊ |
145 | ␉else if(Platform->CPU.Vendor == 0x68747541 /* AMD */ && Platform->CPU.Family == 0x0f) // valv: work in progress␊ |
146 | ␉␉ {␊ |
147 | ␉␉␉ verbose("CPU: ");␊ |
148 | ␉␉␉ // valv: mobility check␉␉␉ ␊ |
149 | ␉␉␉ if (strstr(Platform->CPU.BrandString, "obile") == 0)␊ |
150 | ␉␉␉␉␉{␊ |
151 | ␉␉␉␉␉␉ Platform->CPU.Features |= CPU_FEATURE_MOBILE;␊ |
152 | ␉␉␉␉␉}␊ |
153 | ␉␉␉␉␉␊ |
154 | ␉␉␉ verbose("%s\n", Platform->CPU.BrandString);␊ |
155 | ␉␉␉␉␉uint8_t bus_ratio_current = 0;␊ |
156 | ␉␉␉␉␊ |
157 | ␉␉␉ if(Platform->CPU.ExtFamily == 0x00 /* K8 */)␊ |
158 | ␉␉␉␉ {␊ |
159 | ␉␉␉␉␉␉␉␊ |
160 | ␉␉␉␉␉ msr = rdmsr64(K8_FIDVID_STATUS);␊ |
161 | ␉␉␉␉␉␉␉␉bus_ratio_current = (msr & 0x3f) / 2 + 4; ␊ |
162 | ␉␉␉␉␉␉␉␉Platform->CPU.CurrDiv = (msr & 0x01) * 2;␉␉␉␉␉ ␊ |
163 | ␉␉␉␉␉ if (bus_ratio_current)␊ |
164 | ␉␉␉␉␉␉ {␊ |
165 | ␉␉␉␉␉␉␉ if (Platform->CPU.CurrDiv)␊ |
166 | ␉␉␉␉␉␉␉␉ {␊ |
167 | ␉␉␉␉␉␉␉␉␉ Platform->CPU.FSBFrequency = ((Platform->CPU.TSCFrequency * Platform->CPU.CurrDiv) / bus_ratio_current); // ?␊ |
168 | ␉␉␉␉␉␉␉␉␉ }␊ |
169 | ␉␉␉␉␉␉␉ else␊ |
170 | ␉␉␉␉␉␉␉␉ {␊ |
171 | ␉␉␉␉␉␉␉␉␉ Platform->CPU.FSBFrequency = (Platform->CPU.TSCFrequency / bus_ratio_current);␊ |
172 | ␉␉␉␉␉␉␉␉␉ }␊ |
173 | ␉␉␉␉␉␉␉ //fsbFrequency = (tscFrequency / bus_ratio_max); // ?␊ |
174 | ␉␉␉␉␉␉␉ }␊ |
175 | ␉␉␉␉␉ }␊ |
176 | ␉␉␉ else if(Platform->CPU.ExtFamily >= 0x01 /* K10+ */)␊ |
177 | ␉␉␉␉ {␊ |
178 | ␉␉␉␉␉␉␉␉␊ |
179 | ␉␉␉␉␉ msr = rdmsr64(AMD_10H_11H_CONFIG);␊ |
180 | ␉␉␉␉␉␉␉ bus_ratio_current = ((msr) & 0x3F);␊ |
181 | ␉␉␉␉␉␉␉␉Platform->CPU.CurrDiv = (2 << ((msr >> 6) & 0x07)) / 2;␊ |
182 | ␉␉␉␉␉ Platform->CPU.FSBFrequency = (Platform->CPU.CPUFrequency / bus_ratio_current);␊ |
183 | ␉␉␉␉␉␉␉␉␊ |
184 | ␊ |
185 | ␉␉␉␉␉ }␉␊ |
186 | ␉␉␉␉␊ |
187 | ␉␉␉␉␉if (!Platform->CPU.FSBFrequency) ␊ |
188 | ␉␉␉␉␉{␊ |
189 | ␉␉␉␉␉␉Platform->CPU.FSBFrequency = (DEFAULT_FSB * 1000);␊ |
190 | ␉␉␉␉␉␉verbose("0 ! using the default value for FSB !\n");␊ |
191 | ␉␉␉␉␉}␊ |
192 | ␉␉␉␉␉Platform->CPU.CurrCoef = bus_ratio_current / 10;␊ |
193 | ␉␉␉␉␉Platform->CPU.CPUFrequency = Platform->CPU.TSCFrequency;␊ |
194 | ␉␉␉␉␉␊ |
195 | ␉␉␉␉␉verbose("CPU (AMD): FSBFreq: %dMHz\n", Platform->CPU.FSBFrequency / 1000000);␊ |
196 | ␉␉␉␉␉verbose("CPU (AMD): CPUFreq: %dMHz\n", Platform->CPU.CPUFrequency / 1000000);␊ |
197 | ␉␉␉␉␉verbose("CPU (AMD): CurrCoef:␉␉␉ 0x%x\n", Platform->CPU.CurrCoef);␊ |
198 | ␉␉␉␉␉verbose("CPU (AMD): CurrDiv: 0x%x\n", Platform->CPU.CurrDiv);␉␊ |
199 | ␉␉␉ }␊ |
200 | ␊ |
201 | }␊ |
202 | ␊ |
203 | void CPUfreq_start()␊ |
204 | {␉␊ |
205 | ␉if (Platform->CPU.Features & CPU_FEATURE_MSR) {␊ |
206 | ␉␉register_hook_callback("PreBoot", &CPUfreq_hook);␉␉␊ |
207 | ␉} else {␊ |
208 | ␉␉verbose ("Unsupported CPU: CPUfreq disabled !!!\n");␉␉␊ |
209 | ␉}␉␊ |
210 | }␊ |
211 | |