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Root/branches/rewrite/i386/include/IOKit/ata/IOATATypes.h

Source at commit 1129 created 12 years 11 months ago.
By meklort, Change options.o so that it reloads the system config as well. Also change it so that it uses that config for variables (NOTE: if the calue exists in chameleonConfig, it's used instead.
1/*␊
2 * Copyright (c) 2000-2008 Apple, Inc. All rights reserved.␊
3 *␊
4 * @APPLE_LICENSE_HEADER_START@␊
5 * ␊
6 * The contents of this file constitute Original Code as defined in and␊
7 * are subject to the Apple Public Source License Version 1.1 (the␊
8 * "License"). You may not use this file except in compliance with the␊
9 * License. Please obtain a copy of the License at␊
10 * http://www.apple.com/publicsource and read it before using this file.␊
11 * ␊
12 * This Original Code and all software distributed under the License are␊
13 * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER␊
14 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,␊
15 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,␊
16 * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the␊
17 * License for the specific language governing rights and limitations␊
18 * under the License.␊
19 * ␊
20 * @APPLE_LICENSE_HEADER_END@␊
21 */␊
22␊
23␊
24#ifndef _IOATATYPES_H␊
25#define _IOATATYPES_H␊
26␊
27#include <IOKit/IOTypes.h>␊
28␊
29␊
30/*!␊
31␊
32@header IOATAtypes.h␊
33@discussion contains various definitions and constants for use in the IOATAFamily and clients. Header Doc is incomplete at this point, but file is heavily commented.␊
34␊
35*/␊
36// property strings␊
37#define kATADevPropertyKey "ata device type"␊
38#define kATATypeATAString "ata"␊
39#define kATATypeATAPIString "atapi"␊
40#define kATATypeUnknownString "unknown"␊
41␊
42#define kATAVendorPropertyKey "device model"␊
43#define kATARevisionPropertyKey "device revision"␊
44#define kATASerialNumPropertyKey "device serial"␊
45␊
46#define kATAUnitNumberKey "unit number"␊
47␊
48#define kATASocketKey "socket type"␊
49#define kATAInternalSocketString "internal"␊
50#define kATAMediaBaySocketString "media-bay"␊
51#define kATAPCCardSocketString "pccard"␊
52#define kATAInternalSATAString "serial-ata"␊
53#define kATASATABayString "sata-bay"␊
54#define kATAInternalSATA2 "serial-ata-2"␊
55#define kATASATA2BayString "sata-2-bay"␊
56#define kATAUnkownSocketString "unknown"␊
57␊
58#define kATANotifyOnChangeKey "media-notify"␊
59␊
60// allows for porting to non-memory-mapped IO systems, such as x86.␊
61// for such a platform, create a class and overload the assignment operators␊
62// so that the correct IO operation is performed and define the type for that architecture port.␊
63#ifdef __ppc__␊
64#define IOATARegPtr8 volatile UInt8* ␊
65#define IOATARegPtr16 volatile UInt16*␊
66#define IOATARegPtr32 volatile UInt32*␊
67#define IOATARegPtr8Cast(x) ((IOATARegPtr8)(x))␊
68#elif defined( __i386__ ) || defined( __x86_64__ )␊
69#include <IOKit/ata/IOATARegI386.h>␊
70#else␊
71#error Unknown machine architecture␊
72#endif␊
73␊
74enum ataSocketType{␊
75␊
76␉kUnknownSocket␉= 0,␊
77␉kInternalATASocket,␊
78␉kMediaBaySocket␉,␊
79␉kPCCardSocket,␊
80␉kInternalSATA,␊
81␉kSATABay,␊
82␉kInternalSATA2,␊
83␉kSATA2Bay␊
84␊
85} ;␊
86␊
87␊
88enum ataDeviceType {␊
89␊
90␉kUnknownATADeviceType = 0,␊
91␉kATADeviceType,␊
92␉kATAPIDeviceType␊
93␊
94} ;␊
95␊
96// enum for bits 5 and 6 of word zero of ␊
97// the identify packet device info data.␊
98// shift word-0 5-bits left, mask 0x03 and these enums apply.␊
99enum atapiConfig {␊
100␊
101␉kATAPIDRQSlow ␉= 0x00,␊
102␉kATAPIIRQPacket = 0x01,␊
103␉kATAPIDRQFast␉= 0x10,␊
104␉kATAPIUnknown = 0x11␊
105␊
106};␊
107␊
108␊
109enum ataUnitID {␊
110␊
111␉kATAInvalidDeviceID␉␉␉= -1,␊
112␉kATADevice0DeviceID␉␉␉= 0,␉␉␉␉␉␉␉/* aka, Master. Device 0 is the correct terminology */␊
113␉kATADevice1DeviceID␉␉␉= 1␉␉␉␉␉␉␉␉/* aka, Slave. Device 1 is the correct terminology */␊
114␊
115} ;␊
116␊
117enum {␊
118␊
119␉kATADefaultSectorSize = 512␊
120};␊
121␊
122/* Task file definition *** Error Register *** */␊
123enum {␊
124␉bATABadBlock␉␉␉␉= 7,␉␉␉␉␉␉␉/* bit number of bad block error bit*/␊
125␉bATAUncorrectable␉␉␉= 6,␉␉␉␉␉␉␉/* bit number of uncorrectable error bit*/␊
126␉bATAMediaChanged␉␉␉= 5,␉␉␉␉␉␉␉/* bit number of media changed indicator*/␊
127␉bATAIDNotFound␉␉␉␉= 4,␉␉␉␉␉␉␉/* bit number of ID not found error bit*/␊
128␉bATAMediaChangeReq␉␉␉= 3,␉␉␉␉␉␉␉/* bit number of media changed request*/␊
129␉bATACommandAborted␉␉␉= 2,␉␉␉␉␉␉␉/* bit number of command abort bit*/␊
130␉bATATrack0NotFound␉␉␉= 1,␉␉␉␉␉␉␉/* bit number of track not found*/␊
131␉bATAAddressNotFound␉␉␉= 0,␉␉␉␉␉␉␉/* bit number of address mark not found*/␊
132␉mATABadBlock␉␉␉␉= 1 << bATABadBlock,␉␉␉/* Bad Block Detected*/␊
133␉mATAUncorrectable␉␉␉= 1 << bATAUncorrectable,␉␉/* Uncorrectable Data Error*/␊
134␉mATAMediaChanged␉␉␉= 1 << bATAMediaChanged,␉␉/* Media Changed Indicator (for removable)*/␊
135␉mATAIDNotFound␉␉␉␉= 1 << bATAIDNotFound,␉␉␉/* ID Not Found*/␊
136␉mATAMediaChangeReq␉␉␉= 1 << bATAMediaChangeReq,␉␉/* Media Change Requested (NOT IMPLEMENTED)*/␊
137␉mATACommandAborted␉␉␉= 1 << bATACommandAborted,␉␉/* Aborted Command*/␊
138␉mATATrack0NotFound␉␉␉= 1 << bATATrack0NotFound,␉␉/* Track 0 Not Found*/␊
139␉mATAAddressNotFound␉␉␉= 1 << bATAAddressNotFound␉␉/* Address Mark Not Found*/␊
140};␊
141␊
142/* Task file definition *** Features register *** */␊
143enum {␊
144␉bATAPIuseDMA␉␉␉␉= 0,␉␉␉␉␉␉␉/* bit number of useDMA bit (ATAPI)*/␊
145␉mATAPIuseDMA␉␉␉␉= 1 << bATAPIuseDMA␊
146};␊
147␊
148/* Task file definition *** ataTFSDH Register *** */␊
149enum {␊
150␉mATAHeadNumber␉␉␉␉= 0x0F,␉␉␉␉␉␉␉/* Head Number (bits 0-3) */␊
151␉mATASectorSize␉␉␉␉= 0xA0,␉␉␉␉␉␉␉/* bit 7=1; bit 5 = 01 (512 sector size) <DP4>*/␊
152␉mATADriveSelect␉␉␉␉= 0x10,␉␉␉␉␉␉␉/* Drive (0 = master, 1 = slave) */␊
153␉mATALBASelect␉␉␉␉= 0x40␉␉␉␉␉␉␉/* LBA mode bit (0 = chs, 1 = LBA)*/␊
154};␊
155␊
156/* Task file definition *** Status Register *** */␊
157enum {␊
158␉bATABusy␉␉␉␉␉= 7,␉␉␉␉␉␉␉/* bit number of BSY bit*/␊
159␉bATADriveReady␉␉␉␉= 6,␉␉␉␉␉␉␉/* bit number of drive ready bit*/␊
160␉bATAWriteFault␉␉␉␉= 5,␉␉␉␉␉␉␉/* bit number of write fault bit*/␊
161␉bATASeekComplete␉␉␉= 4,␉␉␉␉␉␉␉/* bit number of seek complete bit*/␊
162␉bATADataRequest␉␉␉␉= 3,␉␉␉␉␉␉␉/* bit number of data request bit*/␊
163␉bATADataCorrected␉␉␉= 2,␉␉␉␉␉␉␉/* bit number of data corrected bit*/␊
164␉bATAIndex␉␉␉␉␉= 1,␉␉␉␉␉␉␉/* bit number of index mark*/␊
165␉bATAError␉␉␉␉␉= 0,␉␉␉␉␉␉␉/* bit number of error bit*/␊
166␉mATABusy␉␉␉␉␉= 1 << bATABusy,␉␉␉␉/* Unit is busy*/␊
167␉mATADriveReady␉␉␉␉= 1 << bATADriveReady,␉␉␉/* Unit is ready*/␊
168␉mATAWriteFault␉␉␉␉= 1 << bATAWriteFault,␉␉␉/* Unit has a write fault condition*/␊
169␉mATASeekComplete␉␉␉= 1 << bATASeekComplete,␉␉/* Unit seek complete*/␊
170␉mATADataRequest␉␉␉␉= 1 << bATADataRequest,␉␉␉/* Unit data request*/␊
171␉mATADataCorrected␉␉␉= 1 << bATADataCorrected,␉␉/* Data corrected*/␊
172␉mATAIndex␉␉␉␉␉= 1 << bATAIndex,␉␉␉␉/* Index mark - NOT USED*/␊
173␉mATAError␉␉␉␉␉= 1 << bATAError␉␉␉␉/* Error condition - see error register*/␊
174};␊
175␊
176/* Task file definition *** Device Control Register *** */␊
177enum {␊
178␉bATADCROne␉␉␉␉␉= 3,␉␉␉␉␉␉␉/* bit number of always one bit*/␊
179␉bATADCRReset␉␉␉␉= 2,␉␉␉␉␉␉␉/* bit number of reset bit*/␊
180␉bATADCRnIntEnable␉␉␉= 1,␉␉␉␉␉␉␉/* bit number of interrupt disable*/␊
181␉mATADCROne␉␉␉␉␉= 1 << bATADCROne,␉␉␉␉/* always one bit*/␊
182␉mATADCRReset␉␉␉␉= 1 << bATADCRReset,␉␉␉/* Reset (1 = reset)*/␊
183␉mATADCRnIntEnable␉␉␉= 1 << bATADCRnIntEnable␉␉/* Interrupt Disable(0 = enabled)*/␊
184};␊
185␊
186␊
187/* 'ataRegMask' field of the ataRegAccess definition*/␊
188enum ataRegMask{␊
189␊
190␉bATAAltSDevCValid␉␉␉= 14,␉␉␉␉␉␉␉/* bit number of alternate status/device cntrl valid bit*/␊
191␉bATAStatusCmdValid␉␉␉= 7,␉␉␉␉␉␉␉/* bit number of status/command valid bit*/␊
192␉bATASDHValid␉␉␉␉= 6,␉␉␉␉␉␉␉/* bit number of ataTFSDH valid bit*/␊
193␉bATACylinderHiValid␉␉␉= 5,␉␉␉␉␉␉␉/* bit number of cylinder high valid bit*/␊
194␉bATACylinderLoValid␉␉␉= 4,␉␉␉␉␉␉␉/* bit number of cylinder low valid bit*/␊
195␉bATASectorNumValid␉␉␉= 3,␉␉␉␉␉␉␉/* bit number of sector number valid bit*/␊
196␉bATASectorCntValid␉␉␉= 2,␉␉␉␉␉␉␉/* bit number of sector count valid bit*/␊
197␉bATAErrFeaturesValid␉␉= 1,␉␉␉␉␉␉␉/* bit number of error/features valid bit*/␊
198␉bATADataValid␉␉␉␉= 0,␉␉␉␉␉␉␉/* bit number of data valid bit*/␊
199␉mATAAltSDevCValid␉␉␉= 1 << bATAAltSDevCValid,␉␉/* alternate status/device control valid*/␊
200␉mATAStatusCmdValid␉␉␉= 1 << bATAStatusCmdValid,␉␉/* status/command valid*/␊
201␉mATASDHValid␉␉␉␉= 1 << bATASDHValid,␉␉␉/* ataTFSDH valid*/␊
202␉mATACylinderHiValid␉␉␉= 1 << bATACylinderHiValid,␉␉/* cylinder high valid*/␊
203␉mATACylinderLoValid␉␉␉= 1 << bATACylinderLoValid,␉␉/* cylinder low valid*/␊
204␉mATASectorNumValid␉␉␉= 1 << bATASectorNumValid,␉␉/* sector number valid*/␊
205␉mATASectorCntValid␉␉␉= 1 << bATASectorCntValid,␉␉/* sector count valid*/␊
206␉mATAErrFeaturesValid␉␉= 1 << bATAErrFeaturesValid,␉/* error/features valid*/␊
207␉mATADataValid␉␉␉␉= 1 << bATADataValid␉␉␉/* data valid*/␊
208␊
209} ;␊
210␊
211␊
212enum ataFlags{␊
213␉bATAFlagQuiesce␉␉␉␉= 20,␊
214␉bATAFlagNoIRQ␉␉␉␉= 19,␉␉␉␉␉␉␉/* bit Number of no IRQ protocol flag*/␊
215␉bATAFlag48BitLBA␉␉␉= 18,␊
216␉bATAFlagDMAQueued␉␉␉= 17,␊
217␉bATAFlagOverlapped␉␉␉= 16,␊
218␉bATAFlagUseConfigSpeed␉␉= 15,␉␉␉␉␉␉␉/* bit number of use configured speed flag*/␊
219␉bATAFlagByteSwap␉␉␉= 14,␉␉␉␉␉␉␉/* bit number of byte swap flag*/␊
220␉bATAFlagIORead␉␉␉␉= 13,␉␉␉␉␉␉␉/* bit number of I/O read flag*/␊
221␉bATAFlagIOWrite␉␉␉␉= 12,␉␉␉␉␉␉␉/* bit number of I/O write flag*/␊
222␉bATAFlagTFAccessResult ␉␉= 8,␉␉␉␉␉␉␉/* bit number of get register results on command completion.*/␊
223␉bATAFlagUseDMA␉␉␉␉= 7,␉␉␉␉␉␉␉/* bit number of use DMA flag*/␊
224␉bATAFlagProtocolATAPI␉␉= 5,␉␉␉␉␉␉␉/* bit number of ATAPI protocol*/␊
225␉bATAFlagImmediate␉␉␉= 1,␉␉␉␉␉␉␉/* bit number of immediate flag */␊
226␉bATAFlagTFAccess␉␉␉= 0,␉␉␉␉␉␉␉/* bit number of TF access */␊
227␊
228␉mATAFlagQuiesce␉␉␉␉= 1 << bATAFlagQuiesce,␊
229␉mATAFlagUseNoIRQ␉␉␉= 1 << bATAFlagNoIRQ, ␉␉␉/* Special purpose! Avoid using! No-IRQ, polled synchronous protocol valid only for PIO commands*/␊
230␉mATAFlag48BitLBA␉␉␉= 1 << bATAFlag48BitLBA,␉␉/* Use 48 bit extended LBA protocol on this command. Requires support from the controller.*/␊
231␉mATAFlagDMAQueued␉␉␉= 1 << bATAFlagDMAQueued,␉␉/* Use tagged dma queuing protocol on this command. Requires support from the controller.*/␊
232␉mATAFlagOverlapped␉␉␉= 1 << bATAFlagOverlapped,␉␉/* Use overllaped protocol on this command. Requires support from the controller.*/␊
233␉mATAFlagUseConfigSpeed␉␉= 1 << bATAFlagUseConfigSpeed, /* Use the configured interface speed = true. False = use default PIO (slow) speed. valid only for PIO commands*/␊
234␉mATAFlagByteSwap␉␉␉= 1 << bATAFlagByteSwap,␉␉/* Swap data bytes (read - after; write - before)*/␊
235␉mATAFlagIORead␉␉␉␉= 1 << bATAFlagIORead,␉␉␉/* Read (in) operation*/␊
236␉mATAFlagIOWrite␉␉␉␉= 1 << bATAFlagIOWrite,␉␉␉/* Write (out) operation*/␊
237␉mATAFlagTFAccessResult␉␉= 1 << bATAFlagTFAccessResult, /* get contents of TaskFile registers indicated in TFMask on command completion, even if no error*/␊
238␉mATAFlagUseDMA␉␉␉␉= 1 << bATAFlagUseDMA,␊
239␉mATAFlagProtocolATAPI␉␉= 1 << bATAFlagProtocolATAPI,␉/* ATAPI protocol indicator*/␊
240␉mATAFlagImmediate␉␉␉= 1 << bATAFlagImmediate,␉␉/* Put command at head of queue */␊
241␉mATAFlagTFAccess␉␉␉= 1 << bATAFlagTFAccess,␉␉/* Return Taskfile on error status*/␊
242␊
243} ;␊
244␊
245/* The Function codes sent to controllers*/␊
246enum ataOpcode {␊
247␊
248␉kATANoOp = 0, ␊
249␉kATAFnExecIO ,␉␉/* Execute ATA I/O */␊
250␉kATAPIFnExecIO,␉␉/* ATAPI I/O */␊
251␉kATAFnRegAccess ,␉/* Register Access */␊
252␊
253␉kATAFnQFlush ,␉␉/* I/O Queue flush requests for your unit number */␊
254␉kATAFnBusReset ␉/* Reset ATA bus */␊
255␊
256} ;␊
257␊
258␊
259/* The ATA Event codes */␊
260/* sent when calling the device driver's event handler*/␊
261enum ataEventCode {␊
262␉kATANullEvent␉␉␉␉= 0x00,␉␉␉␉␉␉␉/* Just kidding -- nothing happened*/␊
263␉kATAOnlineEvent␉␉␉␉= 0x01,␉␉␉␉␉␉␉/* An ATA device has come online*/␊
264␉kATAOfflineEvent␉␉␉= 0x02,␉␉␉␉␉␉␉/* An ATA device has gone offline*/␊
265␉kATARemovedEvent␉␉␉= 0x03,␉␉␉␉␉␉␉/* An ATA device has been removed from the bus*/␊
266␉kATAResetEvent␉␉␉␉= 0x04,␉␉␉␉␉␉␉/* Someone gave a hard reset to the drive*/␊
267␉kATAOfflineRequest␉␉␉= 0x05,␉␉␉␉␉␉␉/* Someone requesting to offline the drive*/␊
268␉kATAEjectRequest␉␉␉= 0x06,␉␉␉␉␉␉␉/* Someone requesting to eject the drive*/␊
269␉kATAPIResetEvent␉␉␉= 0x07,␉␉␉␉␉␉␉/* Someone gave a ATAPI reset to the drive*/␊
270␉kATAReservedEvent␉␉␉= 0x80␉␉␉␉␉␉␉/* RESERVED*/␊
271};␊
272␊
273␊
274// These need to be combined with a new enumeration of the current ATA/ATAPI command set.␊
275// Some opcodes are of interest to ATA controllers, since they imply special protocols ␊
276// or handling. Device Reset, Execute Device Diagnostics have subtle side effects that␊
277// controllers need to be aware of, so we snoop for those commands being issued.␊
278// the rest are here for informational purposes.␊
279␊
280// BUG make new enum for all current ATA commands.␊
281␊
282enum {␊
283␉kSOFTRESET␉=␉0x008,␉␉␉// ATAPI Soft Reset command␊
284␉kPACKET␉␉=␉0x0A0,␉␉␉// ATAPI Packet command␊
285␉kID_DRIVE␉=␉0x0A1␉␉␉// ATAPI Identify drive command␊
286};␊
287/* ATA Command Opcode definition*/␊
288enum {␊
289␉kATAcmdWORetry␉␉␉␉= 0x01,␉␉␉␉␉␉␉/* Without I/O retry option*/␊
290␉kATAcmdNOP␉␉␉␉␉= 0x0000,␉␉␉␉␉␉/* NOP operation - media detect*/␊
291␉kATAcmdRecal␉␉␉␉= 0x0010,␉␉␉␉␉␉/* Recalibrate command */␊
292␉kATAcmdRead␉␉␉␉␉= 0x0020,␉␉␉␉␉␉/* Read command */␊
293␉kATAcmdReadLong␉␉␉␉= 0x0022,␉␉␉␉␉␉/* Read Long command*/␊
294␉kATAcmdReadExtended␉␉␉= 0x0024,␉␉␉␉␉␉/* Read Extended (with retries)*/␊
295␉kATAcmdReadDMAExtended␉␉= 0x0025,␉␉␉␉␉␉/* Read DMA Extended (with retries)*/␊
296␉kATAcmdWrite␉␉␉␉= 0x0030,␉␉␉␉␉␉/* Write command */␊
297␉kATAcmdWriteLong␉␉␉= 0x0032,␉␉␉␉␉␉/* Write Long*/␊
298␉kATAcmdWriteExtended␉␉= 0x0034,␉␉␉␉␉␉/* Write Extended (with retries)*/␊
299␉kATAcmdWriteDMAExtended␉␉= 0x0035,␉␉␉␉␉␉/* Write DMA Extended (with retries)*/␊
300␉kATAcmdWriteVerify␉␉␉= 0x003C,␉␉␉␉␉␉/* Write verify*/␊
301␉kATAcmdReadVerify␉␉␉= 0x0040,␉␉␉␉␉␉/* Read Verify command */␊
302␉kATAcmdFormatTrack␉␉␉= 0x0050,␉␉␉␉␉␉/* Format Track command */␊
303␉kATAcmdSeek␉␉␉␉␉= 0x0070,␉␉␉␉␉␉/* Seek command */␊
304␉kATAcmdDiagnostic␉␉␉= 0x0090,␉␉␉␉␉␉/* Drive Diagnostic command */␊
305␉kATAcmdInitDrive␉␉␉= 0x0091,␉␉␉␉␉␉/* Init drive parameters command */␊
306␉kATAcmdReadMultiple␉␉␉= 0x00C4,␉␉␉␉␉␉/* Read multiple*/␊
307␉kATAcmdWriteMultiple␉␉= 0x00C5,␉␉␉␉␉␉/* Write multiple*/␊
308␉kATAcmdSetRWMultiple␉␉= 0x00C6,␉␉␉␉␉␉/* Set Multiple for Read/Write Multiple*/␊
309␉kATAcmdReadDMA␉␉␉␉= 0x00C8,␉␉␉␉␉␉/* Read DMA (with retries)*/␊
310␉kATAcmdWriteDMA␉␉␉␉= 0x00CA,␉␉␉␉␉␉/* Write DMA (with retries)*/␊
311␉kATAcmdMCAcknowledge␉␉= 0x00DB,␉␉␉␉␉␉/* Acknowledge media change - removable*/␊
312␉kATAcmdDoorLock␉␉␉␉= 0x00DE,␉␉␉␉␉␉/* Door lock*/␊
313␉kATAcmdDoorUnlock␉␉␉= 0x00DF,␉␉␉␉␉␉/* Door unlock*/␊
314␉kATAcmdStandbyImmed␉␉␉= 0x00E0,␉␉␉␉␉␉/* Standby Immediate*/␊
315␉kATAcmdIdleImmed␉␉␉= 0x00E1,␉␉␉␉␉␉/* Idle Immediate*/␊
316␉kATAcmdStandby␉␉␉␉= 0x00E2,␉␉␉␉␉␉/* Standby*/␊
317␉kATAcmdIdle␉␉␉␉␉= 0x00E3,␉␉␉␉␉␉/* Idle*/␊
318␉kATAcmdReadBuffer␉␉␉= 0x00E4,␉␉␉␉␉␉/* Read sector buffer command */␊
319␉kATAcmdCheckPowerMode␉␉= 0x00E5,␉␉␉␉␉␉/* Check power mode command␉<04/04/94>*/␊
320␉kATAcmdSleep␉␉␉␉= 0x00E6,␉␉␉␉␉␉/* Sleep*/␊
321␉kATAcmdFlushCache␉␉␉= 0x00E7,␉␉␉␉␉␉/* Flush Cache */␊
322␉kATAcmdWriteBuffer␉␉␉= 0x00E8,␉␉␉␉␉␉/* Write sector buffer command */␊
323␉kATAcmdWriteSame␉␉␉= 0x00E9,␉␉␉␉␉␉/* Write same data to multiple sectors*/␊
324␉kATAcmdFlushCacheExtended␉= 0x00EA,␉␉␉␉␉␉/* Flush Cache Extended */␊
325␉kATAcmdDriveIdentify␉␉= 0x00EC,␉␉␉␉␉␉/* Identify Drive command */␊
326␉kATAcmdMediaEject␉␉␉= 0x00ED,␉␉␉␉␉␉/* Media Eject*/␊
327␉kATAcmdSetFeatures␉␉␉= 0x00EF␉␉␉␉␉␉/* Set Features*/␊
328};␊
329␊
330/* Set feature command opcodes*/␊
331enum {␊
332␉kATAEnableWriteCache␉␉= 0x02,␉␉␉␉␉␉␉/*␉␉Enable write cache*/␊
333␉kATASetTransferMode␉␉␉= 0x03,␉␉␉␉␉␉␉/*␉␉Set transfer mode*/␊
334␉kATAEnableAPM␉␉␉␉= 0x05,␉␉␉␉␉␉␉/* ␉␉Enable Advanced Power Management*/␊
335␉kATASetPIOMode␉␉␉␉= 0x08,␉␉␉␉␉␉␉/*␉␉PIO Flow Control Tx Mode bit*/␊
336␉kATADisableWriteCache␉␉= 0x82,␉␉␉␉␉␉␉/*␉␉disable write cache*/␊
337␉kATAEnableReadAhead␉␉␉= 0xAA␉␉␉␉␉␉␉/*␉␉Read look-ahead enable*/␊
338};␊
339␊
340// revisit the opcode enumerations.␊
341␊
342//////////////////////␊
343␊
344␊
345/* task file for ata */␊
346typedef struct ataTaskFile {␊
347␊
348␉UInt8 ␉␉␉␉␉␉␉ataTFFeatures;␉␉␉␉/* <-> Error(R) or ataTFFeatures(W) register image */␊
349␉UInt8 ␉␉␉␉␉␉␉ataTFCount;␉␉␉␉␉/* <-> Sector count/remaining */␊
350␉UInt8 ␉␉␉␉␉␉␉ataTFSector;␉␉␉␉/* <-> Sector start/finish */␊
351␉UInt8 ␉␉␉␉␉␉␉ataTFCylLo;␉␉␉␉␉/* <-> ataTFCylLo␉␉␉␉␉*/␊
352␉UInt8 ␉␉␉␉␉␉␉ataTFCylHigh;␉␉␉␉/* <-> ataTFCylHigh */␊
353␉UInt8 ␉␉␉␉␉␉␉ataTFSDH;␉␉␉␉␉/* <-> ataTFSDH register image*/␊
354␉UInt8 ␉␉␉␉␉␉␉ataTFCommand;␉␉␉␉/* <-> Status(R) or Command(W) register image */␊
355␊
356} ataTaskFile;␊
357␊
358␊
359typedef struct ataRegisterImage {␊
360␊
361␉ataTaskFile␉␉␉␉␉␉taskFile;␊
362␉UInt16␉␉␉␉␉␉␉ataDataRegister;␉␉␉/* <-> Data register. */␊
363␉UInt8 ␉␉␉␉␉␉␉ataAltSDevCReg;␉␉␉␉/* <->: Alternate status(R) or Device Control(W) register image*/␊
364␊
365} ataRegisterImage ;␊
366␊
367␊
368typedef struct ATAPICmdPacket{␊
369␊
370␉UInt16 ␉␉␉␉␉␉␉atapiPacketSize;␉␉␉/* Size of command packet in bytes␉*/␊
371␉UInt16 ␉␉␉␉␉␉␉atapiCommandByte[8];␉␉/* The command packet itself*/␊
372␊
373}ATAPICmdPacket;␊
374␊
375␊
376␊
377// Error and result codes: TBD␊
378enum {␊
379␉␉kATAErrUnknownType = -1,␊
380␉␉kATANoErr = 0,␊
381␉␉kATAQueueEmpty = 1,␊
382␉␉kATAUnknownOpcode,␊
383␉␉kATATimeoutErr,␊
384␉␉kATAInvalidDevID,␊
385␉␉kATAErrDevBusy,␊
386␉␉kATAModeNotSupported,␊
387␉␉kATADevIntNoCmd,␊
388␉␉kATADeviceError,␊
389␉␉kATADMAErr␊
390};␊
391␊
392␊
393#endif /* !_IOATATYPES_H */␊
394

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