Root/
| Source at commit 1129 created 12 years 11 months ago. By meklort, Change options.o so that it reloads the system config as well. Also change it so that it uses that config for variables (NOTE: if the calue exists in chameleonConfig, it's used instead. | |
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| 1 | /*␊ |
| 2 | * Copyright (c) 1998-2008 Apple Inc. All rights reserved.␊ |
| 3 | *␊ |
| 4 | * @APPLE_LICENSE_HEADER_START@␊ |
| 5 | * ␊ |
| 6 | * The contents of this file constitute Original Code as defined in and␊ |
| 7 | * are subject to the Apple Public Source License Version 1.1 (the␊ |
| 8 | * "License"). You may not use this file except in compliance with the␊ |
| 9 | * License. Please obtain a copy of the License at␊ |
| 10 | * http://www.apple.com/publicsource and read it before using this file.␊ |
| 11 | * ␊ |
| 12 | * This Original Code and all software distributed under the License are␊ |
| 13 | * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER␊ |
| 14 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,␊ |
| 15 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,␊ |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the␊ |
| 17 | * License for the specific language governing rights and limitations␊ |
| 18 | * under the License.␊ |
| 19 | * ␊ |
| 20 | * @APPLE_LICENSE_HEADER_END@␊ |
| 21 | */␊ |
| 22 | ␊ |
| 23 | #if defined(__ppc__)␊ |
| 24 | ␊ |
| 25 | ␊ |
| 26 | #ifndef _DRV_MACIO_ATA_H␊ |
| 27 | #define _DRV_MACIO_ATA_H␊ |
| 28 | ␊ |
| 29 | #include <libkern/c++/OSObject.h>␊ |
| 30 | #include <IOKit/IOTypes.h>␊ |
| 31 | #include "IOATAController.h"␊ |
| 32 | #include <IOKit/ppc/IODBDMA.h>␊ |
| 33 | #include <IOKit/IOMemoryCursor.h>␊ |
| 34 | ␊ |
| 35 | #include <IOKit/IOInterruptEventSource.h>␊ |
| 36 | ␊ |
| 37 | ␊ |
| 38 | /*! @class MacIOATA␊ |
| 39 | @abstract The base class for MAC-IO ata controller family. .␊ |
| 40 | @discussion class defining the portions of MacIO ATA cells which are shared␊ |
| 41 | ␉in common between Heathrow and Key Largo ATA Cells.␊ |
| 42 | ␉These controllers share a common register file layout, interrupt ␊ |
| 43 | ␉source format and all use DBDMA engines. These are different from ␊ |
| 44 | ␉other ATA controllers, such as most PCI-IDE and PC-Card ATA ports.␊ |
| 45 | ␉Each cell type has some distinctive features that must be implemented␊ |
| 46 | ␉by a specific driver subclass. As much common code as possible is ␊ |
| 47 | ␉presented in this superclass.␊ |
| 48 | ␊ |
| 49 | */␊ |
| 50 | ␊ |
| 51 | class MacIOATA : public IOATAController␊ |
| 52 | {␊ |
| 53 | OSDeclareDefaultStructors(MacIOATA);␊ |
| 54 | ␊ |
| 55 | public:␊ |
| 56 | ␊ |
| 57 | ␉/*--- Overrides from IOATAController ---*/␊ |
| 58 | ␉virtual bool init(OSDictionary * properties);␊ |
| 59 | virtual bool start( IOService* provider );␊ |
| 60 | ␉virtual IOReturn message (UInt32 type, IOService* provider, void* argument = 0);␊ |
| 61 | ␊ |
| 62 | protected:␊ |
| 63 | ␊ |
| 64 | ␉// The DMA states: not in use, in use and running with additional passes needed,␊ |
| 65 | ␉// in use on final pass, transfer complete, and failure␊ |
| 66 | ␉enum ATADMAState ␊ |
| 67 | ␉{␊ |
| 68 | ␉␉kATADMAInactive,␊ |
| 69 | ␉␉kATADMAStarting,␊ |
| 70 | ␉␉kATADMAActive,␊ |
| 71 | ␉␉kATADMAStatus,␊ |
| 72 | ␉␉kATADMAComplete,␊ |
| 73 | ␉␉kATADMAError␊ |
| 74 | ␉};␊ |
| 75 | ␊ |
| 76 | ␊ |
| 77 | ␊ |
| 78 | ␉// the address of the timing register in the controller␊ |
| 79 | ␉volatile UInt32* _timingConfigReg;␊ |
| 80 | ␉// the timing values to use for each device.␊ |
| 81 | ␉UInt32␉_timingConfig[2]; ␊ |
| 82 | ␉␊ |
| 83 | ␉// semaphore for DMA state␊ |
| 84 | ␉UInt32␉_dmaState;␊ |
| 85 | ␉␊ |
| 86 | ␉// indicates whether a DMA interrupt is expected␊ |
| 87 | ␉UInt32 _dmaIntExpected;␊ |
| 88 | ␉␊ |
| 89 | ␉// pointer to the DMA control register address.␊ |
| 90 | ␉volatile IODBDMAChannelRegisters* _dmaControlReg;␊ |
| 91 | ␉␊ |
| 92 | ␉// mappings to the controller and DMA engine registers␊ |
| 93 | ␉// we have to free these when we go away.␊ |
| 94 | ␉IOMemoryMap* _baseAddressMap;␊ |
| 95 | ␉IOMemoryMap* _dmaBaseMap;␊ |
| 96 | ␉␊ |
| 97 | ␉// the DBDMA memory cursor␊ |
| 98 | ␉IODBDMAMemoryCursor*␉_DMACursor;␊ |
| 99 | ␉␊ |
| 100 | ␉// the DBDMA descriptor table␊ |
| 101 | ␉IODBDMADescriptor* _descriptors;␊ |
| 102 | ␉IOPhysicalAddress␉_descriptorsPhysical;␊ |
| 103 | ␉␊ |
| 104 | ␉// interrupt event sources␊ |
| 105 | ␉IOInterruptEventSource* _devIntSrc;␊ |
| 106 | ␉IOInterruptEventSource* _dmaIntSrc;␊ |
| 107 | ␉␊ |
| 108 | ␉// flag indicating device and dma engine interrupts need ␊ |
| 109 | ␉// re-synchronization.␊ |
| 110 | ␉␊ |
| 111 | ␉bool␉_resyncInterrupts;␊ |
| 112 | /*! @struct ExpansionData␊ |
| 113 | @discussion This structure will be used to expand the capablilties of the IOWorkLoop in the future.␊ |
| 114 | */␊ |
| 115 | struct ExpansionData { };␊ |
| 116 | ␊ |
| 117 | /*! @var reserved␊ |
| 118 | Reserved for future use. (Internal use only) */␊ |
| 119 | ExpansionData *reserved;␊ |
| 120 | ␉␊ |
| 121 | ␉// overriden to allow synchronization of DMA vs. device interrupts.␊ |
| 122 | ␉virtual IOReturn handleDeviceInterrupt(void);␊ |
| 123 | ␉// overriden here to allow for reporting of DMA errs␊ |
| 124 | ␉virtual IOReturn asyncStatus(void);␊ |
| 125 | ␉␊ |
| 126 | ␉// overriden here to allow for clean up of DMA resynch flag on timeout.␊ |
| 127 | ␉virtual void handleTimeout(void);␊ |
| 128 | ␊ |
| 129 | ␊ |
| 130 | ␉// called by the superclass::start method in order to ␊ |
| 131 | ␉// find and enable access to the ATA task file.␊ |
| 132 | ␉virtual bool configureTFPointers(void);␊ |
| 133 | ␊ |
| 134 | ␉// allocate memory for the DMA descriptors.␊ |
| 135 | ␉virtual bool allocDMAChannel(void);␊ |
| 136 | ␉␊ |
| 137 | ␉// fill CC with stop commands.␊ |
| 138 | ␉virtual void initATADMAChains (IODBDMADescriptor* descPtr);␊ |
| 139 | ␉␊ |
| 140 | ␉// setup the CC with IO commands␊ |
| 141 | ␉virtual IOReturn createChannelCommands(void);␊ |
| 142 | ␉␊ |
| 143 | ␉// deallocate memory for the DMA engine␊ |
| 144 | ␉virtual bool freeDMAChannel(void);␊ |
| 145 | ␉␊ |
| 146 | ␉// connect the device (drive) interrupt to our workloop␊ |
| 147 | ␉virtual bool createDeviceInterrupt(void);␊ |
| 148 | ␊ |
| 149 | ␉// connect the DMA interrupt to our workloop.␊ |
| 150 | ␉virtual bool createDMAInterrupt(void);␊ |
| 151 | ␊ |
| 152 | ␊ |
| 153 | ␉// override from IOATAController␊ |
| 154 | ␉// activate the DMA engine as per the current command␊ |
| 155 | ␉virtual IOReturn startDMA( void );␊ |
| 156 | ␊ |
| 157 | ␉// override from IOATAController␊ |
| 158 | ␉// safely halt the DMA engine regardless of state␊ |
| 159 | ␉virtual IOReturn stopDMA( void );␊ |
| 160 | ␊ |
| 161 | ␉// handle the interrupt processing␊ |
| 162 | ␉virtual void processDMAInterrupt (void);␊ |
| 163 | ␉␊ |
| 164 | ␉// activate the DMA engine␊ |
| 165 | ␉virtual void activateDMAEngine(void);␊ |
| 166 | ␉␊ |
| 167 | ␉// shutdown the DMA engine␊ |
| 168 | ␉virtual void stopDMAEngine(void);␊ |
| 169 | ␉␊ |
| 170 | ␉// safely suspend the DMA engine␊ |
| 171 | ␉virtual void shutDownATADMA (void);␊ |
| 172 | ␉␊ |
| 173 | ␉// check the command chain after run to update byte counts␊ |
| 174 | ␉// and check for errors␊ |
| 175 | ␉virtual bool scanATADMAChain (IOByteCount* byteCount);␊ |
| 176 | ␊ |
| 177 | ␊ |
| 178 | ␉// c to c++ glue code.␊ |
| 179 | ␉static void deviceInterruptOccurred(OSObject*, IOInterruptEventSource *, int count);␊ |
| 180 | ␉static void dmaInterruptOccurred(OSObject*, IOInterruptEventSource *, int count);␊ |
| 181 | ␊ |
| 182 | ␉// overrides␊ |
| 183 | ␉virtual void free();␊ |
| 184 | ␊ |
| 185 | ␉// media bay specific code␊ |
| 186 | ␉bool␉isMediaBay;␊ |
| 187 | ␉bool␉isBusOnline;␊ |
| 188 | ␉␊ |
| 189 | ␉virtual IOReturn executeCommand(IOATADevice* nub, IOATABusCommand* command);␊ |
| 190 | ␉virtual IOReturn handleQueueFlush( void );␊ |
| 191 | ␉virtual bool checkTimeout( void );␊ |
| 192 | ␉static void cleanUpAction(OSObject * owner, void*, void*, void*, void*);␊ |
| 193 | ␉virtual void cleanUpBus(void);␊ |
| 194 | ␉virtual IOReturn handleBusReset(void);␊ |
| 195 | ␉// end media bay specific.␊ |
| 196 | ␊ |
| 197 | private:␊ |
| 198 | OSMetaClassDeclareReservedUnused(MacIOATA, 0);␊ |
| 199 | OSMetaClassDeclareReservedUnused(MacIOATA, 1);␊ |
| 200 | OSMetaClassDeclareReservedUnused(MacIOATA, 2);␊ |
| 201 | OSMetaClassDeclareReservedUnused(MacIOATA, 3);␊ |
| 202 | OSMetaClassDeclareReservedUnused(MacIOATA, 4);␊ |
| 203 | OSMetaClassDeclareReservedUnused(MacIOATA, 5);␊ |
| 204 | OSMetaClassDeclareReservedUnused(MacIOATA, 6);␊ |
| 205 | OSMetaClassDeclareReservedUnused(MacIOATA, 7);␊ |
| 206 | OSMetaClassDeclareReservedUnused(MacIOATA, 8);␊ |
| 207 | OSMetaClassDeclareReservedUnused(MacIOATA, 9);␊ |
| 208 | OSMetaClassDeclareReservedUnused(MacIOATA, 10);␊ |
| 209 | OSMetaClassDeclareReservedUnused(MacIOATA, 11);␊ |
| 210 | OSMetaClassDeclareReservedUnused(MacIOATA, 12);␊ |
| 211 | OSMetaClassDeclareReservedUnused(MacIOATA, 13);␊ |
| 212 | OSMetaClassDeclareReservedUnused(MacIOATA, 14);␊ |
| 213 | OSMetaClassDeclareReservedUnused(MacIOATA, 15);␊ |
| 214 | OSMetaClassDeclareReservedUnused(MacIOATA, 16);␊ |
| 215 | OSMetaClassDeclareReservedUnused(MacIOATA, 17);␊ |
| 216 | OSMetaClassDeclareReservedUnused(MacIOATA, 18);␊ |
| 217 | OSMetaClassDeclareReservedUnused(MacIOATA, 19);␊ |
| 218 | OSMetaClassDeclareReservedUnused(MacIOATA, 20);␊ |
| 219 | ␊ |
| 220 | };␊ |
| 221 | ␊ |
| 222 | #endif // _DRV_MACIO_ATA_H␊ |
| 223 | ␊ |
| 224 | ␊ |
| 225 | #endif // defined(ppc)␊ |
| 226 | |
