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Root/branches/autoResolution/i386/libsaio/autoresolution.c

1␊
2/* Copied from 915 resolution created by steve tomljenovic␊
3 *␊
4 * This code is based on the techniques used in :␊
5 *␊
6 * - 855patch. Many thanks to Christian Zietz (czietz gmx net)␊
7 * for demonstrating how to shadow the VBIOS into system RAM␊
8 * and then modify it.␊
9 *␊
10 * - 1280patch by Andrew Tipton (andrewtipton null li).␊
11 *␊
12 * - 855resolution by Alain Poirier␊
13 *␊
14 * This source code is into the public domain.␊
15 */␊
16␊
17#include "libsaio.h"␊
18#include "autoresolution.h"␊
19#include "nvidia_resolution.h"␊
20#include "ati_resolution.h"␊
21#include "gma_resolution.h"␊
22#include "../boot2/graphics.h"␊
23␊
24char * chipset_type_names[] = {␊
25␉"UNKNOWN", "830", "845G", "855GM", "865G", "915G", "915GM", "945G", "945GM", "945GME",␊
26␉"946GZ", "955X", "G965", "Q965", "965GM", "975X",␊
27␉"P35", "X48", "B43", "Q45", "P45", "GM45", "G41", "G31", "G45", "500"␊
28};␊
29␊
30UInt32 get_chipset_id(void) {␊
31␉outl(0xcf8, 0x80000000);␊
32␉return inl(0xcfc);␊
33}␊
34␊
35chipset_type get_chipset(UInt32 id) {␊
36␉chipset_type type;␊
37␉␊
38␉switch (id) {␊
39␉␉case 0x35758086:␊
40␉␉␉type = CT_830;␊
41␉␉␉break;␊
42␉␉␊
43␉␉case 0x25608086:␊
44␉␉␉type = CT_845G;␊
45␉␉␉break;␊
46␉␉␉␉␊
47␉␉case 0x35808086:␊
48␉␉␉type = CT_855GM;␊
49␉␉␉break;␊
50␉␉␉␉␊
51␉␉case 0x25708086:␊
52␉␉␉type = CT_865G;␊
53␉␉␉break;␊
54␉␉␊
55␉␉case 0x25808086:␊
56␉␉␉type = CT_915G;␊
57␉␉␉break;␊
58␉␉␉␊
59␉␉case 0x25908086:␊
60␉␉␉type = CT_915GM;␊
61␉␉␉break;␊
62␉␉␉␊
63␉␉case 0x27708086:␊
64␉␉␉type = CT_945G;␊
65␉␉␉break;␊
66␉␉␉␊
67␉␉case 0x27748086:␊
68␉␉␉type = CT_955X;␊
69␉␉␉break;␊
70␉␉␉␊
71␉␉case 0x277c8086:␊
72␉␉␉type = CT_975X;␊
73␉␉␉break;␊
74␉␉␊
75␉␉case 0x27a08086:␊
76␉␉␉type = CT_945GM;␊
77␉␉␉break;␊
78␉␉␉␊
79␉␉case 0x27ac8086:␊
80␉␉␉type = CT_945GME;␊
81␉␉␉break;␊
82␉␉␉␊
83␉␉case 0x29708086:␊
84␉␉␉type = CT_946GZ;␊
85␉␉␉break;␊
86␉␉␉␊
87␉␉case 0x29a08086:␊
88␉␉␉type = CT_G965;␊
89␉␉␉break;␊
90␉␉␉␊
91␉␉case 0x29908086:␊
92␉␉␉type = CT_Q965;␊
93␉␉␉break;␊
94␉␉␉␊
95␉␉case 0x2a008086:␊
96␉␉␉type = CT_965GM;␊
97␉␉␉break;␊
98␉␉␉␊
99␉␉case 0x29e08086:␊
100␉␉␉type = CT_X48;␊
101␉␉␉break;␉␉␉␊
102␉␉␉␊
103␉␉case 0x2a408086:␊
104␉␉␉type = CT_GM45;␊
105␉␉␉break;␊
106␉␉␉␊
107␉␉case 0x2e108086:␊
108␉␉case 0X2e908086:␊
109␉␉␉type = CT_B43;␊
110␉␉␉break;␊
111␉␉␉␊
112␉␉case 0x2e208086:␊
113␉␉␉type = CT_P45;␊
114␉␉␉break;␊
115␉␉␉␊
116␉␉case 0x2e308086:␊
117␉␉␉type = CT_G41;␊
118␉␉␉break;␊
119␉␉␉␊
120␉␉case 0x29c08086:␊
121␉␉␉type = CT_G31;␊
122␉␉␉break;␊
123␉␉␉␊
124␉␉case 0x29208086:␊
125␉␉␉type = CT_G45;␊
126␉␉␉break;␊
127␉␉␉␊
128␉␉case 0x81008086:␊
129␉␉␉type = CT_500;␊
130␉␉␉break;␊
131␉␉␉␊
132␉␉default:␊
133␉␉␉type = CT_UNKWN;␊
134␉␉␉break;␊
135␉}␊
136␉return type;␊
137}␊
138␊
139␊
140void gtf_timings(UInt32 x, UInt32 y, UInt32 freq,␊
141␉␉␉␉ unsigned long *clock,␊
142␉␉␉␉ UInt16 *hsyncstart, UInt16 *hsyncend, UInt16 *hblank,␊
143␉␉␉␉ UInt16 *vsyncstart, UInt16 *vsyncend, UInt16 *vblank)␊
144{␊
145␉UInt32 hbl, vbl, vfreq;␊
146␉␊
147␉vbl = y + (y+1)/(20000/(11*freq) - 1) + 1;␊
148␉␊
149␉vfreq = vbl * freq;␊
150␉hbl = 16 * (int)(x * (30 - 300000 / vfreq) /␊
151␉␉␉␉␉ + (70 + 300000 / vfreq) / 16 + 0);␊
152␉␊
153␉*vsyncstart = y;␊
154␉*vsyncend = y + 3;␊
155␉*vblank = vbl;␉␊
156␉*hsyncstart = x + hbl / 2 - (x + hbl + 50) / 100 * 8 ;␉␊
157␉*hsyncend = x + hbl / 2;␉␊
158␉*hblank = x + hbl;␉␊
159␉*clock = (x + hbl) * vfreq / 1000;␊
160}␊
161␊
162␊
163void get_aspect_ratio(s_aspect* aspect, UInt32 x, UInt32 y)␊
164{␊
165␉if ((y * 16 / 9) == x) {␊
166␉␉aspect->width = 16;␊
167␉␉aspect->height = 9;␊
168␉} else if ((y * 16 / 10) == x) {␊
169␉␉aspect->width = 16;␊
170␉␉aspect->height = 10;␊
171␉} else if ((y * 5 / 4) == x) {␊
172␉␉aspect->width = 5;␊
173␉␉aspect->height = 4;␊
174␉} else if ((y * 15 / 9) == x) {␊
175␉␉aspect->width = 15;␊
176␉␉aspect->height = 9;␊
177␉} else {␊
178␉␉aspect->width = 4;␊
179␉␉aspect->height = 3;␊
180␉}␊
181␉verbose("Aspect Ratio is %d/%d\n", aspect->width, aspect->height);␊
182}␊
183␊
184void cvt_timings(UInt32 x, UInt32 y, UInt32 freq,␊
185␉␉␉␉ unsigned long *clock,␊
186␉␉␉␉ UInt16 *hsyncstart, UInt16 *hsyncend, UInt16 *hblank,␊
187␉␉␉␉ UInt16 *vsyncstart, UInt16 *vsyncend, UInt16 *vblank, bool reduced)␊
188{␊
189␉UInt32 hbl, hbp, vbl, vsync, hperiod;␊
190␉␊
191␉if (!(y % 3) && ((y * 4 / 3) == x))␊
192 vsync = 4;␊
193 else if (!(y % 9) && ((y * 16 / 9) == x))␊
194 vsync = 5;␊
195 else if (!(y % 10) && ((y * 16 / 10) == x))␊
196 vsync = 6;␊
197 else if (!(y % 4) && ((y * 5 / 4) == x))␊
198 vsync = 7;␊
199 else if (!(y % 9) && ((y * 15 / 9) == x))␊
200 vsync = 7;␊
201 else /* Custom */␊
202 vsync = 10;␊
203␉␊
204␉if (!reduced) {␊
205␉␉hperiod = (1000000/freq - 550) / (y + 3);␊
206␉␉vbl = y + (550/hperiod) + 3;␊
207␉␉hbp = 30 - ((300*hperiod)/1000);␊
208␉␉hbl = (x * hbp) / (100 - hbp);␊
209␉␉␊
210␉␉*vsyncstart = y + 6;␊
211␉␉*vsyncend = *vsyncstart + vsync;␊
212␉␉*vblank = vbl - 1;␉␊
213␉␉*hsyncstart = x + hbl / 2 - (x + hbl + 50) / 100 * 8 - 1;␉␊
214␉␉*hsyncend = x + hbl / 2 - 1;␉␊
215␉␉*hblank = x + hbl - 1;␊
216␉␉␊
217␉} else {␊
218␉␉hperiod = (1000000/freq - 460) / y;␊
219␉␉vbl = y + 460/hperiod + 1;␊
220␉␉hbl = 160;␊
221␉␉␊
222␉␉*vsyncstart = y + 3;␊
223␉␉*vsyncend = *vsyncstart + vsync;␊
224␉␉*vblank = vbl - 1;␉␊
225␉␉*hsyncstart = x + hbl / 2 - 32;␉␊
226␉␉*hsyncend = x + hbl / 2 - 1;␉␊
227␉␉*hblank = x + hbl - 1;␊
228␉␉␊
229␉}␊
230␉*clock = (x + hbl) * 1000 / hperiod;␊
231}␊
232␊
233␊
234␊
235void close_vbios(vbios_map * map);␊
236␊
237vbios_map * open_vbios(chipset_type forced_chipset) {␊
238␉UInt32 z;␊
239␉vbios_map * map = NEW(vbios_map);␊
240␉for(z=0; z<sizeof(vbios_map); z++) ((char*)map)[z]=0;␊
241␉␊
242␉/*␊
243␉ * Determine chipset␊
244␉ */␊
245␉␊
246␉if (forced_chipset == CT_UNKWN) {␊
247␉␉map->chipset_id = get_chipset_id();␊
248␉␉map->chipset = get_chipset(map->chipset_id);␊
249␉␉verbose("Chipset is %s (pci id 0x%x)\n",chipset_type_names[map->chipset], map->chipset_id);␊
250␉}␊
251␉else if (forced_chipset != CT_UNKWN) {␊
252␉␉map->chipset = forced_chipset;␊
253␉}␊
254␉else {␊
255␉␉map->chipset = CT_915GM;␊
256␉}␊
257␉ ␊
258␉/*␊
259␉ * Map the video bios to memory␊
260␉ */␊
261␉␊
262␉map->bios_ptr=(unsigned char*)VBIOS_START;␊
263␉␊
264␉/*␊
265␉ * check if we have ATI Radeon and open atombios␊
266␉ */␊
267␉bios_tables_t ati_tables;␊
268␉␊
269␉ati_tables.base = map->bios_ptr;␊
270␉ati_tables.AtomRomHeader = (ATOM_ROM_HEADER *) (map->bios_ptr + *(unsigned short *) (map->bios_ptr + OFFSET_TO_POINTER_TO_ATOM_ROM_HEADER)); ␊
271␉if (strcmp ((char *) ati_tables.AtomRomHeader->uaFirmWareSignature, "ATOM") == 0) {␊
272␉␉map->bios = BT_ATI_1;␊
273␉␉verbose("We have an AtomBios Card\n");␊
274␉␉return open_ati_vbios(map, ati_tables);␊
275␉}␊
276␊
277␊
278␉/*␊
279␉ * check if we have NVidia␊
280␉ */␊
281␉if (map->bios != BT_ATI_1) {␊
282␉␉int i = 0;␊
283␉␉while (i < 512) { // we don't need to look through the whole bios, just the firs 512 bytes␊
284␉␉␉if ((map->bios_ptr[i] == 'N') ␊
285␉␉␉␉&& (map->bios_ptr[i+1] == 'V') ␊
286␉␉␉␉&& (map->bios_ptr[i+2] == 'I') ␊
287␉␉␉␉&& (map->bios_ptr[i+3] == 'D')) ␊
288␉␉␉{␊
289␉␉␉␉map->bios = BT_NVDA;␊
290␉␉␉␉verbose("We have an NVIDIA Card\n");␊
291␉␉␉␉return open_nvidia_vbios(map);␊
292␉␉␉␉break;␊
293␉␉␉}␊
294␉␉␉i++;␊
295␉␉}␊
296␉}␊
297␉␊
298␉/*␊
299␉ * check if we have Intel␊
300␉ */␊
301␉ ␊
302␉if ((map->bios != BT_ATI_1) && (map->bios != BT_NVDA)) {␊
303␉␉int i = 0;␊
304␉␉while (i < VBIOS_SIZE) { // we don't need to look through the whole bios, just the firs 512 bytes␊
305␉␉␉if ((map->bios_ptr[i] == 'I') ␊
306␉␉␉␉&& (map->bios_ptr[i+1] == 'n') ␊
307␉␉␉␉&& (map->bios_ptr[i+2] == 't') ␊
308␉␉␉␉&& (map->bios_ptr[i+3] == 'e') ␊
309␉␉␉␉&& (map->bios_ptr[i+4] == 'l')) ␊
310␉␉␉{␊
311␉␉␉␉map->bios = BT_1;␊
312␉␉␉␉verbose("We have an Intel Card\n");␊
313␉␉␉␉return open_intel_vbios(map);␊
314␉␉␉␉break;␊
315␉␉␉}␊
316␉␉␉i++;␊
317␉␉}␊
318␉}␊
319␉␊
320␉/*␊
321␉ * Unidentified Chipset␊
322␉ */␊
323␉␊
324␉if ( (map->chipset == CT_UNKWN) || ((map->bios != BT_ATI_1) && (map->bios != BT_NVDA) && (map->bios != BT_1)) )␊
325␉␉␉{␊
326␉␉␉␉␉printf("Unknown chipset type and unrecognized bios.\n");␊
327␉␉␉␉␉␊
328␉␉␉␉␉printf("autoresolution only works with Intel 800/900 series graphic chipsets.\n");␊
329␉␉␉␉␉␊
330␉␉␉␉␉printf("Chipset Id: %x\n", map->chipset_id);␊
331␉␉close_vbios(map);␊
332␉␉return 0;␊
333␉}␊
334␊
335␉/*␊
336␉ * Should never get there ␊
337␉ */␊
338␉return 0;␊
339}␊
340␊
341void close_vbios(vbios_map * map) {␊
342␉if (autoResolution == TRUE) autoResolution = FALSE;␊
343␉FREE(map);␊
344}␊
345␊
346void unlock_vbios(vbios_map * map) {␊
347␊
348␉map->unlocked = TRUE;␊
349␉ ␊
350␉switch (map->chipset) {␊
351␉␉case CT_UNKWN:␊
352␉␉␉break;␊
353␉␉case CT_830:␊
354␉␉case CT_855GM:␊
355␉␉␉outl(0xcf8, 0x8000005a);␊
356␉␉␉map->b1 = inb(0xcfe);␊
357␉␉␉␉␊
358␉␉␉outl(0xcf8, 0x8000005a);␊
359␉␉␉outb(0xcfe, 0x33);␊
360␉␉␉break;␊
361␉␉case CT_845G:␊
362␉␉case CT_865G:␊
363␉␉case CT_915G:␊
364␉␉case CT_915GM:␊
365␉␉case CT_945G:␊
366␉␉case CT_945GM:␊
367␉␉case CT_945GME:␊
368␉␉case CT_946GZ:␊
369␉␉case CT_955X:␊
370␉␉case CT_G965:␊
371␉␉case CT_Q965:␊
372␉␉case CT_965GM:␊
373␉␉case CT_975X:␊
374␉␉case CT_P35:␊
375␉␉case CT_X48:␊
376␉␉case CT_B43:␊
377␉␉case CT_Q45:␊
378␉␉case CT_P45:␊
379␉␉case CT_GM45:␊
380␉␉case CT_G41:␊
381␉␉case CT_G31:␊
382␉␉case CT_G45:␊
383␉␉case CT_500:␊
384␊
385␉␉␉outl(0xcf8, 0x80000090);␊
386␉␉␉map->b1 = inb(0xcfd);␊
387␉␉␉map->b2 = inb(0xcfe);␊
388␉␉␉outl(0xcf8, 0x80000090);␊
389␉␉␉outb(0xcfd, 0x33);␊
390␉␉␉outb(0xcfe, 0x33);␊
391␉␉break;␊
392␉}␊
393␉␊
394␉#if DEBUG␊
395␉{␊
396␉␉UInt32 t = inl(0xcfc);␊
397␉␉printf("unlock PAM: (0x%08x)\n", t);␊
398␉}␊
399#endif␊
400}␊
401␊
402void relock_vbios(vbios_map * map) {␊
403␊
404␉map->unlocked = FALSE;␊
405␉␊
406␉switch (map->chipset) {␊
407␉␉case CT_UNKWN:␊
408␉␉␉break;␊
409␉␉case CT_830:␊
410␉␉case CT_855GM:␊
411␉␉␉outl(0xcf8, 0x8000005a);␊
412␉␉␉outb(0xcfe, map->b1);␊
413␉␉␉break;␊
414␉␉case CT_845G:␊
415␉␉case CT_865G:␊
416␉␉case CT_915G:␊
417␉␉case CT_915GM:␊
418␉␉case CT_945G:␊
419␉␉case CT_945GM:␊
420␉␉case CT_945GME:␊
421␉␉case CT_946GZ:␊
422␉␉case CT_955X:␊
423␉␉case CT_G965:␊
424␉␉case CT_Q965:␊
425␉␉case CT_965GM:␊
426␉␉case CT_975X:␊
427␉␉case CT_P35:␊
428␉␉case CT_X48:␊
429␉␉case CT_B43:␊
430␉␉case CT_Q45:␊
431␉␉case CT_P45:␊
432␉␉case CT_GM45:␊
433␉␉case CT_G41:␊
434␉␉case CT_G31:␊
435␉␉case CT_G45:␊
436␉␉case CT_500:␊
437␉␉␉␊
438␉␉␉outl(0xcf8, 0x80000090);␊
439␉␉␉outb(0xcfd, map->b1);␊
440␉␉␉outb(0xcfe, map->b2);␊
441␉␉␉break;␊
442␉}␊
443␉␊
444␉#if DEBUG␊
445␉{␊
446 UInt32 t = inl(0xcfc);␊
447␉␉printf("relock PAM: (0x%08x)\n", t);␊
448␉}␊
449␉#endif␊
450}␊
451␊
452␊
453void save_vbios(vbios_map * map)␊
454{␊
455␉map->bios_backup_ptr = malloc(VBIOS_SIZE);␊
456␉bcopy((const unsigned char *)0xC0000, map->bios_backup_ptr, VBIOS_SIZE);␊
457}␊
458␊
459void restore_vbios(vbios_map * map)␊
460{␊
461␉bcopy(map->bios_backup_ptr,(unsigned char *)0xC0000, VBIOS_SIZE);␊
462}␊
463␊
464␊
465void patch_vbios(vbios_map * map, UInt32 x, UInt32 y, UInt32 bp, UInt32 htotal, UInt32 vtotal) {␊
466␉UInt32 i = 0;␊
467␉/*␊
468␉ * Get the aspect ratio for the requested mode␊
469␉ */␊
470␉get_aspect_ratio(&map->aspect_ratio, x, y);␊
471␉␊
472␉i = x = y = 0;␊
473␉␊
474␉if (map->bios != BT_NVDA) {␊
475␉␉verbose("%d modes to pacth\n", map->modeline_num);␊
476␉␉while (i < map->modeline_num) {␊
477␉␉␉if (x == 1400) x = 1440;␊
478␉␉␉if (x == 1600) x = 1680;␊
479␉␉␉␊
480␉␉␉y = x * map->aspect_ratio.height / map->aspect_ratio.width;␊
481␉␉␉switch (map->bios) {␊
482␉␉␉␉case BT_1:␊
483␉␉␉␉␉intel_set_mode_1(map, i, &x, &y);␊
484␉␉␉␉␉break;␊
485␉␉␉␉case BT_2:␊
486␉␉␉␉␉intel_set_mode_2(map, i, &x, &y);␊
487␉␉␉␉␉break;␊
488␉␉␉␉case BT_3:␊
489␉␉␉␉␉intel_set_mode_3(map, i, &x, &y);␊
490␉␉␉␉␉break;␊
491␉␉␉␉case BT_ATI_1:␊
492␉␉␉␉␉ati_set_mode_1(map, i, &x, &y);␊
493␉␉␉␉␉break;␊
494␉␉␉␉case BT_ATI_2:␊
495␉␉␉␉␉ati_set_mode_2(map, i, &x, &y);␊
496␉␉␉␉␉break;␊
497␉␉␉␉default:␊
498␉␉␉␉␉break;␊
499␉␉␉}␊
500␉␉␉i++;␊
501␉␉}␊
502␉}␊
503␉␊
504␉if (map->bios == BT_NVDA) {␊
505␉␉␉␉␊
506␉␉␉␉i = x = y = 0;␊
507␉␉␉␉while (i < map->modeline_num) {␊
508␉␉␉␉␉␉if (x == 0)␉␉x = 1024;␊
509␉␉␉␉␉␉if (x == 1400)␉x = 1440;␊
510␉␉␉␉␉␉if (x == 1600)␉x = 1680;␊
511␉␉␉␉␉␉␊
512␉␉␉␉␉␉y = x * map->aspect_ratio.height / map->aspect_ratio.width;␊
513␉␉␉␉␉␉nvidia_set_mode(map, i, &x, &y, MAIN_VESA_TABLE);␊
514␉␉␉␉␉␉i++;␉␉␉␊
515␉␉␉␉␉}␊
516␉␉␉␉␊
517␉␉␉␉i = x = y = 0;␊
518␉␉␉␉while (i < map->nv_modeline_num_2) {␊
519␉␉␉␉␉␉if (x == 1400) x = 1440;␊
520␉␉␉␉␉␉if (x == 1600) x = 1680;␊
521␉␉␉␉␉␉␊
522␉␉␉␉␉␉y = x * map->aspect_ratio.height / map->aspect_ratio.width;␊
523␉␉␉␉␉␉nvidia_set_mode(map, i, &x, &y, SECOND_VESA_TABLE);␊
524␉␉␉␉␉␉i++;␊
525␉␉␉␉␉}␊
526␉}␊
527}

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