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1/*␊
2Copyright (c) 2010, Intel Corporation␊
3All rights reserved.␊
4␊
5Redistribution and use in source and binary forms, with or without␊
6modification, are permitted provided that the following conditions are met:␊
7␊
8 * Redistributions of source code must retain the above copyright notice,␊
9 this list of conditions and the following disclaimer.␊
10 * Redistributions in binary form must reproduce the above copyright notice,␊
11 this list of conditions and the following disclaimer in the documentation␊
12 and/or other materials provided with the distribution.␊
13 * Neither the name of Intel Corporation nor the names of its contributors␊
14 may be used to endorse or promote products derived from this software␊
15 without specific prior written permission.␊
16␊
17THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND␊
18ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED␊
19WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE␊
20DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR␊
21ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES␊
22(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;␊
23LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON␊
24ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT␊
25(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS␊
26SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.␊
27*/␊
28␊
29#ifndef ppm_h␊
30#define ppm_h␊
31␊
32#include "datatype.h"␊
33␊
34#define PROFILE_ALL␊
35//#define PROFILE_NEHALEM_EP_DP␊
36//#define PROFILE_WESTMERE_EP_UP_DP␊
37//#define PROFILE_NEHALEM_EX_MP␊
38//#define PROFILE_WESTMERE_EX_MP␊
39//#define PROFILE_SANDYBRIDGE_UP␊
40␊
41#if defined(PROFILE_ALL) || defined(PROFILE_WESTMERE_EX_MP)␊
42␊
43#define MAX_CPU_SOCKETS 8 // max count of cpu packages (any range of APIC IDs is ok)␊
44#define MAX_LOGICAL_CPU 256 // max count of cpu found in MADT␊
45#define MAX_CORES 32 // Based on full range of Core APID ID values (max of 5 bits for core APIC ID mask)␊
46␊
47#elif defined(PROFILE_NEHALEM_EX_MP)␊
48␊
49#define MAX_CPU_SOCKETS 8 // max count of cpu packages (any range of APIC IDs is ok)␊
50#define MAX_LOGICAL_CPU 128 // max count of cpu found in MADT␊
51#define MAX_CORES 16 // Based on full range of Core APID ID values (max of 4 bits for core APIC ID mask)␊
52␊
53#elif defined(PROFILE_WESTMERE_EP_UP_DP)␊
54␊
55#define MAX_CPU_SOCKETS 2 // max count of cpu packages (any range of APIC IDs is ok)␊
56#define MAX_LOGICAL_CPU 64 // max count of cpu found in MADT␊
57#define MAX_CORES 16 // Based on full range of Core APID ID values (max of 4 bits for core APIC ID mask)␊
58␊
59#elif defined(PROFILE_NEHALEM_EP_UP_DP)␊
60␊
61#define MAX_CPU_SOCKETS 2 // max count of cpu packages (any range of APIC IDs is ok)␊
62#define MAX_LOGICAL_CPU 32 // max count of cpu found in MADT␊
63#define MAX_CORES 8 // Based on full range of Core APID ID values (max of 3 bits for core APIC ID mask)␊
64␊
65#elif defined(PROFILE_SANDY_BRIDGE_UP)␊
66␊
67#define MAX_CPU_SOCKETS 1 // max count of cpu packages (any range of APIC IDs is ok)␊
68#define MAX_LOGICAL_CPU 8 // max count of cpu found in MADT␊
69#define MAX_CORES 4␊
70␊
71#endif␊
72␊
73#define MAX_PSTATES 16␊
74#define MAX_CSTATES 4␊
75#define MAX_TSTATES 15␊
76␊
77//Define ACPI_CSD to force building ACPI _CSD␊
78//#define BUILD_ACPI_CSD␊
79␊
80#ifndef DWORD_REGS_TYPEDEF␊
81#define DWORD_REGS_TYPEDEF␊
82typedef struct dword_regs {␊
83 U32 _eax;␊
84 U32 _ebx;␊
85 U32 _ecx;␊
86 U32 _edx;␊
87} DWORD_REGS;␊
88#endif␊
89␊
90typedef struct acpi_tables {␊
91 // Define the Storage Locations for all the ACPI Table Pointers.␊
92 ACPI_TABLE_DSDT *DsdtPointer; // Differentiated System Description Table (RSDP->RSDT->FACP->DSDT)␊
93 ACPI_TABLE_DSDT *DsdtPointer64; // Differentiated System Description Table (RSDP->XSDT->FACP->XDSDT)␊
94 ACPI_TABLE_FADT *FacpPointer; // Fixed ACPI Description Table (RSDP->RSDT->FACP)␊
95 ACPI_TABLE_FACS *FacsPointer; // Firmware ACPI Control Structure (RSDP->RSDT->FACP->FACS) ␊
96 ACPI_TABLE_FACS *FacsPointer64; // Firmware ACPI Control Structure (RSDP->XSDT->FACP->XFACS)␊
97 ACPI_TABLE_RSDP *RsdPointer; // Root System Description Pointer Structure (RSDP)␊
98 ACPI_TABLE_RSDT *RsdtPointer; // Root System Description Table (RSDP->RSDT)␊
99 ACPI_TABLE_MADT *MadtPointer; // Multiple APIC Description Table (RSDP->RSDT->APIC)␊
100␉ACPI_TABLE_MADT *MadtPointer64; // Multiple APIC Description Table (RSDP->XSDT->APIC)␊
101 ACPI_TABLE_SSDT *SsdtPointer; // Secondary System Description Table (RSDP->RSDT->SSDT)␊
102 ACPI_TABLE_XSDT *XsdtPointer; // Extended Root System Description Table (RSDP->XSDT)␊
103 ACPI_TABLE_FADT *FacpPointer64; // Fixed ACPI Description Table (RSDP->XSDT->FACP) ␊
104} ACPI_TABLES;␊
105␊
106typedef struct pstate {␊
107 U32 frequency;␊
108 U32 power;␊
109 U32 ratio;␊
110␉U32 translatency;␊
111 U32 bmlatency;␊
112␉U32 control;␊
113 U32 status;␊
114} PSTATE;␊
115␊
116typedef struct pkg_pstates {␊
117 U32 num_pstates;␊
118 PSTATE pstate[MAX_PSTATES];␊
119} PKG_PSTATES;␊
120␊
121typedef struct tstate {␊
122 U32 freqpercent;␊
123 U32 power;␊
124 U32 latency;␊
125 U32 control;␊
126 U32 status;␊
127} TSTATE;␊
128␊
129typedef struct pkg_tstates {␊
130 U32 num_tstates;␊
131 TSTATE tstate[MAX_TSTATES];␊
132} PKG_TSTATES;␊
133␊
134typedef enum cstate_encoding {␊
135 IO_REDIRECTION = 0,␊
136 NATIVE_MWAIT = 1,␊
137} CSTATE_ENCODING;␊
138␊
139typedef enum cpu_cstate {␊
140 CPU_C1 = 1,␊
141␉//CPU_C2 = 2,␊
142 CPU_C3_ACPI_C2 = 3,␊
143 CPU_C3_ACPI_C3 = 4,␊
144␉CPU_C4 = 5,␊
145 CPU_C6 = 6,␊
146 CPU_C7 = 7,␊
147} CPU_CSTATE;␊
148␊
149typedef struct cstate {␊
150 U8 type;␊
151 U16 latency;␊
152 U32 power;␊
153} CSTATE;␊
154␊
155typedef struct pkg_cstates {␊
156 U32 num_cstates;␊
157 CSTATE cstate[MAX_CSTATES];␊
158 ACPI_GENERIC_ADDRESS gas[MAX_CSTATES];␊
159} PKG_CSTATES;␊
160␊
161typedef struct cpu_details {␊
162 U32 present;␊
163 U32 x2apic_id;␊
164 U32 socket_id;␊
165 U32 intra_package_mask_width;␊
166 U32 intra_package_mask;␊
167 U32 smt_mask_width;␊
168 U32 smt_select_mask;␊
169 U32 core_select_mask;␊
170 DWORD_REGS cpuid1;␊
171 DWORD_REGS cpuid5;␊
172 DWORD_REGS cpuid6;␊
173 DWORD_REGS cpuidB_0;␊
174 DWORD_REGS cpuidB_1;␊
175 U32 eist_cpuid_feature_flag;␊
176 U32 turbo_cpuid_feature_flag;␊
177 U32 turbo_misc_enables_feature_flag;␊
178 U32 invariant_apic_timer_flag;␊
179 U32 tdc_limit;␊
180 U32 tdp_limit;␊
181 U32 turbo_available;␊
182 U32 max_ratio_as_mfg;␊
183 U32 max_ratio_as_cfg;␊
184 U32 min_ratio;␊
185 U32 tdc_tdp_limits_for_turbo_flag;␊
186 U32 ratio_limits_for_turbo_flag;␊
187 U32 xe_available;␊
188 U32 logical_processor_count_from_madt;␊
189 U32 core_logical_processor_count_from_madt[MAX_CORES];␊
190␊
191 PKG_PSTATES pkg_pstates;␊
192␊
193 PKG_CSTATES pkg_mwait_cstates;␊
194 PKG_CSTATES pkg_io_cstates;␊
195␊
196 PKG_TSTATES pkg_tstates;␊
197␊
198 U32 package_cstate_limit;␊
199 U32 core_c1_supported;␊
200␉U32 core_c2_supported;␊
201 U32 core_c3_supported;␊
202␉U32 core_c4_supported;␊
203 U32 core_c6_supported;␊
204 U32 core_c7_supported;␊
205 U32 mwait_supported;␊
206 U32 acpi_support_cpuid_feature_flag;␊
207 U32 energy_perf_bias_supported;␊
208␊
209 U64 package_power_limit;␊
210 U64 package_power_sku_unit;␊
211} CPU_DETAILS;␊
212␊
213typedef struct socket_info {␊
214 U32 signature;␊
215 U32 socket_count;␊
216 CPU_DETAILS cpu[MAX_CPU_SOCKETS];␊
217} SOCKET_INFO;␊
218␊
219typedef struct lapic_info {␊
220 U32 processorId;␊
221 U32 apicId;␊
222 U32 pkg_index;␊
223 U32 core_apic_id;␊
224 U32 core_index;␊
225 PROCESSOR_NUMBER_TO_NAMESEG *namepath;␊
226 U32 madt_type;␊
227 U32 uid;␊
228} LAPIC_INFO;␊
229␊
230typedef struct proc_info {␊
231 U32 processorId;␊
232 U32 apicId;␊
233} PROC_INFO;␊
234␊
235typedef struct madt_info {␊
236 U32 lapic_count;␊
237 LAPIC_INFO lapic[MAX_LOGICAL_CPU];␊
238} MADT_INFO;␊
239␊
240typedef struct rsdt_info {␊
241 U32 proc_count;␊
242 PROC_INFO processor[MAX_LOGICAL_CPU];␊
243} RSDT_INFO;␊
244␊
245typedef struct smp_exit_state {␊
246 U32 signature;␊
247␊
248 // Number of Failure or Informative codes included in the buffer␊
249 U32 error_code_count;␊
250␊
251 // Buffer of Failure or Informative codes␊
252 U32 error_codes[10];␊
253} SMP_EXIT_STATE;␊
254␊
255typedef enum smp_exit_code {␊
256 // Generic successful␊
257 SMP_EXIT_CODE_OK = 1,␊
258␊
259 // Generic failure␊
260 EXIT_CODE_FAILED = 2,␊
261␊
262 // First logical processor for this socket unable to find available structure␊
263 EXIT_CODE_FAILED_SOCKET_PROXY_SAVE = 3,␊
264} SMP_EXIT_CODE;␊
265␊
266typedef struct ppm_host {␊
267 U32 signature;␊
268␊
269 U32 pstates_enabled;␊
270 U32 pstate_coordination;␊
271 U32 turbo_enabled;␊
272 U32 cstates_enabled;␊
273 U32 tstates_enabled;␊
274 U32 performance_per_watt;␊
275␊
276 ACPI_TABLES acpi_tables;␊
277 ␊
278 ␊
279 RSDT_INFO rsdt_info;␊
280 MADT_INFO madt_info;␊
281 SOCKET_INFO skt_info;␊
282␊
283 PPM_SETUP_OPTIONS *options;␊
284␊
285 SMP_EXIT_STATE smp_exit_state;␊
286␊
287 U32 detected_cpu_family;␊
288} PPM_HOST;␊
289␊
290#endif // ppm_h␊
291

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