Chameleon

Chameleon Svn Source Tree

Root/branches/ErmaC/Modules/i386/modules/AMDGraphicsEnabler/ati.c

1/*
2 * ATI Graphics Card Enabler, part of the Chameleon Boot Loader Project
3 *
4 * Copyright 2010 by Islam M. Ahmed Zaid. All rights reserved.
5 *
6 */
7
8#include "libsa.h"
9#include "saio_internal.h"
10#include "bootstruct.h"
11#include "pci.h"
12#include "platform.h"
13#include "device_inject.h"
14#include "ati_reg.h"
15
16#define OFFSET_TO_GET_ATOMBIOS_STRINGS_START 0x6e
17
18#define kUseAtiROM"UseAtiROM"
19#define kAtiConfig"AtiConfig"
20#define kAtiPorts"AtiPorts"
21#define kATYbinimage"ATYbinimage"
22
23#define Reg32(reg)(*(volatile uint32_t *)(card->mmio + reg))
24#define RegRead32(reg)(Reg32(reg))
25#define RegWrite32(reg, value)(Reg32(reg) = value)
26
27typedef enum {
28kNul,
29kStr,
30kPtr,
31kCst
32} type_t;
33
34typedef enum {
35CHIP_FAMILY_UNKNOW,
36/* IGP */
37CHIP_FAMILY_RS600,
38CHIP_FAMILY_RS690,
39CHIP_FAMILY_RS740,
40CHIP_FAMILY_RS780,
41CHIP_FAMILY_RS880,
42/* R600 */
43CHIP_FAMILY_R600,
44CHIP_FAMILY_RV610,
45CHIP_FAMILY_RV620,
46CHIP_FAMILY_RV630,
47CHIP_FAMILY_RV635,
48CHIP_FAMILY_RV670,
49/* R700 */
50CHIP_FAMILY_RV710,
51CHIP_FAMILY_RV730,
52CHIP_FAMILY_RV740,
53CHIP_FAMILY_RV772,
54CHIP_FAMILY_RV770,
55CHIP_FAMILY_RV790,
56/* Evergreen */
57CHIP_FAMILY_CEDAR,
58CHIP_FAMILY_CYPRESS,
59CHIP_FAMILY_HEMLOCK,
60CHIP_FAMILY_JUNIPER,
61CHIP_FAMILY_REDWOOD,
62/* Northern Islands */
63CHIP_FAMILY_BARTS,
64CHIP_FAMILY_CAICOS,
65CHIP_FAMILY_CAYMAN,
66CHIP_FAMILY_TURKS,
67/* Southern Islands */
68//"TAITI"
69//"THAMES"
70//"LOMBOK"
71//"NEW_ZEALAND"
72CHIP_FAMILY_LAST
73} chip_family_t;
74
75static const char *chip_family_name[] = {
76"UNKNOW",
77/* IGP */
78"RS600",
79"RS690",
80"RS740",
81"RS780",
82"RS880",
83/* R600 */
84"R600",
85"RV610",
86"RV620",
87"RV630",
88"RV635",
89"RV670",
90/* R700 */
91"RV710",
92"RV730",
93"RV740",
94"RV772",
95"RV770",
96"RV790",
97/* Evergreen */
98"Cedar",
99"Cypress",
100"Hemlock",
101"Juniper",
102"Redwood",
103/* Northern Islands */
104"Barts",
105"Caicos",
106"Cayman",
107"Turks",
108/* Southern Islands */
109//"Tahiti"
110//"Thames"
111//"Lombok"
112//"New_Zealand"
113""
114};
115
116typedef struct {
117const char*name;
118uint8_tports;
119} card_config_t;
120
121static card_config_t card_configs[] = {
122{NULL,0},
123{"Alopias",2},
124{"Alouatta",4},
125{"Baboon",3},
126{"Cardinal",2},
127{"Caretta",1},
128{"Colobus",2},
129{"Douc",2},
130{"Eulemur",3},
131{"Flicker",3},
132{"Galago",2},
133{"Gliff",3},
134{"Hoolock",3},
135{"Hypoprion",2},
136{"Iago",2},
137{"Kakapo",3},
138{"Kipunji",4},
139{"Lamna",2},
140{"Langur",3},
141{"Megalodon",3},
142{"Motmot",2},
143{"Nomascus",5},
144{"Orangutan",2},
145{"Peregrine",2},
146{"Quail",3},
147{"Raven",3},
148{"Shrike",3},
149{"Sphyrna",1},
150{"Triakis",2},
151{"Uakari",4},
152{"Vervet",4},
153{"Zonalis",6},
154{"Pithecia",3},
155{"Bulrushes",6},
156{"Cattail",4},
157{"Hydrilla",5},
158{"Duckweed",4},
159{"Fanwort",4},
160{"Elodea",5},
161{"Kudzu",2},
162{"Gibba",5},
163{"Lotus",3},
164{"Ipomoea",3},
165{"Mangabey",2},
166{"Muskgrass",4},
167{"Juncus",4}
168};
169
170typedef enum {
171kNull,
172kAlopias,
173kAlouatta,
174kBaboon,
175kCardinal,
176kCaretta,
177kColobus,
178kDouc,
179kEulemur,
180kFlicker,
181kGalago,
182kGliff,
183kHoolock,
184kHypoprion,
185kIago,
186kKakapo,
187kKipunji,
188kLamna,
189kLangur,
190kMegalodon,
191kMotmot,
192kNomascus,
193kOrangutan,
194kPeregrine,
195kQuail,
196kRaven,
197kShrike,
198kSphyrna,
199kTriakis,
200kUakari,
201kVervet,
202kZonalis,
203kPithecia,
204kBulrushes,
205kCattail,
206kHydrilla,
207kDuckweed,
208kFanwort,
209kElodea,
210kKudzu,
211kGibba,
212kLotus,
213kIpomoea,
214kMangabey,
215kMuskgrass,
216kJuncus,
217kCfgEnd
218} config_name_t;
219
220typedef struct {
221uint16_tdevice_id;
222uint32_tsubsys_id;
223chip_family_tchip_family;
224const char*model_name;
225config_name_tcfg_name;
226uint8_tmax_ports;
227} radeon_card_info_t;
228
229static radeon_card_info_t radeon_cards[] = {
230
231// Earlier cards are not supported
232//
233// Layout is device_id, subsys_id (subsystem id plus vendor id), chip_family_name, display name, frame buffer
234// Cards are grouped by device id and vendor id then sorted by subsystem id to make it easier to add new cards
235//
236{ 0x9400,0x25521002, CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull, 0 },
237{ 0x9400,0x30001002, CHIP_FAMILY_R600,"ATI Radeon HD 2900 PRO",kNull, 0 },
238
239{ 0x9440,0x114A174B, CHIP_FAMILY_RV770,"Sapphire Radeon HD4870 Vapor-X",kCardinal, 0 }, // ErmaC
240{ 0x9440,0x24401682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
241{ 0x9440,0x24411682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
242{ 0x9440,0x24441682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
243{ 0x9440,0x24451682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870",kMotmot, 0 },
244
245{ 0x9441,0x24401682, CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot, 0 },
246
247{ 0x9442,0x080110B0, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
248
249{ 0x9442,0x24701682, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
250{ 0x9442,0x24711682, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
251
252{ 0x9442,0xE104174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4850",kMotmot, 0 },
253
254{ 0x944A,0x30001043, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
255
256{ 0x944A,0x30001458, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
257
258{ 0x944A,0x30001462, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
259
260{ 0x944A,0x30001545, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
261
262{ 0x944A,0x30001682, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
263
264{ 0x944A,0x3000174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
265
266{ 0x944A,0x30001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
267
268{ 0x944A,0x300017AF, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
269
270{ 0x944C,0x24801682, CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot, 0 },
271{ 0x944C,0x24811682, CHIP_FAMILY_RV770,"ATI Radeon HD 4830",kMotmot, 0 },
272
273{ 0x944E,0x3260174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot, 0 },
274{ 0x944E,0x3261174B, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 series",kMotmot, 0 },
275
276{ 0x944E,0x30001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4730 Series",kMotmot, 0 },
277{ 0x944E,0x30101787, CHIP_FAMILY_RV770,"ATI Radeon HD 4810 Series",kMotmot, 0 },
278{ 0x944E,0x31001787, CHIP_FAMILY_RV770,"ATI Radeon HD 4820",kMotmot, 0 },
279
280{ 0x9480,0x3628103C, CHIP_FAMILY_RV730,"ATI Radeon HD 4650M",kGliff, 0 },
281
282{ 0x9480,0x9035104D, CHIP_FAMILY_RV730,"ATI Radeon HD 4650M",kGliff, 0 },
283
284{ 0x9490,0x4710174B, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull, 0 },
285
286{ 0x9490,0x20031787, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kFlicker, 0 },
287{ 0x9490,0x30501787, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull, 0 },
288
289{ 0x9490,0x300017AF, CHIP_FAMILY_RV730,"ATI Radeon HD 4710",kNull, 0 },
290
291{ 0x9498,0x21CF1458, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kNull, 0 },
292
293{ 0x9498,0x24511682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull, 0 },
294{ 0x9498,0x24521682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull, 0 },
295{ 0x9498,0x24541682, CHIP_FAMILY_RV730,"ATI Radeon HD 4650",kNull, 0 },
296{ 0x9498,0x29331682, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull, 0 },
297{ 0x9498,0x29341682, CHIP_FAMILY_RV730,"ATI Radeon HD 4670",kNull, 0 },
298
299{ 0x9498,0x30501787, CHIP_FAMILY_RV730,"ATI Radeon HD 4700",kNull, 0 },
300{ 0x9498,0x31001787, CHIP_FAMILY_RV730,"ATI Radeon HD 4720",kNull, 0 },
301
302{ 0x94B3,0x0D001002, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
303
304{ 0x94B3,0x29001682, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
305
306{ 0x94B3,0x1170174B, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
307
308{ 0x94C1,0x0D021002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
309{ 0x94C1,0x10021002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Pro",kNull, 0 },
310
311{ 0x94C1,0x0D021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
312
313{ 0x94C1,0x21741458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
314
315{ 0x94C1,0x10331462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
316{ 0x94C1,0x10401462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
317{ 0x94C1,0x11101462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 XT",kNull, 0 },
318
319{ 0x94C3,0x03421002, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
320
321{ 0x94C3,0x30001025, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
322
323{ 0x94C3,0x03021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
324{ 0x94C3,0x04021028, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
325
326{ 0x94C3,0x216A1458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
327{ 0x94C3,0x21721458, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
328{ 0x94C3,0x30001458, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull, 0 },
329
330{ 0x94C3,0x10321462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
331{ 0x94C3,0x10411462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
332{ 0x94C3,0x11041462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
333{ 0x94C3,0x11051462, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
334{ 0x94C3,0x30001462, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull, 0 },
335
336{ 0x94C3,0x2247148C, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull, 0 },
337{ 0x94C3,0x3000148C, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
338
339{ 0x94C3,0x30001642, CHIP_FAMILY_RV610,"ATI Radeon HD 3410",kNull, 0 },
340{ 0x94C3,0x37161642, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
341
342{ 0x94C3,0x3000174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
343{ 0x94C3,0xE370174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
344{ 0x94C3,0xE400174B, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 PRO",kNull, 0 },
345
346{ 0x94C3,0x203817AF, CHIP_FAMILY_RV610,"ATI Radeon HD 2400",kNull, 0 },
347
348{ 0x94C3,0x22471787, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 LE",kNull, 0 },
349{ 0x94C3,0x30001787, CHIP_FAMILY_RV610,"ATI Radeon HD 2350 Series",kNull, 0 },
350
351{ 0x94C3,0x01011A93, CHIP_FAMILY_RV610,"Qimonda Radeon HD 2400 PRO",kNull, 0 },
352
353{ 0x9501,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3870",kNull, 0 },
354{ 0x9501,0x30001002, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
355
356{ 0x9501,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull, 0 },
357{ 0x9501,0x4750174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
358
359{ 0x9501,0x30001787, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
360
361{ 0x9505,0x25421002, CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull, 0 },
362{ 0x9505,0x30001002, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
363
364{ 0x9505,0x30011043, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
365
366{ 0x9505,0x3000148C, CHIP_FAMILY_RV670,"ATI Radeon HD 3850",kNull, 0 },
367{ 0x9505,0x3001148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
368{ 0x9505,0x3002148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
369{ 0x9505,0x3003148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
370{ 0x9505,0x3004148C, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
371
372{ 0x9505,0x3000174B, CHIP_FAMILY_RV670,"Sapphire Radeon HD 3690",kNull, 0 },
373{ 0x9505,0x3001174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
374{ 0x9505,0x3010174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
375{ 0x9505,0x4730174B, CHIP_FAMILY_RV670,"ATI Radeon HD 4730",kNull, 0 },
376
377{ 0x9505,0x30001787, CHIP_FAMILY_RV670,"ATI Radeon HD 3690",kNull, 0 },
378{ 0x9505,0x301017AF, CHIP_FAMILY_RV670,"ATI Radeon HD 4750",kNull, 0 },
379
380{ 0x9540,0x4590174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull, 0 },
381
382{ 0x9540,0x30501787, CHIP_FAMILY_RV710,"ATI Radeon HD 4590",kNull, 0 },
383
384{ 0x954F,0x16131462, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull, 0 }, // ErmaC
385{ 0x954F,0x29201682, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull, 0 },
386{ 0x954F,0x29211682, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull, 0 },
387{ 0x954F,0x30901682, CHIP_FAMILY_RV710,"XFX Radeon HD 4570",kNull, 0 },
388
389{ 0x954F,0x30501787, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull, 0 },
390{ 0x954F,0x31001787, CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull, 0 },
391
392{ 0x954F,0x3000174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4520",kNull, 0 },
393{ 0x954F,0x4450174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull, 0 },
394{ 0x954F,0x4570174B, CHIP_FAMILY_RV710,"Sapphire Radeon HD 4570",kNull, 0 },
395{ 0x954F,0xE990174B, CHIP_FAMILY_RV710,"Sapphire Radeon HD 4350",kNull, 0 },
396
397{ 0x954F,0x301017AF, CHIP_FAMILY_RV710,"ATI Radeon HD 4450",kNull, 0 },
398
399{ 0x9552,0x04341028, CHIP_FAMILY_RV710,"ATI Mobility Radeon 4330",kShrike, 0 },
400
401{ 0x9552,0x308B103C, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4300 Series",kShrike, 0 },
402
403{ 0x9552,0x3000148C, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
404
405{ 0x9552,0x3000174B, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
406
407{ 0x9552,0x30001787, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
408
409{ 0x9552,0x300017AF, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
410
411{ 0x9553,0x18751043, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4570",kShrike, 0 },
412{ 0x9553,0x1B321043, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4570",kShrike, 0 },
413
414{ 0x9581,0x95811002, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
415
416{ 0x9581,0x3000148C, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
417
418{ 0x9583,0x3000148C, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
419
420{ 0x9588,0x01021A93, CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 XT",kNull, 0 },
421
422{ 0x9589,0x30001462, CHIP_FAMILY_RV630,"ATI Radeon HD 3610",kNull, 0 },
423
424{ 0x9589,0x0E41174B, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
425
426{ 0x9589,0x30001787, CHIP_FAMILY_RV630,"ATI Radeon HD 3600 Series",kNull, 0 },
427
428{ 0x9589,0x01001A93, CHIP_FAMILY_RV630,"Qimonda Radeon HD 2600 PRO",kNull, 0 },
429
430{ 0x9591,0x2303148C, CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kNull, 0 },
431
432{ 0x9598,0xB3831002, CHIP_FAMILY_RV635,"ATI All-in-Wonder HD",kNull, 0 },
433
434{ 0x9598,0x30001043, CHIP_FAMILY_RV635,"ATI Radeon HD 3730",kNull, 0 },
435{ 0x9598,0x30011043, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
436
437{ 0x9598,0x3000148C, CHIP_FAMILY_RV635,"ATI Radeon HD 3730",kNull, 0 },
438{ 0x9598,0x3001148C, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull, 0 },
439{ 0x9598,0x3031148C, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
440
441{ 0x9598,0x30001545, CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 XT",kNull, 0 },
442{ 0x9598,0x30011545, CHIP_FAMILY_RV635,"VisionTek Radeon HD 2600 Pro",kNull, 0 },
443
444{ 0x9598,0x3000174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3730",kNull, 0 },
445{ 0x9598,0x3001174B, CHIP_FAMILY_RV635,"Sapphire Radeon HD 3750",kNull, 0 },
446{ 0x9598,0x4570174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
447{ 0x9598,0x4580174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull, 0 },
448{ 0x9598,0x4610174B, CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull, 0 },
449
450{ 0x9598,0x300117AF, CHIP_FAMILY_RV635,"ATI Radeon HD 3750",kNull, 0 },
451{ 0x9598,0x301017AF, CHIP_FAMILY_RV635,"ATI Radeon HD 4570",kNull, 0 },
452{ 0x9598,0x301117AF, CHIP_FAMILY_RV635,"ATI Radeon HD 4580",kNull, 0 },
453
454{ 0x9598,0x30501787, CHIP_FAMILY_RV635,"ATI Radeon HD 4610",kNull, 0 },
455
456{ 0x95C0,0x3000148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull, 0 },
457
458{ 0x95C0,0xE3901745, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull, 0 },
459
460{ 0x95C0,0x3000174B, CHIP_FAMILY_RV620,"Sapphire Radeon HD 3550",kNull, 0 },
461{ 0x95C0,0x3002174B, CHIP_FAMILY_RV620,"ATI Radeon HD 3570",kNull, 0 },
462{ 0x95C0,0x3020174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
463
464{ 0x95C5,0x3000148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3450",kNull, 0 },
465{ 0x95C5,0x3001148C, CHIP_FAMILY_RV620,"ATI Radeon HD 3550",kNull, 0 },
466{ 0x95C5,0x3002148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull, 0 },
467{ 0x95C5,0x3003148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
468{ 0x95C5,0x3032148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
469{ 0x95C5,0x3033148C, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull, 0 },
470
471{ 0x95C5,0x3010174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
472{ 0x95C5,0x4250174B, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
473
474{ 0x95C5,0x30501787, CHIP_FAMILY_RV620,"ATI Radeon HD 4250",kNull, 0 },
475
476{ 0x95C5,0x301017AF, CHIP_FAMILY_RV620,"ATI Radeon HD 4230",kNull, 0 },
477
478{ 0x95C5,0x01041A93, CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull, 0 },
479{ 0x95C5,0x01051A93, CHIP_FAMILY_RV620,"Qimonda Radeon HD 3450",kNull, 0 },
480
481/* Evergreen */
482{ 0x6898,0x0B001002, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kZonalis, 0 },
483
484{ 0x6898,0x032E1043, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari, 0 },
485
486{ 0x6898,0x00D0106B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kLangur, 0 },
487
488{ 0x6898,0xE140174B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari, 0 },
489
490{ 0x6898,0x29611682, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5870",kUakari, 0 },
491
492{ 0x6899,0x21E41458, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
493
494{ 0x6899,0xE140174B, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
495
496{ 0x6899,0x200A1787, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
497{ 0x6899,0x22901787, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5850",kUakari, 0 },
498
499{ 0x689C,0x03521043, CHIP_FAMILY_HEMLOCK,"ASUS ARES",kUakari, 0 },
500{ 0x689C,0x039E1043, CHIP_FAMILY_HEMLOCK,"ASUS EAH5870 Series",kUakari, 0 },
501
502{ 0x689C,0x30201682, CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5970",kUakari, 0 },
503
504{ 0x68A1,0x144D103C,CHIP_FAMILY_CYPRESS,"ATI Mobility Radeon HD 5850",kNomascus, 0 },
505{ 0x68A1,0x1522103C, CHIP_FAMILY_CYPRESS,"ATI Mobility Radeon HD 5850",kHoolock, 0 },
506
507{ 0x68A8,0x050E1025, CHIP_FAMILY_CYPRESS,"AMD Radeon HD 6850M",kUakari, 0 },
508
509{ 0x68B8,0x00CF106B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kHoolock, 0 },
510
511{ 0x68B8,0x145821f6, CHIP_FAMILY_JUNIPER,"GigaByte HD5770 R577SL-1GD",kVervet, 0 }, // ErmaC
512
513{ 0x68B8,0x29901682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
514{ 0x68B8,0x29911682, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
515
516{ 0x68B8,0x1482174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
517{ 0x68B8,0xE144174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kHoolock, 0 }, // ErmaC
518{ 0x68B8,0xE147174B, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
519
520{ 0x68B8,0x21D71458, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
521
522{ 0x68B8,0x200A1787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 }, // ErmaC
523{ 0x68B8,0x200B1787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
524{ 0x68B8,0x22881787, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5770",kVervet, 0 },
525
526{ 0x68BF,0x220E1458, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 6750",kVervet, 0 },
527
528{ 0x68C0,0x1594103C, CHIP_FAMILY_REDWOOD,"AMD Radeon HD 6570M",kNull, 0 },
529
530{ 0x68C0,0x392717AA, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5730",kNull, 0 },
531
532{ 0x68C1,0x033E1025, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5650",kNull, 0 },
533
534{ 0x68C1,0x9071104D, CHIP_FAMILY_REDWOOD,"ATI Mobility Radeon HD 5650",kEulemur, 0 },
535
536{ 0x68C8,0x2306103C, CHIP_FAMILY_REDWOOD,"ATI FirePro V4800 (FireGL)",kNull, 0 },
537
538{ 0x68D8,0x03561043, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon, 0 },
539
540{ 0x68D8,0x21D91458, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon, 0 },
541
542{ 0x68D8,0x5690174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull, 0 },
543{ 0x68D8,0x5730174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull, 0 },
544{ 0x68D8,0xE151174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5670",kBaboon, 0 },
545
546{ 0x68D8,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull, 0 },
547
548{ 0x68D8,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5730",kNull, 0 },
549{ 0x68D8,0x301117AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5690",kNull, 0 },
550
551{ 0x68D9,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
552
553{ 0x68DA,0x5630174B, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
554
555{ 0x68DA,0x30001787, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
556
557{ 0x68DA,0x301017AF, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5630",kNull, 0 },
558
559{ 0x68E0,0x04561028, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur, 0 },
560
561{ 0x68E0,0x1433103C, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470M",kEulemur, 0 },
562
563{ 0x68E1,0x1426103C, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5430M",kEulemur, 0 },
564
565{ 0x68F9,0x03741043, CHIP_FAMILY_CEDAR,"ASUS EAH5450",kNull, 0 }, // ErmaC
566
567{ 0x68F9,0x5470174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
568{ 0x68F9,0x5490174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull, 0 },
569{ 0x68F9,0x5530174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull, 0 },
570
571{ 0x68F9,0x20091787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 },
572{ 0x68F9,0x22911787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 },
573{ 0x68F9,0x23401462, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 }, // ErmaC
574{ 0x68F9,0x30001787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
575{ 0x68F9,0x30011787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5530",kNull, 0 },
576{ 0x68F9,0x30021787, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull, 0 },
577
578{ 0x68F9,0x301117AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
579{ 0x68F9,0x301217AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5490",kNull, 0 },
580{ 0x68F9,0x301317AF, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5470",kNull, 0 },
581
582{ 0x68F9,0xE153174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 }, // ErmaC
583{ 0x68F9,0xE145174B, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5450",kEulemur, 0 }, // ErmaC
584
585/* Northen Islands */
586{ 0x6718,0x0B001002, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull, 0 },
587{ 0x6718,0x67181002, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull, 0 },
588{ 0x6718,0x31301682, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970",kNull, 0 },
589
590{ 0x6719,0x0B001002, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6950",kNull, 0 }, // ErmaC
591
592{ 0x6720,0x04BA1028, CHIP_FAMILY_BARTS,"AMD Radeon HD 6970m",kElodea, 0 },
593
594{ 0x6738,0x00D01002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
595{ 0x6738,0x174B174B, CHIP_FAMILY_BARTS,"Sapphire Radeon HD6870",kDuckweed, 0 }, // ErmaC
596{ 0x6738,0x21FA1002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
597{ 0x6738,0x67381002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
598
599{ 0x6738,0x21FA1458, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
600
601{ 0x6738,0x31031682, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
602{ 0x6738,0x31041682, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
603{ 0x6738,0x31071682, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 }, // ErmaC
604{ 0x6738,0x31081682, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 }, // ErmaC
605
606{ 0x6738,0xE178174B, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
607
608{ 0x6738,0x20101787, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
609{ 0x6738,0x23051787, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870",kDuckweed, 0 },
610
611{ 0x6739,0x67391002, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 },
612{ 0x6739,0x21F81458, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 }, // ErmaC ?? kBulrushes ??
613{ 0x6739,0x24411462, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 },
614{ 0x6739,0x31101682, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 },
615{ 0x6739,0xE177174B, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850",kDuckweed, 0 },
616
617{ 0x6740,0x1657103C, CHIP_FAMILY_TURKS,"AMD Radeon HD 6770M",kNull, 0 },
618{ 0x6740,0x165A103C, CHIP_FAMILY_TURKS,"AMD Radeon HD 6770M",kNull, 0 },
619
620{ 0x6741,0x050E1025, CHIP_FAMILY_TURKS,"AMD Radeon HD 6650M",kNull, 0 },
621{ 0x6741,0x05131025, CHIP_FAMILY_TURKS,"AMD Radeon HD 6650M",kNull, 0 },
622
623{ 0x6741,0x1646103C, CHIP_FAMILY_TURKS,"AMD Radeon HD 6750M",kNull, 0 },
624
625{ 0x6741,0x9080104D, CHIP_FAMILY_TURKS,"AMD Radeon HD 6630M",kNull, 0 },
626
627{ 0x6758,0x67581002, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
628
629{ 0x6758,0x22051458, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
630
631{ 0x6758,0xE194174B, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
632
633{ 0x6758,0x31811682, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
634{ 0x6758,0x31831682, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
635
636{ 0x6758,0xE1941746, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670",kBulrushes, 0 },
637
638{ 0x6759,0xE193174B, CHIP_FAMILY_TURKS,"AMD Radeon HD 6570",kNull, 0 },
639
640{ 0x6760,0x04CC1028, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6490M",kNull, 0 },
641
642{ 0x6760,0x1CB21043, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6470M",kNull, 0 },
643
644{ 0x6779,0x64501092, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6450",kBulrushes, 0 },
645
646{ 0x6779,0xE164174B, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6450",kBulrushes, 0 },
647
648/* standard/default models */
649{ 0x9400,0x00000000, CHIP_FAMILY_R600,"ATI Radeon HD 2900 XT",kNull, 0 },
650{ 0x9405,0x00000000, CHIP_FAMILY_R600,"ATI Radeon HD 2900 GT",kNull, 0 },
651
652{ 0x9440,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
653{ 0x9441,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4870 X2",kMotmot, 0 },
654{ 0x9442,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
655{ 0x9443,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4850 X2",kMotmot, 0 },
656{ 0x944C,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
657{ 0x944E,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4700 Series",kMotmot, 0 },
658
659{ 0x9450,0x00000000, CHIP_FAMILY_RV770,"AMD FireStream 9270",kMotmot, 0 },
660{ 0x9452,0x00000000, CHIP_FAMILY_RV770,"AMD FireStream 9250",kMotmot, 0 },
661
662{ 0x9460,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
663{ 0x9462,0x00000000, CHIP_FAMILY_RV770,"ATI Radeon HD 4800 Series",kMotmot, 0 },
664
665{ 0x9490,0x00000000, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kFlicker, 0 },
666{ 0x9498,0x00000000, CHIP_FAMILY_RV730,"ATI Radeon HD 4600 Series",kFlicker, 0 },
667
668{ 0x94B3,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
669{ 0x94B4,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4700 Series",kFlicker, 0 },
670{ 0x94B5,0x00000000, CHIP_FAMILY_RV740,"ATI Radeon HD 4770",kFlicker, 0 },
671
672{ 0x94C1,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago, 0 },
673{ 0x94C3,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago, 0 },
674{ 0x94C7,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2350",kIago, 0 },
675{ 0x94CC,0x00000000, CHIP_FAMILY_RV610,"ATI Radeon HD 2400 Series",kIago, 0 },
676
677{ 0x9501,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3800 Series",kMegalodon, 0 },
678{ 0x9505,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3800 Series",kMegalodon, 0 },
679{ 0x9507,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3830",kMegalodon, 0 },
680{ 0x950F,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3870 X2",kMegalodon, 0 },
681
682{ 0x9513,0x00000000, CHIP_FAMILY_RV670,"ATI Radeon HD 3850 X2",kMegalodon, 0 },
683{ 0x9519,0x00000000, CHIP_FAMILY_RV670,"AMD FireStream 9170",kMegalodon, 0 },
684
685{ 0x9540,0x00000000, CHIP_FAMILY_RV710,"ATI Radeon HD 4550",kNull, 0 },
686{ 0x954F,0x00000000, CHIP_FAMILY_RV710,"ATI Radeon HD 4300/4500 Series",kNull, 0 },
687
688{ 0x9553,0x00000000, CHIP_FAMILY_RV710,"ATI Mobility Radeon HD 4500/5100 Series",kShrike , 0 },
689
690{ 0x9588,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 XT",kLamna, 0 },
691{ 0x9589,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 PRO",kLamna, 0 },
692{ 0x958A,0x00000000, CHIP_FAMILY_RV630,"ATI Radeon HD 2600 X2 Series",kLamna, 0 },
693
694{ 0x9598,0x00000000, CHIP_FAMILY_RV635,"ATI Radeon HD 3600 Series",kMegalodon, 0 },
695
696{ 0x95C0,0x00000000, CHIP_FAMILY_RV620,"ATI Radeon HD 3400 Series",kIago, 0 },
697{ 0x95C5,0x00000000, CHIP_FAMILY_RV620,"ATI Radeon HD 3400 Series",kIago, 0 },
698
699/* IGP */
700{ 0x9610,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon HD 3200 Graphics",kNull, 0 },
701{ 0x9611,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon 3100 Graphics",kNull, 0 },
702{ 0x9614,0x00000000, CHIP_FAMILY_RS780,"ATI Radeon HD 3300 Graphics",kNull, 0 },
703{ 0x9616,0x00000000, CHIP_FAMILY_RS780,"AMD 760G",kNull, 0 },
704
705{ 0x9710,0x00000000, CHIP_FAMILY_RS880,"ATI Radeon HD 4200",kNull, 0 },
706{ 0x9715,0x00000000, CHIP_FAMILY_RS880,"ATI Radeon HD 4250",kNull, 0 },
707{ 0x9714,0x00000000, CHIP_FAMILY_RS880,"ATI Radeon HD 4290",kNull, 0 },
708
709/* Evergreen */
710{ 0x688D,0x00000000, CHIP_FAMILY_CYPRESS,"AMD FireStream 9350",kUakari, 0 },
711
712{ 0x6898,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari, 0 },
713{ 0x6899,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari, 0 },
714{ 0x689C,0x00000000, CHIP_FAMILY_HEMLOCK,"ATI Radeon HD 5900 Series",kUakari, 0 },
715{ 0x689E,0x00000000, CHIP_FAMILY_CYPRESS,"ATI Radeon HD 5800 Series",kUakari, 0 },
716
717{ 0x68B8,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5700 Series",kVervet, 0 },
718{ 0x68B9,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5600 Series",kVervet, 0 },
719{ 0x68BE,0x00000000, CHIP_FAMILY_JUNIPER,"ATI Radeon HD 5700 Series",kVervet, 0 },
720
721{ 0x68D8,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5600 Series",kBaboon, 0 },
722{ 0x68D9,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5500 Series",kBaboon, 0 },
723{ 0x68DA,0x00000000, CHIP_FAMILY_REDWOOD,"ATI Radeon HD 5500 Series",kBaboon, 0 },
724
725{ 0x68F9,0x00000000, CHIP_FAMILY_CEDAR,"ATI Radeon HD 5400 Series",kNull, 0 },
726
727/* Northen Islands */
728{ 0x6718,0x00000000, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6970 Series",kNull, 0 },
729{ 0x6719,0x00000000, CHIP_FAMILY_CAYMAN,"AMD Radeon HD 6950 Series",kNull, 0 },
730
731{ 0x6720,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6900M Series",kNull, 0 },
732
733{ 0x6738,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6870 Series",kDuckweed, 0 },
734{ 0x6739,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6850 Series",kDuckweed, 0 },
735{ 0x673E,0x00000000, CHIP_FAMILY_BARTS,"AMD Radeon HD 6790 Series",kNull, 0 },
736
737{ 0x6740,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6700M Series",kNull, 0 },
738{ 0x6741,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6600M/6700M Series",kNull, 0 },
739
740{ 0x6758,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6670 Series",kBulrushes, 0 },
741{ 0x6759,0x00000000, CHIP_FAMILY_TURKS,"AMD Radeon HD 6500 Series",kNull, 0 },
742
743{ 0x6760,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6400M Series",kNull, 0 },
744{ 0x6761,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6430M Series",kNull, 0 },
745
746{ 0x6770,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6400 Series",kNull, 0 },
747{ 0x6779,0x00000000, CHIP_FAMILY_CAICOS,"AMD Radeon HD 6450 Series",kBulrushes, 0 },
748
749/* Southen Islands */
750
751};
752
753typedef struct {
754struct DevPropDevice*device;
755radeon_card_info_t*info;
756pci_dt_t*pci_dev;
757uint8_t*fb;
758uint8_t*mmio;
759uint8_t*io;
760uint8_t*rom;
761uint32_trom_size;
762uint32_tvram_size;
763const char*cfg_name;
764uint8_tports;
765uint32_tflags;
766boolposted;
767} card_t;
768card_t *card;
769
770/* Flags */
771#define MKFLAG(n)(1 << n)
772#define FLAGTRUEMKFLAG(0)
773#define EVERGREENMKFLAG(1)
774
775//static uint8_t atN = 0;
776
777typedef struct {
778type_ttype;
779uint32_tsize;
780uint8_t*data;
781} value_t;
782
783static value_t aty_name;
784static value_t aty_nameparent;
785//static value_t aty_model;
786
787#define DATVAL(x){kPtr, sizeof(x), (uint8_t *)x}
788#define STRVAL(x){kStr, sizeof(x), (uint8_t *)x}
789#define BYTVAL(x){kCst, 1, (uint8_t *)x}
790#define WRDVAL(x){kCst, 2, (uint8_t *)x}
791#define DWRVAL(x){kCst, 4, (uint8_t *)x}
792#define QWRVAL(x){kCst, 8, (uint8_t *)x}
793#define NULVAL{kNul, 0, (uint8_t *)NULL}
794
795bool get_bootdisplay_val(value_t *val);
796bool get_vrammemory_val(value_t *val);
797bool get_name_val(value_t *val);
798bool get_nameparent_val(value_t *val);
799bool get_model_val(value_t *val);
800bool get_conntype_val(value_t *val);
801bool get_vrammemsize_val(value_t *val);
802bool get_binimage_val(value_t *val);
803bool get_romrevision_val(value_t *val);
804bool get_deviceid_val(value_t *val);
805bool get_mclk_val(value_t *val);
806bool get_sclk_val(value_t *val);
807bool get_refclk_val(value_t *val);
808bool get_platforminfo_val(value_t *val);
809bool get_vramtotalsize_val(value_t *val);
810
811typedef struct {
812uint32_tflags;
813boolall_ports;
814char*name;
815bool(*get_value)(value_t *val);
816value_tdefault_val;
817} dev_prop_t;
818
819dev_prop_t ati_devprop_list[] = {
820{FLAGTRUE,false,"@0,AAPL,boot-display",get_bootdisplay_val,NULVAL},
821//{FLAGTRUE,false,"@0,ATY,EFIDisplay",NULL,STRVAL("TMDSA")},
822
823//{FLAGTRUE,true,"@0,AAPL,vram-memory",get_vrammemory_val,NULVAL},
824//{FLAGTRUE,true,"@0,compatible",get_name_val,NULVAL},
825//{FLAGTRUE,true,"@0,connector-type",get_conntype_val,NULVAL},
826//{FLAGTRUE,true,"@0,device_type",NULL,STRVAL("display")},
827//{FLAGTRUE,false,"@0,display-connect-flags", NULL,DWRVAL((uint32_t)0)},
828//{FLAGTRUE,true,"@0,display-type",NULL,STRVAL("NONE")},
829{FLAGTRUE,true,"@0,name",get_name_val,NULVAL},
830//{FLAGTRUE,true,"@0,VRAM,memsize",get_vrammemsize_val,NULVAL},
831
832//{FLAGTRUE,false,"AAPL,aux-power-connected", NULL,DWRVAL((uint32_t)1)},
833//{FLAGTRUE,false,"AAPL,backlight-control",NULL,DWRVAL((uint32_t)0)},
834{FLAGTRUE,false,"ATY,bin_image",get_binimage_val,NULVAL},
835{FLAGTRUE,false,"ATY,Copyright",NULL,STRVAL("Copyright AMD Inc. All Rights Reserved. 2005-2010") },
836{FLAGTRUE,false,"ATY,Card#",get_romrevision_val,NULVAL},
837{FLAGTRUE,false,"ATY,VendorID",NULL,WRDVAL((uint16_t)0x1002)},
838{FLAGTRUE,false,"ATY,DeviceID",get_deviceid_val,NULVAL},
839
840//{FLAGTRUE,false,"ATY,MCLK",get_mclk_val,NULVAL},
841//{FLAGTRUE,false,"ATY,SCLK",get_sclk_val,NULVAL},
842//{FLAGTRUE,false,"ATY,RefCLK",get_refclk_val,DWRVAL((uint32_t)0x0a8c)},
843
844//{FLAGTRUE,false,"ATY,PlatformInfo",get_platforminfo_val,NULVAL},
845
846{FLAGTRUE,false,"name",get_nameparent_val,NULVAL},
847{FLAGTRUE,false,"device_type",get_nameparent_val,NULVAL},
848{FLAGTRUE,false,"model",get_model_val,STRVAL("ATI Radeon")},
849//{FLAGTRUE,false,"VRAM,totalsize",get_vramtotalsize_val,NULVAL},
850
851{FLAGTRUE,false,NULL,NULL,NULVAL}
852};
853
854bool get_bootdisplay_val(value_t *val)
855{
856static uint32_t v = 0;
857
858if (v)
859return false;
860
861if (!card->posted)
862return false;
863
864v = 1;
865val->type = kCst;
866val->size = 4;
867val->data = (uint8_t *)&v;
868
869return true;
870}
871
872bool get_vrammemory_val(value_t *val)
873{
874return false;
875}
876
877bool get_name_val(value_t *val)
878{
879val->type = aty_name.type;
880val->size = aty_name.size;
881val->data = aty_name.data;
882
883return true;
884}
885
886bool get_nameparent_val(value_t *val)
887{
888val->type = aty_nameparent.type;
889val->size = aty_nameparent.size;
890val->data = aty_nameparent.data;
891
892return true;
893}
894
895bool get_model_val(value_t *val)
896{
897if (!card->info->model_name)
898return false;
899
900val->type = kStr;
901val->size = strlen(card->info->model_name) + 1;
902val->data = (uint8_t *)card->info->model_name;
903
904return true;
905}
906
907bool get_conntype_val(value_t *val)
908{
909//Connector types:
910//0x4 : DisplayPort
911//0x400: DL DVI-I
912//0x800: HDMI
913
914return false;
915}
916
917bool get_vrammemsize_val(value_t *val)
918{
919static int idx = -1;
920static uint64_t memsize;
921
922idx++;
923memsize = ((uint64_t)card->vram_size << 32);
924if (idx == 0)
925memsize = memsize | (uint64_t)card->vram_size;
926
927val->type = kCst;
928val->size = 8;
929val->data = (uint8_t *)&memsize;
930
931return true;
932}
933
934bool get_binimage_val(value_t *val)
935{
936if (!card->rom)
937return false;
938
939val->type = kPtr;
940val->size = card->rom_size;
941val->data = card->rom;
942
943return true;
944}
945
946bool get_romrevision_val(value_t *val)
947{
948uint8_t *rev;
949if (!card->rom)
950return false;
951
952rev = card->rom + *(uint8_t *)(card->rom + OFFSET_TO_GET_ATOMBIOS_STRINGS_START);
953
954val->type = kPtr;
955val->size = strlen((char *)rev);
956val->data = malloc(val->size);
957
958if (!val->data)
959return false;
960
961memcpy(val->data, rev, val->size);
962
963return true;
964}
965
966bool get_deviceid_val(value_t *val)
967{
968val->type = kCst;
969val->size = 2;
970val->data = (uint8_t *)&card->pci_dev->device_id;
971
972return true;
973}
974
975bool get_mclk_val(value_t *val)
976{
977return false;
978}
979
980bool get_sclk_val(value_t *val)
981{
982return false;
983}
984
985bool get_refclk_val(value_t *val)
986{
987return false;
988}
989
990bool get_platforminfo_val(value_t *val)
991{
992val->data = malloc(0x80);
993if (!val->data)
994return false;
995
996bzero(val->data, 0x80);
997
998val->type= kPtr;
999val->size= 0x80;
1000val->data[0]= 1;
1001
1002return true;
1003}
1004
1005bool get_vramtotalsize_val(value_t *val)
1006{
1007val->type = kCst;
1008val->size = 4;
1009val->data = (uint8_t *)&card->vram_size;
1010
1011return true;
1012}
1013
1014void free_val(value_t *val)
1015{
1016if (val->type == kPtr)
1017free(val->data);
1018
1019bzero(val, sizeof(value_t));
1020}
1021
1022void devprop_add_list(dev_prop_t devprop_list[])
1023{
1024value_t *val = malloc(sizeof(value_t));
1025int i, pnum;
1026
1027for (i = 0; devprop_list[i].name != NULL; i++)
1028{
1029if ((devprop_list[i].flags == FLAGTRUE) || (devprop_list[i].flags | card->flags))
1030{
1031if (devprop_list[i].get_value && devprop_list[i].get_value(val))
1032{
1033devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);
1034free_val(val);
1035
1036if (devprop_list[i].all_ports)
1037{
1038for (pnum = 1; pnum < card->ports; pnum++)
1039{
1040if (devprop_list[i].get_value(val))
1041{
1042devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii
1043devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);
1044free_val(val);
1045}
1046}
1047devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card
1048}
1049}
1050else
1051{
1052if (devprop_list[i].default_val.type != kNul)
1053{
1054devprop_add_value(card->device, devprop_list[i].name,
1055devprop_list[i].default_val.type == kCst ?
1056(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data,
1057devprop_list[i].default_val.size);
1058}
1059
1060if (devprop_list[i].all_ports)
1061{
1062for (pnum = 1; pnum < card->ports; pnum++)
1063{
1064if (devprop_list[i].default_val.type != kNul)
1065{
1066devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii
1067devprop_add_value(card->device, devprop_list[i].name,
1068devprop_list[i].default_val.type == kCst ?
1069(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data,
1070devprop_list[i].default_val.size);
1071}
1072}
1073devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card
1074}
1075}
1076}
1077}
1078
1079free(val);
1080}
1081
1082bool validate_rom(option_rom_header_t *rom_header, pci_dt_t *pci_dev)
1083{
1084option_rom_pci_header_t *rom_pci_header;
1085
1086if (rom_header->signature != 0xaa55)
1087return false;
1088
1089rom_pci_header = (option_rom_pci_header_t *)((uint8_t *)rom_header + rom_header->pci_header_offset);
1090
1091if (rom_pci_header->signature != 0x52494350)
1092return false;
1093
1094if (rom_pci_header->vendor_id != pci_dev->vendor_id || rom_pci_header->device_id != pci_dev->device_id)
1095return false;
1096
1097return true;
1098}
1099
1100bool load_vbios_file(const char *key, uint16_t vendor_id, uint16_t device_id, uint32_t subsys_id)
1101{
1102int fd;
1103char file_name[24];
1104bool do_load = false;
1105
1106getBoolForKey(key, &do_load, &bootInfo->chameleonConfig);
1107if (!do_load)
1108return false;
1109
1110sprintf(file_name, "/Extra/%04x_%04x_%08x.rom", vendor_id, device_id, subsys_id);
1111if ((fd = open_bvdev("bt(0,0)", file_name, 0)) < 0)
1112return false;
1113
1114card->rom_size = file_size(fd);
1115card->rom = malloc(card->rom_size);
1116if (!card->rom)
1117return false;
1118
1119read(fd, (char *)card->rom, card->rom_size);
1120
1121if (!validate_rom((option_rom_header_t *)card->rom, card->pci_dev))
1122{
1123card->rom_size = 0;
1124card->rom = 0;
1125return false;
1126}
1127
1128card->rom_size = ((option_rom_header_t *)card->rom)->rom_size * 512;
1129
1130close(fd);
1131
1132return true;
1133}
1134
1135void get_vram_size(void)
1136{
1137chip_family_t chip_family = card->info->chip_family;
1138
1139card->vram_size = 0;
1140
1141if (chip_family >= CHIP_FAMILY_CEDAR)
1142// size in MB on evergreen
1143// XXX watch for overflow!!!
1144card->vram_size = RegRead32(R600_CONFIG_MEMSIZE) * 1024 * 1024;
1145else
1146if (chip_family >= CHIP_FAMILY_R600)
1147card->vram_size = RegRead32(R600_CONFIG_MEMSIZE);
1148}
1149
1150bool read_vbios(bool from_pci)
1151{
1152option_rom_header_t *rom_addr;
1153
1154if (from_pci)
1155{
1156rom_addr = (option_rom_header_t *)(pci_config_read32(card->pci_dev->dev.addr, PCI_ROM_ADDRESS) & ~0x7ff);
1157verbose(" @0x%x", rom_addr);
1158}
1159else
1160rom_addr = (option_rom_header_t *)0xc0000;
1161
1162if (!validate_rom(rom_addr, card->pci_dev))
1163return false;
1164
1165card->rom_size = rom_addr->rom_size * 512;
1166if (!card->rom_size)
1167return false;
1168
1169card->rom = malloc(card->rom_size);
1170if (!card->rom)
1171return false;
1172
1173memcpy(card->rom, (void *)rom_addr, card->rom_size);
1174
1175return true;
1176}
1177
1178bool read_disabled_vbios(void)
1179{
1180bool ret = false;
1181chip_family_t chip_family = card->info->chip_family;
1182
1183if (chip_family >= CHIP_FAMILY_RV770)
1184{
1185uint32_t viph_control= RegRead32(RADEON_VIPH_CONTROL);
1186uint32_t bus_cntl= RegRead32(RADEON_BUS_CNTL);
1187uint32_t d1vga_control= RegRead32(AVIVO_D1VGA_CONTROL);
1188uint32_t d2vga_control= RegRead32(AVIVO_D2VGA_CONTROL);
1189uint32_t vga_render_control = RegRead32(AVIVO_VGA_RENDER_CONTROL);
1190uint32_t rom_cntl= RegRead32(R600_ROM_CNTL);
1191uint32_t cg_spll_func_cntl= 0;
1192uint32_t cg_spll_status;
1193
1194// disable VIP
1195RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
1196
1197// enable the rom
1198RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
1199
1200// Disable VGA mode
1201RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1202RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1203RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
1204
1205if (chip_family == CHIP_FAMILY_RV730)
1206{
1207cg_spll_func_cntl = RegRead32(R600_CG_SPLL_FUNC_CNTL);
1208
1209// enable bypass mode
1210RegWrite32(R600_CG_SPLL_FUNC_CNTL, (cg_spll_func_cntl | R600_SPLL_BYPASS_EN));
1211
1212// wait for SPLL_CHG_STATUS to change to 1
1213cg_spll_status = 0;
1214while (!(cg_spll_status & R600_SPLL_CHG_STATUS))
1215cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);
1216
1217RegWrite32(R600_ROM_CNTL, (rom_cntl & ~R600_SCK_OVERWRITE));
1218}
1219else
1220RegWrite32(R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));
1221
1222ret = read_vbios(true);
1223
1224// restore regs
1225if (chip_family == CHIP_FAMILY_RV730)
1226{
1227RegWrite32(R600_CG_SPLL_FUNC_CNTL, cg_spll_func_cntl);
1228
1229// wait for SPLL_CHG_STATUS to change to 1
1230cg_spll_status = 0;
1231while (!(cg_spll_status & R600_SPLL_CHG_STATUS))
1232cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);
1233}
1234RegWrite32(RADEON_VIPH_CONTROL, viph_control);
1235RegWrite32(RADEON_BUS_CNTL, bus_cntl);
1236RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);
1237RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);
1238RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
1239RegWrite32(R600_ROM_CNTL, rom_cntl);
1240}
1241else
1242if (chip_family >= CHIP_FAMILY_R600)
1243{
1244uint32_t viph_control= RegRead32(RADEON_VIPH_CONTROL);
1245uint32_t bus_cntl= RegRead32(RADEON_BUS_CNTL);
1246uint32_t d1vga_control= RegRead32(AVIVO_D1VGA_CONTROL);
1247uint32_t d2vga_control= RegRead32(AVIVO_D2VGA_CONTROL);
1248uint32_t vga_render_control= RegRead32(AVIVO_VGA_RENDER_CONTROL);
1249uint32_t rom_cntl= RegRead32(R600_ROM_CNTL);
1250uint32_t general_pwrmgt= RegRead32(R600_GENERAL_PWRMGT);
1251uint32_t low_vid_lower_gpio_cntl= RegRead32(R600_LOW_VID_LOWER_GPIO_CNTL);
1252uint32_t medium_vid_lower_gpio_cntl = RegRead32(R600_MEDIUM_VID_LOWER_GPIO_CNTL);
1253uint32_t high_vid_lower_gpio_cntl= RegRead32(R600_HIGH_VID_LOWER_GPIO_CNTL);
1254uint32_t ctxsw_vid_lower_gpio_cntl= RegRead32(R600_CTXSW_VID_LOWER_GPIO_CNTL);
1255uint32_t lower_gpio_enable= RegRead32(R600_LOWER_GPIO_ENABLE);
1256
1257// disable VIP
1258RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
1259
1260// enable the rom
1261RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
1262
1263// Disable VGA mode
1264RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1265RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));
1266RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));
1267RegWrite32(R600_ROM_CNTL, ((rom_cntl & ~R600_SCK_PRESCALE_CRYSTAL_CLK_MASK) | (1 << R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT) | R600_SCK_OVERWRITE));
1268RegWrite32(R600_GENERAL_PWRMGT, (general_pwrmgt & ~R600_OPEN_DRAIN_PADS));
1269RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, (low_vid_lower_gpio_cntl & ~0x400));
1270RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, (medium_vid_lower_gpio_cntl & ~0x400));
1271RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, (high_vid_lower_gpio_cntl & ~0x400));
1272RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, (ctxsw_vid_lower_gpio_cntl & ~0x400));
1273RegWrite32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400));
1274
1275ret = read_vbios(true);
1276
1277// restore regs
1278RegWrite32(RADEON_VIPH_CONTROL, viph_control);
1279RegWrite32(RADEON_BUS_CNTL, bus_cntl);
1280RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);
1281RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);
1282RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);
1283RegWrite32(R600_ROM_CNTL, rom_cntl);
1284RegWrite32(R600_GENERAL_PWRMGT, general_pwrmgt);
1285RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, low_vid_lower_gpio_cntl);
1286RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, medium_vid_lower_gpio_cntl);
1287RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl);
1288RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl);
1289RegWrite32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable);
1290}
1291
1292return ret;
1293}
1294
1295bool radeon_card_posted(void)
1296{
1297uint32_t reg;
1298
1299// first check CRTCs
1300reg = RegRead32(RADEON_CRTC_GEN_CNTL) | RegRead32(RADEON_CRTC2_GEN_CNTL);
1301if (reg & RADEON_CRTC_EN)
1302return true;
1303
1304// then check MEM_SIZE, in case something turned the crtcs off
1305reg = RegRead32(R600_CONFIG_MEMSIZE);
1306if (reg)
1307return true;
1308
1309return false;
1310}
1311
1312#if 0
1313bool devprop_add_pci_config_space(void)
1314{
1315int offset;
1316
1317uint8_t *config_space = malloc(0x100);
1318if (!config_space)
1319return false;
1320
1321for (offset = 0; offset < 0x100; offset += 4)
1322config_space[offset / 4] = pci_config_read32(card->pci_dev->dev.addr, offset);
1323
1324devprop_add_value(card->device, "ATY,PCIConfigSpace", config_space, 0x100);
1325free(config_space);
1326
1327return true;
1328}
1329#endif
1330
1331static bool init_card(pci_dt_t *pci_dev)
1332{
1333booladd_vbios = true;
1334charname[24];
1335charname_parent[24];
1336inti;
1337intn_ports = 0;
1338
1339card = malloc(sizeof(card_t));
1340if (!card)
1341return false;
1342bzero(card, sizeof(card_t));
1343
1344card->pci_dev = pci_dev;
1345
1346for (i = 0; radeon_cards[i].device_id ; i++)
1347{
1348if (radeon_cards[i].device_id == pci_dev->device_id)
1349{
1350card->info = &radeon_cards[i];
1351if ((radeon_cards[i].subsys_id == 0x00000000) ||
1352(radeon_cards[i].subsys_id == pci_dev->subsys_id.subsys_id))
1353break;
1354}
1355}
1356
1357if (!card->info->device_id || !card->info->cfg_name)
1358{
1359printf("Unsupported card!\n");
1360return false;
1361}
1362
1363card->fb= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_0) & ~0x0f);
1364card->mmio= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_2) & ~0x0f);
1365card->io= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_4) & ~0x03);
1366
1367verbose("Framebuffer @0x%08X MMIO @0x%08XI/O Port @0x%08X ROM Addr @0x%08X\n",
1368card->fb, card->mmio, card->io, pci_config_read32(pci_dev->dev.addr, PCI_ROM_ADDRESS));
1369
1370card->posted = radeon_card_posted();
1371verbose("ATI card %s, ", card->posted ? "POSTed" : "non-POSTed");
1372
1373get_vram_size();
1374
1375getBoolForKey(kATYbinimage, &add_vbios, &bootInfo->chameleonConfig);
1376
1377if (add_vbios)
1378{
1379if (!load_vbios_file(kUseAtiROM, pci_dev->vendor_id, pci_dev->device_id, pci_dev->subsys_id.subsys_id))
1380{
1381verbose("reading VBIOS from %s", card->posted ? "legacy space" : "PCI ROM");
1382if (card->posted)
1383read_vbios(false);
1384else
1385read_disabled_vbios();
1386verbose("\n");
1387}
1388}
1389
1390//card->ports = 2; // default - Azi: default is card_configs
1391
1392if (card->info->chip_family >= CHIP_FAMILY_CEDAR)
1393{
1394card->flags |= EVERGREEN;
1395//card->ports = 3; //Azi: use the AtiPorts key if needed
1396}
1397
1398//atN = 0;
1399
1400// Check AtiConfig key for a framebuffer name,
1401card->cfg_name = getStringForKey(kAtiConfig, &bootInfo->chameleonConfig);
1402// if none,
1403if (!card->cfg_name)
1404{
1405// use cfg_name on radeon_cards, to retrive the default name from card_configs,
1406card->cfg_name = card_configs[card->info->cfg_name].name;
1407// and leave ports alone!
1408//card->ports = card_configs[card->info->cfg_name].ports;
1409
1410// which means one of the fb's or kNull
1411verbose("Framebuffer set to device's default: %s\n", card->cfg_name);
1412}
1413else
1414{
1415// else, use the fb name returned by AtiConfig.
1416verbose("(AtiConfig) Framebuffer set to: %s\n", card->cfg_name);
1417}
1418
1419// Check AtiPorts key for nr of ports,
1420card->ports = getIntForKey(kAtiPorts, &n_ports, &bootInfo->chameleonConfig);
1421// if a value bigger than 0 ?? is found, (do we need >= 0 ?? that's null FB on card_configs)
1422if (n_ports > 0)
1423{
1424card->ports = n_ports; // use it.
1425verbose("(AtiPorts) Nr of ports set to: %d\n", card->ports);
1426 }
1427else// if (card->cfg_name > 0) // do we want 0 ports if fb is kNull or mistyped ?
1428{
1429// use max_ports value on radeon_cards
1430card->ports = card->info->max_ports;
1431// if max_ports value is 0
1432if (card->ports <= 0)
1433{
1434// match cfg_name with card_configs list and retrive default nr of ports.
1435for (i = 0; i < kCfgEnd; i++)
1436{
1437if (strcmp(card->cfg_name, card_configs[i].name) == 0)
1438card->ports = card_configs[i].ports; // default
1439}
1440verbose("Nr of ports set to framebuffer's default: %d\n", card->ports);
1441}
1442else
1443{
1444verbose("Nr of ports set to card's ?? max: %d\n", card->ports);
1445}
1446}
1447//else
1448//card->ports = 2/1 ?; // set a min if 0 ports ?
1449//verbose("Nr of ports set to min: %d\n", card->ports);
1450
1451sprintf(name, "ATY,%s", card->cfg_name);
1452aty_name.type = kStr;
1453aty_name.size = strlen(name) + 1;
1454aty_name.data = (uint8_t *)name;
1455
1456sprintf(name_parent, "ATY,%sParent", card->cfg_name);
1457aty_nameparent.type = kStr;
1458aty_nameparent.size = strlen(name_parent) + 1;
1459aty_nameparent.data = (uint8_t *)name_parent;
1460
1461return true;
1462}
1463
1464bool setup_ati_devprop(pci_dt_t *ati_dev)
1465{
1466char *devicepath;
1467
1468if (!init_card(ati_dev))
1469return false;
1470
1471// -------------------------------------------------
1472// Find a better way to do this (in device_inject.c)
1473if (!string)
1474string = devprop_create_string();
1475
1476devicepath = get_pci_dev_path(ati_dev);
1477card->device = devprop_add_device(string, devicepath);
1478if (!card->device)
1479return false;
1480// -------------------------------------------------
1481
1482#if 0
1483uint64_t fb= (uint32_t)card->fb;
1484uint64_t mmio= (uint32_t)card->mmio;
1485uint64_t io= (uint32_t)card->io;
1486devprop_add_value(card->device, "ATY,FrameBufferOffset", &fb, 8);
1487devprop_add_value(card->device, "ATY,RegisterSpaceOffset", &mmio, 8);
1488devprop_add_value(card->device, "ATY,IOSpaceOffset", &io, 8);
1489#endif
1490
1491devprop_add_list(ati_devprop_list);
1492
1493// -------------------------------------------------
1494// Find a better way to do this (in device_inject.c)
1495//Azi: XXX tried to fix a malloc error in vain; this is related to XCode 4 compilation!
1496stringdata = malloc(sizeof(uint8_t) * string->length);
1497memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);
1498stringlength = string->length;
1499// -------------------------------------------------
1500
1501verbose("ATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x]):: %s\n",
1502chip_family_name[card->info->chip_family], card->info->model_name,
1503(uint32_t)(card->vram_size / (1024 * 1024)), card->cfg_name,
1504ati_dev->vendor_id, ati_dev->device_id,
1505ati_dev->subsys_id.subsys.vendor_id, ati_dev->subsys_id.subsys.device_id,
1506devicepath);
1507
1508free(card);
1509
1510return true;
1511}
1512

Archive Download this file

Revision: 1713