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Root/branches/ErmaC/Trunk/i386/libsaio/nvidia.c

1/*␊
2 *␉NVidia injector␊
3 *␊
4 *␉Copyright (C) 2009␉Jasmin Fazlic, iNDi␊
5 *␊
6 *␉NVidia injector is free software: you can redistribute it and/or modify␊
7 *␉it under the terms of the GNU General Public License as published by␊
8 *␉the Free Software Foundation, either version 3 of the License, or␊
9 *␉(at your option) any later version.␊
10 *␊
11 *␉NVidia driver and injector is distributed in the hope that it will be useful,␊
12 *␉but WITHOUT ANY WARRANTY; without even the implied warranty of␊
13 *␉MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the␊
14 *␉GNU General Public License for more details.␊
15 *␊
16 *␉You should have received a copy of the GNU General Public License␊
17 *␉along with NVidia injector.␉ If not, see <http://www.gnu.org/licenses/>.␊
18 */ ␊
19/*␊
20 * Alternatively you can choose to comply with APSL␊
21 */␊
22 ␊
23 ␊
24/*␊
25 * DCB-Table parsing is based on software (nouveau driver) originally distributed under following license:␊
26 *␊
27 *␊
28 * Copyright 2005-2006 Erik Waling␊
29 * Copyright 2006 Stephane Marchesin␊
30 * Copyright 2007-2009 Stuart Bennett␊
31 *␊
32 * Permission is hereby granted, free of charge, to any person obtaining a␊
33 * copy of this software and associated documentation files (the "Software"),␊
34 * to deal in the Software without restriction, including without limitation␊
35 * the rights to use, copy, modify, merge, publish, distribute, sublicense,␊
36 * and/or sell copies of the Software, and to permit persons to whom the␊
37 * Software is furnished to do so, subject to the following conditions:␊
38 *␊
39 * The above copyright notice and this permission notice shall be included in␊
40 * all copies or substantial portions of the Software.␊
41 *␊
42 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR␊
43 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,␊
44 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL␊
45 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,␊
46 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF␊
47 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE␊
48 * SOFTWARE.␊
49 */␊
50␊
51#include "boot.h"␊
52#include "bootstruct.h"␊
53#include "pci.h"␊
54#include "platform.h"␊
55#include "device_inject.h"␊
56#include "nvidia.h"␊
57␊
58#ifndef DEBUG_NVIDIA␊
59#define DEBUG_NVIDIA 0␊
60#endif␊
61␊
62#if DEBUG_NVIDIA␊
63#define DBG(x...)␉printf(x)␊
64#else␊
65#define DBG(x...)␊
66#endif␊
67␊
68#define NVIDIA_ROM_SIZE␉␉␉␉0x10000␊
69#define PATCH_ROM_SUCCESS␉␉␉1␊
70#define PATCH_ROM_SUCCESS_HAS_LVDS␉2␊
71#define PATCH_ROM_FAILED␉␉␉0␊
72#define MAX_NUM_DCB_ENTRIES␉␉␉16␊
73#define TYPE_GROUPED␉␉␉␉0xff␊
74␊
75extern uint32_t devices_number;␊
76␊
77const char *nvidia_compatible_0[] =␉{ "@0,compatible",␉"NVDA,NVMac"␉ };␊
78const char *nvidia_compatible_1[] =␉{ "@1,compatible",␉"NVDA,NVMac"␉ };␊
79const char *nvidia_device_type_0[] =␉{ "@0,device_type", "display"␉␉ };␊
80const char *nvidia_device_type_1[] =␉{ "@1,device_type", "display"␉␉ };␊
81const char *nvidia_device_type[] =␉{ "device_type",␉"NVDA,Parent"␉ };␊
82const char *nvidia_device_type_child[]␉=␉{ "device_type",␉"NVDA,Child"␉ };␊
83const char *nvidia_name_0[] =␉{ "@0,name",␉␉"NVDA,Display-A" };␊
84const char *nvidia_name_1[] =␉{ "@1,name",␉␉"NVDA,Display-B" };␊
85const char *nvidia_slot_name[] =␉{ "AAPL,slot-name", "Slot-1"␉␉ };␊
86␊
87static uint8_t default_NVCAP[]= {␊
88␉0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x00,␊
89␉0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a,␊
90␉0x00, 0x00, 0x00, 0x00␊
91};␊
92␊
93#define NVCAP_LEN ( sizeof(default_NVCAP) / sizeof(uint8_t) )␊
94␊
95static uint8_t default_dcfg_0[]␉␉=␉{0x03, 0x01, 0x03, 0x00};␊
96static uint8_t default_dcfg_1[]␉␉=␉{0xff, 0xff, 0x00, 0x01};␊
97␊
98// uint8_t connector_type_1[]␉␉=␉{0x00, 0x08, 0x00, 0x00};␊
99␊
100#define DCFG0_LEN ( sizeof(default_dcfg_0) / sizeof(uint8_t) )␊
101#define DCFG1_LEN ( sizeof(default_dcfg_1) / sizeof(uint8_t) )␊
102␊
103static uint8_t default_NVPM[]= {␊
104 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,␊
105 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,␊
106 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,␊
107 0x00, 0x00, 0x00, 0x00␊
108};␊
109␊
110#define NVPM_LEN ( sizeof(default_NVPM) / sizeof(uint8_t) )␊
111␊
112static struct nv_chipsets_t NVKnownChipsets[] = {␊
113␉{ 0x00000000,␉/*0x00000000,*/␉"Unknown" },␊
114//========================================␊
115␉// 0000 - 0040␉␊
116 //␉{ 0x10DE0001,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
117 //␉{ 0x10DE0002,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
118 //␉{ 0x10DE0003,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
119 //␉{ 0x10DE0005,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
120 //␉{ 0x10DE0006,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
121 //␉{ 0x10DE0007,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
122 //␉{ 0x10DE0008,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
123 //␉{ 0x10DE0009,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
124 //␉{ 0x10DE000A,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
125 //␉{ 0x10DE000B,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
126 //␉{ 0x10DE000C,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
127 //␉{ 0x10DE000D,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
128 //␉{ 0x10DE0010,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
129 //␉{ 0x10DE0011,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
130 //␉{ 0x10DE0012,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
131 //␉{ 0x10DE0014,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
132 //␉{ 0x10DE0018,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
133␉// 0040 - 004F␉␊
134␉{ 0x10DE0040,␉/*0x00000000,*/␉"GeForce 6800 Ultra" },␊
135␉{ 0x10DE0041,␉/*0x00000000,*/␉"GeForce 6800" },␊
136␉{ 0x10DE0042,␉/*0x00000000,*/␉"GeForce 6800 LE" },␊
137␉{ 0x10DE0043,␉/*0x00000000,*/␉"GeForce 6800 XE" },␊
138␉{ 0x10DE0044,␉/*0x00000000,*/␉"GeForce 6800 XT" },␊
139␉{ 0x10DE0045,␉/*0x00000000,*/␉"GeForce 6800 GT" },␊
140␉{ 0x10DE0046,␉/*0x00000000,*/␉"GeForce 6800 GT" },␊
141␉{ 0x10DE0047,␉/*0x00000000,*/␉"GeForce 6800 GS" },␊
142␉{ 0x10DE0048,␉/*0x00000000,*/␉"GeForce 6800 XT" },␊
143␉{ 0x10DE004D,␉/*0x00000000,*/␉"Quadro FX 3400" },␊
144␉{ 0x10DE004E,␉/*0x00000000,*/␉"Quadro FX 4000" },␊
145␉// 0050 - 005F␊
146 //␉{ 0x10DE0059,␉/*0x00000000,*/␉"CK804 AC'97 Audio Controller" },␊
147␉// 0060 - 006F␊
148 //␉{ 0x10DE006A,␉/*0x00000000,*/␉"nForce2 AC97 Audio Controler (MCP)" },␊
149 //␉{ 0x10DE0067,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
150 //␉{ 0x10DE0073,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
151␉// 0070 - 007F␊
152␉// 0080 - 008F␊
153␉// 0090 - 009F␊
154␉{ 0x10DE0090,␉/*0x00000000,*/␉"GeForce 7800 GTX" },␊
155␉{ 0x10DE0091,␉/*0x00000000,*/␉"GeForce 7800 GTX" },␊
156␉{ 0x10DE0092,␉/*0x00000000,*/␉"GeForce 7800 GT" },␊
157␉{ 0x10DE0093,␉/*0x00000000,*/␉"GeForce 7800 GS" },␊
158␉{ 0x10DE0095,␉/*0x00000000,*/␉"GeForce 7800 SLI" },␊
159␉{ 0x10DE0098,␉/*0x00000000,*/␉"GeForce Go 7800" },␊
160␉{ 0x10DE0099,␉/*0x00000000,*/␉"GeForce Go 7800 GTX" },␊
161␉{ 0x10DE009D,␉/*0x00000000,*/␉"Quadro FX 4500" },␊
162␉// 00A0 - 00AF␉␊
163␉// 00B0 - 00BF␉␊
164␉// 00C0 - 00CF␉␊
165␉{ 0x10DE00C0,␉/*0x00000000,*/␉"GeForce 6800 GS" },␊
166␉{ 0x10DE00C1,␉/*0x00000000,*/␉"GeForce 6800" },␊
167␉{ 0x10DE00C2,␉/*0x00000000,*/␉"GeForce 6800 LE" },␊
168␉{ 0x10DE00C3,␉/*0x00000000,*/␉"GeForce 6800 XT" },␊
169␉{ 0x10DE00C8,␉/*0x00000000,*/␉"GeForce Go 6800" },␊
170␉{ 0x10DE00C9,␉/*0x00000000,*/␉"GeForce Go 6800 Ultra" },␊
171␉{ 0x10DE00CC,␉/*0x00000000,*/␉"Quadro FX Go1400" },␊
172␉{ 0x10DE00CD,␉/*0x00000000,*/␉"Quadro FX 3450/4000 SDI" },␊
173␉{ 0x10DE00CE,␉/*0x00000000,*/␉"Quadro FX 1400" },␊
174 //␉{ 0x10DE00DA,␉/*0x00000000,*/␉"nForce3 Audio" },␊
175␉// 00D0 - 00DF␉␊
176␉// 00E0 - 00EF␉␊
177␉// 00F0 - 00FF␉␊
178␉{ 0x10DE00F1,␉/*0x00000000,*/␉"GeForce 6600 GT" },␊
179␉{ 0x10DE00F2,␉/*0x00000000,*/␉"GeForce 6600" },␊
180␉{ 0x10DE00F3,␉/*0x00000000,*/␉"GeForce 6200" },␊
181␉{ 0x10DE00F4,␉/*0x00000000,*/␉"GeForce 6600 LE" },␊
182␉{ 0x10DE00F5,␉/*0x00000000,*/␉"GeForce 7800 GS" },␊
183␉{ 0x10DE00F6,␉/*0x00000000,*/␉"GeForce 6800 GS/XT" },␊
184␉{ 0x10DE00F8,␉/*0x00000000,*/␉"Quadro FX 3400/4400" },␊
185␉{ 0x10DE00F9,␉/*0x00000000,*/␉"GeForce 6800 Series GPU" },␊
186␉// 0100 - 010F␉␊
187␉// 0110 - 011F␉␊
188␉// 0120 - 012F␉␊
189␉// 0130 - 013F␉␊
190␉// 0140 - 014F␉␊
191␉{ 0x10DE0140,␉/*0x00000000,*/␉"GeForce 6600 GT" },␊
192␉{ 0x10DE0141,␉/*0x00000000,*/␉"GeForce 6600" },␊
193␉{ 0x10DE0142,␉/*0x00000000,*/␉"GeForce 6600 LE" },␊
194␉{ 0x10DE0143,␉/*0x00000000,*/␉"GeForce 6600 VE" },␊
195␉{ 0x10DE0144,␉/*0x00000000,*/␉"GeForce Go 6600" },␊
196␉{ 0x10DE0145,␉/*0x00000000,*/␉"GeForce 6610 XL" },␊
197␉{ 0x10DE0146,␉/*0x00000000,*/␉"GeForce Go 6600 TE/6200 TE" },␊
198␉{ 0x10DE0147,␉/*0x00000000,*/␉"GeForce 6700 XL" },␊
199␉{ 0x10DE0148,␉/*0x00000000,*/␉"GeForce Go 6600" },␊
200␉{ 0x10DE0149,␉/*0x00000000,*/␉"GeForce Go 6600 GT" },␊
201␉{ 0x10DE014A,␉/*0x00000000,*/␉"Quadro NVS 440" },␊
202␉{ 0x10DE014C,␉/*0x00000000,*/␉"Quadro FX 550" },␊
203␉{ 0x10DE014D,␉/*0x00000000,*/␉"Quadro FX 550" },␊
204␉{ 0x10DE014E,␉/*0x00000000,*/␉"Quadro FX 540" },␊
205␉{ 0x10DE014F,␉/*0x00000000,*/␉"GeForce 6200" },␊
206␉// 0150 - 015F␉␊
207␉// 0160 - 016F␉␊
208␉{ 0x10DE0160,␉/*0x00000000,*/␉"GeForce 6500" },␊
209␉{ 0x10DE0161,␉/*0x00000000,*/␉"GeForce 6200 TurboCache(TM)" },␊
210␉{ 0x10DE0162,␉/*0x00000000,*/␉"GeForce 6200SE TurboCache(TM)" },␊
211␉{ 0x10DE0163,␉/*0x00000000,*/␉"GeForce 6200 LE" },␊
212␉{ 0x10DE0164,␉/*0x00000000,*/␉"GeForce Go 6200" },␊
213␉{ 0x10DE0165,␉/*0x00000000,*/␉"Quadro NVS 285" },␊
214␉{ 0x10DE0166,␉/*0x00000000,*/␉"GeForce Go 6400" },␊
215␉{ 0x10DE0167,␉/*0x00000000,*/␉"GeForce Go 6200" },␊
216␉{ 0x10DE0168,␉/*0x00000000,*/␉"GeForce Go 6400" },␊
217␉{ 0x10DE0169,␉/*0x00000000,*/␉"GeForce 6250" },␊
218␉{ 0x10DE016A,␉/*0x00000000,*/␉"GeForce 7100 GS" },␊
219␉{ 0x10DE016C,␉/*0x00000000,*/␉"NVIDIA NV44GLM" }, //␊
220␉{ 0x10DE016D,␉/*0x00000000,*/␉"NVIDIA NV44GLM" }, //␊
221␉// 0170 - 017F␉␊
222␉// 0180 - 018F␉␊
223␉// 0190 - 019F␉␉␊
224␉{ 0x10DE0191,␉/*0x00000000,*/␉"GeForce 8800 GTX" },␊
225␉{ 0x10DE0193,␉/*0x00000000,*/␉"GeForce 8800 GTS" },␊
226␉{ 0x10DE0194,␉/*0x00000000,*/␉"GeForce 8800 Ultra" },␊
227␉{ 0x10DE0197,␉/*0x00000000,*/␉"Tesla C870" },␊
228␉{ 0x10DE019D,␉/*0x00000000,*/␉"Quadro FX 5600" },␊
229␉{ 0x10DE019E,␉/*0x00000000,*/␉"Quadro FX 4600" },␊
230␉// 01A0 - 01AF␊
231␉// 01B0 - 01BF␊
232 //␉{ 0x10DE01B1,␉/*0x00000000,*/␉"nForce AC'97 Audio Controller" },␊
233␉// 01C0 - 01CF␊
234␉// 01D0 - 01DF␊
235␉{ 0x10DE01D0,␉/*0x00000000,*/␉"GeForce 7350 LE" },␊
236␉{ 0x10DE01D1,␉/*0x00000000,*/␉"GeForce 7300 LE" },␊
237␉{ 0x10DE01D2,␉/*0x00000000,*/␉"GeForce 7550 LE" },␊
238␉{ 0x10DE01D3,␉/*0x00000000,*/␉"GeForce 7300 SE/7200 GS" },␊
239␉{ 0x10DE01D6,␉/*0x00000000,*/␉"GeForce Go 7200" },␊
240␉{ 0x10DE01D7,␉/*0x00000000,*/␉"GeForce Go 7300" },␊
241␉{ 0x10DE01D8,␉/*0x00000000,*/␉"GeForce Go 7400" },␊
242␉{ 0x10DE01D9,␉/*0x00000000,*/␉"GeForce Go 7400 GS" },␊
243␉{ 0x10DE01DA,␉/*0x00000000,*/␉"Quadro NVS 110M" },␊
244␉{ 0x10DE01DB,␉/*0x00000000,*/␉"Quadro NVS 120M" },␊
245␉{ 0x10DE01DC,␉/*0x00000000,*/␉"Quadro FX 350M" },␊
246␉{ 0x10DE01DD,␉/*0x00000000,*/␉"GeForce 7500 LE" },␊
247␉{ 0x10DE01DE,␉/*0x00000000,*/␉"Quadro FX 350" },␊
248␉{ 0x10DE01DF,␉/*0x00000000,*/␉"GeForce 7300 GS" },␊
249␉// 01E0 - 01EF␉␊
250␉// 01F0 - 01FF␊
251␉{ 0x10DE01F0,␉/*0x00000000,*/␉"GeForce4 MX" }, //␊
252␉// 0200 - 020F␉␊
253␉// 0210 - 021F␉␊
254␉{ 0x10DE0211,␉/*0x00000000,*/␉"GeForce 6800" },␊
255␉{ 0x10DE0212,␉/*0x00000000,*/␉"GeForce 6800 LE" },␊
256␉{ 0x10DE0215,␉/*0x00000000,*/␉"GeForce 6800 GT" },␊
257␉{ 0x10DE0218,␉/*0x00000000,*/␉"GeForce 6800 XT" },␊
258␉// 0220 - 022F␊
259␉{ 0x10DE0221,␉/*0x00000000,*/␉"GeForce 6200" },␊
260␉{ 0x10DE0222,␉/*0x00000000,*/␉"GeForce 6200 A-LE" },␊
261␉{ 0x10DE0228,␉/*0x00000000,*/␉"NVIDIA NV44M" }, // ␊
262␉// 0230 - 023F␊
263␉// 0240 - 024F␊
264␉{ 0x10DE0240,␉/*0x00000000,*/␉"GeForce 6150" },␊
265␉{ 0x10DE0241,␉/*0x00000000,*/␉"GeForce 6150 LE" },␊
266␉{ 0x10DE0242,␉/*0x00000000,*/␉"GeForce 6100" },␊
267␉{ 0x10DE0243,␉/*0x00000000,*/␉"NVIDIA C51" }, //␊
268␉{ 0x10DE0244,␉/*0x00000000,*/␉"GeForce Go 6150" },␊
269␉{ 0x10DE0245,␉/*0x00000000,*/␉"Quadro NVS 210S / GeForce 6150LE" },␊
270␉{ 0x10DE0247,␉/*0x00000000,*/␉"GeForce Go 6100" },␊
271␉// 0250 - 025F␊
272␉{ 0x10DE025B,␉/*0x00000000,*/␉"Quadro4 700 XGL" }, //␊
273␉// 0260 - 026F␊
274␉// 0270 - 027F␊
275␉// 0280 - 028F␊
276␉// 0290 - 029F␊
277␉{ 0x10DE0290,␉/*0x00000000,*/␉"GeForce 7900 GTX" },␊
278␉{ 0x10DE0291,␉/*0x00000000,*/␉"GeForce 7900 GT/GTO" },␊
279␉{ 0x10DE0292,␉/*0x00000000,*/␉"GeForce 7900 GS" },␊
280␉{ 0x10DE0293,␉/*0x00000000,*/␉"GeForce 7950 GX2" },␊
281␉{ 0x10DE0294,␉/*0x00000000,*/␉"GeForce 7950 GX2" },␊
282␉{ 0x10DE0295,␉/*0x00000000,*/␉"GeForce 7950 GT" },␊
283␉{ 0x10DE0298,␉/*0x00000000,*/␉"GeForce Go 7900 GS" },␊
284␉{ 0x10DE0299,␉/*0x00000000,*/␉"GeForce Go 7900 GTX" },␊
285␉{ 0x10DE029A,␉/*0x00000000,*/␉"Quadro FX 2500M" },␊
286␉{ 0x10DE029B,␉/*0x00000000,*/␉"Quadro FX 1500M" },␊
287␉{ 0x10DE029C,␉/*0x00000000,*/␉"Quadro FX 5500" },␊
288␉{ 0x10DE029D,␉/*0x00000000,*/␉"Quadro FX 3500" },␊
289␉{ 0x10DE029E,␉/*0x00000000,*/␉"Quadro FX 1500" },␊
290␉{ 0x10DE029F,␉/*0x00000000,*/␉"Quadro FX 4500 X2" },␊
291␉// 02A0 - 02AF␊
292␉// 02B0 - 02BF␊
293␉// 02C0 - 02CF␊
294␉// 02D0 - 02DF␊
295␉// 02E0 - 02EF␊
296␉{ 0x10DE02E0,␉/*0x00000000,*/␉"GeForce 7600 GT" },␊
297␉{ 0x10DE02E1,␉/*0x00000000,*/␉"GeForce 7600 GS" },␊
298␉{ 0x10DE02E2,␉/*0x00000000,*/␉"GeForce 7300 GT" },␊
299␉{ 0x10DE02E3,␉/*0x00000000,*/␉"GeForce 7900 GS" },␊
300␉{ 0x10DE02E4,␉/*0x00000000,*/␉"GeForce 7950 GT" },␊
301␉// 02F0 - 02FF␊
302␉// 0300 - 030F␊
303␉{ 0x10DE0301,␉/*0x00000000,*/␉"GeForce FX 5800 Ultra" },␊
304␉{ 0x10DE0302,␉/*0x00000000,*/␉"GeForce FX 5800" },␊
305␉{ 0x10DE0308,␉/*0x00000000,*/␉"Quadro FX 2000" },␊
306␉{ 0x10DE0309,␉/*0x00000000,*/␉"Quadro FX 1000" },␊
307␉// 0310 - 031F␊
308␉{ 0x10DE0311,␉/*0x00000000,*/␉"GeForce FX 5600 Ultra" },␊
309␉{ 0x10DE0312,␉/*0x00000000,*/␉"GeForce FX 5600" },␊
310␉{ 0x10DE0314,␉/*0x00000000,*/␉"GeForce FX 5600XT" },␊
311␉{ 0x10DE031A,␉/*0x00000000,*/␉"GeForce FX Go5600" },␊
312␉{ 0x10DE031B,␉/*0x00000000,*/␉"GeForce FX Go5650" },␊
313␉{ 0x10DE031C,␉/*0x00000000,*/␉"Quadro FX Go700" },␊
314␉// 0320 - 032F␊
315␉{ 0x10DE0320,␉/*0x00000000,*/␉"GeForce FX 5200" }, //␊
316␉{ 0x10DE0321,␉/*0x00000000,*/␉"GeForce FX 5200 Ultra" }, //␊
317␉{ 0x10DE0322,␉/*0x00000000,*/␉"GeForce FX 5200" }, //␊
318␉{ 0x10DE0323,␉/*0x00000000,*/␉"GeForce FX 5200 LE" }, //␊
319␉{ 0x10DE0324,␉/*0x00000000,*/␉"GeForce FX Go5200" },␊
320␉{ 0x10DE0325,␉/*0x00000000,*/␉"GeForce FX Go5250" },␊
321␉{ 0x10DE0326,␉/*0x00000000,*/␉"GeForce FX 5500" },␊
322␉{ 0x10DE0328,␉/*0x00000000,*/␉"GeForce FX Go5200 32M/64M" },␊
323␉{ 0x10DE0329,␉/*0x00000000,*/␉"GeForce FX Go5200" }, //␊
324␉{ 0x10DE032A,␉/*0x00000000,*/␉"Quadro NVS 55/280 PCI" },␊
325␉{ 0x10DE032B,␉/*0x00000000,*/␉"Quadro FX 500/600 PCI" },␊
326␉{ 0x10DE032C,␉/*0x00000000,*/␉"GeForce FX Go53xx Series" },␊
327␉{ 0x10DE032D,␉/*0x00000000,*/␉"GeForce FX Go5100" },␊
328 //␉{ 0x10DE032F,␉/*0x00000000,*/␉"NVIDIA NV34GL" },//␊
329␉// 0330 - 033F␊
330␉{ 0x10DE0330,␉/*0x00000000,*/␉"GeForce FX 5900 Ultra" },␊
331␉{ 0x10DE0331,␉/*0x00000000,*/␉"GeForce FX 5900" },␊
332␉{ 0x10DE0332,␉/*0x00000000,*/␉"GeForce FX 5900XT" },␊
333␉{ 0x10DE0333,␉/*0x00000000,*/␉"GeForce FX 5950 Ultra" },␊
334␉{ 0x10DE0334,␉/*0x00000000,*/␉"GeForce FX 5900ZT" },␊
335␉{ 0x10DE0338,␉/*0x00000000,*/␉"Quadro FX 3000" },␊
336␉{ 0x10DE033F,␉/*0x00000000,*/␉"Quadro FX 700" },␊
337␉// 0340 - 034F␊
338␉{ 0x10DE0341,␉/*0x00000000,*/␉"GeForce FX 5700 Ultra" },␊
339␉{ 0x10DE0342,␉/*0x00000000,*/␉"GeForce FX 5700" },␊
340␉{ 0x10DE0343,␉/*0x00000000,*/␉"GeForce FX 5700LE" },␊
341␉{ 0x10DE0344,␉/*0x00000000,*/␉"GeForce FX 5700VE" },␊
342 //␉{ 0x10DE0345,␉/*0x00000000,*/␉"NVIDIA NV36.5" }, //␊
343␉{ 0x10DE0347,␉/*0x00000000,*/␉"GeForce FX Go5700" },␊
344␉{ 0x10DE0348,␉/*0x00000000,*/␉"GeForce FX Go5700" },␊
345 //␉{ 0x10DE0349,␉/*0x00000000,*/␉"NVIDIA NV36M Pro" }, //␊
346 //␉{ 0x10DE034B,␉/*0x00000000,*/␉"NVIDIA NV36MAP" }, //␊
347␉{ 0x10DE034C,␉/*0x00000000,*/␉"Quadro FX Go1000" },␊
348␉{ 0x10DE034E,␉/*0x00000000,*/␉"Quadro FX 1100" },␊
349 //␉{ 0x10DE034F,␉/*0x00000000,*/␉"NVIDIA NV36GL" }, //␊
350␉// 0350 - 035F␊
351␉// 0360 - 036F␊
352␉// 0370 - 037F␊
353␉// 0380 - 038F␊
354␉{ 0x10DE038B,␉/*0x00000000,*/␉"GeForce 7650 GS" },␊
355␉// 0390 - 039F␊
356␉{ 0x10DE0390,␉/*0x00000000,*/␉"GeForce 7650 GS" },␊
357␉{ 0x10DE0391,␉/*0x00000000,*/␉"GeForce 7600 GT" },␊
358␉{ 0x10DE0392,␉/*0x00000000,*/␉"GeForce 7600 GS" },␊
359␉{ 0x10DE0393,␉/*0x00000000,*/␉"GeForce 7300 GT" },␊
360␉{ 0x10DE0394,␉/*0x00000000,*/␉"GeForce 7600 LE" },␊
361␉{ 0x10DE0395,␉/*0x00000000,*/␉"GeForce 7300 GT" },␊
362␉{ 0x10DE0397,␉/*0x00000000,*/␉"GeForce Go 7700" },␊
363␉{ 0x10DE0398,␉/*0x00000000,*/␉"GeForce Go 7600" },␊
364␉{ 0x10DE0399,␉/*0x00000000,*/␉"GeForce Go 7600 GT"},␊
365␉{ 0x10DE039A,␉/*0x00000000,*/␉"Quadro NVS 300M" },␊
366␉{ 0x10DE039B,␉/*0x00000000,*/␉"GeForce Go 7900 SE" },␊
367␉{ 0x10DE039C,␉/*0x00000000,*/␉"Quadro FX 560M" },␊
368␉{ 0x10DE039E,␉/*0x00000000,*/␉"Quadro FX 560" },␊
369␉// 03A0 - 03AF␊
370␉// 03B0 - 03BF␊
371␉// 03C0 - 03CF␊
372␉// 03D0 - 03DF␊
373␉{ 0x10DE03D0,␉/*0x00000000,*/␉"GeForce 6150SE nForce 430" },␊
374␉{ 0x10DE03D1,␉/*0x00000000,*/␉"GeForce 6100 nForce 405" },␊
375␉{ 0x10DE03D2,␉/*0x00000000,*/␉"GeForce 6100 nForce 400" },␊
376␉{ 0x10DE03D5,␉/*0x00000000,*/␉"GeForce 6100 nForce 420" },␊
377␉{ 0x10DE03D6,␉/*0x00000000,*/␉"GeForce 7025 / nForce 630a" },␊
378␉// 03E0 - 03EF␊
379␉// 03F0 - 03FF␊
380␉// 0400 - 040F␊
381␉{ 0x10DE0400,␉/*0x00000000,*/␉"GeForce 8600 GTS" },␊
382␉{ 0x10DE0401,␉/*0x00000000,*/␉"GeForce 8600 GT" },␊
383␉{ 0x10DE0402,␉/*0x00000000,*/␉"GeForce 8600 GT" },␊
384␉{ 0x10DE0403,␉/*0x00000000,*/␉"GeForce 8600 GS" },␊
385␉{ 0x10DE0404,␉/*0x00000000,*/␉"GeForce 8400 GS" },␊
386␉{ 0x10DE0405,␉/*0x00000000,*/␉"GeForce 9500M GS" },␊
387␉{ 0x10DE0406,␉/*0x00000000,*/␉"GeForce 8300 GS" },␊
388␉{ 0x10DE0407,␉/*0x00000000,*/␉"GeForce 8600M GT" },␊
389␉{ 0x10DE0408,␉/*0x00000000,*/␉"GeForce 9650M GS" },␊
390␉{ 0x10DE0409,␉/*0x00000000,*/␉"GeForce 8700M GT" },␊
391␉{ 0x10DE040A,␉/*0x00000000,*/␉"Quadro FX 370" },␊
392␉{ 0x10DE040B,␉/*0x00000000,*/␉"Quadro NVS 320M" },␊
393␉{ 0x10DE040C,␉/*0x00000000,*/␉"Quadro FX 570M" },␊
394␉{ 0x10DE040D,␉/*0x00000000,*/␉"Quadro FX 1600M" },␊
395␉{ 0x10DE040E,␉/*0x00000000,*/␉"Quadro FX 570" },␊
396␉{ 0x10DE040F,␉/*0x00000000,*/␉"Quadro FX 1700" },␊
397␉// 0410 - 041F␊
398␉{ 0x10DE0410,␉/*0x00000000,*/␉"GeForce GT 330" },␊
399␉// 0420 - 042F␊
400␉{ 0x10DE0420,␉/*0x00000000,*/␉"GeForce 8400 SE" },␊
401␉{ 0x10DE0421,␉/*0x00000000,*/␉"GeForce 8500 GT" },␊
402␉{ 0x10DE0422,␉/*0x00000000,*/␉"GeForce 8400 GS" },␊
403␉{ 0x10DE0423,␉/*0x00000000,*/␉"GeForce 8300 GS" },␊
404␉{ 0x10DE0424,␉/*0x00000000,*/␉"GeForce 8400 GS" },␊
405␉{ 0x10DE0425,␉/*0x00000000,*/␉"GeForce 8600M GS" },␊
406␉{ 0x10DE0426,␉/*0x00000000,*/␉"GeForce 8400M GT" },␊
407␉{ 0x10DE0427,␉/*0x00000000,*/␉"GeForce 8400M GS" },␊
408␉{ 0x10DE0428,␉/*0x00000000,*/␉"GeForce 8400M G" },␊
409␉{ 0x10DE0429,␉/*0x00000000,*/␉"Quadro NVS 140M" },␊
410␉{ 0x10DE042A,␉/*0x00000000,*/␉"Quadro NVS 130M" },␊
411␉{ 0x10DE042B,␉/*0x00000000,*/␉"Quadro NVS 135M" },␊
412␉{ 0x10DE042C,␉/*0x00000000,*/␉"GeForce 9400 GT" },␊
413␉{ 0x10DE042D,␉/*0x00000000,*/␉"Quadro FX 360M" },␊
414␉{ 0x10DE042E,␉/*0x00000000,*/␉"GeForce 9300M G" },␊
415␉{ 0x10DE042F,␉/*0x00000000,*/␉"Quadro NVS 290" },␊
416␉// 0430 - 043F␊
417␉// 0440 - 044F␊
418␉// 0450 - 045F␊
419␉// 0460 - 046F␊
420␉// 0470 - 047F␊
421␉// 0480 - 048F␊
422␉// 0490 - 049F␊
423␉// 04A0 - 04AF␊
424␉// 04B0 - 04BF␊
425␉// 04C0 - 04CF␊
426␉{ 0x10DE04C0,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
427␉{ 0x10DE04C1,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
428␉{ 0x10DE04C2,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
429␉{ 0x10DE04C3,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
430␉{ 0x10DE04C4,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
431␉{ 0x10DE04C5,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
432␉{ 0x10DE04C6,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
433␉{ 0x10DE04C7,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
434␉{ 0x10DE04C8,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
435␉{ 0x10DE04C9,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
436␉{ 0x10DE04CA,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
437␉{ 0x10DE04CB,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
438␉{ 0x10DE04CC,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
439␉{ 0x10DE04CD,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
440␉{ 0x10DE04CE,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
441␉{ 0x10DE04CF,␉/*0x00000000,*/␉"NVIDIA G78" }, //␊
442␉// 04D0 - 04DF␊
443␉// 04E0 - 04EF␊
444␉// 04F0 - 04FF␊
445␉// 0500 - 050F␊
446␉// 0510 - 051F␊
447␉// 0520 - 052F␊
448␉// 0530 - 053F␊
449␉{ 0x10DE0530,␉/*0x00000000,*/␉"GeForce 7190M / nForce 650M" },␊
450␉{ 0x10DE0531,␉/*0x00000000,*/␉"GeForce 7150M / nForce 630M" },␊
451␉{ 0x10DE0533,␉/*0x00000000,*/␉"GeForce 7000M / nForce 610M" },␊
452␉{ 0x10DE053A,␉/*0x00000000,*/␉"GeForce 7050 PV / nForce 630a" },␊
453␉{ 0x10DE053B,␉/*0x00000000,*/␉"GeForce 7050 PV / nForce 630a" },␊
454␉{ 0x10DE053E,␉/*0x00000000,*/␉"GeForce 7025 / nForce 630a" },␊
455␉// 0540 - 054F␊
456␉// 0550 - 055F␊
457␉// 0560 - 056F␊
458␉// 0570 - 057F␊
459␉// 0580 - 058F␊
460␉// 0590 - 059F␊
461␉// 05A0 - 05AF␊
462␉// 05B0 - 05BF␊
463␉// 05C0 - 05CF␊
464␉// 05D0 - 05DF␊
465␉// 05E0 - 05EF␊
466␉{ 0x10DE05E0,␉/*0x00000000,*/␉"GeForce GTX 295" },␊
467␉{ 0x10DE05E1,␉/*0x00000000,*/␉"GeForce GTX 280" },␊
468␉{ 0x10DE05E2,␉/*0x00000000,*/␉"GeForce GTX 260" },␊
469␉{ 0x10DE05E3,␉/*0x00000000,*/␉"GeForce GTX 285" },␊
470␉{ 0x10DE05E4,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
471␉{ 0x10DE05E5,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
472␉{ 0x10DE05E6,␉/*0x00000000,*/␉"GeForce GTX 275" },␊
473␉{ 0x10DE05E7,␉/*0x00000000,*/␉"Tesla C1060" },␊
474␉{ 0x10DE05E8,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
475␉{ 0x10DE05E9,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
476␉{ 0x10DE05EA,␉/*0x00000000,*/␉"GeForce GTX 260" },␊
477␉{ 0x10DE05EB,␉/*0x00000000,*/␉"GeForce GTX 295" },␊
478␉{ 0x10DE05EC,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
479␉{ 0x10DE05ED,␉/*0x00000000,*/␉"Quadroplex 2200 D2" },␊
480␉{ 0x10DE05EE,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
481␉{ 0x10DE05EF,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
482␉// 05F0 - 05FF␊
483␉{ 0x10DE05F0,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
484␉{ 0x10DE05F1,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
485␉{ 0x10DE05F2,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
486␉{ 0x10DE05F3,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
487␉{ 0x10DE05F4,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
488␉{ 0x10DE05F5,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
489␉{ 0x10DE05F6,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
490␉{ 0x10DE05F7,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
491␉{ 0x10DE05F8,␉/*0x00000000,*/␉"Quadroplex 2200 S4" },␊
492␉{ 0x10DE05F9,␉/*0x00000000,*/␉"Quadro CX" },␊
493␉{ 0x10DE05FA,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
494␉{ 0x10DE05FB,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
495␉{ 0x10DE05FC,␉/*0x00000000,*/␉"NVIDIA GT200" }, //␊
496␉{ 0x10DE05FD,␉/*0x00000000,*/␉"Quadro FX 5800" },␊
497␉{ 0x10DE05FE,␉/*0x00000000,*/␉"Quadro FX 4800" },␊
498␉{ 0x10DE05FF,␉/*0x00000000,*/␉"Quadro FX 3800" },␊
499␉// 0600 - 060F␊
500␉{ 0x10DE0600,␉/*0x00000000,*/␉"GeForce 8800 GTS 512" },␊
501␉{ 0x10DE0601,␉/*0x00000000,*/␉"GeForce 9800 GT" },␊
502␉{ 0x10DE0602,␉/*0x00000000,*/␉"GeForce 8800 GT" },␊
503␉{ 0x10DE0603,␉/*0x00000000,*/␉"GeForce GT 230" },␊
504␉{ 0x10DE0604,␉/*0x00000000,*/␉"GeForce 9800 GX2" },␊
505␉{ 0x10DE0605,␉/*0x00000000,*/␉"GeForce 9800 GT" },␊
506␉{ 0x10DE0606,␉/*0x00000000,*/␉"GeForce 8800 GS" },␊
507␉{ 0x10DE0607,␉/*0x00000000,*/␉"GeForce GTS 240" },␊
508␉{ 0x10DE0608,␉/*0x00000000,*/␉"GeForce 9800M GTX" },␊
509␉{ 0x10DE0609,␉/*0x00000000,*/␉"GeForce 8800M GTS" },␊
510␉{ 0x10DE060A,␉/*0x00000000,*/␉"GeForce GTX 280M" },␊
511␉{ 0x10DE060B,␉/*0x00000000,*/␉"GeForce 9800M GT" },␊
512␉{ 0x10DE060C,␉/*0x00000000,*/␉"GeForce 8800M GTX" },␊
513␉{ 0x10DE060D,␉/*0x00000000,*/␉"GeForce 8800 GS" },␊
514␉{ 0x10DE060F,␉/*0x00000000,*/␉"GeForce GTX 285M" },␊
515␉// 0610 - 061F␊
516␉{ 0x10DE0610,␉/*0x00000000,*/␉"GeForce 9600 GSO" },␊
517␉{ 0x10DE0611,␉/*0x00000000,*/␉"GeForce 8800 GT" },␊
518␉{ 0x10DE0612,␉/*0x00000000,*/␉"GeForce 9800 GTX" },␊
519␉{ 0x10DE0613,␉/*0x00000000,*/␉"GeForce 9800 GTX+" },␊
520␉{ 0x10DE0614,␉/*0x00000000,*/␉"GeForce 9800 GT" },␊
521␉{ 0x10DE0615,␉/*0x00000000,*/␉"GeForce GTS 250" },␊
522␉{ 0x10DE0617,␉/*0x00000000,*/␉"GeForce 9800M GTX" },␊
523␉{ 0x10DE0618,␉/*0x00000000,*/␉"GeForce GTX 260M" }, // Subsystem Id: 1043 202B Asus GTX 680␊
524␉{ 0x10DE0619,␉/*0x00000000,*/␉"Quadro FX 4700 X2" },␊
525␉{ 0x10DE061A,␉/*0x00000000,*/␉"Quadro FX 3700" },␊
526␉{ 0x10DE061B,␉/*0x00000000,*/␉"Quadro VX 200" },␊
527␉{ 0x10DE061C,␉/*0x00000000,*/␉"Quadro FX 3600M" },␊
528␉{ 0x10DE061D,␉/*0x00000000,*/␉"Quadro FX 2800M" },␊
529␉{ 0x10DE061E,␉/*0x00000000,*/␉"Quadro FX 3700M" },␊
530␉{ 0x10DE061F,␉/*0x00000000,*/␉"Quadro FX 3800M" },␊
531␉// 0620 - 062F␊
532␉{ 0x10DE0620,␉/*0x00000000,*/␉"NVIDIA G94" }, // GeForce 8100/8200/8300␊
533␉{ 0x10DE0621,␉/*0x00000000,*/␉"GeForce GT 230" },␊
534␉{ 0x10DE0622,␉/*0x00000000,*/␉"GeForce 9600 GT" },␊
535␉{ 0x10DE0623,␉/*0x00000000,*/␉"GeForce 9600 GS" },␊
536␉{ 0x10DE0624,␉/*0x00000000,*/␉"NVIDIA G94" }, //␊
537␉{ 0x10DE0625,␉/*0x00000000,*/␉"GeForce 9600 GSO 512"},␊
538␉{ 0x10DE0626,␉/*0x00000000,*/␉"GeForce GT 130" },␊
539␉{ 0x10DE0627,␉/*0x00000000,*/␉"GeForce GT 140" },␊
540␉{ 0x10DE0628,␉/*0x00000000,*/␉"GeForce 9800M GTS" },␊
541␉{ 0x10DE0629,␉/*0x00000000,*/␉"NVIDIA G94" }, //␊
542␉{ 0x10DE062A,␉/*0x00000000,*/␉"GeForce 9700M GTS" },␊
543␉{ 0x10DE062B,␉/*0x00000000,*/␉"GeForce 9800M GS" },␊
544␉{ 0x10DE062C,␉/*0x00000000,*/␉"GeForce 9800M GTS" },␊
545␉{ 0x10DE062D,␉/*0x00000000,*/␉"GeForce 9600 GT" },␊
546␉{ 0x10DE062E,␉/*0x00000000,*/␉"GeForce 9600 GT" },␊
547␉{ 0x10DE062F,␉/*0x00000000,*/␉"GeForce 9800 S" }, //␊
548␉// 0630 - 063F␊
549␉{ 0x10DE0630,␉/*0x00000000,*/␉"NVIDIA G94" }, //␊
550␉{ 0x10DE0631,␉/*0x00000000,*/␉"GeForce GTS 160M" },␊
551␉{ 0x10DE0632,␉/*0x00000000,*/␉"GeForce GTS 150M" },␊
552␉{ 0x10DE0633,␉/*0x00000000,*/␉"NVIDIA G94" }, //␊
553␉{ 0x10DE0634,␉/*0x00000000,*/␉"NVIDIA G94" }, //␊
554␉{ 0x10DE0635,␉/*0x00000000,*/␉"GeForce 9600 GSO" },␊
555␉{ 0x10DE0636,␉/*0x00000000,*/␉"NVIDIA G94" }, //␊
556␉{ 0x10DE0637,␉/*0x00000000,*/␉"GeForce 9600 GT" },␊
557␉{ 0x10DE0638,␉/*0x00000000,*/␉"Quadro FX 1800" },␊
558␉{ 0x10DE0639,␉/*0x00000000,*/␉"NVIDIA G94" }, //␊
559␉{ 0x10DE063A,␉/*0x00000000,*/␉"Quadro FX 2700M" },␊
560␉{ 0x10DE063B,␉/*0x00000000,*/␉"NVIDIA G94" }, //␊
561␉{ 0x10DE063C,␉/*0x00000000,*/␉"NVIDIA G94" }, //␊
562␉{ 0x10DE063D,␉/*0x00000000,*/␉"NVIDIA G94" }, //␊
563␉{ 0x10DE063E,␉/*0x00000000,*/␉"NVIDIA G94" }, //␊
564␉{ 0x10DE063F,␉/*0x00000000,*/␉"NVIDIA G94" }, //␊
565␉// 0640 - 064F␊
566␉{ 0x10DE0640,␉/*0x00000000,*/␉"GeForce 9500 GT" },␊
567␉{ 0x10DE0641,␉/*0x00000000,*/␉"GeForce 9400 GT" },␊
568␉{ 0x10DE0642,␉/*0x00000000,*/␉"GeForce 8400 GS" },␊
569␉{ 0x10DE0643,␉/*0x00000000,*/␉"GeForce 9500 GT" },␊
570␉{ 0x10DE0644,␉/*0x00000000,*/␉"GeForce 9500 GS" },␊
571␉{ 0x10DE0645,␉/*0x00000000,*/␉"GeForce 9500 GS" },␊
572␉{ 0x10DE0646,␉/*0x00000000,*/␉"GeForce GT 120" },␊
573␉{ 0x10DE0647,␉/*0x00000000,*/␉"GeForce 9600M GT" },␊
574␉{ 0x10DE0648,␉/*0x00000000,*/␉"GeForce 9600M GS" },␊
575␉{ 0x10DE0649,␉/*0x00000000,*/␉"GeForce 9600M GT" },␊
576␉{ 0x10DE064A,␉/*0x00000000,*/␉"GeForce 9700M GT" },␊
577␉{ 0x10DE064B,␉/*0x00000000,*/␉"GeForce 9500M G" },␊
578␉{ 0x10DE064C,␉/*0x00000000,*/␉"GeForce 9650M GT" },␊
579␉// 0650 - 065F␊
580␉{ 0x10DE0650,␉/*0x00000000,*/␉"NVIDIA G96-825" }, //␊
581␉{ 0x10DE0651,␉/*0x00000000,*/␉"GeForce G 110M" },␊
582␉{ 0x10DE0652,␉/*0x00000000,*/␉"GeForce GT 130M" },␊
583␉{ 0x10DE0653,␉/*0x00000000,*/␉"GeForce GT 120M" },␊
584␉{ 0x10DE0654,␉/*0x00000000,*/␉"GeForce GT 220M" },␊
585␉{ 0x10DE0655,␉/*0x00000000,*/␉"GeForce GT 120" },␊
586␉{ 0x10DE0656,␉/*0x00000000,*/␉"GeForce 9650 S" },␊
587␉{ 0x10DE0657,␉/*0x00000000,*/␉"NVIDIA G96" }, //␊
588␉{ 0x10DE0658,␉/*0x00000000,*/␉"Quadro FX 380" },␊
589␉{ 0x10DE0659,␉/*0x00000000,*/␉"Quadro FX 580" },␊
590␉{ 0x10DE065A,␉/*0x00000000,*/␉"Quadro FX 1700M" },␊
591␉{ 0x10DE065B,␉/*0x00000000,*/␉"GeForce 9400 GT" },␊
592␉{ 0x10DE065C,␉/*0x00000000,*/␉"Quadro FX 770M" },␊
593␉{ 0x10DE065D,␉/*0x00000000,*/␉"NVIDIA G96" }, //␊
594␉{ 0x10DE065E,␉/*0x00000000,*/␉"NVIDIA G96" }, //␊
595␉{ 0x10DE065F,␉/*0x00000000,*/␉"GeForce G210" },␊
596␉// 0660 - 066F␊
597␉// 0670 - 067F␊
598␉// 0680 - 068F␊
599␉// 0690 - 069F␊
600␉// 06A0 - 06AF␊
601␉{ 0x10DE06A0,␉/*0x00000000,*/␉"NVIDIA GT214" }, //␊
602␉// 06B0 - 06BF␊
603␉{ 0x10DE06B0,␉/*0x00000000,*/␉"NVIDIA GT214" }, //␊
604␉// 06C0 - 06CF␊
605␉{ 0x10DE06C0,␉/*0x00000000,*/␉"GeForce GTX 480" },␊
606␉{ 0x10DE06C3,␉/*0x00000000,*/␉"GeForce GTX D12U" },␊
607␉{ 0x10DE06C4,␉/*0x00000000,*/␉"GeForce GTX 465" },␊
608␉{ 0x10DE06CA,␉/*0x00000000,*/␉"GeForce GTX 480M" },␊
609␉{ 0x10DE06CD,␉/*0x00000000,*/␉"GeForce GTX 470" },␊
610␉// 06D0 - 06DF␊
611␉{ 0x10DE06D1,␉/*0x00000000,*/␉"Tesla C2050" },␉// TODO: sub-device id: 0x0771␊
612␉{ 0x10DE06D1,␉/*0x00000000,*/␉"Tesla C2070" },␉// TODO: sub-device id: 0x0772␊
613␉{ 0x10DE06D2,␉/*0x00000000,*/␉"Tesla M2070" },␊
614␉{ 0x10DE06D8,␉/*0x00000000,*/␉"Quadro 6000" },␊
615␉{ 0x10DE06D9,␉/*0x00000000,*/␉"Quadro 5000" },␊
616␉{ 0x10DE06DA,␉/*0x00000000,*/␉"Quadro 5000M" },␊
617␉{ 0x10DE06DC,␉/*0x00000000,*/␉"Quadro 6000" },␊
618␉{ 0x10DE06DD,␉/*0x00000000,*/␉"Quadro 4000" },␊
619␉{ 0x10DE06DE,␉/*0x00000000,*/␉"Tesla M2050" },␉// TODO: sub-device id: 0x0846␊
620␉{ 0x10DE06DE,␉/*0x00000000,*/␉"Tesla M2070" },␉// TODO: sub-device id: ?␉␊
621␉{ 0x10DE06DF,␉/*0x00000000,*/␉"Tesla M2070-Q" },␊
622␉// 0x10DE06DE also applies to misc S2050, X2070, M2050, M2070␊
623␉// 06E0 - 06EF␊
624␉{ 0x10DE06E0,␉/*0x00000000,*/␉"GeForce 9300 GE" },␊
625␉{ 0x10DE06E1,␉/*0x00000000,*/␉"GeForce 9300 GS" },␊
626␉{ 0x10DE06E2,␉/*0x00000000,*/␉"GeForce 8400" },␊
627␉{ 0x10DE06E3,␉/*0x00000000,*/␉"GeForce 8400 SE" },␊
628␉{ 0x10DE06E4,␉/*0x00000000,*/␉"GeForce 8400 GS" },␊
629␉{ 0x10DE06E5,␉/*0x00000000,*/␉"GeForce 9300M GS" },␊
630␉{ 0x10DE06E6,␉/*0x00000000,*/␉"GeForce G100" },␊
631␉{ 0x10DE06E7,␉/*0x00000000,*/␉"GeForce 9300 SE" },␊
632␉{ 0x10DE06E8,␉/*0x00000000,*/␉"GeForce 9200M GS" },␊
633␉{ 0x10DE06E9,␉/*0x00000000,*/␉"GeForce 9300M GS" },␊
634␉{ 0x10DE06EA,␉/*0x00000000,*/␉"Quadro NVS 150M" },␊
635␉{ 0x10DE06EB,␉/*0x00000000,*/␉"Quadro NVS 160M" },␊
636␉{ 0x10DE06EC,␉/*0x00000000,*/␉"GeForce G 105M" },␊
637␉{ 0x10DE06ED,␉/*0x00000000,*/␉"NVIDIA G98" }, //␊
638␉{ 0x10DE06EF,␉/*0x00000000,*/␉"GeForce G 103M" },␊
639␉// 06F0 - 06FF␊
640␉{ 0x10DE06F0,␉/*0x00000000,*/␉"NVIDIA G98" }, //␊
641␉{ 0x10DE06F1,␉/*0x00000000,*/␉"GeForce G105M" },␊
642␉{ 0x10DE06F2,␉/*0x00000000,*/␉"NVIDIA G98" }, //␊
643␉{ 0x10DE06F3,␉/*0x00000000,*/␉"NVIDIA G98" }, //␊
644␉{ 0x10DE06F4,␉/*0x00000000,*/␉"NVIDIA G98" }, //␊
645␉{ 0x10DE06F5,␉/*0x00000000,*/␉"NVIDIA G98" }, //␊
646␉{ 0x10DE06F6,␉/*0x00000000,*/␉"NVIDIA G98" }, //␊
647␉{ 0x10DE06F7,␉/*0x00000000,*/␉"NVIDIA G98" }, //␊
648␉{ 0x10DE06F8,␉/*0x00000000,*/␉"Quadro NVS 420" },␊
649␉{ 0x10DE06F9,␉/*0x00000000,*/␉"Quadro FX 370 LP" },␊
650␉{ 0x10DE06FA,␉/*0x00000000,*/␉"Quadro NVS 450" },␊
651␉{ 0x10DE06FB,␉/*0x00000000,*/␉"Quadro FX 370M" },␊
652␉{ 0x10DE06FC,␉/*0x00000000,*/␉"NVIDIA G98" }, //␊
653␉{ 0x10DE06FD,␉/*0x00000000,*/␉"Quadro NVS 295" },␊
654␉{ 0x10DE06FE,␉/*0x00000000,*/␉"NVIDIA G98" }, //␊
655␉{ 0x10DE06FF,␉/*0x00000000,*/␉"HICx16 + Graphics" },␊
656␉// 0700 - 070F␊
657␉// 0710 - 071F␊
658␉// 0720 - 072F␊
659␉// 0730 - 073F␊
660␉// 0740 - 074F␊
661␉// 0750 - 075F␊
662 //␉{ 0x10DE0759,␉/*0x00000000,*/␉"nVidia Standard Dual Channel PCI IDE Controller" },␊
663␉// 0760 - 076F␊
664␉// 0770 - 077F␊
665 //␉{ 0x10DE0774,␉/*0x00000000,*/␉"nVidia Microsoft UAA Bus Driver for High Definition Audio" },␊
666 //␉{ 0x10DE077B,␉/*0x00000000,*/␉"nVidia Standard OpenHCD USB Host Controller" },␊
667 //␉{ 0x10DE077C,␉/*0x00000000,*/␉"nVidia Standard Enhanced PCI to USB Host Controller" },␊
668 //␉{ 0x10DE077D,␉/*0x00000000,*/␉"nVidia Standard OpenHCD USB Host Controller" },␊
669 //␉{ 0x10DE077E,␉/*0x00000000,*/␉"nVidia Standard Enhanced PCI to USB Host Controller" },␊
670␉// 0780 - 078F␊
671␉// 0790 - 079F␊
672␉// 07A0 - 07AF␊
673␉// 07B0 - 07BF␊
674␉// 07C0 - 07CF␊
675␉// 07D0 - 07DF␊
676␉// 07E0 - 07EF␊
677␉{ 0x10DE07E0,␉/*0x00000000,*/␉"GeForce 7150 / nForce 630i" },␊
678␉{ 0x10DE07E1,␉/*0x00000000,*/␉"GeForce 7100 / nForce 630i" },␊
679␉{ 0x10DE07E2,␉/*0x00000000,*/␉"GeForce 7050 / nForce 630i" },␊
680␉{ 0x10DE07E3,␉/*0x00000000,*/␉"GeForce 7050 / nForce 610i" },␊
681 //␉{ 0x10DE07E4,␉/*0x00000000,*/␉"NVIDIA MCP73" },␊
682␉{ 0x10DE07E5,␉/*0x00000000,*/␉"GeForce 7050 / nForce 620i" },␊
683 //␉{ 0x10DE07E6,␉/*0x00000000,*/␉"NVIDIA MCP73" },␊
684 //␉{ 0x10DE07E7,␉/*0x00000000,*/␉"NVIDIA MCP73" },␊
685 //␉{ 0x10DE07E8,␉/*0x00000000,*/␉"NVIDIA MCP73" },␊
686 //␉{ 0x10DE07E9,␉/*0x00000000,*/␉"NVIDIA MCP73" },␊
687 //␉{ 0x10DE07EA,␉/*0x00000000,*/␉"NVIDIA MCP73" },␊
688 //␉{ 0x10DE07EB,␉/*0x00000000,*/␉"NVIDIA MCP73" },␊
689 //␉{ 0x10DE07ED,␉/*0x00000000,*/␉"NVIDIA MCP73" },␊
690 //␉{ 0x10DE07EE,␉/*0x00000000,*/␉"NVIDIA MCP73" },␊
691 //␉{ 0x10DE07EF,␉/*0x00000000,*/␉"NVIDIA MCP73" },␊
692␉// 07F0 - 07FF␊
693␉// 0800 - 080F␊
694␉// 0810 - 081F␊
695␉// 0820 - 082F␊
696␉// 0830 - 083F␊
697␉// 0840 - 084F␊
698␉{ 0x10DE0840,␉/*0x00000000,*/␉"GeForce 8200M" },␊
699 //␉{ 0x10DE0841,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
700 //␉{ 0x10DE0842,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
701␉{ 0x10DE0844,␉/*0x00000000,*/␉"GeForce 9100M G" },␊
702␉{ 0x10DE0845,␉/*0x00000000,*/␉"GeForce 8200M G" },␊
703␉{ 0x10DE0846,␉/*0x00000000,*/␉"GeForce 9200" },␊
704␉{ 0x10DE0847,␉/*0x00000000,*/␉"GeForce 9100" },␊
705␉{ 0x10DE0848,␉/*0x00000000,*/␉"GeForce 8300" },␊
706␉{ 0x10DE0849,␉/*0x00000000,*/␉"GeForce 8200" },␊
707␉{ 0x10DE084A,␉/*0x00000000,*/␉"nForce 730a" },␊
708␉{ 0x10DE084B,␉/*0x00000000,*/␉"GeForce 9200" },␊
709␉{ 0x10DE084C,␉/*0x00000000,*/␉"nForce 980a/780a SLI" },␊
710␉{ 0x10DE084D,␉/*0x00000000,*/␉"nForce 750a SLI" },␊
711␉{ 0x10DE084F,␉/*0x00000000,*/␉"GeForce 8100 / nForce 720a" },␊
712␉// 0850 - 085F␊
713 //␉{ 0x10DE0850,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
714 //␉{ 0x10DE0851,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
715 //␉{ 0x10DE0852,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
716 //␉{ 0x10DE0853,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
717 //␉{ 0x10DE0854,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
718 //␉{ 0x10DE0855,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
719 //␉{ 0x10DE0856,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
720 //␉{ 0x10DE0857,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
721 //␉{ 0x10DE0858,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
722 //␉{ 0x10DE0859,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
723 //␉{ 0x10DE085A,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
724 //␉{ 0x10DE085B,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
725 //␉{ 0x10DE085C,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
726 //␉{ 0x10DE085D,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
727 //␉{ 0x10DE085E,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
728 //␉{ 0x10DE085F,␉/*0x00000000,*/␉"NVIDIA MCP77/78" },␊
729␉// 0860 - 086F␊
730␉{ 0x10DE0860,␉/*0x00000000,*/␉"GeForce 9300" }, //␊
731␉{ 0x10DE0861,␉/*0x00000000,*/␉"GeForce 9400" },␊
732␉{ 0x10DE0862,␉/*0x00000000,*/␉"GeForce 9400M G" },␊
733␉{ 0x10DE0863,␉/*0x00000000,*/␉"GeForce 9400M" },␊
734␉{ 0x10DE0864,␉/*0x00000000,*/␉"GeForce 9300" },␊
735␉{ 0x10DE0865,␉/*0x00000000,*/␉"GeForce 9300" }, //␊
736␉{ 0x10DE0866,␉/*0x00000000,*/␉"GeForce 9400M G" },␊
737␉{ 0x10DE0867,␉/*0x00000000,*/␉"GeForce 9400" },␊
738␉{ 0x10DE0868,␉/*0x00000000,*/␉"nForce 760i SLI" },␊
739␉{ 0x10DE0869,␉/*0x00000000,*/␉"GeForce 9400" },␊
740␉{ 0x10DE086A,␉/*0x00000000,*/␉"GeForce 9400" },␊
741␉{ 0x10DE086C,␉/*0x00000000,*/␉"GeForce 9300 / nForce 730i" },␊
742␉{ 0x10DE086D,␉/*0x00000000,*/␉"GeForce 9200" },␊
743␉{ 0x10DE086E,␉/*0x00000000,*/␉"GeForce 9100M G" },␊
744␉{ 0x10DE086F,␉/*0x00000000,*/␉"GeForce 8200M G" },␊
745␉// 0870 - 087F␊
746␉{ 0x10DE0870,␉/*0x00000000,*/␉"GeForce 9400M" },␊
747␉{ 0x10DE0871,␉/*0x00000000,*/␉"GeForce 9200" },␊
748␉{ 0x10DE0872,␉/*0x00000000,*/␉"GeForce G102M" },␊
749␉{ 0x10DE0873,␉/*0x00000000,*/␉"GeForce G102M" },␊
750␉{ 0x10DE0874,␉/*0x00000000,*/␉"ION 9300M" },␉␊
751␉{ 0x10DE0876,␉/*0x00000000,*/␉"ION 9400M" }, //␊
752␉{ 0x10DE087A,␉/*0x00000000,*/␉"GeForce 9400" },␊
753␉{ 0x10DE087D,␉/*0x00000000,*/␉"ION 9400M" },␊
754␉{ 0x10DE087E,␉/*0x00000000,*/␉"ION LE" },␊
755␉{ 0x10DE087F,␉/*0x00000000,*/␉"ION LE" },␊
756␉// 0880 - 088F␊
757␉// 0890 - 089F␊
758␉// 08A0 - 08AF␊
759␉{ 0x10DE08A0,␉/*0x00000000,*/␉"GeForce 320M" },␊
760 //␉{ 0x10DE08A1,␉/*0x00000000,*/␉"NVIDIA MCP89-MZT" },␊
761 //␉{ 0x10DE08A2,␉/*0x00000000,*/␉"NVIDIA MCP89-EPT" },␊
762␉{ 0x10DE08A3,␉/*0x00000000,*/␉"GeForce 320M" },␊
763␉{ 0x10DE08A4,␉/*0x00000000,*/␉"GeForce 320M" },␊
764␉{ 0x10DE08A5,␉/*0x00000000,*/␉"GeForce 320M" },␊
765␉// 08B0 - 08BF␊
766 //␉{ 0x10DE08B0,␉/*0x00000000,*/␉"Unknown" },␊
767␉{ 0x10DE08B1,␉/*0x00000000,*/␉"GeForce 300M" },␊
768 //␉{ 0x10DE08B2,␉/*0x00000000,*/␉"NVIDIA MCP83-MJ" },␊
769 //␉{ 0x10DE08B3,␉/*0x00000000,*/␉"NVIDIA MCP89 MM9" },␊
770␉// 08C0 - 08CF␊
771␉// 08D0 - 08DF␊
772␉// 08E0 - 08EF␊
773␉// 08F0 - 08FF␊
774␉// 0900 - 090F␊
775␉// 0910 - 091F␊
776␉// 0920 - 092F␊
777␉// 0930 - 093F␊
778␉// 0940 - 094F␊
779␉// 0950 - 095F␊
780␉// 0960 - 096F␊
781␉// 0970 - 097F␊
782␉// 0980 - 098F␊
783␉// 0990 - 099F␊
784␉// 09A0 - 09AF␊
785␉// 09B0 - 09BF␊
786␉// 09C0 - 09CF␊
787␉// 09D0 - 09DF␊
788␉// 09E0 - 09EF␊
789␉// 09F0 - 09FF␊
790␉// 0A00 - 0A0F␊
791 //␉{ 0x10DE0A00,␉/*0x00000000,*/␉"NVIDIA GT212" },␊
792␉// 0A10 - 0A1F␊
793 //␉{ 0x10DE0A10,␉/*0x00000000,*/␉"NVIDIA GT212" },␊
794␉// 0A20 - 0A2F␊
795␉{ 0x10DE0A20,␉/*0x00000000,*/␉"GeForce GT 220" }, // subsystem 10de:0a20:1043:8311␊
796 //␉{ 0x10DE0A21,␉/*0x00000000,*/␉"NVIDIA D10M2-20" },␊
797␉{ 0x10DE0A22,␉/*0x00000000,*/␉"GeForce 315" },␊
798␉{ 0x10DE0A23,␉/*0x00000000,*/␉"GeForce 210" },␊
799␉{ 0x10DE0A26,␉/*0x00000000,*/␉"GeForce 405" },␊
800␉{ 0x10DE0A27,␉/*0x00000000,*/␉"GeForce 405" },␊
801␉{ 0x10DE0A28,␉/*0x00000000,*/␉"GeForce GT 230M" },␊
802␉{ 0x10DE0A29,␉/*0x00000000,*/␉"GeForce GT 330M" },␊
803␉{ 0x10DE0A2A,␉/*0x00000000,*/␉"GeForce GT 230M" },␊
804␉{ 0x10DE0A2B,␉/*0x00000000,*/␉"GeForce GT 330M" },␊
805␉{ 0x10DE0A2C,␉/*0x00000000,*/␉"NVS 5100M" },␊
806␉{ 0x10DE0A2D,␉/*0x00000000,*/␉"GeForce GT 320M" },␉␊
807␉// 0A30 - 0A3F␊
808 //␉{ 0x10DE0A30,␉/*0x00000000,*/␉"NVIDIA GT216" },␊
809␉{ 0x10DE0A34,␉/*0x00000000,*/␉"GeForce GT 240M" },␊
810␉{ 0x10DE0A35,␉/*0x00000000,*/␉"GeForce GT 325M" },␊
811␉{ 0x10DE0A38,␉/*0x00000000,*/␉"Quadro 400" },␊
812␉{ 0x10DE0A3C,␉/*0x00000000,*/␉"Quadro FX 880M" },␊
813 //␉{ 0x10DE0A3D,␉/*0x00000000,*/␉"NVIDIA N10P-ES" },␊
814 //␉{ 0x10DE0A3F,␉/*0x00000000,*/␉"NVIDIA GT216-INT" },␊
815␉// 0A40 - 0A4F␊
816␉// 0A50 - 0A5F␊
817␉// 0A60 - 0A6F␊
818␉{ 0x10DE0A60,␉/*0x00000000,*/␉"GeForce G210" },␊
819 //␉{ 0x10DE0A61,␉/*0x00000000,*/␉"NVIDIA NVS 2100" },␊
820␉{ 0x10DE0A62,␉/*0x00000000,*/␉"GeForce 205" },␊
821␉{ 0x10DE0A63,␉/*0x00000000,*/␉"GeForce 310" },␊
822␉{ 0x10DE0A64,␉/*0x00000000,*/␉"ION" },␊
823␉{ 0x10DE0A65,␉/*0x00000000,*/␉"GeForce 210" }, // subsystem 10de:0a65:1043:8334␊
824␉{ 0x10DE0A66,␉/*0x00000000,*/␉"GeForce 310" },␊
825␉{ 0x10DE0A67,␉/*0x00000000,*/␉"GeForce 315" },␊
826␉{ 0x10DE0A68,␉/*0x00000000,*/␉"GeForce G105M" },␊
827␉{ 0x10DE0A69,␉/*0x00000000,*/␉"GeForce G105M" },␊
828␉{ 0x10DE0A6A,␉/*0x00000000,*/␉"NVS 2100M" },␊
829␉{ 0x10DE0A6C,␉/*0x00000000,*/␉"NVS 3100M" }, // subsystem 10de:0a6c:1028:040b & 10de:0a6c:17aa:2142␊
830␉{ 0x10DE0A6E,␉/*0x00000000,*/␉"GeForce 305M" },␊
831␉{ 0x10DE0A6F,␉/*0x00000000,*/␉"ION" },␉␊
832␉// 0A70 - 0A7F␊
833␉{ 0x10DE0A70,␉/*0x00000000,*/␉"GeForce 310M" },␊
834␉{ 0x10DE0A71,␉/*0x00000000,*/␉"GeForce 305M" },␊
835␉{ 0x10DE0A72,␉/*0x00000000,*/␉"GeForce 310M" },␊
836␉{ 0x10DE0A73,␉/*0x00000000,*/␉"GeForce 305M" },␊
837␉{ 0x10DE0A74,␉/*0x00000000,*/␉"GeForce G210M" },␊
838␉{ 0x10DE0A75,␉/*0x00000000,*/␉"GeForce G310M" },␊
839␉{ 0x10DE0A76,␉/*0x00000000,*/␉"ION" },␊
840␉{ 0x10DE0A78,␉/*0x00000000,*/␉"Quadro FX 380 LP" },␊
841 //␉{ 0x10DE0A79,␉/*0x00000000,*/␉"Unknown" },␊
842␉{ 0x10DE0A7A,␉/*0x00000000,*/␉"GeForce 315M" },␊
843␉{ 0x10DE0A7C,␉/*0x00000000,*/␉"Quadro FX 380M" },␊
844 //␉{ 0x10DE0A7D,␉/*0x00000000,*/␉"NVIDIA GT218-ES" },␊
845 //␉{ 0x10DE0A7E,␉/*0x00000000,*/␉"NVIDIA GT218-INT-S" },␊
846 //␉{ 0x10DE0A7F,␉/*0x00000000,*/␉"NVIDIA GT218-INT-B" },␊
847␉// 0A80 - 0A8F␊
848␉// 0A90 - 0A9F␊
849␉// 0AA0 - 0AAF␊
850␉// 0AB0 - 0ABF␊
851␉// 0AC0 - 0ACF␊
852␉// 0AD0 - 0ADF␊
853␉// 0AE0 - 0AEF␊
854␉// 0AF0 - 0AFF␊
855␉// 0B00 - 0B0F␊
856␉// 0B10 - 0B1F␊
857␉// 0B20 - 0B2F␊
858␉// 0B30 - 0B3F␊
859␉// 0B40 - 0B4F␊
860␉// 0B50 - 0B5F␊
861␉// 0B60 - 0B6F␊
862␉// 0B70 - 0B7F␊
863␉// 0B80 - 0B8F␊
864␉// 0B90 - 0B9F␊
865␉// 0BA0 - 0BAF␊
866␉// 0BB0 - 0BBF␊
867␉// 0BC0 - 0BCF␊
868␉// 0BD0 - 0BDF␊
869␉// 0BE0 - 0BEF␊
870 //␉{ 0x10DE0BE4,␉/*0x00000000,*/␉"nVidia High Definition Audio Controller" },␊
871 //␉{ 0x10DE0BE9,␉/*0x00000000,*/␉"nVidia High Definition Audio Controller" },␊
872␉// 0BF0 - 0BFF␊
873␉// 0C00 - 0C0F␊
874␉// 0C10 - 0C1F␊
875␉// 0C20 - 0C2F␊
876␉// 0C30 - 0C3F␊
877␉// 0C40 - 0C4F␊
878␉// 0C50 - 0C5F␊
879␉// 0C60 - 0C6F␊
880␉// 0C70 - 0C7F␊
881␉// 0C80 - 0C8F␊
882␉// 0C90 - 0C9F␊
883␉// 0CA0 - 0CAF␊
884␉{ 0x10DE0CA0,␉/*0x00000000,*/␉"GeForce GT 330 " },␊
885␉{ 0x10DE0CA2,␉/*0x00000000,*/␉"GeForce GT 320" },␊
886␉{ 0x10DE0CA3,␉/*0x00000000,*/␉"GeForce GT 240" },␊
887␉{ 0x10DE0CA4,␉/*0x00000000,*/␉"GeForce GT 340" },␊
888␉{ 0x10DE0CA5,␉/*0x00000000,*/␉"GeForce GT 220" },␊
889␉{ 0x10DE0CA7,␉/*0x00000000,*/␉"GeForce GT 330" },␊
890␉{ 0x10DE0CA8,␉/*0x00000000,*/␉"GeForce GTS 260M" },␊
891␉{ 0x10DE0CA9,␉/*0x00000000,*/␉"GeForce GTS 250M" },␊
892␉{ 0x10DE0CAC,␉/*0x00000000,*/␉"GeForce GT 220" },␊
893 //␉{ 0x10DE0CAD,␉/*0x00000000,*/␉"NVIDIA N10E-ES" },␊
894 //␉{ 0x10DE0CAE,␉/*0x00000000,*/␉"NVIDIA GT215-INT" },␊
895␉{ 0x10DE0CAF,␉/*0x00000000,*/␉"GeForce GT 335M" },␊
896␉// 0CB0 - 0CBF␉␊
897␉{ 0x10DE0CB0,␉/*0x00000000,*/␉"GeForce GTS 350M" },␊
898␉{ 0x10DE0CB1,␉/*0x00000000,*/␉"GeForce GTS 360M" },␊
899␉{ 0x10DE0CBC,␉/*0x00000000,*/␉"Quadro FX 1800M" },␊
900␉// 0CC0 - 0CCF␊
901␉// 0CD0 - 0CDF␊
902␉// 0CE0 - 0CEF␊
903␉// 0CF0 - 0CFF␊
904␉// 0D00 - 0D0F␊
905␉// 0D10 - 0D1F␊
906␉// 0D20 - 0D2F␊
907␉// 0D30 - 0D3F␊
908␉// 0D40 - 0D4F␊
909␉// 0D50 - 0D5F␊
910␉// 0D60 - 0D6F␊
911␉// 0D70 - 0D7F␊
912␉// 0D80 - 0D8F␊
913␉// 0D90 - 0D9F␊
914␉// 0DA0 - 0DAF␊
915␉// 0DB0 - 0DBF␊
916␉// 0DC0 - 0DCF␊
917␉{ 0x10DE0DC0,␉/*0x00000000,*/␉"GeForce GT 440" },␊
918␉{ 0x10DE0DC1,␉/*0x00000000,*/␉"D12-P1-35" },␊
919␉{ 0x10DE0DC2,␉/*0x00000000,*/␉"D12-P1-35" },␊
920␉{ 0x10DE0DC4,␉/*0x00000000,*/␉"GeForce GTS 450" },␊
921␉{ 0x10DE0DC5,␉/*0x00000000,*/␉"GeForce GTS 450" },␊
922␉{ 0x10DE0DC6,␉/*0x00000000,*/␉"GeForce GTS 450" },␊
923␉{ 0x10DE0DCA,␉/*0x00000000,*/␉"GF10x" },␊
924 //␉{ 0x10DE0DCC,␉/*0x00000000,*/␉"Unknown" },␊
925␉{ 0x10DE0DCD,␉/*0x00000000,*/␉"GeForce GT 555M" },␊
926␉{ 0x10DE0DCE,␉/*0x00000000,*/␉"GeForce GT 555M" },␊
927 //␉{ 0x10DE0DCF,␉/*0x00000000,*/␉"Unknown" },␊
928␉// 0DD0 - 0DDF␉␊
929 //␉{ 0x10DE0DD0,␉/*0x00000000,*/␉"Unknown" },␊
930␉{ 0x10DE0DD1,␉/*0x00000000,*/␉"GeForce GTX 460M" }, // subsystem 10de:0dd1:1558:8687␊
931␉{ 0x10DE0DD2,␉/*0x00000000,*/␉"GeForce GT 445M" },␊
932␉{ 0x10DE0DD3,␉/*0x00000000,*/␉"GeForce GT 435M" },␊
933␉{ 0x10DE0DD6,␉/*0x00000000,*/␉"GeForce GT 550M" },␊
934␉{ 0x10DE0DD8,␉/*0x00000000,*/␉"Quadro 2000" },␊
935␉{ 0x10DE0DDA,␉/*0x00000000,*/␉"Quadro 2000M" },␊
936␉{ 0x10DE0DDE,␉/*0x00000000,*/␉"GF106-ES" },␊
937␉{ 0x10DE0DDF,␉/*0x00000000,*/␉"GF106-INT" },␊
938␉// 0DE0 - 0DEF␊
939␉{ 0x10DE0DE0,␉/*0x00000000,*/␉"GeForce GT 440" },␊
940␉{ 0x10DE0DE1,␉/*0x00000000,*/␉"GeForce GT 430" }, // subsystem 10de:0de1:3842:1430␊
941␉{ 0x10DE0DE2,␉/*0x00000000,*/␉"GeForce GT 420" },␊
942␉{ 0x10DE0DE4,␉/*0x00000000,*/␉"GeForce GT 520" },␊
943␉{ 0x10DE0DE5,␉/*0x00000000,*/␉"GeForce GT 530" },␊
944␉{ 0x10DE0DE8,␉/*0x00000000,*/␉"GeForce GT 620M" },␊
945␉{ 0x10DE0DE9,␉/*0x00000000,*/␉"GeForce GT 630M" },␊
946␉{ 0x10DE0DEA,␉/*0x00000000,*/␉"GeForce GT 610M" },␊
947␉{ 0x10DE0DEB,␉/*0x00000000,*/␉"GeForce GT 555M" },␊
948␉{ 0x10DE0DEC,␉/*0x00000000,*/␉"GeForce GT 525M" },␊
949␉{ 0x10DE0DED,␉/*0x00000000,*/␉"GeForce GT 520M" },␊
950␉{ 0x10DE0DEE,␉/*0x00000000,*/␉"GeForce GT 415M" },␊
951 //␉{ 0x10DE0DEF,␉/*0x00000000,*/␉"Unknown" },␊
952␉// 0DF0 - 0DFF␉␊
953␉{ 0x10DE0DF0,␉/*0x00000000,*/␉"GeForce GT 425M" },␊
954␉{ 0x10DE0DF1,␉/*0x00000000,*/␉"GeForce GT 420M" },␊
955␉{ 0x10DE0DF2,␉/*0x00000000,*/␉"GeForce GT 435M" },␊
956␉{ 0x10DE0DF3,␉/*0x00000000,*/␉"GeForce GT 420M" },␊
957␉{ 0x10DE0DF4,␉/*0x00000000,*/␉"GeForce GT 540M" },␊
958␉{ 0x10DE0DF5,␉/*0x00000000,*/␉"GeForce GT 525M" },␊
959␉{ 0x10DE0DF6,␉/*0x00000000,*/␉"GeForce GT 550M" },␊
960␉{ 0x10DE0DF7,␉/*0x00000000,*/␉"GeForce GT 520M" },␊
961␉{ 0x10DE0DF8,␉/*0x00000000,*/␉"Quadro 600" },␊
962 //␉{ 0x10DE0DF9,␉/*0x00000000,*/␉"Unknown" },␊
963␉{ 0x10DE0DFA,␉/*0x00000000,*/␉"Quadro 1000M" },␊
964␉{ 0x10DE0DFC,␉/*0x00000000,*/␉"NVS 5200M" },␊
965␉{ 0x10DE0DFE,␉/*0x00000000,*/␉"GF108 ES" },␊
966␉{ 0x10DE0DFF,␉/*0x00000000,*/␉"GF108 INT" },␊
967␉// 0E00 - 0E0F␊
968␉// 0E10 - 0E1F␊
969␉// 0E20 - 0E2F␊
970␉{ 0x10DE0E21,␉/*0x00000000,*/␉"D12U-25" },␊
971␉{ 0x10DE0E22,␉/*0x00000000,*/␉"GeForce GTX 460" }, // subsystem 10de:0e22:1462:2322␊
972␉{ 0x10DE0E23,␉/*0x00000000,*/␉"GeForce GTX 460 SE" },␊
973␉{ 0x10DE0E24,␉/*0x00000000,*/␉"GeForce GTX 460" },␊
974␉{ 0x10DE0E25,␉/*0x00000000,*/␉"D12U-50" },␊
975␉// 0E30 - 0E3F␊
976␉{ 0x10DE0E30,␉/*0x00000000,*/␉"GeForce GTX 470M" },␊
977␉{ 0x10DE0E31,␉/*0x00000000,*/␉"GeForce GTX 485M" },␊
978 //␉{ 0x10DE0E32,␉/*0x00000000,*/␉"Unknown" },␊
979␉{ 0x10DE0E38,␉/*0x00000000,*/␉"GF104GL" },␊
980␉{ 0x10DE0E3A,␉/*0x00000000,*/␉"Quadro 3000M" },␊
981␉{ 0x10DE0E3B,␉/*0x00000000,*/␉"Quadro 4000M" },␊
982␉{ 0x10DE0E3E,␉/*0x00000000,*/␉"GF104-ES" },␊
983␉{ 0x10DE0E3F,␉/*0x00000000,*/␉"GF104-INT" },␊
984␉// 0E40 - 0E4F␊
985␉// 0E50 - 0E5F␊
986␉// 0E60 - 0E6F␊
987␉// 0E70 - 0E7F␊
988␉// 0E80 - 0E8F␊
989␉// 0E90 - 0E9F␊
990␉// 0EA0 - 0EAF␊
991␉// 0EB0 - 0EBF␊
992␉// 0EC0 - 0ECF␊
993␉// 0ED0 - 0EDF␊
994␉// 0EE0 - 0EEF␊
995␉// 0EF0 - 0EFF␊
996␉// 0F00 - 0F0F␊
997␉// 0F10 - 0F1F␊
998␉// 0F20 - 0F2F␊
999␉// 0F30 - 0F3F␊
1000␉// 0F40 - 0F4F␊
1001␉// 0F50 - 0F5F␊
1002␉// 0F60 - 0F6F␊
1003␉// 0F70 - 0F7F␊
1004␉// 0F80 - 0F8F␊
1005␉// 0F90 - 0F9F␊
1006␉// 0FA0 - 0FAF␊
1007␉// 0FB0 - 0FBF␊
1008␉// 0FC0 - 0FCF␊
1009␉// 0FD0 - 0FDF␊
1010␉{ 0x10DE0FD1,␉/*0x00000000,*/␉"GeForce GT 650M" },␊
1011␉{ 0x10DE0FD2,␉/*0x00000000,*/␉"GeForce GT 640M" },␊
1012␉{ 0x10DE0FD4,␉/*0x00000000,*/␉"GeForce GTX 660M" },␊
1013␉// 0FE0 - 0FEF␊
1014␉// 0FF0 - 0FFF␊
1015␉// 1000 - 100F␊
1016␉// 1010 - 101F␊
1017␉// 1020 - 102F␊
1018␉// 1030 - 103F␊
1019␉// 1040 - 104F␊
1020␉{ 0x10DE1040,␉/*0x00000000,*/␉"GeForce GT 520" },␊
1021␉{ 0x10DE1042,␉/*0x00000000,*/␉"GeForce 510" },␊
1022␉{ 0x10DE1049,␉/*0x00000000,*/␉"GeForce GT 620" },␊
1023␉// 1050 - 105F␊
1024␉{ 0x10DE1050,␉/*0x00000000,*/␉"GeForce GT 520M" },␊
1025␉{ 0x10DE1051,␉/*0x00000000,*/␉"GeForce GT 520MX" },␊
1026 //␉{ 0x10DE1052,␉/*0x00000000,*/␉"Unknown" },␊
1027␉{ 0x10DE1054,␉/*0x00000000,*/␉"GeForce GT 410M" },␊
1028␉{ 0x10DE1055,␉/*0x00000000,*/␉"GeForce 410M" },␊
1029␉{ 0x10DE1056,␉/*0x00000000,*/␉"Quadro NVS 4200M" },␊
1030␉{ 0x10DE1057,␉/*0x00000000,*/␉"Quadro NVS 4200M" },␊
1031␉{ 0x10DE1058,␉/*0x00000000,*/␉"GeForce 610M" },␊
1032 //␉{ 0x10DE1059,␉/*0x00000000,*/␉"AUDIO" },␊
1033␉{ 0x10DE105A,␉/*0x00000000,*/␉"GeForce 610M" },␊
1034␉// 1060 - 106F␊
1035␉// 1070 - 107F␊
1036 //␉{ 0x10DE107D,␉/*0x00000000,*/␉"Unknown" },␊
1037 //␉{ 0x10DE107E,␉/*0x00000000,*/␉"Unknown" },␊
1038␉{ 0x10DE107F,␉/*0x00000000,*/␉"NVIDIA GF119-ES" },␊
1039␉// 1080 - 108F␊
1040␉{ 0x10DE1080,␉/*0x00000000,*/␉"GeForce GTX 580" },␊
1041␉{ 0x10DE1081,␉/*0x00000000,*/␉"GeForce GTX 570" }, // subsystem 10de:1081:10de:087e␊
1042␉{ 0x10DE1082,␉/*0x00000000,*/␉"GeForce GTX 560 Ti" },␊
1043␉{ 0x10DE1083,␉/*0x00000000,*/␉"D13U" },␊
1044␉{ 0x10DE1084,␉/*0x00000000,*/␉"GeForce GTX 560" },␊
1045␉{ 0x10DE1086,␉/*0x00000000,*/␉"GeForce GTX 570" },␊
1046␉{ 0x10DE1087,␉/*0x00000000,*/␉"GeForce GTX 560 Ti-448" },␊
1047␉{ 0x10DE1088,␉/*0x00000000,*/␉"GeForce GTX 590" },␊
1048␉{ 0x10DE1089,␉/*0x00000000,*/␉"GeForce GTX 580" },␊
1049␉{ 0x10DE108B,␉/*0x00000000,*/␉"GeForce GTX 590" },␊
1050␉// 1090 - 109F␊
1051␉{ 0x10DE1091,␉/*0x00000000,*/␉"Tesla M2090" },␊
1052␉{ 0x10DE1094,␉/*0x00000000,*/␉"Tesla M2075 Dual-Slot Computing Processor Module" },␊
1053␉{ 0x10DE1096,␉/*0x00000000,*/␉"Tesla C2075" },␊
1054␉{ 0x10DE1098,␉/*0x00000000,*/␉"D13U" },␊
1055␉{ 0x10DE109A,␉/*0x00000000,*/␉"Quadro 5010M" },␊
1056␉{ 0x10DE109B,␉/*0x00000000,*/␉"Quadro 7000" },␊
1057␉// 10A0 - 10AF␊
1058␉// 10B0 - 10BF␊
1059␉// 10C0 - 10CF␊
1060␉{ 0x10DE10C0,␉/*0x00000000,*/␉"GeForce 9300 GS" },␊
1061␉{ 0x10DE10C3,␉/*0x00000000,*/␉"GeForce 8400 GS" },␊
1062 //␉{ 0x10DE10C4,␉/*0x00000000,*/␉"NVIDIA ION" },␊
1063␉{ 0x10DE10C5,␉/*0x00000000,*/␉"GeForce 405" },␊
1064␉// 10D0 - 10DF␊
1065␉{ 0x10DE10D8,␉/*0x00000000,*/␉"NVS 300" },␊
1066␉// 10E0 - 10EF␊
1067␉// 10F0 - 10FF␊
1068␉// 1100 - 110F␊
1069␉// 1110 - 111F␊
1070␉// 1120 - 112F␊
1071␉// 1130 - 113F␊
1072␉// 1140 - 114F␊
1073␉// 1150 - 115F␊
1074␉// 1160 - 116F␊
1075␉// 1170 - 117F␊
1076␉// 1180 - 118F␊
1077␉{ 0x10DE1180,␉/*0x00000000,*/␉"GeForce GTX 680" },␊
1078␉// 1190 - 119F␊
1079␉// 11A0 - 11AF␊
1080␉// 11B0 - 11BF␊
1081␉// 11C0 - 11CF␊
1082␉// 11D0 - 11DF␊
1083␉// 11E0 - 11EF␊
1084␉// 11F0 - 11FF␊
1085␉// 1200 - 120F␊
1086␉{ 0x10DE1200,␉/*0x00000000,*/␉"GeForce GTX 560 Ti" },␊
1087␉{ 0x10DE1201,␉/*0x00000000,*/␉"GeForce GTX 560" },␊
1088␉{ 0x10DE1203,␉/*0x00000000,*/␉"GeForce GTX 460 SE v2" },␊
1089␉{ 0x10DE1205,␉/*0x00000000,*/␉"GeForce GTX 460 v2" },␊
1090␉{ 0x10DE1208,␉/*0x00000000,*/␉"GeForce GTX 560 SE" },␊
1091␉{ 0x10DE1210,␉/*0x00000000,*/␉"GeForce GTX 570M" },␊
1092␉{ 0x10DE1211,␉/*0x00000000,*/␉"GeForce GTX 580M" },␊
1093␉{ 0x10DE1212,␉/*0x00000000,*/␉"GeForce GTX 675M" },␊
1094␉{ 0x10DE1213,␉/*0x00000000,*/␉"GeForce GTX 670M" },␊
1095␉{ 0x10DE1240,␉/*0x00000000,*/␉"GeForce GT 620M" },␊
1096␉{ 0x10DE1241,␉/*0x00000000,*/␉"GeForce GT 545" },␊
1097␉{ 0x10DE1243,␉/*0x00000000,*/␉"GeForce GT 545" },␊
1098␉{ 0x10DE1244,␉/*0x00000000,*/␉"GeForce GTX 550 Ti" },␊
1099␉{ 0x10DE1245,␉/*0x00000000,*/␉"GeForce GTS 450" },␊
1100␉{ 0x10DE1246,␉/*0x00000000,*/␉"GeForce GTX 550M" },␊
1101␉{ 0x10DE1247,␉/*0x00000000,*/␉"GeForce GT 635M" }, // Subsystem Id: 1043 212C Asus GeForce GT 635M␊
1102␉{ 0x10DE1248,␉/*0x00000000,*/␉"GeForce GTX 555M" },␊
1103␉{ 0x10DE124D,␉/*0x00000000,*/␉"GeForce GTX 555M" },␊
1104 //␉{ 0x10DE1250,␉/*0x00000000,*/␉"Unknown" },␊
1105␉{ 0x10DE1251,␉/*0x00000000,*/␉"GeForce GTX 560M" },␊
1106␉// 1260 - 126F␊
1107␉// 1270 - 127F␊
1108␉// 1280 - 128F␊
1109␉// 1290 - 129F␊
1110␉// 12A0 - 12AF␊
1111␉// 12B0 - 12BF␊
1112␉// 12C0 - 12CF␊
1113␉// 12D0 - 12DF␊
1114␉// 12E0 - 12EF␊
1115␉// 12F0 - 12FF␊
1116 //␉{ 0x10DE8001,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
1117 //␉{ 0x10DE8067,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
1118 //␉{ 0x10DE8073,␉/*0x00000000,*/␉"NVIDIA HDMI Audio" },␊
1119};␊
1120␊
1121static uint16_t swap16(uint16_t x)␊
1122{␊
1123␉return (((x & 0x00FF) << 8) | ((x & 0xFF00) >> 8));␊
1124}␊
1125␊
1126static uint16_t read16(uint8_t *ptr, uint16_t offset)␊
1127{␊
1128␉uint8_t ret[2];␊
1129␊
1130␉ret[0] = ptr[offset+1];␊
1131␉ret[1] = ptr[offset];␊
1132␊
1133␉return *((uint16_t*)&ret);␊
1134}␊
1135␊
1136#if 0␊
1137static uint32_t swap32(uint32_t x)␊
1138{␊
1139␉return ((x & 0x000000FF) << 24) | ((x & 0x0000FF00) << 8 ) | ((x & 0x00FF0000) >> 8 ) | ((x & 0xFF000000) >> 24);␊
1140}␊
1141␊
1142static uint8_t␉read8(uint8_t *ptr, uint16_t offset)␊
1143{ ␊
1144␉return ptr[offset];␊
1145}␊
1146␊
1147static uint32_t read32(uint8_t *ptr, uint16_t offset)␊
1148{␊
1149␉uint8_t ret[4];␊
1150␊
1151␉ret[0] = ptr[offset+3];␊
1152␉ret[1] = ptr[offset+2];␊
1153␉ret[2] = ptr[offset+1];␊
1154␉ret[3] = ptr[offset];␊
1155␊
1156␉return *((uint32_t*)&ret);␊
1157}␊
1158#endif␊
1159␊
1160static int patch_nvidia_rom(uint8_t *rom)␊
1161{␊
1162␉if (!rom || (rom[0] != 0x55 && rom[1] != 0xaa)) {␊
1163␉␉printf("False ROM signature: 0x%02x%02x\n", rom[0], rom[1]);␊
1164␉␉return PATCH_ROM_FAILED;␊
1165␉}␊
1166␉␊
1167␉uint16_t dcbptr = swap16(read16(rom, 0x36));␊
1168␊
1169␉if (!dcbptr) {␊
1170␉␉printf("no dcb table found\n");␊
1171␉␉return PATCH_ROM_FAILED;␊
1172␉}␊
1173//␉else␊
1174//␉␉printf("dcb table at offset 0x%04x\n", dcbptr);␊
1175␉ ␊
1176␉uint8_t *dcbtable␉␉ = &rom[dcbptr];␊
1177␉uint8_t dcbtable_version = dcbtable[0];␊
1178␉uint8_t headerlength␉ = 0;␊
1179␉uint8_t numentries␉␉ = 0;␊
1180␉uint8_t recordlength␉ = 0;␊
1181␉␊
1182␉if (dcbtable_version >= 0x20)␊
1183␉{␊
1184␉␉uint32_t sig;␊
1185␉␉␊
1186␉␉if (dcbtable_version >= 0x30)␊
1187␉␉{␊
1188␉␉␉headerlength = dcbtable[1];␊
1189␉␉␉numentries␉ = dcbtable[2];␊
1190␉␉␉recordlength = dcbtable[3];␊
1191␊
1192␉␉␉sig = *(uint32_t *)&dcbtable[6];␊
1193␉␉}␊
1194␉␉else␊
1195␉␉{␊
1196␉␉␉sig = *(uint32_t *)&dcbtable[4];␊
1197␉␉␉headerlength = 8;␊
1198␉␉}␊
1199␉␉␊
1200␉␉if (sig != 0x4edcbdcb)␊
1201␉␉{␊
1202␉␉␉printf("Bad display config block signature (0x%8x)\n", sig); //Azi: issue #48␊
1203␉␉␉return PATCH_ROM_FAILED;␊
1204␉␉}␊
1205␉}␊
1206␉else if (dcbtable_version >= 0x14) /* some NV15/16, and NV11+ */␊
1207␉{␊
1208␉␉char sig[8] = { 0 };␊
1209␉␉␊
1210␉␉strncpy(sig, (char *)&dcbtable[-7], 7);␊
1211␉␉recordlength = 10;␊
1212␉␉␊
1213␉␉if (strcmp(sig, "DEV_REC"))␊
1214␉␉{␊
1215␉␉␉printf("Bad Display Configuration Block signature (%s)\n", sig);␊
1216␉␉␉return PATCH_ROM_FAILED;␊
1217␉␉}␊
1218␉}␊
1219␉else␊
1220␉{␊
1221␉␉printf("ERROR: dcbtable_version is 0x%X\n", dcbtable_version);␊
1222␉␉return PATCH_ROM_FAILED;␊
1223␉}␊
1224␉␊
1225␉if (numentries >= MAX_NUM_DCB_ENTRIES)␊
1226␉␉numentries = MAX_NUM_DCB_ENTRIES;␊
1227␉␊
1228␉uint8_t num_outputs = 0, i = 0;␊
1229␉␊
1230␉struct dcbentry␊
1231␉{␊
1232␉␉uint8_t type;␊
1233␉␉uint8_t index;␊
1234␉␉uint8_t *heads;␊
1235␉} entries[numentries];␊
1236␉␊
1237␉for (i = 0; i < numentries; i++)␊
1238␉{␊
1239␉␉uint32_t connection;␊
1240␉␉connection = *(uint32_t *)&dcbtable[headerlength + recordlength * i];␊
1241␊
1242␉␉/* Should we allow discontinuous DCBs? Certainly DCB I2C tables can be discontinuous */␊
1243␉␉if ((connection & 0x0000000f) == 0x0000000f) /* end of records */ ␊
1244␉␉␉continue;␊
1245␉␉if (connection == 0x00000000) /* seen on an NV11 with DCB v1.5 */ ␊
1246␉␉␉continue;␊
1247␉␉if ((connection & 0xf) == 0x6) /* we skip type 6 as it doesnt appear on macbook nvcaps */␊
1248␉␉␉continue;␊
1249␉␉␊
1250␉␉entries[num_outputs].type = connection & 0xf;␊
1251␉␉entries[num_outputs].index = num_outputs;␊
1252␉␉entries[num_outputs++].heads = (uint8_t*)&(dcbtable[(headerlength + recordlength * i) + 1]);␊
1253␉}␊
1254␉␊
1255␉int has_lvds = false;␊
1256␉uint8_t channel1 = 0, channel2 = 0;␊
1257␉␊
1258␉for (i = 0; i < num_outputs; i++)␊
1259␉{␊
1260␉␉if (entries[i].type == 3)␊
1261␉␉{␊
1262␉␉␉has_lvds = true;␊
1263␉␉␉//printf("found LVDS\n");␊
1264␉␉␉channel1 |= ( 0x1 << entries[i].index);␊
1265␉␉␉entries[i].type = TYPE_GROUPED;␊
1266␉␉}␊
1267␉}␊
1268␉␊
1269␉// if we have a LVDS output, we group the rest to the second channel␊
1270␉if (has_lvds)␊
1271␉{␊
1272␉␉for (i = 0; i < num_outputs; i++)␊
1273␉␉{␊
1274␉␉␉if (entries[i].type == TYPE_GROUPED)␊
1275␉␉␉␉continue;␊
1276␉␉␉␊
1277␉␉␉channel2 |= ( 0x1 << entries[i].index);␊
1278␉␉␉entries[i].type = TYPE_GROUPED;␊
1279␉␉}␊
1280␉}␊
1281␉else␊
1282␉{␊
1283␉␉int x;␊
1284␉␉// we loop twice as we need to generate two channels␊
1285␉␉for (x = 0; x <= 1; x++)␊
1286␉␉{␊
1287␉␉␉for (i=0; i<num_outputs; i++)␊
1288␉␉␉{␊
1289␉␉␉␉if (entries[i].type == TYPE_GROUPED)␊
1290␉␉␉␉␉continue;␊
1291␉␉␉␉// if type is TMDS, the prior output is ANALOG␊
1292␉␉␉␉// we always group ANALOG and TMDS␊
1293␉␉␉␉// if there is a TV output after TMDS, we group it to that channel as well␊
1294␉␉␉␉if (i && entries[i].type == 0x2)␊
1295␉␉␉␉{␊
1296␉␉␉␉␉switch (x)␊
1297␉␉␉␉␉{␊
1298␉␉␉␉␉␉case 0:␊
1299␉␉␉␉␉␉␉//printf("group channel 1\n");␊
1300␉␉␉␉␉␉␉channel1 |= ( 0x1 << entries[i].index);␊
1301␉␉␉␉␉␉␉entries[i].type = TYPE_GROUPED;␊
1302␉␉␉␉␉␉␉␊
1303␉␉␉␉␉␉␉if ((entries[i-1].type == 0x0))␊
1304␉␉␉␉␉␉␉{␊
1305␉␉␉␉␉␉␉␉channel1 |= ( 0x1 << entries[i-1].index);␊
1306␉␉␉␉␉␉␉␉entries[i-1].type = TYPE_GROUPED;␊
1307␉␉␉␉␉␉␉}␊
1308␉␉␉␉␉␉␉// group TV as well if there is one␊
1309␉␉␉␉␉␉␉if ( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) )␊
1310␉␉␉␉␉␉␉{␊
1311␉␉␉␉␉␉␉␉//␉printf("group tv1\n");␊
1312␉␉␉␉␉␉␉␉channel1 |= ( 0x1 << entries[i+1].index);␊
1313␉␉␉␉␉␉␉␉entries[i+1].type = TYPE_GROUPED;␊
1314␉␉␉␉␉␉␉}␊
1315␉␉␉␉␉␉␉break;␊
1316␉␉␉␉␉␉␊
1317␉␉␉␉␉␉case 1:␊
1318␉␉␉␉␉␉␉//printf("group channel 2 : %d\n", i);␊
1319␉␉␉␉␉␉␉channel2 |= ( 0x1 << entries[i].index);␊
1320␉␉␉␉␉␉␉entries[i].type = TYPE_GROUPED;␊
1321␉␉␉␉␉␉␉␊
1322␉␉␉␉␉␉␉if ((entries[i - 1].type == 0x0))␊
1323␉␉␉␉␉␉␉{␊
1324␉␉␉␉␉␉␉␉channel2 |= ( 0x1 << entries[i-1].index);␊
1325␉␉␉␉␉␉␉␉entries[i-1].type = TYPE_GROUPED;␊
1326␉␉␉␉␉␉␉}␊
1327␉␉␉␉␉␉␉// group TV as well if there is one␊
1328␉␉␉␉␉␉␉if ( ((i+1) < num_outputs) && (entries[i+1].type == 0x1) )␊
1329␉␉␉␉␉␉␉{␊
1330␉␉␉␉␉␉␉␉//␉printf("group tv2\n");␊
1331␉␉␉␉␉␉␉␉channel2 |= ( 0x1 << entries[i+1].index);␊
1332␉␉␉␉␉␉␉␉entries[i+1].type = TYPE_GROUPED;␊
1333␉␉␉␉␉␉␉}␊
1334␉␉␉␉␉␉␉break;␊
1335␉␉␉␉␉}␊
1336␉␉␉␉␉break;␊
1337␉␉␉␉}␊
1338␉␉␉}␊
1339␉␉}␊
1340␉}␊
1341␉␊
1342␉// if we have left ungrouped outputs merge them to the empty channel␊
1343␉uint8_t *togroup;// = (channel1 ? (channel2 ? NULL : &channel2) : &channel1);␊
1344␉togroup = &channel2;␊
1345␉␊
1346␉for (i = 0; i < num_outputs; i++)␊
1347␉{␊
1348␉␉if (entries[i].type != TYPE_GROUPED)␊
1349␉␉{␊
1350␉␉␉//printf("%d not grouped\n", i);␊
1351␉␉␉if (togroup)␊
1352␉␉␉{␊
1353␉␉␉␉*togroup |= ( 0x1 << entries[i].index);␊
1354␉␉␉}␊
1355␉␉␉entries[i].type = TYPE_GROUPED;␊
1356␉␉}␊
1357␉}␊
1358␉␊
1359␉if (channel1 > channel2)␊
1360␉{␊
1361␉␉uint8_t buff = channel1;␊
1362␉␉channel1 = channel2;␊
1363␉␉channel2 = buff;␊
1364␉}␊
1365␉␊
1366␉default_NVCAP[6] = channel1;␊
1367␉default_NVCAP[8] = channel2;␊
1368␉␊
1369␉// patching HEADS␊
1370␉for (i = 0; i < num_outputs; i++)␊
1371␉{␊
1372␉␉if (channel1 & (1 << i))␊
1373␉␉{␊
1374␉␉␉*entries[i].heads = 1;␊
1375␉␉}␊
1376␉␉else if(channel2 & (1 << i))␊
1377␉␉{␊
1378␉␉␉*entries[i].heads = 2;␊
1379␉␉}␊
1380␉}␊
1381␉return (has_lvds ? PATCH_ROM_SUCCESS_HAS_LVDS : PATCH_ROM_SUCCESS);␊
1382}␊
1383␊
1384static char *get_nvidia_model(uint32_t id)␊
1385{␊
1386␉int i;␊
1387␉␊
1388␉for (i = 1; i < (sizeof(NVKnownChipsets) / sizeof(NVKnownChipsets[0])); i++) {␊
1389␉␉if (NVKnownChipsets[i].device == id)␊
1390␉␉{␊
1391␉␉␉return NVKnownChipsets[i].name;␊
1392␉␉}␊
1393␉}␊
1394␉return NVKnownChipsets[0].name;␊
1395}␊
1396␊
1397static uint32_t load_nvidia_bios_file(const char *filename, uint8_t *buf, int bufsize)␊
1398{␊
1399␉int fd;␊
1400␉int size;␊
1401␉␊
1402␉if ((fd = open_bvdev("bt(0,0)", filename, 0)) < 0)␊
1403␉{␊
1404␉␉return 0;␊
1405␉}␊
1406␉␊
1407␉size = file_size(fd);␊
1408␉␊
1409␉if (size > bufsize)␊
1410␉{␊
1411␉␉printf("Filesize of %s is bigger than expected! Truncating to 0x%x Bytes!\n",␊
1412␉␉␉␉filename, bufsize);␊
1413␉␉size = bufsize;␊
1414␉}␊
1415␉size = read(fd, (char *)buf, size);␊
1416␉close(fd);␊
1417␉␊
1418␉return size > 0 ? size : 0;␊
1419}␊
1420␊
1421static int devprop_add_nvidia_template(struct DevPropDevice *device)␊
1422{␊
1423␉char tmp[16];␊
1424␉␊
1425␉if (!device)␊
1426␉␉return 0;␊
1427␉␊
1428␉if (!DP_ADD_TEMP_VAL(device, nvidia_compatible_0))␊
1429␉␉return 0;␊
1430␉if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_0))␊
1431␉␉return 0;␊
1432␉if (!DP_ADD_TEMP_VAL(device, nvidia_name_0))␊
1433␉␉return 0;␊
1434␉if (!DP_ADD_TEMP_VAL(device, nvidia_compatible_1))␊
1435␉␉return 0;␊
1436␉if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_1))␊
1437␉␉return 0;␊
1438␉if (!DP_ADD_TEMP_VAL(device, nvidia_name_1))␊
1439␉␉return 0;␊
1440␉if (devices_number == 1)␊
1441␉{␊
1442␉ if (!DP_ADD_TEMP_VAL(device, nvidia_device_type))␊
1443␉␉ return 0;␊
1444␉}␊
1445␉else␊
1446␉{␊
1447␉ if (!DP_ADD_TEMP_VAL(device, nvidia_device_type_child))␊
1448␉␉ return 0;␊
1449␉}␊
1450␉␊
1451␉// Rek : Dont use sprintf return, it does not WORK !! our custom sprintf() always return 0!␊
1452␉// len = sprintf(tmp, "Slot-%x", devices_number);␊
1453␉sprintf(tmp, "Slot-%x",devices_number);␊
1454␉devprop_add_value(device, "AAPL,slot-name", (uint8_t *) tmp, strlen(tmp));␊
1455␉devices_number++;␊
1456␉␊
1457␉return 1;␊
1458}␊
1459␊
1460int hex2bin(const char *hex, uint8_t *bin, int len)␊
1461{␊
1462␉char␉*p;␊
1463␉int␉␉i;␊
1464␉char␉buf[3];␊
1465␉␊
1466␉if (hex == NULL || bin == NULL || len <= 0 || strlen(hex) != len * 2) {␊
1467␉␉printf("[ERROR] bin2hex input error\n");␊
1468␉␉return -1;␊
1469␉}␊
1470␉␊
1471␉buf[2] = '\0';␊
1472␉p = (char *) hex;␊
1473␉␊
1474␉for (i = 0; i < len; i++)␊
1475␉{␊
1476␉␉if (p[0] == '\0' || p[1] == '\0' || !isxdigit(p[0]) || !isxdigit(p[1])) {␊
1477␉␉␉printf("[ERROR] bin2hex '%s' syntax error\n", hex);␊
1478␉␉␉return -2;␊
1479␉␉}␊
1480␉␉buf[0] = *p++;␊
1481␉␉buf[1] = *p++;␊
1482␉␉bin[i] = (unsigned char) strtoul(buf, NULL, 16);␊
1483␉}␊
1484␉return 0;␊
1485}␊
1486␊
1487unsigned long long mem_detect(volatile uint8_t *regs, uint8_t nvCardType, pci_dt_t *nvda_dev)␊
1488{␊
1489␉unsigned long long vram_size = 0;␊
1490␉␊
1491␉if (nvCardType < NV_ARCH_50)␊
1492␉{␊
1493␉␉vram_size = REG32(NV04_PFB_FIFO_DATA);␊
1494␉␉vram_size &= NV10_PFB_FIFO_DATA_RAM_AMOUNT_MB_MASK;␊
1495␉}␊
1496␉else if (nvCardType < NV_ARCH_C0)␊
1497␉{␊
1498␉␉vram_size = REG32(NV04_PFB_FIFO_DATA);␊
1499␉␉vram_size |= (vram_size & 0xff) << 32;␊
1500␉␉vram_size &= 0xffffffff00ll;␊
1501␉}␊
1502␉else // >= NV_ARCH_C0␊
1503␉{␊
1504␉␉vram_size = REG32(NVC0_MEM_CTRLR_RAM_AMOUNT) << 20;␊
1505␉␉vram_size *= REG32(NVC0_MEM_CTRLR_COUNT);␊
1506␉}␊
1507␉␊
1508␉// Workaround for 9600M GT, GT 210/420/430/440/525M/540M & GTX 560M␊
1509␉switch (nvda_dev->device_id)␊
1510␉{␊
1511␉␉case 0x0647: vram_size = 512*1024*1024; break;␉// 9600M GT 0647␊
1512␉␉case 0x0649: vram_size = 512*1024*1024; break;␉// 9600M GT 0649␊
1513␉␉case 0x0A65: vram_size = 1024*1024*1024; break; // GT 210␊
1514␉␉case 0x0DE0: vram_size = 1024*1024*1024; break; // GT 440␊
1515␉␉case 0x0DE1: vram_size = 1024*1024*1024; break; // GT 430␊
1516␉␉case 0x0DE2: vram_size = 1024*1024*1024; break; // GT 420␊
1517␉␉case 0x0DEC: vram_size = 1024*1024*1024; break; // GT 525M 0DEC␊
1518␉␉case 0x0DF4: vram_size = 1024*1024*1024; break; // GT 540M␊
1519␉␉case 0x0DF5: vram_size = 1024*1024*1024; break; // GT 525M 0DF5␊
1520␉␉case 0x1251: vram_size = 1536*1024*1024; break; // GTX 560M␊
1521␉␉default: break;␊
1522␉}␊
1523␉␊
1524␉return vram_size;␊
1525}␊
1526␊
1527bool setup_nvidia_devprop(pci_dt_t *nvda_dev)␊
1528{␊
1529␉struct DevPropDevice␉*device;␊
1530␉char␉␉␉␉␉*devicepath;␊
1531␉option_rom_pci_header_t *rom_pci_header;␊
1532␉volatile uint8_t␉␉*regs;␊
1533␉uint8_t␉␉␉␉␉*rom;␊
1534␉uint8_t␉␉␉␉␉*nvRom;␊
1535␉uint8_t␉␉␉␉␉nvCardType;␊
1536␉unsigned long long␉␉videoRam;␊
1537␉uint32_t␉␉␉␉nvBiosOveride;␊
1538␉uint32_t␉␉␉␉bar[7];␊
1539␉uint32_t␉␉␉␉boot_display;␊
1540␉int␉␉␉␉␉␉nvPatch;␊
1541␉int␉␉␉␉␉␉len;␊
1542␉char␉␉␉␉␉biosVersion[32];␊
1543␉char␉␉␉␉␉nvFilename[32];␊
1544␉char␉␉␉␉␉kNVCAP[12];␊
1545␉char␉␉␉␉␉*model;␊
1546␉const char␉␉␉␉*value;␊
1547␉bool␉␉␉␉␉doit;␊
1548␉␊
1549␉devicepath = get_pci_dev_path(nvda_dev);␊
1550␉bar[0] = pci_config_read32(nvda_dev->dev.addr, 0x10 );␊
1551␉regs = (uint8_t *) (bar[0] & ~0x0f);␊
1552␉␊
1553␉// get card type␊
1554␉nvCardType = (REG32(0) >> 20) & 0x1ff;␊
1555␉␊
1556␉// Amount of VRAM in kilobytes␊
1557␉videoRam = mem_detect(regs, nvCardType, nvda_dev);␊
1558␉model = get_nvidia_model((nvda_dev->vendor_id << 16) | nvda_dev->device_id);␊
1559␉␊
1560␉verbose("nVidia %s %dMB NV%02x [%04x:%04x] :: %s\n",␊
1561␉␉␉model, (uint32_t)(videoRam / 1024 / 1024),␊
1562␉␉␉(REG32(0) >> 20) & 0x1ff, nvda_dev->vendor_id, nvda_dev->device_id,␊
1563␉␉␉devicepath);␊
1564␉␊
1565␉rom = malloc(NVIDIA_ROM_SIZE);␊
1566␉sprintf(nvFilename, "/Extra/%04x_%04x.rom", (uint16_t)nvda_dev->vendor_id,␊
1567␉␉␉(uint16_t)nvda_dev->device_id);␊
1568␉␊
1569␉if (getBoolForKey(kUseNvidiaROM, &doit, &bootInfo->chameleonConfig) && doit)␊
1570␉{␊
1571␉␉verbose("Looking for nvidia video bios file %s\n", nvFilename);␊
1572␉␉nvBiosOveride = load_nvidia_bios_file(nvFilename, rom, NVIDIA_ROM_SIZE);␊
1573␉␉␊
1574␉␉if (nvBiosOveride > 0)␊
1575␉␉{␊
1576␉␉␉verbose("Using nVidia Video BIOS File %s (%d Bytes)\n", nvFilename, nvBiosOveride);␊
1577␉␉␉DBG("%s Signature 0x%02x%02x %d bytes\n", nvFilename, rom[0], rom[1], nvBiosOveride);␊
1578␉␉}␊
1579␉␉else␊
1580␉␉{␊
1581␉␉␉printf("ERROR: unable to open nVidia Video BIOS File %s\n", nvFilename);␊
1582␉␉␉return false;␊
1583␉␉}␊
1584␉}␊
1585␉else␊
1586␉{␊
1587␉␉// Otherwise read bios from card␊
1588␉␉nvBiosOveride = 0;␊
1589␉␉␊
1590␉␉// TODO: we should really check for the signature before copying the rom, i think.␊
1591␉␉␊
1592␉␉// PRAMIN first␊
1593␉␉nvRom = (uint8_t*)&regs[NV_PRAMIN_OFFSET];␊
1594␉␉bcopy((uint32_t *)nvRom, rom, NVIDIA_ROM_SIZE);␊
1595␉␉␊
1596␉␉// Valid Signature ?␊
1597␉␉if (rom[0] != 0x55 && rom[1] != 0xaa)␊
1598␉␉{␊
1599␉␉␉// PROM next␊
1600␉␉␉// Enable PROM access␊
1601␉␉␉(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED;␊
1602␉␉␉␊
1603␉␉␉nvRom = (uint8_t*)&regs[NV_PROM_OFFSET];␊
1604␉␉␉bcopy((uint8_t *)nvRom, rom, NVIDIA_ROM_SIZE);␊
1605␉␉␉␊
1606␉␉␉// disable PROM access␊
1607␉␉␉(REG32(NV_PBUS_PCI_NV_20)) = NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED;␊
1608␉␉␉␊
1609␉␉␉// Valid Signature ?␊
1610␉␉␉if (rom[0] != 0x55 && rom[1] != 0xaa)␊
1611␉␉␉{␊
1612␉␉␉␉// 0xC0000 last␊
1613␉␉␉␉bcopy((char *)0xc0000, rom, NVIDIA_ROM_SIZE);␊
1614␉␉␉␉␊
1615␉␉␉␉// Valid Signature ?␊
1616␉␉␉␉if (rom[0] != 0x55 && rom[1] != 0xaa)␊
1617␉␉␉␉{␊
1618␉␉␉␉␉printf("ERROR: Unable to locate nVidia Video BIOS\n");␊
1619␉␉␉␉␉return false;␊
1620␉␉␉␉}␊
1621␉␉␉␉else␊
1622␉␉␉␉{␊
1623␉␉␉␉␉DBG("ROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
1624␉␉␉␉}␊
1625␉␉␉}␊
1626␉␉␉else␊
1627␉␉␉{␊
1628␉␉␉␉DBG("PROM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
1629␉␉␉}␊
1630␉␉}␊
1631␉␉else␊
1632␉␉{␊
1633␉␉␉DBG("PRAM Address 0x%x Signature 0x%02x%02x\n", nvRom, rom[0], rom[1]);␊
1634␉␉}␊
1635␉}␊
1636␉␊
1637␉if ((nvPatch = patch_nvidia_rom(rom)) == PATCH_ROM_FAILED) {␊
1638␉␉printf("ERROR: nVidia ROM Patching Failed!\n");␊
1639␉␉//return false;␊
1640␉}␊
1641␉␊
1642␉rom_pci_header = (option_rom_pci_header_t*)(rom + *(uint16_t *)&rom[24]);␊
1643␉␊
1644␉// check for 'PCIR' sig␊
1645␉if (rom_pci_header->signature == 0x50434952)␊
1646␉{␊
1647␉␉if (rom_pci_header->device_id != nvda_dev->device_id)␊
1648␉␉{␊
1649␉␉␉// Get Model from the OpROM␊
1650␉␉␉model = get_nvidia_model((rom_pci_header->vendor_id << 16) | rom_pci_header->device_id);␊
1651␉␉}␊
1652␉␉else␊
1653␉␉{␊
1654␉␉␉printf("nVidia incorrect PCI ROM signature: 0x%x\n", rom_pci_header->signature);␊
1655␉␉}␊
1656␉}␊
1657␉␊
1658␉if (!string) {␊
1659␉␉string = devprop_create_string();␊
1660␉}␊
1661␉device = devprop_add_device(string, devicepath);␊
1662␉␊
1663␉/* FIXME: for primary graphics card only */␊
1664␉boot_display = 1;␊
1665␉if (devices_number == 1)␊
1666␉{␊
1667␉ devprop_add_value(device, "@0,AAPL,boot-display", (uint8_t*)&boot_display, 4);␊
1668␉}␊
1669␉␊
1670␉if (nvPatch == PATCH_ROM_SUCCESS_HAS_LVDS) {␊
1671␉␉uint8_t built_in = 0x01;␊
1672␉␉devprop_add_value(device, "@0,built-in", &built_in, 1);␊
1673␉}␊
1674␊
1675␉// get bios version␊
1676␉const int MAX_BIOS_VERSION_LENGTH = 32;␊
1677␉char* version_str = (char*)malloc(MAX_BIOS_VERSION_LENGTH);␊
1678␉␊
1679␉memset(version_str, 0, MAX_BIOS_VERSION_LENGTH);␊
1680␉␊
1681␉int i, version_start;␊
1682␉int crlf_count = 0;␊
1683␉␊
1684␉// only search the first 384 bytes␊
1685␉for (i = 0; i < 0x180; i++)␊
1686␉{␊
1687␉␉if (rom[i] == 0x0D && rom[i+1] == 0x0A)␊
1688␉␉{␊
1689␉␉␉crlf_count++;␊
1690␉␉␉// second 0x0D0A was found, extract bios version␊
1691␉␉␉if (crlf_count == 2)␊
1692␉␉␉{␊
1693␉␉␉␉if (rom[i-1] == 0x20) i--; // strip last " "␊
1694␉␉␉␉␊
1695␉␉␉␉for (version_start = i; version_start > (i-MAX_BIOS_VERSION_LENGTH); version_start--)␊
1696␉␉␉␉{␊
1697␉␉␉␉␉// find start␊
1698␉␉␉␉␉if (rom[version_start] == 0x00)␊
1699␉␉␉␉␉{␊
1700␉␉␉␉␉␉version_start++;␊
1701␉␉␉␉␉␉␊
1702␉␉␉␉␉␉// strip "Version "␊
1703␉␉␉␉␉␉if (strncmp((const char*)rom+version_start, "Version ", 8) == 0)␊
1704␉␉␉␉␉␉{␊
1705␉␉␉␉␉␉␉version_start += 8;␊
1706␉␉␉␉␉␉}␊
1707␉␉␉␉␉␉␊
1708␉␉␉␉␉␉strncpy(version_str, (const char*)rom+version_start, i-version_start);␊
1709␉␉␉␉␉␉break;␊
1710␉␉␉␉␉}␊
1711␉␉␉␉}␊
1712␉␉␉␉break;␊
1713␉␉␉}␊
1714␉␉}␊
1715␉}␊
1716␉␊
1717␉sprintf(biosVersion, "%s", (nvBiosOveride > 0) ? nvFilename : version_str);␊
1718␉sprintf(kNVCAP, "NVCAP_%04x", nvda_dev->device_id);␊
1719␉␊
1720␉if (getValueForKey(kNVCAP, &value, &len, &bootInfo->chameleonConfig) && len == NVCAP_LEN * 2)␊
1721␉{␊
1722␉␉uint8_t new_NVCAP[NVCAP_LEN];␊
1723␉␉␊
1724␉␉if (hex2bin(value, new_NVCAP, NVCAP_LEN) == 0)␊
1725␉␉{␊
1726␉␉␉verbose("Using user supplied NVCAP for %s :: %s\n", model, devicepath);␊
1727␉␉␉memcpy(default_NVCAP, new_NVCAP, NVCAP_LEN);␊
1728␉␉}␊
1729␉}␊
1730␉␊
1731␉if (getValueForKey(kDcfg0, &value, &len, &bootInfo->chameleonConfig) && len == DCFG0_LEN * 2)␊
1732␉{␊
1733␉␉uint8_t new_dcfg0[DCFG0_LEN];␊
1734␉␉␊
1735␉␉if (hex2bin(value, new_dcfg0, DCFG0_LEN) == 0)␊
1736␉␉{␊
1737␉␉␉memcpy(default_dcfg_0, new_dcfg0, DCFG0_LEN);␊
1738␉␉␉␊
1739␉␉␉verbose("Using user supplied @0,display-cfg\n");␊
1740␉␉␉printf("@0,display-cfg: %02x%02x%02x%02x\n",␊
1741␉␉␉␉ default_dcfg_0[0], default_dcfg_0[1], default_dcfg_0[2], default_dcfg_0[3]);␊
1742␉␉}␊
1743␉}␊
1744␉␊
1745␉if (getValueForKey(kDcfg1, &value, &len, &bootInfo->chameleonConfig) && len == DCFG1_LEN * 2)␊
1746␉{␊
1747␉␉uint8_t new_dcfg1[DCFG1_LEN];␊
1748␉␉␊
1749␉␉if (hex2bin(value, new_dcfg1, DCFG1_LEN) == 0)␊
1750␉␉{␊
1751␉␉␉memcpy(default_dcfg_1, new_dcfg1, DCFG1_LEN);␊
1752␉␉␉␊
1753␉␉␉verbose("Using user supplied @1,display-cfg\n");␊
1754␉␉␉printf("@1,display-cfg: %02x%02x%02x%02x\n",␊
1755␉␉␉␉ default_dcfg_1[0], default_dcfg_1[1], default_dcfg_1[2], default_dcfg_1[3]);␊
1756␉␉}␊
1757␉}␊
1758␉␊
1759#if DEBUG_NVCAP␊
1760␉printf("NVCAP: %02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x-%02x%02x%02x%02x\n",␊
1761␉default_NVCAP[0], default_NVCAP[1], default_NVCAP[2], default_NVCAP[3],␊
1762␉default_NVCAP[4], default_NVCAP[5], default_NVCAP[6], default_NVCAP[7],␊
1763␉default_NVCAP[8], default_NVCAP[9], default_NVCAP[10], default_NVCAP[11],␊
1764␉default_NVCAP[12], default_NVCAP[13], default_NVCAP[14], default_NVCAP[15],␊
1765␉default_NVCAP[16], default_NVCAP[17], default_NVCAP[18], default_NVCAP[19]);␊
1766#endif␊
1767␉␊
1768␉devprop_add_nvidia_template(device);␊
1769␉devprop_add_value(device, "NVCAP", default_NVCAP, NVCAP_LEN);␊
1770␉devprop_add_value(device, "NVPM", default_NVPM, NVPM_LEN);␊
1771␉devprop_add_value(device, "VRAM,totalsize", (uint8_t*)&videoRam, 4);␊
1772␉devprop_add_value(device, "model", (uint8_t*)model, strlen(model) + 1);␊
1773␉devprop_add_value(device, "rom-revision", (uint8_t*)biosVersion, strlen(biosVersion) + 1);␊
1774 //␉devprop_add_value(device, "@1,connector-type", connector_type_1, 4); // fixme␊
1775 //␉devprop_add_value(device, "@0,display-cfg", display_cfg_0, 4);␊
1776 //␉devprop_add_value(device, "@1,display-cfg", display_cfg_1, 4);␊
1777␉devprop_add_value(device, "@0,display-cfg", default_dcfg_0, DCFG0_LEN);␊
1778␉devprop_add_value(device, "@1,display-cfg", default_dcfg_1, DCFG1_LEN);␊
1779␉␊
1780␉//add HDMI Audio back to nvidia␊
1781␉//http://forge.voodooprojects.org/p/chameleon/issues/67/␊
1782//␉uint8_t connector_type_1[]= {0x00, 0x08, 0x00, 0x00};␊
1783//␉devprop_add_value(device, "@1,connector-type",connector_type_1, 4);␊
1784␉//end Nvidia HDMI Audio␊
1785␉␊
1786␉if (getBoolForKey(kVBIOS, &doit, &bootInfo->chameleonConfig) && doit)␊
1787␉{␊
1788␉␉devprop_add_value(device, "vbios", rom, (nvBiosOveride > 0) ? nvBiosOveride : (rom[2] * 512));␊
1789␉}␊
1790␉␊
1791␉stringdata = malloc(sizeof(uint8_t) * string->length);␊
1792␉memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);␊
1793␉stringlength = string->length;␊
1794␉␊
1795␉return true;␊
1796}␊
1797

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