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1/*␊
2 * Copyright 2008 Islam Ahmed Zaid. All rights reserved. <azismed@gmail.com>␊
3 * AsereBLN: 2009: cleanup and bugfix␊
4 */␊
5␊
6#include "libsaio.h"␊
7#include "platform.h"␊
8#include "cpu.h"␊
9#include "bootstruct.h"␊
10#include "boot.h"␊
11␊
12#ifndef DEBUG_CPU␊
13#define DEBUG_CPU 0␊
14#endif␊
15␊
16#if DEBUG_CPU␊
17#define DBG(x...)␉␉printf(x)␊
18#else␊
19#define DBG(x...)␉␉msglog(x)␊
20#endif␊
21␊
22/*␊
23 * timeRDTSC()␊
24 * This routine sets up PIT counter 2 to count down 1/20 of a second.␊
25 * It pauses until the value is latched in the counter␊
26 * and then reads the time stamp counter to return to the caller.␊
27 */␊
28uint64_t timeRDTSC(void)␊
29{␊
30␉int␉␉attempts = 0;␊
31␉uint64_t latchTime;␊
32␉uint64_t␉saveTime,intermediate;␊
33␉unsigned int timerValue, lastValue;␊
34␉//boolean_t␉int_enabled;␊
35␉/*␊
36␉ * Table of correction factors to account for␊
37␉ *␉ - timer counter quantization errors, and␊
38␉ *␉ - undercounts 0..5␊
39␉ */␊
40#define SAMPLE_CLKS_EXACT␉(((double) CLKNUM) / 20.0)␊
41#define SAMPLE_CLKS_INT␉␉((int) CLKNUM / 20)␊
42#define SAMPLE_NSECS␉␉(2000000000LL)␊
43#define SAMPLE_MULTIPLIER␉(((double)SAMPLE_NSECS)*SAMPLE_CLKS_EXACT)␊
44#define ROUND64(x)␉␉((uint64_t)((x) + 0.5))␊
45␉uint64_t␉scale[6] = {␊
46␉␉ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-0)), ␊
47␉␉ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-1)), ␊
48␉␉ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-2)), ␊
49␉␉ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-3)), ␊
50␉␉ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-4)), ␊
51␉␉ROUND64(SAMPLE_MULTIPLIER/(double)(SAMPLE_CLKS_INT-5))␊
52␉};␊
53␊
54 //int_enabled = ml_set_interrupts_enabled(FALSE);␊
55␊
56restart:␊
57␉if (attempts >= 9) // increase to up to 9 attempts.␊
58␉{␊
59␉ // This will flash-reboot. TODO: Use tscPanic instead.␊
60␉␉printf("Timestamp counter calibation failed with %d attempts\n", attempts);␊
61␉}␊
62␉attempts++;␊
63␉enable_PIT2();␉␉// turn on PIT2␊
64␉set_PIT2(0);␉␉// reset timer 2 to be zero␊
65␉latchTime = rdtsc64();␉// get the time stamp to time ␊
66␉latchTime = get_PIT2(&timerValue) - latchTime; // time how long this takes␊
67␉set_PIT2(SAMPLE_CLKS_INT);␉// set up the timer for (almost) 1/20th a second␊
68␉saveTime = rdtsc64();␉// now time how long a 20th a second is...␊
69␉get_PIT2(&lastValue);␊
70␉get_PIT2(&lastValue);␉// read twice, first value may be unreliable␊
71␉do {␊
72␉␉intermediate = get_PIT2(&timerValue);␊
73␉␉if (timerValue > lastValue)␊
74␉␉{␊
75␉␉␉// Timer wrapped␊
76␉␉␉set_PIT2(0);␊
77␉␉␉disable_PIT2();␊
78␉␉␉goto restart;␊
79␉␉}␊
80␉␉lastValue = timerValue;␊
81␉} while (timerValue > 5);␊
82␉printf("timerValue␉ %d\n",timerValue);␊
83␉printf("intermediate 0x%016llx\n",intermediate);␊
84␉printf("saveTime␉ 0x%016llx\n",saveTime);␊
85 ␊
86␉intermediate -= saveTime;␉␉// raw count for about 1/20 second␊
87␉intermediate *= scale[timerValue];␉// rescale measured time spent␊
88␉intermediate /= SAMPLE_NSECS;␉// so its exactly 1/20 a second␊
89␉intermediate += latchTime;␉␉// add on our save fudge␊
90 ␊
91␉set_PIT2(0);␉␉␉// reset timer 2 to be zero␊
92␉disable_PIT2();␉␉␉// turn off PIT 2␊
93␉␊
94␉//ml_set_interrupts_enabled(int_enabled);␊
95␉return intermediate;␊
96}␊
97␊
98/*␊
99 * DFE: Measures the TSC frequency in Hz (64-bit) using the ACPI PM timer␊
100 */␊
101static uint64_t measure_tsc_frequency(void)␊
102{␊
103␉uint64_t tscStart;␊
104␉uint64_t tscEnd;␊
105␉uint64_t tscDelta = 0xffffffffffffffffULL;␊
106␉unsigned long pollCount;␊
107␉uint64_t retval = 0;␊
108␉int i;␊
109␉␊
110␉/* Time how many TSC ticks elapse in 30 msec using the 8254 PIT␊
111␉ * counter 2. We run this loop 3 times to make sure the cache␊
112␉ * is hot and we take the minimum delta from all of the runs.␊
113␉ * That is to say that we're biased towards measuring the minimum␊
114␉ * number of TSC ticks that occur while waiting for the timer to␊
115␉ * expire. That theoretically helps avoid inconsistencies when␊
116␉ * running under a VM if the TSC is not virtualized and the host␊
117␉ * steals time.␉ The TSC is normally virtualized for VMware.␊
118␉ */␊
119␉for(i = 0; i < 10; ++i)␊
120␉{␊
121␉␉enable_PIT2();␊
122␉␉set_PIT2_mode0(CALIBRATE_LATCH);␊
123␉␉tscStart = rdtsc64();␊
124␉␉pollCount = poll_PIT2_gate();␊
125␉␉tscEnd = rdtsc64();␊
126␉␉/* The poll loop must have run at least a few times for accuracy */␊
127␉␉if (pollCount <= 1)␊
128␉␉{␊
129␉␉␉continue;␊
130␉␉}␊
131␉␉/* The TSC must increment at LEAST once every millisecond.␊
132␉␉ * We should have waited exactly 30 msec so the TSC delta should␊
133␉␉ * be >= 30. Anything less and the processor is way too slow.␊
134␉␉ */␊
135␉␉if ((tscEnd - tscStart) <= CALIBRATE_TIME_MSEC)␊
136␉␉{␊
137␉␉␉continue;␊
138␉␉}␊
139␉␉// tscDelta = MIN(tscDelta, (tscEnd - tscStart))␊
140␉␉if ( (tscEnd - tscStart) < tscDelta )␊
141␉␉{␊
142␉␉␉tscDelta = tscEnd - tscStart;␊
143␉␉}␊
144␉}␊
145␉/* tscDelta is now the least number of TSC ticks the processor made in␊
146␉ * a timespan of 0.03 s (e.g. 30 milliseconds)␊
147␉ * Linux thus divides by 30 which gives the answer in kiloHertz because␊
148␉ * 1 / ms = kHz. But we're xnu and most of the rest of the code uses␊
149␉ * Hz so we need to convert our milliseconds to seconds. Since we're␊
150␉ * dividing by the milliseconds, we simply multiply by 1000.␊
151␉ */␊
152␊
153␉/* Unlike linux, we're not limited to 32-bit, but we do need to take care␊
154␉ * that we're going to multiply by 1000 first so we do need at least some␊
155␉ * arithmetic headroom. For now, 32-bit should be enough.␊
156␉ * Also unlike Linux, our compiler can do 64-bit integer arithmetic.␊
157␉ */␊
158␉if (tscDelta > (1ULL<<32))␊
159␉{␊
160␉␉retval = 0;␊
161␉}␊
162␉else␊
163␉{␊
164␉␉retval = tscDelta * 1000 / 30;␊
165␉}␊
166␉disable_PIT2();␊
167␉return retval;␊
168}␊
169␊
170/*␊
171 * Original comment/code:␊
172 * "DFE: Measures the Max Performance Frequency in Hz (64-bit)"␊
173 *␊
174 * Measures the Actual Performance Frequency in Hz (64-bit)␊
175 * (just a naming change, mperf --> aperf )␊
176 */␊
177static uint64_t measure_aperf_frequency(void)␊
178{␊
179␉uint64_t aperfStart;␊
180␉uint64_t aperfEnd;␊
181␉uint64_t aperfDelta = 0xffffffffffffffffULL;␊
182␉unsigned long pollCount;␊
183␉uint64_t retval = 0;␊
184␉int i;␊
185␉␊
186␉/* Time how many APERF ticks elapse in 30 msec using the 8254 PIT␊
187␉ * counter 2. We run this loop 3 times to make sure the cache␊
188␉ * is hot and we take the minimum delta from all of the runs.␊
189␉ * That is to say that we're biased towards measuring the minimum␊
190␉ * number of APERF ticks that occur while waiting for the timer to␊
191␉ * expire.␊
192␉ */␊
193␉for(i = 0; i < 10; ++i)␊
194␉{␊
195␉␉enable_PIT2();␊
196␉␉set_PIT2_mode0(CALIBRATE_LATCH);␊
197␉␉aperfStart = rdmsr64(MSR_AMD_APERF);␊
198␉␉pollCount = poll_PIT2_gate();␊
199␉␉aperfEnd = rdmsr64(MSR_AMD_APERF);␊
200␉␉/* The poll loop must have run at least a few times for accuracy */␊
201␉␉if (pollCount <= 1)␊
202␉␉{␊
203␉␉␉continue;␊
204␉␉}␊
205␉␉/* The TSC must increment at LEAST once every millisecond.␊
206␉␉ * We should have waited exactly 30 msec so the APERF delta should␊
207␉␉ * be >= 30. Anything less and the processor is way too slow.␊
208␉␉ */␊
209␉␉if ((aperfEnd - aperfStart) <= CALIBRATE_TIME_MSEC)␊
210␉␉{␊
211␉␉␉continue;␊
212␉␉}␊
213␉␉// tscDelta = MIN(tscDelta, (tscEnd - tscStart))␊
214␉␉if ( (aperfEnd - aperfStart) < aperfDelta )␊
215␉␉{␊
216␉␉␉aperfDelta = aperfEnd - aperfStart;␊
217␉␉}␊
218␉}␊
219␉/* mperfDelta is now the least number of MPERF ticks the processor made in␊
220␉ * a timespan of 0.03 s (e.g. 30 milliseconds)␊
221␉ */␊
222␉␊
223␉if (aperfDelta > (1ULL<<32))␊
224␉{␊
225␉␉retval = 0;␊
226␉}␊
227␉else␊
228␉{␊
229␉␉retval = aperfDelta * 1000 / 30;␊
230␉}␊
231␉disable_PIT2();␊
232␉return retval;␊
233}␊
234␊
235/*␊
236 * Calculates the FSB and CPU frequencies using specific MSRs for each CPU␊
237 * - multi. is read from a specific MSR. In the case of Intel, there is:␊
238 *␉ a max multi. (used to calculate the FSB freq.),␊
239 *␉ and a current multi. (used to calculate the CPU freq.)␊
240 * - fsbFrequency = tscFrequency / multi␊
241 * - cpuFrequency = fsbFrequency * multi␊
242 */␊
243void scan_cpu(PlatformInfo_t *p)␊
244{␊
245␉uint64_t␉tscFrequency = 0;␊
246␉uint64_t␉fsbFrequency = 0;␊
247␉uint64_t␉cpuFrequency = 0;␊
248␉uint64_t␉msr = 0;␊
249␉uint64_t␉flex_ratio = 0;␊
250␉uint32_t␉max_ratio = 0;␊
251␉uint32_t␉min_ratio = 0;␊
252␉uint8_t␉␉bus_ratio_max = 0;␊
253␉uint8_t␉␉currdiv = 0;␊
254␉uint8_t␉␉currcoef = 0;␊
255␉uint8_t␉␉maxdiv = 0;␊
256␉uint8_t␉␉maxcoef = 0;␊
257␉const char␉*newratio;␊
258␉int␉␉len = 0;␊
259␉int␉␉myfsb = 0;␊
260␉uint8_t␉␉bus_ratio_min = 0;␊
261␊
262␉/* get cpuid values */␊
263␉do_cpuid(0x00000000, p->CPU.CPUID[CPUID_0]);␊
264␉do_cpuid(0x00000001, p->CPU.CPUID[CPUID_1]);␊
265␉do_cpuid(0x00000002, p->CPU.CPUID[CPUID_2]);␊
266␉do_cpuid(0x00000003, p->CPU.CPUID[CPUID_3]);␊
267␉do_cpuid2(0x00000004, 0, p->CPU.CPUID[CPUID_4]);␊
268␉do_cpuid(0x80000000, p->CPU.CPUID[CPUID_80]);␊
269␉if (p->CPU.CPUID[CPUID_0][0] >= 0x5)␊
270␉{␊
271␉␉do_cpuid(5, p->CPU.CPUID[CPUID_5]);␊
272␉}␊
273␉if (p->CPU.CPUID[CPUID_0][0] >= 6)␊
274␉{␊
275␉␉do_cpuid(6, p->CPU.CPUID[CPUID_6]);␊
276␉}␊
277␉if ((p->CPU.CPUID[CPUID_80][0] & 0x0000000f) >= 8)␊
278␉{␊
279␉␉do_cpuid(0x80000008, p->CPU.CPUID[CPUID_88]);␊
280␉␉do_cpuid(0x80000001, p->CPU.CPUID[CPUID_81]);␊
281␉}␊
282␉else if ((p->CPU.CPUID[CPUID_80][0] & 0x0000000f) >= 1)␊
283␉{␊
284␉␉do_cpuid(0x80000001, p->CPU.CPUID[CPUID_81]);␊
285␉}␊
286␊
287#if DEBUG_CPU␊
288␉{␊
289␉␉int␉␉i;␊
290␉␉printf("CPUID Raw Values:\n");␊
291␉␉for (i=0; i<CPUID_MAX; i++)␊
292␉␉{␊
293␉␉␉printf("%02d: %08x-%08x-%08x-%08x\n", i,␊
294␉␉␉␉ p->CPU.CPUID[i][0], p->CPU.CPUID[i][1],␊
295␉␉␉␉ p->CPU.CPUID[i][2], p->CPU.CPUID[i][3]);␊
296␉␉}␊
297␉}␊
298#endif␊
299␊
300␉p->CPU.Vendor␉␉= p->CPU.CPUID[CPUID_0][1];␊
301␉p->CPU.Signature␉= p->CPU.CPUID[CPUID_1][0];␊
302␉p->CPU.Stepping␉␉= bitfield(p->CPU.CPUID[CPUID_1][0], 3, 0);␊
303␉p->CPU.Model␉␉= bitfield(p->CPU.CPUID[CPUID_1][0], 7, 4);␊
304␉p->CPU.Family␉␉= bitfield(p->CPU.CPUID[CPUID_1][0], 11, 8);␊
305␉p->CPU.ExtModel␉␉= bitfield(p->CPU.CPUID[CPUID_1][0], 19, 16);␊
306␉p->CPU.ExtFamily␉= bitfield(p->CPU.CPUID[CPUID_1][0], 27, 20);␊
307␊
308␉p->CPU.Model += (p->CPU.ExtModel << 4);␊
309␊
310␉if (p->CPU.Vendor == CPUID_VENDOR_INTEL &&␊
311␉␉p->CPU.Family == 0x06 &&␊
312␉␉p->CPU.Model >= CPUID_MODEL_NEHALEM &&␊
313␉␉p->CPU.Model != CPUID_MODEL_ATOM␉␉// MSR is *NOT* available on the Intel Atom CPU␊
314␉␉)␊
315␉{␊
316␉␉msr = rdmsr64(MSR_CORE_THREAD_COUNT);␉␉␉␉␉// Undocumented MSR in Nehalem and newer CPUs␊
317␉␉p->CPU.NoCores␉␉= bitfield((uint32_t)msr, 31, 16);␉// Using undocumented MSR to get actual values␊
318␉␉p->CPU.NoThreads␉= bitfield((uint32_t)msr, 15, 0);␉// Using undocumented MSR to get actual values␊
319␉}␊
320␉else if (p->CPU.Vendor == CPUID_VENDOR_AMD)␊
321␉{␊
322␉␉p->CPU.NoThreads␉= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);␊
323␉␉p->CPU.NoCores␉␉= bitfield(p->CPU.CPUID[CPUID_88][2], 7, 0) + 1;␊
324␉}␊
325␉else␊
326␉{␊
327␉␉// Use previous method for Cores and Threads␊
328␉␉p->CPU.NoThreads␉= bitfield(p->CPU.CPUID[CPUID_1][1], 23, 16);␊
329␉␉p->CPU.NoCores␉␉= bitfield(p->CPU.CPUID[CPUID_4][0], 31, 26) + 1;␊
330␉}␊
331␊
332␉/* get brand string (if supported) */␊
333␉/* Copyright: from Apple's XNU cpuid.c */␊
334␉if (p->CPU.CPUID[CPUID_80][0] > 0x80000004)␊
335␉{␊
336␉␉uint32_t␉reg[4];␊
337␉␉char␉␉str[128], *s;␊
338␉␉/*␊
339␉␉ * The brand string 48 bytes (max), guaranteed to␊
340␉␉ * be NULL terminated.␊
341␉␉ */␊
342␉␉do_cpuid(0x80000002, reg);␊
343␉␉bcopy((char *)reg, &str[0], 16);␊
344␉␉do_cpuid(0x80000003, reg);␊
345␉␉bcopy((char *)reg, &str[16], 16);␊
346␉␉do_cpuid(0x80000004, reg);␊
347␉␉bcopy((char *)reg, &str[32], 16);␊
348␉␉for (s = str; *s != '\0'; s++)␊
349␉␉{␊
350␉␉␉if (*s != ' ')␊
351␉␉␉{␊
352␉␉␉␉break;␊
353␉␉␉}␊
354␉␉}␊
355␉␉␊
356␉␉strlcpy(p->CPU.BrandString, s, sizeof(p->CPU.BrandString));␊
357␉␉␊
358␉␉if (!strncmp(p->CPU.BrandString, CPU_STRING_UNKNOWN, MIN(sizeof(p->CPU.BrandString), strlen(CPU_STRING_UNKNOWN) + 1)))␊
359␉␉{␊
360␉␉␉/*␊
361␉␉␉ * This string means we have a firmware-programmable brand string,␊
362␉␉␉ * and the firmware couldn't figure out what sort of CPU we have.␊
363␉␉␉ */␊
364␉␉␉p->CPU.BrandString[0] = '\0';␊
365␉␉}␊
366␉}␊
367␉␊
368␉/* setup features */␊
369␉if ((bit(23) & p->CPU.CPUID[CPUID_1][3]) != 0)␊
370␉{␊
371␉␉p->CPU.Features |= CPU_FEATURE_MMX;␊
372␉}␊
373␉if ((bit(25) & p->CPU.CPUID[CPUID_1][3]) != 0)␊
374␉{␊
375␉␉p->CPU.Features |= CPU_FEATURE_SSE;␊
376␉}␊
377␉if ((bit(26) & p->CPU.CPUID[CPUID_1][3]) != 0)␊
378␉{␊
379␉␉p->CPU.Features |= CPU_FEATURE_SSE2;␊
380␉}␊
381␉if ((bit(0) & p->CPU.CPUID[CPUID_1][2]) != 0)␊
382␉{␊
383␉␉p->CPU.Features |= CPU_FEATURE_SSE3;␊
384␉}␊
385␉if ((bit(19) & p->CPU.CPUID[CPUID_1][2]) != 0)␊
386␉{␊
387␉␉p->CPU.Features |= CPU_FEATURE_SSE41;␊
388␉}␊
389␉if ((bit(20) & p->CPU.CPUID[CPUID_1][2]) != 0)␊
390␉{␊
391␉␉p->CPU.Features |= CPU_FEATURE_SSE42;␊
392␉}␊
393␉if ((bit(29) & p->CPU.CPUID[CPUID_81][3]) != 0)␊
394␉{␊
395␉␉p->CPU.Features |= CPU_FEATURE_EM64T;␊
396␉}␊
397␉if ((bit(5) & p->CPU.CPUID[CPUID_1][3]) != 0)␊
398␉{␊
399␉␉p->CPU.Features |= CPU_FEATURE_MSR;␊
400␉}␊
401␉//if ((bit(28) & p->CPU.CPUID[CPUID_1][3]) != 0) {␊
402␉if (p->CPU.NoThreads > p->CPU.NoCores)␊
403␉{␊
404␉␉p->CPU.Features |= CPU_FEATURE_HTT;␊
405␉}␊
406␊
407␉tscFrequency = measure_tsc_frequency();␊
408␉DBG("cpu freq classic = 0x%016llx\n", tscFrequency);␊
409␉/* if usual method failed */␊
410␉if ( tscFrequency < 1000 )//TEST␊
411␉{␊
412␉␉tscFrequency = timeRDTSC() * 20;//measure_tsc_frequency();␊
413␉␉// DBG("cpu freq timeRDTSC = 0x%016llx\n", tscFrequency);␊
414␉}␊
415␉else␊
416␉{␊
417␉␉// DBG("cpu freq timeRDTSC = 0x%016llxn", timeRDTSC() * 20);␊
418␉}␊
419␉fsbFrequency = 0;␊
420␉cpuFrequency = 0;␊
421␊
422␉if ((p->CPU.Vendor == CPUID_VENDOR_INTEL) && ((p->CPU.Family == 0x06) || (p->CPU.Family == 0x0f)))␊
423␉{␊
424␉␉int intelCPU = p->CPU.Model;␊
425␉␉if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0c) || (p->CPU.Family == 0x0f && p->CPU.Model >= 0x03))␊
426␉␉{␊
427␉␉␉/* Nehalem CPU model */␊
428␉␉␉if (p->CPU.Family == 0x06 && (p->CPU.Model == CPU_MODEL_NEHALEM␉␉||␊
429␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_FIELDS␉||␊
430␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_DALES␉||␊
431␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_CLARKDALE␉||␊
432␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_WESTMERE␉||␊
433␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_NEHALEM_EX␉||␊
434␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_WESTMERE_EX ||␊
435␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_SANDYBRIDGE ||␊
436␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_JAKETOWN␉||␊
437␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_HASWELL ||␊
438␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_IVYBRIDGE_E5␉||␊
439␉␉␉␉␉␉␉␉␉␉ p->CPU.Model == CPU_MODEL_IVYBRIDGE␉))␊
440␉␉␉{␊
441␉␉␉␉msr = rdmsr64(MSR_PLATFORM_INFO);␊
442␉␉␉␉DBG("msr(%d): platform_info %08x\n", __LINE__, bitfield(msr, 31, 0));␊
443␉␉␉␉bus_ratio_max = bitfield(msr, 14, 8);␊
444␉␉␉␉bus_ratio_min = bitfield(msr, 46, 40); //valv: not sure about this one (Remarq.1)␊
445␉␉␉␉msr = rdmsr64(MSR_FLEX_RATIO);␊
446␉␉␉␉DBG("msr(%d): flex_ratio %08x\n", __LINE__, bitfield(msr, 31, 0));␊
447␉␉␉␉if (bitfield(msr, 16, 16))␊
448␉␉␉␉{␊
449␉␉␉␉␉flex_ratio = bitfield(msr, 14, 8);␊
450␉␉␉␉␉/* bcc9: at least on the gigabyte h67ma-ud2h,␊
451␉␉␉␉␉ where the cpu multipler can't be changed to␊
452␉␉␉␉␉ allow overclocking, the flex_ratio msr has unexpected (to OSX)␊
453␉␉␉␉␉ contents.␉These contents cause mach_kernel to␊
454␉␉␉␉␉ fail to compute the bus ratio correctly, instead␊
455␉␉␉␉␉ causing the system to crash since tscGranularity␊
456␉␉␉␉␉ is inadvertently set to 0.␊
457␉␉␉␉␉ */␊
458␉␉␉␉␉if (flex_ratio == 0)␊
459␉␉␉␉␉{␊
460␉␉␉␉␉␉/* Clear bit 16 (evidently the presence bit) */␊
461␉␉␉␉␉␉wrmsr64(MSR_FLEX_RATIO, (msr & 0xFFFFFFFFFFFEFFFFULL));␊
462␉␉␉␉␉␉msr = rdmsr64(MSR_FLEX_RATIO);␊
463␉␉␉␉␉␉verbose("Unusable flex ratio detected. Patched MSR now %08x\n", bitfield(msr, 31, 0));␊
464␉␉␉␉␉}␊
465␉␉␉␉␉else␊
466␉␉␉␉␉{␊
467␉␉␉␉␉␉if (bus_ratio_max > flex_ratio)␊
468␉␉␉␉␉␉{␊
469␉␉␉␉␉␉␉bus_ratio_max = flex_ratio;␊
470␉␉␉␉␉␉}␊
471␉␉␉␉␉}␊
472␉␉␉␉}␊
473␊
474␉␉␉␉if (bus_ratio_max)␊
475␉␉␉␉{␊
476␉␉␉␉␉fsbFrequency = (tscFrequency / bus_ratio_max);␊
477␉␉␉␉}␊
478␉␉␉␉//valv: Turbo Ratio Limit␊
479␉␉␉␉if ((intelCPU != 0x2e) && (intelCPU != 0x2f))␊
480␉␉␉␉{␊
481␉␉␉␉␉msr = rdmsr64(MSR_TURBO_RATIO_LIMIT);␊
482␉␉␉␉␉cpuFrequency = bus_ratio_max * fsbFrequency;␊
483␉␉␉␉␉max_ratio = bus_ratio_max * 10;␊
484␉␉␉␉}␊
485␉␉␉␉else␊
486␉␉␉␉{␊
487␉␉␉␉␉cpuFrequency = tscFrequency;␊
488␉␉␉␉}␊
489␉␉␉␉if ((getValueForKey(kbusratio, &newratio, &len, &bootInfo->chameleonConfig)) && (len <= 4))␊
490␉␉␉␉{␊
491␉␉␉␉␉max_ratio = atoi(newratio);␊
492␉␉␉␉␉max_ratio = (max_ratio * 10);␊
493␉␉␉␉␉if (len >= 3)␊
494␉␉␉␉␉{␊
495␉␉␉␉␉␉max_ratio = (max_ratio + 5);␊
496␉␉␉␉␉}␊
497␊
498␉␉␉␉␉verbose("Bus-Ratio: min=%d, max=%s\n", bus_ratio_min, newratio);␊
499␊
500␉␉␉␉␉// extreme overclockers may love 320 ;)␊
501␉␉␉␉␉if ((max_ratio >= min_ratio) && (max_ratio <= 320))␊
502␉␉␉␉␉{␊
503␉␉␉␉␉␉cpuFrequency = (fsbFrequency * max_ratio) / 10;␊
504␉␉␉␉␉␉if (len >= 3)␊
505␉␉␉␉␉␉{␊
506␉␉␉␉␉␉␉maxdiv = 1;␊
507␉␉␉␉␉␉}␊
508␉␉␉␉␉␉else␊
509␉␉␉␉␉␉{␊
510␉␉␉␉␉␉␉maxdiv = 0;␊
511␉␉␉␉␉␉}␊
512␉␉␉␉␉}␊
513␉␉␉␉␉else␊
514␉␉␉␉␉{␊
515␉␉␉␉␉␉max_ratio = (bus_ratio_max * 10);␊
516␉␉␉␉␉}␊
517␉␉␉␉}␊
518␉␉␉␉//valv: to be uncommented if Remarq.1 didn't stick␊
519␉␉␉␉/*if (bus_ratio_max > 0) bus_ratio = flex_ratio;*/␊
520␉␉␉␉p->CPU.MaxRatio = max_ratio;␊
521␉␉␉␉p->CPU.MinRatio = min_ratio;␊
522␊
523␉␉␉␉myfsb = fsbFrequency / 1000000;␊
524␉␉␉␉verbose("Sticking with [BCLK: %dMhz, Bus-Ratio: %d]\n", myfsb, max_ratio);␊
525␉␉␉␉currcoef = bus_ratio_max;␊
526␉␉␉}␊
527␉␉␉else␊
528␉␉␉{␊
529␉␉␉␉msr = rdmsr64(MSR_IA32_PERF_STATUS);␊
530␉␉␉␉DBG("msr(%d): ia32_perf_stat 0x%08x\n", __LINE__, bitfield(msr, 31, 0));␊
531␉␉␉␉currcoef = bitfield(msr, 12, 8);␊
532␉␉␉␉/* Non-integer bus ratio for the max-multi*/␊
533␉␉␉␉maxdiv = bitfield(msr, 46, 46);␊
534␉␉␉␉/* Non-integer bus ratio for the current-multi (undocumented)*/␊
535␉␉␉␉currdiv = bitfield(msr, 14, 14);␊
536␊
537␉␉␉␉// This will always be model >= 3␊
538␉␉␉␉if ((p->CPU.Family == 0x06 && p->CPU.Model >= 0x0e) || (p->CPU.Family == 0x0f))␊
539␉␉␉␉{␊
540␉␉␉␉␉/* On these models, maxcoef defines TSC freq */␊
541␉␉␉␉␉maxcoef = bitfield(msr, 44, 40);␊
542␉␉␉␉}␊
543␉␉␉␉else␊
544␉␉␉␉{␊
545␉␉␉␉␉/* On lower models, currcoef defines TSC freq */␊
546␉␉␉␉␉/* XXX */␊
547␉␉␉␉␉maxcoef = currcoef;␊
548␉␉␉␉}␊
549␊
550␉␉␉␉if (maxcoef)␊
551␉␉␉␉{␊
552␉␉␉␉␉if (maxdiv)␊
553␉␉␉␉␉{␊
554␉␉␉␉␉␉fsbFrequency = ((tscFrequency * 2) / ((maxcoef * 2) + 1));␊
555␉␉␉␉␉}␊
556␉␉␉␉␉else␊
557␉␉␉␉␉{␊
558␉␉␉␉␉␉fsbFrequency = (tscFrequency / maxcoef);␊
559␉␉␉␉␉}␊
560␉␉␉␉␉if (currdiv)␊
561␉␉␉␉␉{␊
562␉␉␉␉␉␉cpuFrequency = (fsbFrequency * ((currcoef * 2) + 1) / 2);␊
563␉␉␉␉␉}␊
564␉␉␉␉␉else␊
565␉␉␉␉␉{␊
566␉␉␉␉␉␉cpuFrequency = (fsbFrequency * currcoef);␊
567␉␉␉␉␉}␊
568␉␉␉␉␉DBG("max: %d%s current: %d%s\n", maxcoef, maxdiv ? ".5" : "",currcoef, currdiv ? ".5" : "");␊
569␉␉␉␉}␊
570␉␉␉}␊
571␉␉}␊
572␉␉/* Mobile CPU */␊
573␉␉if (rdmsr64(MSR_IA32_PLATFORM_ID) & (1<<28))␊
574␉␉{␊
575␉␉␉p->CPU.Features |= CPU_FEATURE_MOBILE;␊
576␉␉}␊
577␉}␊
578␉else if ((p->CPU.Vendor == CPUID_VENDOR_AMD) && (p->CPU.Family == 0x0f))␊
579␉{␊
580␉␉switch(p->CPU.ExtFamily)␊
581␉␉{␊
582␉␉␉case 0x00: /* K8 */␊
583␉␉␉␉msr = rdmsr64(K8_FIDVID_STATUS);␊
584␉␉␉␉maxcoef = bitfield(msr, 21, 16) / 2 + 4;␊
585␉␉␉␉currcoef = bitfield(msr, 5, 0) / 2 + 4;␊
586␉␉␉␉break;␊
587␊
588␉␉␉case 0x01: /* K10 */␊
589␉␉␉␉msr = rdmsr64(K10_COFVID_STATUS);␊
590␉␉␉␉do_cpuid2(0x00000006, 0, p->CPU.CPUID[CPUID_6]);␊
591␉␉␉␉// EffFreq: effective frequency interface␊
592␉␉␉␉if (bitfield(p->CPU.CPUID[CPUID_6][2], 0, 0) == 1)␊
593␉␉␉␉{␊
594␉␉␉␉␉//uint64_t mperf = measure_mperf_frequency();␊
595␉␉␉␉␉uint64_t aperf = measure_aperf_frequency();␊
596␉␉␉␉␉cpuFrequency = aperf;␊
597␉␉␉␉}␊
598␉␉␉␉// NOTE: tsc runs at the maccoeff (non turbo)␊
599␉␉␉␉//␉␉␉*not* at the turbo frequency.␊
600␉␉␉␉maxcoef␉ = bitfield(msr, 54, 49) / 2 + 4;␊
601␉␉␉␉currcoef = bitfield(msr, 5, 0) + 0x10;␊
602␉␉␉␉currdiv = 2 << bitfield(msr, 8, 6);␊
603␊
604␉␉␉␉break;␊
605␊
606␉␉␉case 0x05: /* K14 */␊
607␉␉␉␉msr = rdmsr64(K10_COFVID_STATUS);␊
608␉␉␉␉currcoef = (bitfield(msr, 54, 49) + 0x10) << 2;␊
609␉␉␉␉currdiv = (bitfield(msr, 8, 4) + 1) << 2;␊
610␉␉␉␉currdiv += bitfield(msr, 3, 0);␊
611␊
612␉␉␉␉break;␊
613␊
614␉␉␉case 0x02: /* K11 */␊
615␉␉␉␉// not implimented␊
616␉␉␉␉break;␊
617␉␉}␊
618␊
619␉␉if (maxcoef)␊
620␉␉{␊
621␉␉␉if (currdiv)␊
622␉␉␉{␊
623␉␉␉␉if (!currcoef)␊
624␉␉␉␉{␊
625␉␉␉␉␉currcoef = maxcoef;␊
626␉␉␉␉}␊
627␊
628␉␉␉␉if (!cpuFrequency)␊
629␉␉␉␉{␊
630␉␉␉␉␉fsbFrequency = ((tscFrequency * currdiv) / currcoef);␊
631␉␉␉␉}␊
632␉␉␉␉else␊
633␉␉␉␉{␊
634␉␉␉␉␉fsbFrequency = ((cpuFrequency * currdiv) / currcoef);␊
635␉␉␉␉}␊
636␉␉␉␉DBG("%d.%d\n", currcoef / currdiv, ((currcoef % currdiv) * 100) / currdiv);␊
637␉␉␉}␊
638␉␉␉else␊
639␉␉␉{␊
640␉␉␉␉if (!cpuFrequency)␊
641␉␉␉␉{␊
642␉␉␉␉␉fsbFrequency = (tscFrequency / maxcoef);␊
643␉␉␉␉}␊
644␉␉␉␉else ␊
645␉␉␉␉{␊
646␉␉␉␉␉fsbFrequency = (cpuFrequency / maxcoef);␊
647␉␉␉␉}␊
648␉␉␉␉DBG("%d\n", currcoef);␊
649␉␉␉}␊
650␉␉}␊
651␉␉else if (currcoef)␊
652␉␉{␊
653␉␉␉if (currdiv)␊
654␉␉␉{␊
655␉␉␉␉fsbFrequency = ((tscFrequency * currdiv) / currcoef);␊
656␉␉␉␉DBG("%d.%d\n", currcoef / currdiv, ((currcoef % currdiv) * 100) / currdiv);␊
657␉␉␉}␊
658␉␉␉else␊
659␉␉␉{␊
660␉␉␉␉fsbFrequency = (tscFrequency / currcoef);␊
661␉␉␉␉DBG("%d\n", currcoef);␊
662␉␉␉}␊
663␉␉}␊
664␉␉if (!cpuFrequency) cpuFrequency = tscFrequency;␊
665␉}␊
666␉␊
667#if 0␊
668␉if (!fsbFrequency)␊
669␉{␊
670␉␉fsbFrequency = (DEFAULT_FSB * 1000);␊
671␉␉cpuFrequency = tscFrequency;␊
672␉␉DBG("0 ! using the default value for FSB !\n");␊
673␉}␊
674␊
675␉DBG("cpu freq = 0x%016llxn", timeRDTSC() * 20);␊
676␊
677#endif␊
678␊
679␉p->CPU.MaxCoef = maxcoef;␊
680␉p->CPU.MaxDiv = maxdiv;␊
681␉p->CPU.CurrCoef = currcoef;␊
682␉p->CPU.CurrDiv = currdiv;␊
683␉p->CPU.TSCFrequency = tscFrequency;␊
684␉p->CPU.FSBFrequency = fsbFrequency;␊
685␉p->CPU.CPUFrequency = cpuFrequency;␊
686␊
687␉// keep formatted with spaces instead of tabs␊
688␉DBG("\n---------------------------------------------\n");␊
689␉DBG("CPU: Brand String:\t\t\t\t %s\n", p->CPU.BrandString);␊
690␉DBG("CPU: Vendor/Family/ExtFamily:\t 0x%x/0x%x/0x%x\n", p->CPU.Vendor, p->CPU.Family, p->CPU.ExtFamily);␊
691␉DBG("CPU: Signature:\t\t\t\t %x\n", p->CPU.Signature);␊
692␉DBG("CPU: Model/ExtModel/Stepping:\t 0x%x/0x%x/0x%x\n", p->CPU.Model, p->CPU.ExtModel, p->CPU.Stepping);␊
693␉DBG("CPU: MaxCoef/CurrCoef:\t\t\t 0x%x/0x%x\n", p->CPU.MaxCoef, p->CPU.CurrCoef);␊
694␉DBG("CPU: MaxDiv/CurrDiv:\t\t\t 0x%x/0x%x\n", p->CPU.MaxDiv, p->CPU.CurrDiv);␊
695␉DBG("CPU: TSCFreq:\t\t\t\t %dMHz\n", p->CPU.TSCFrequency / 1000000);␊
696␉DBG("CPU: FSBFreq:\t\t\t\t\t %dMHz\n", (p->CPU.FSBFrequency + 500000) / 1000000);␊
697␉DBG("CPU: CPUFreq:\t\t\t\t %dMHz\n", p->CPU.CPUFrequency / 1000000);␊
698␉DBG("CPU: Number of CPU Cores:\t\t %d\n", p->CPU.NoCores);␊
699␉DBG("CPU: Number of CPU Threads:\t %d\n", p->CPU.NoThreads);␊
700␉DBG("CPU: Features:\t\t\t\t\t 0x%08x\n", p->CPU.Features);␊
701␉DBG("---------------------------------------------\n");␊
702#if DEBUG_CPU␊
703␉pause();␊
704#endif␊
705}␊
706

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