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Root/trunk/i386/libsaio/acpi_patcher.c

1/*
2 * Copyright 2008 mackerintel
3 */
4
5#include "libsaio.h"
6#include "boot.h"
7#include "bootstruct.h"
8#include "acpi.h"
9#include "efi_tables.h"
10#include "fake_efi.h"
11#include "acpi_patcher.h"
12#include "platform.h"
13#include "cpu.h"
14#include "aml_generator.h"
15
16#ifndef DEBUG_ACPI
17#define DEBUG_ACPI 0
18#endif
19
20#if DEBUG_ACPI==2
21#define DBG(x...) {printf(x); sleep(1);}
22#elif DEBUG_ACPI==1
23#define DBG(x...) printf(x)
24#else
25#define DBG(x...)
26#endif
27
28// Slice: New signature compare function
29boolean_t tableSign(char *table, const char *sgn)
30{
31int i;
32for (i=0; i<4; i++) {
33if ((table[i] &~0x20) != (sgn[i] &~0x20)) {
34return false;
35}
36}
37return true;
38}
39
40/* Gets the ACPI 1.0 RSDP address */
41static struct acpi_2_rsdp* getAddressOfAcpiTable()
42{
43 /* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
44
45 void *acpi_addr = (void*)ACPI_RANGE_START;
46 for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
47 {
48 if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
49 {
50 uint8_t csum = checksum8(acpi_addr, 20);
51 if(csum == 0)
52 {
53 // Only return the table if it is a true version 1.0 table (Revision 0)
54 if(((struct acpi_2_rsdp*)acpi_addr)->Revision == 0)
55 return acpi_addr;
56 }
57 }
58 }
59 return NULL;
60}
61
62/* Gets the ACPI 2.0 RSDP address */
63static struct acpi_2_rsdp* getAddressOfAcpi20Table()
64{
65 /* TODO: Before searching the BIOS space we are supposed to search the first 1K of the EBDA */
66
67 void *acpi_addr = (void*)ACPI_RANGE_START;
68 for(; acpi_addr <= (void*)ACPI_RANGE_END; acpi_addr += 16)
69 {
70 if(*(uint64_t *)acpi_addr == ACPI_SIGNATURE_UINT64_LE)
71 {
72 uint8_t csum = checksum8(acpi_addr, 20);
73
74 /* Only assume this is a 2.0 or better table if the revision is greater than 0
75 * NOTE: ACPI 3.0 spec only seems to say that 1.0 tables have revision 1
76 * and that the current revision is 2.. I am going to assume that rev > 0 is 2.0.
77 */
78
79 if(csum == 0 && (((struct acpi_2_rsdp*)acpi_addr)->Revision > 0))
80 {
81 uint8_t csum2 = checksum8(acpi_addr, sizeof(struct acpi_2_rsdp));
82 if(csum2 == 0)
83 return acpi_addr;
84 }
85 }
86 }
87 return NULL;
88}
89/** The folowing ACPI Table search algo. should be reused anywhere needed:*/
90int search_and_get_acpi_fd(const char * filename, const char ** outDirspec)
91{
92int fd = 0;
93char dirSpec[512];
94
95// Try finding 'filename' in the usual places
96// Start searching any potential location for ACPI Table
97sprintf(dirSpec, "%s", filename);
98fd = open(dirSpec, 0);
99if (fd < 0)
100{
101sprintf(dirSpec, "/Extra/%s", filename);
102fd = open(dirSpec, 0);
103if (fd < 0)
104{
105sprintf(dirSpec, "bt(0,0)/Extra/%s", filename);
106fd = open(dirSpec, 0);
107}
108}
109
110if (fd < 0)
111{
112// NOT FOUND:
113verbose("ACPI table not found: %s\n", filename);
114*dirSpec = '\0';
115}
116
117if (outDirspec) *outDirspec = dirSpec;
118return fd;
119}
120
121void *loadACPITable (const char * filename)
122{
123void *tableAddr;
124const char * dirspec=NULL;
125
126int fd = search_and_get_acpi_fd(filename, &dirspec);
127
128if (fd>=0)
129{
130tableAddr=(void*)AllocateKernelMemory(file_size (fd));
131if (tableAddr)
132{
133if (read (fd, tableAddr, file_size (fd))!=file_size (fd))
134{
135printf("Couldn't read table %s\n",dirspec);
136free (tableAddr);
137close (fd);
138return NULL;
139}
140
141DBG("Table %s read and stored at: %x\n", dirspec, tableAddr);
142close (fd);
143return tableAddr;
144}
145close (fd);
146printf("Couldn't allocate memory for table \n", dirspec);
147}
148//printf("Couldn't find table %s\n", filename);
149return NULL;
150}
151
152uint8_tacpi_cpu_count = 0;
153char* acpi_cpu_name[32];
154uint32_t acpi_cpu_p_blk = 0;
155
156void get_acpi_cpu_names(unsigned char* dsdt, uint32_t length)
157{
158uint32_t i;
159
160DBG("start finding cpu names. length %d\n", length);
161
162for (i=0; i<length-7; i++)
163{
164if (dsdt[i] == 0x5B && dsdt[i+1] == 0x83) // ProcessorOP
165{
166DBG("dsdt: %x%x\n", dsdt[i], dsdt[i+1]);
167
168uint32_t offset = i + 3 + (dsdt[i+2] >> 6);
169
170bool add_name = true;
171
172uint8_t j;
173
174for (j=0; j<4; j++)
175{
176char c = dsdt[offset+j];
177
178if (!aml_isvalidchar(c))
179{
180add_name = false;
181verbose("Invalid character found in ProcessorOP 0x%x!\n", c);
182break;
183}
184}
185
186if (add_name)
187{
188acpi_cpu_name[acpi_cpu_count] = malloc(4);
189memcpy(acpi_cpu_name[acpi_cpu_count], dsdt+offset, 4);
190i = offset + 5;
191
192if (acpi_cpu_count == 0)
193acpi_cpu_p_blk = dsdt[i] | (dsdt[i+1] << 8);
194
195verbose("Found ACPI CPU: %c%c%c%c\n", acpi_cpu_name[acpi_cpu_count][0], acpi_cpu_name[acpi_cpu_count][1], acpi_cpu_name[acpi_cpu_count][2], acpi_cpu_name[acpi_cpu_count][3]);
196
197if (++acpi_cpu_count == 32) return;
198}
199}
200}
201
202DBG("end finding cpu names: cpu names found: %d\n", acpi_cpu_count);
203}
204
205struct acpi_2_ssdt *generate_cst_ssdt(struct acpi_2_fadt* fadt)
206{
207char ssdt_header[] =
208{
2090x53, 0x53, 0x44, 0x54, 0xE7, 0x00, 0x00, 0x00, /* SSDT.... */
2100x01, 0x17, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x41, /* ..PmRefA */
2110x43, 0x70, 0x75, 0x43, 0x73, 0x74, 0x00, 0x00, /* CpuCst.. */
2120x00, 0x10, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* ....INTL */
2130x31, 0x03, 0x10, 0x20/* 1.._*/
214};
215
216char resource_template_register_fixedhw[] =
217{
2180x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x7F,
2190x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
2200x00, 0x00, 0x01, 0x79, 0x00
221};
222
223char resource_template_register_systemio[] =
224{
2250x11, 0x14, 0x0A, 0x11, 0x82, 0x0C, 0x00, 0x01,
2260x08, 0x00, 0x00, 0x15, 0x04, 0x00, 0x00, 0x00,
2270x00, 0x00, 0x00, 0x79, 0x00,
228};
229
230if (Platform.CPU.Vendor != 0x756E6547) {
231verbose ("Not an Intel platform: C-States will not be generated !!!\n");
232return NULL;
233}
234
235if (fadt == NULL) {
236verbose ("FACP not exists: C-States will not be generated !!!\n");
237return NULL;
238}
239
240struct acpi_2_dsdt* dsdt = (void*)fadt->DSDT;
241
242if (dsdt == NULL) {
243verbose ("DSDT not found: C-States will not be generated !!!\n");
244return NULL;
245}
246
247if (acpi_cpu_count == 0)
248get_acpi_cpu_names((void*)dsdt, dsdt->Length);
249
250if (acpi_cpu_count > 0)
251{
252bool c2_enabled = false;
253bool c3_enabled = false;
254bool c4_enabled = false;
255bool cst_using_systemio = false;
256
257getBoolForKey(kEnableC2State, &c2_enabled, &bootInfo->chameleonConfig);
258getBoolForKey(kEnableC3State, &c3_enabled, &bootInfo->chameleonConfig);
259getBoolForKey(kEnableC4State, &c4_enabled, &bootInfo->chameleonConfig);
260getBoolForKey(kCSTUsingSystemIO, &cst_using_systemio, &bootInfo->chameleonConfig);
261
262c2_enabled = c2_enabled | (fadt->C2_Latency < 100);
263c3_enabled = c3_enabled | (fadt->C3_Latency < 1000);
264
265unsigned char cstates_count = 1 + (c2_enabled ? 1 : 0) + (c3_enabled ? 1 : 0);
266
267struct aml_chunk* root = aml_create_node(NULL);
268aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
269struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
270struct aml_chunk* name = aml_add_name(scop, "CST_");
271struct aml_chunk* pack = aml_add_package(name);
272aml_add_byte(pack, cstates_count);
273
274struct aml_chunk* tmpl = aml_add_package(pack);
275if (cst_using_systemio)
276{
277// C1
278resource_template_register_fixedhw[8] = 0x00;
279resource_template_register_fixedhw[9] = 0x00;
280resource_template_register_fixedhw[18] = 0x00;
281aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
282aml_add_byte(tmpl, 0x01); // C1
283aml_add_word(tmpl, 0x0001); // Latency
284aml_add_dword(tmpl, 0x000003e8); // Power
285
286uint8_t p_blk_lo, p_blk_hi;
287
288if (c2_enabled) // C2
289{
290p_blk_lo = acpi_cpu_p_blk + 4;
291p_blk_hi = (acpi_cpu_p_blk + 4) >> 8;
292
293tmpl = aml_add_package(pack);
294resource_template_register_systemio[11] = p_blk_lo; // C2
295resource_template_register_systemio[12] = p_blk_hi; // C2
296aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
297aml_add_byte(tmpl, 0x02); // C2
298aml_add_word(tmpl, 0x0040); // Latency
299aml_add_dword(tmpl, 0x000001f4); // Power
300}
301
302if (c4_enabled) // C4
303{
304p_blk_lo = acpi_cpu_p_blk + 5;
305p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
306
307tmpl = aml_add_package(pack);
308resource_template_register_systemio[11] = p_blk_lo; // C4
309resource_template_register_systemio[12] = p_blk_hi; // C4
310aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
311aml_add_byte(tmpl, 0x04); // C4
312aml_add_word(tmpl, 0x0080); // Latency
313aml_add_dword(tmpl, 0x000000C8); // Power
314}
315else if (c3_enabled) // C3
316{
317p_blk_lo = acpi_cpu_p_blk + 5;
318p_blk_hi = (acpi_cpu_p_blk + 5) >> 8;
319
320tmpl = aml_add_package(pack);
321resource_template_register_systemio[11] = p_blk_lo; // C3
322resource_template_register_systemio[12] = p_blk_hi; // C3
323aml_add_buffer(tmpl, resource_template_register_systemio, sizeof(resource_template_register_systemio));
324aml_add_byte(tmpl, 0x03);// C3
325aml_add_word(tmpl, 0x0060);// Latency
326aml_add_dword(tmpl, 0x0000015e);// Power
327}
328}
329else
330{
331// C1
332resource_template_register_fixedhw[11] = 0x00; // C1
333aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
334aml_add_byte(tmpl, 0x01);// C1
335aml_add_word(tmpl, 0x0001);// Latency
336aml_add_dword(tmpl, 0x000003e8);// Power
337
338resource_template_register_fixedhw[18] = 0x03;
339
340if (c2_enabled) // C2
341{
342tmpl = aml_add_package(pack);
343resource_template_register_fixedhw[11] = 0x10; // C2
344aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
345aml_add_byte(tmpl, 0x02);// C2
346aml_add_word(tmpl, 0x0040);// Latency
347aml_add_dword(tmpl, 0x000001f4);// Power
348}
349
350if (c4_enabled) // C4
351{
352tmpl = aml_add_package(pack);
353resource_template_register_fixedhw[11] = 0x30; // C4
354aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
355aml_add_byte(tmpl, 0x04);// C4
356aml_add_word(tmpl, 0x0080);// Latency
357aml_add_dword(tmpl, 0x000000C8);// Power
358}
359else if (c3_enabled)
360{
361tmpl = aml_add_package(pack);
362resource_template_register_fixedhw[11] = 0x20; // C3
363aml_add_buffer(tmpl, resource_template_register_fixedhw, sizeof(resource_template_register_fixedhw));
364aml_add_byte(tmpl, 0x03);// C3
365aml_add_word(tmpl, 0x0060);// Latency
366aml_add_dword(tmpl, 0x0000015e);// Power
367}
368}
369
370// Aliaces
371int i;
372for (i = 0; i < acpi_cpu_count; i++)
373{
374char name[9];
375sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
376
377scop = aml_add_scope(root, name);
378aml_add_alias(scop, "CST_", "_CST");
379}
380
381aml_calculate_size(root);
382
383struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
384
385aml_write_node(root, (void*)ssdt, 0);
386
387ssdt->Length = root->Size;
388ssdt->Checksum = 0;
389ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
390
391aml_destroy_node(root);
392
393// dumpPhysAddr("C-States SSDT content: ", ssdt, ssdt->Length);
394
395verbose ("SSDT with CPU C-States generated successfully\n");
396
397return ssdt;
398}
399else
400{
401verbose ("ACPI CPUs not found: C-States not generated !!!\n");
402}
403
404return NULL;
405}
406
407struct acpi_2_ssdt *generate_pss_ssdt(struct acpi_2_dsdt* dsdt)
408{
409char ssdt_header[] =
410{
4110x53, 0x53, 0x44, 0x54, 0x7E, 0x00, 0x00, 0x00, /* SSDT.... */
4120x01, 0x6A, 0x50, 0x6D, 0x52, 0x65, 0x66, 0x00, /* ..PmRef. */
4130x43, 0x70, 0x75, 0x50, 0x6D, 0x00, 0x00, 0x00, /* CpuPm... */
4140x00, 0x30, 0x00, 0x00, 0x49, 0x4E, 0x54, 0x4C, /* .0..INTL */
4150x31, 0x03, 0x10, 0x20,/* 1.._*/
416};
417
418if (Platform.CPU.Vendor != 0x756E6547) {
419verbose ("Not an Intel platform: P-States will not be generated !!!\n");
420return NULL;
421}
422
423if (!(Platform.CPU.Features & CPU_FEATURE_MSR)) {
424verbose ("Unsupported CPU: P-States will not be generated !!! No MSR support\n");
425return NULL;
426}
427
428if (acpi_cpu_count == 0)
429get_acpi_cpu_names((void*)dsdt, dsdt->Length);
430
431if (acpi_cpu_count > 0)
432{
433struct p_state initial, maximum, minimum, p_states[32];
434uint8_t p_states_count = 0;
435
436// Retrieving P-States, ported from code by superhai (c)
437switch (Platform.CPU.Family) {
438case 0x06:
439{
440switch (Platform.CPU.Model)
441{
442case CPU_MODEL_DOTHAN:// Intel Pentium M
443case CPU_MODEL_YONAH:// Intel Mobile Core Solo, Duo
444case CPU_MODEL_MEROM:// Intel Mobile Core 2 Solo, Duo, Xeon 30xx, Xeon 51xx, Xeon X53xx, Xeon E53xx, Xeon X32xx
445case CPU_MODEL_PENRYN:// Intel Core 2 Solo, Duo, Quad, Extreme, Xeon X54xx, Xeon X33xx
446case CPU_MODEL_ATOM:// Intel Atom (45nm)
447{
448bool cpu_dynamic_fsb = false;
449
450if (rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 27))
451{
452wrmsr64(MSR_IA32_EXT_CONFIG, (rdmsr64(MSR_IA32_EXT_CONFIG) | (1 << 28)));
453delay(1);
454cpu_dynamic_fsb = rdmsr64(MSR_IA32_EXT_CONFIG) & (1 << 28);
455}
456
457bool cpu_noninteger_bus_ratio = (rdmsr64(MSR_IA32_PERF_STATUS) & (1ULL << 46));
458
459initial.Control = rdmsr64(MSR_IA32_PERF_STATUS);
460
461maximum.Control = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 32) & 0x1F3F) | (0x4000 * cpu_noninteger_bus_ratio);
462maximum.CID = ((maximum.FID & 0x1F) << 1) | cpu_noninteger_bus_ratio;
463
464minimum.FID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 24) & 0x1F) | (0x80 * cpu_dynamic_fsb);
465minimum.VID = ((rdmsr64(MSR_IA32_PERF_STATUS) >> 48) & 0x3F);
466
467if (minimum.FID == 0)
468{
469uint64_t msr;
470uint8_t i;
471// Probe for lowest fid
472for (i = maximum.FID; i >= 0x6; i--)
473{
474msr = rdmsr64(MSR_IA32_PERF_CONTROL);
475wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (i << 8) | minimum.VID);
476intel_waitforsts();
477minimum.FID = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0x1F;
478delay(1);
479}
480
481msr = rdmsr64(MSR_IA32_PERF_CONTROL);
482wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
483intel_waitforsts();
484}
485
486if (minimum.VID == maximum.VID)
487{
488uint64_t msr;
489uint8_t i;
490// Probe for lowest vid
491for (i = maximum.VID; i > 0xA; i--)
492{
493msr = rdmsr64(MSR_IA32_PERF_CONTROL);
494wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (minimum.FID << 8) | i);
495intel_waitforsts();
496minimum.VID = rdmsr64(MSR_IA32_PERF_STATUS) & 0x3F;
497delay(1);
498}
499
500msr = rdmsr64(MSR_IA32_PERF_CONTROL);
501wrmsr64(MSR_IA32_PERF_CONTROL, (msr & 0xFFFFFFFFFFFF0000ULL) | (maximum.FID << 8) | maximum.VID);
502intel_waitforsts();
503}
504
505minimum.CID = ((minimum.FID & 0x1F) << 1) >> cpu_dynamic_fsb;
506
507// Sanity check
508if (maximum.CID < minimum.CID)
509{
510DBG("Insane FID values!");
511p_states_count = 0;
512}
513else
514{
515// Finalize P-States
516// Find how many P-States machine supports
517p_states_count = maximum.CID - minimum.CID + 1;
518
519if (p_states_count > 32)
520p_states_count = 32;
521
522uint8_t vidstep;
523uint8_t i = 0, u, invalid = 0;
524
525vidstep = ((maximum.VID << 2) - (minimum.VID << 2)) / (p_states_count - 1);
526
527for (u = 0; u < p_states_count; u++)
528{
529i = u - invalid;
530
531p_states[i].CID = maximum.CID - u;
532p_states[i].FID = (p_states[i].CID >> 1);
533
534if (p_states[i].FID < 0x6)
535{
536if (cpu_dynamic_fsb)
537p_states[i].FID = (p_states[i].FID << 1) | 0x80;
538}
539else if (cpu_noninteger_bus_ratio)
540{
541p_states[i].FID = p_states[i].FID | (0x40 * (p_states[i].CID & 0x1));
542}
543
544if (i && p_states[i].FID == p_states[i-1].FID)
545invalid++;
546
547p_states[i].VID = ((maximum.VID << 2) - (vidstep * u)) >> 2;
548
549uint32_t multiplier = p_states[i].FID & 0x1f;// = 0x08
550bool half = p_states[i].FID & 0x40;// = 0x01
551bool dfsb = p_states[i].FID & 0x80;// = 0x00
552uint32_t fsb = Platform.CPU.FSBFrequency / 1000000; // = 400
553uint32_t halffsb = (fsb + 1) >> 1;// = 200
554uint32_t frequency = (multiplier * fsb);// = 3200
555
556p_states[i].Frequency = (frequency + (half * halffsb)) >> dfsb;// = 3200 + 200 = 3400
557}
558
559p_states_count -= invalid;
560}
561
562break;
563}
564case CPU_MODEL_FIELDS:// Intel Core i5, i7, Xeon X34xx LGA1156 (45nm)
565case CPU_MODEL_DALES:
566case CPU_MODEL_DALES_32NM:// Intel Core i3, i5 LGA1156 (32nm)
567case CPU_MODEL_NEHALEM:// Intel Core i7, Xeon W35xx, Xeon X55xx, Xeon E55xx LGA1366 (45nm)
568case CPU_MODEL_NEHALEM_EX:// Intel Xeon X75xx, Xeon X65xx, Xeon E75xx, Xeon E65xx
569case CPU_MODEL_WESTMERE:// Intel Core i7, Xeon X56xx, Xeon E56xx, Xeon W36xx LGA1366 (32nm) 6 Core
570case CPU_MODEL_WESTMERE_EX:// Intel Xeon E7
571case CPU_MODEL_SANDYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (32nm)
572case CPU_MODEL_JAKETOWN:// Intel Core i7, Xeon E5 LGA2011 (32nm)
573case CPU_MODEL_IVYBRIDGE:// Intel Core i3, i5, i7 LGA1155 (22nm)
574case CPU_MODEL_HASWELL://
575case CPU_MODEL_IVYBRIDGE_XEON: //
576//case CPU_MODEL_HASWELL_H://
577case CPU_MODEL_HASWELL_MB://
578case CPU_MODEL_HASWELL_ULT://
579case CPU_MODEL_HASWELL_ULX://
580
581{
582if ((Platform.CPU.Model == CPU_MODEL_SANDYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_JAKETOWN) ||
583(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE) || (Platform.CPU.Model == CPU_MODEL_HASWELL) ||
584(Platform.CPU.Model == CPU_MODEL_IVYBRIDGE_XEON) || (Platform.CPU.Model == CPU_MODEL_HASWELL_MB) ||
585(Platform.CPU.Model == CPU_MODEL_HASWELL_ULT) || (Platform.CPU.Model == CPU_MODEL_HASWELL_ULX))
586{
587maximum.Control = (rdmsr64(MSR_IA32_PERF_STATUS) >> 8) & 0xff;
588}
589else
590{
591maximum.Control = rdmsr64(MSR_IA32_PERF_STATUS) & 0xff;
592}
593
594minimum.Control = (rdmsr64(MSR_PLATFORM_INFO) >> 40) & 0xff;
595
596verbose("P-States: min 0x%x, max 0x%x\n", minimum.Control, maximum.Control);
597
598// Sanity check
599if (maximum.Control < minimum.Control)
600{
601DBG("Insane control values!");
602p_states_count = 0;
603}
604else
605{
606uint8_t i;
607p_states_count = 0;
608
609for (i = maximum.Control; i >= minimum.Control; i--)
610{
611p_states[p_states_count].Control = i;
612p_states[p_states_count].CID = p_states[p_states_count].Control << 1;
613p_states[p_states_count].Frequency = (Platform.CPU.FSBFrequency / 1000000) * i;
614p_states_count++;
615}
616}
617
618break;
619}
620default:
621verbose ("Unsupported CPU: P-States not generated !!! Unknown CPU Type\n");
622break;
623}
624}
625}
626
627// Generating SSDT
628if (p_states_count > 0)
629{
630int i;
631
632struct aml_chunk* root = aml_create_node(NULL);
633aml_add_buffer(root, ssdt_header, sizeof(ssdt_header)); // SSDT header
634
635struct aml_chunk* scop = aml_add_scope(root, "\\_PR_");
636struct aml_chunk* name = aml_add_name(scop, "PSS_");
637struct aml_chunk* pack = aml_add_package(name);
638
639for (i = 0; i < p_states_count; i++)
640{
641struct aml_chunk* pstt = aml_add_package(pack);
642
643aml_add_dword(pstt, p_states[i].Frequency);
644aml_add_dword(pstt, 0x00000000); // Power
645aml_add_dword(pstt, 0x0000000A); // Latency
646aml_add_dword(pstt, 0x0000000A); // Latency
647aml_add_dword(pstt, p_states[i].Control);
648aml_add_dword(pstt, i+1); // Status
649}
650
651// Add aliaces
652for (i = 0; i < acpi_cpu_count; i++)
653{
654char name[9];
655sprintf(name, "_PR_%c%c%c%c", acpi_cpu_name[i][0], acpi_cpu_name[i][1], acpi_cpu_name[i][2], acpi_cpu_name[i][3]);
656
657scop = aml_add_scope(root, name);
658aml_add_alias(scop, "PSS_", "_PSS");
659}
660
661aml_calculate_size(root);
662
663struct acpi_2_ssdt *ssdt = (struct acpi_2_ssdt *)AllocateKernelMemory(root->Size);
664
665aml_write_node(root, (void*)ssdt, 0);
666
667ssdt->Length = root->Size;
668ssdt->Checksum = 0;
669ssdt->Checksum = 256 - checksum8(ssdt, ssdt->Length);
670
671aml_destroy_node(root);
672
673//dumpPhysAddr("P-States SSDT content: ", ssdt, ssdt->Length);
674
675verbose ("SSDT with CPU P-States generated successfully\n");
676
677return ssdt;
678}
679}
680else
681{
682verbose ("ACPI CPUs not found: P-States not generated !!!\n");
683}
684
685return NULL;
686}
687
688struct acpi_2_fadt *patch_fadt(struct acpi_2_fadt *fadt, struct acpi_2_dsdt *new_dsdt)
689{
690extern void setupSystemType();
691
692struct acpi_2_fadt *fadt_mod;
693bool fadt_rev2_needed = false;
694bool fix_restart;
695bool fix_restart_ps2;
696const char * value;
697
698// Restart Fix
699if (Platform.CPU.Vendor == 0x756E6547) {/* Intel */
700fix_restart = true;
701fix_restart_ps2 = false;
702if ( getBoolForKey(kPS2RestartFix, &fix_restart_ps2, &bootInfo->chameleonConfig) && fix_restart_ps2)
703fix_restart = true;
704else
705getBoolForKey(kRestartFix, &fix_restart, &bootInfo->chameleonConfig);
706
707} else {
708verbose ("Not an Intel platform: Restart Fix not applied !!!\n");
709fix_restart = false;
710}
711
712if (fix_restart) fadt_rev2_needed = true;
713
714// Allocate new fadt table
715if (fadt->Length < 0x84 && fadt_rev2_needed)
716{
717fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(0x84);
718memcpy(fadt_mod, fadt, fadt->Length);
719fadt_mod->Length = 0x84;
720fadt_mod->Revision = 0x02; // FADT rev 2 (ACPI 1.0B MS extensions)
721}
722else
723{
724fadt_mod=(struct acpi_2_fadt *)AllocateKernelMemory(fadt->Length);
725memcpy(fadt_mod, fadt, fadt->Length);
726}
727// Determine system type / PM_Model
728if ( (value=getStringForKey(kSystemType, &bootInfo->chameleonConfig))!=NULL)
729{
730if (Platform.Type > 6)
731{
732if(fadt_mod->PM_Profile<=6)
733Platform.Type = fadt_mod->PM_Profile; // get the fadt if correct
734else
735Platform.Type = 1;/* Set a fixed value (Desktop) */
736verbose("Error: system-type must be 0..6. Defaulting to %d !\n", Platform.Type);
737}
738else
739Platform.Type = (unsigned char) strtoul(value, NULL, 10);
740}
741// Set PM_Profile from System-type if only user wanted this value to be forced
742if (fadt_mod->PM_Profile != Platform.Type)
743{
744if (value)
745{
746// user has overriden the SystemType so take care of it in FACP
747verbose("FADT: changing PM_Profile from 0x%02x to 0x%02x\n", fadt_mod->PM_Profile, Platform.Type);
748fadt_mod->PM_Profile = Platform.Type;
749}
750else
751{
752// PM_Profile has a different value and no override has been set, so reflect the user value to ioregs
753Platform.Type = fadt_mod->PM_Profile <= 6 ? fadt_mod->PM_Profile : 1;
754}
755}
756// We now have to write the systemm-type in ioregs: we cannot do it before in setupDeviceTree()
757// because we need to take care of facp original content, if it is correct.
758setupSystemType();
759
760// Patch FADT to fix restart
761if (fix_restart)
762{
763if (fix_restart_ps2) {
764fadt_mod->Flags|= 0x400;
765fadt_mod->Reset_SpaceID= 0x01; // System I/O
766fadt_mod->Reset_BitWidth= 0x08; // 1 byte
767fadt_mod->Reset_BitOffset= 0x00; // Offset 0
768fadt_mod->Reset_AccessWidth= 0x01; // Byte access
769fadt_mod->Reset_Address= 0x64; // Address of the register
770fadt_mod->Reset_Value= 0xfe; // Value to write to reset the system
771msglog("FADT: PS2 Restart Fix applied!\n");
772}
773else {
774fadt_mod->Flags|= 0x400;
775fadt_mod->Reset_SpaceID= 0x01; // System I/O
776fadt_mod->Reset_BitWidth= 0x08; // 1 byte
777fadt_mod->Reset_BitOffset= 0x00; // Offset 0
778fadt_mod->Reset_AccessWidth= 0x01; // Byte access
779fadt_mod->Reset_Address= 0x0cf9; // Address of the register
780fadt_mod->Reset_Value= 0x06; // Value to write to reset the system
781verbose("FADT: ACPI Restart Fix applied!\n");
782}
783
784}
785
786// Patch DSDT Address if we have loaded DSDT.aml
787if(new_dsdt)
788{
789DBG("DSDT: Old @%x,%x, ",fadt_mod->DSDT,fadt_mod->X_DSDT);
790
791fadt_mod->DSDT=(uint32_t)new_dsdt;
792if ((uint32_t)(&(fadt_mod->X_DSDT))-(uint32_t)fadt_mod+8<=fadt_mod->Length)
793fadt_mod->X_DSDT=(uint32_t)new_dsdt;
794
795DBG("New @%x,%x\n",fadt_mod->DSDT,fadt_mod->X_DSDT);
796
797verbose("FADT: Using custom DSDT!\n");
798}
799
800// Correct the checksum
801fadt_mod->Checksum=0;
802fadt_mod->Checksum=256-checksum8(fadt_mod,fadt_mod->Length);
803
804return fadt_mod;
805}
806
807/* Setup ACPI without replacing DSDT. */
808int setupAcpiNoMod()
809{
810//addConfigurationTable(&gEfiAcpiTableGuid, getAddressOfAcpiTable(), "ACPI");
811//addConfigurationTable(&gEfiAcpi20TableGuid, getAddressOfAcpi20Table(), "ACPI_20");
812/* XXX aserebln why uint32 cast if pointer is uint64 ? */
813acpi10_p = (uint32_t)getAddressOfAcpiTable();
814acpi20_p = (uint32_t)getAddressOfAcpi20Table();
815addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
816if(acpi20_p) addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
817return 1;
818}
819
820/* Setup ACPI. Replace DSDT if DSDT.aml is found */
821int setupAcpi(void)
822{
823int version;
824void *new_dsdt;
825
826
827const char *filename;
828char dirSpec[128];
829int len = 0;
830
831// always reset cpu count to 0 when injecting new acpi
832acpi_cpu_count = 0;
833
834// Try using the file specified with the DSDT option
835if (getValueForKey(kDSDT, &filename, &len, &bootInfo->chameleonConfig))
836{
837sprintf(dirSpec, filename);
838}
839else
840{
841sprintf(dirSpec, "DSDT.aml");
842}
843
844// Load replacement DSDT
845new_dsdt = loadACPITable(dirSpec);
846// Mozodojo: going to patch FACP and load SSDT's even if DSDT.aml is not present
847/*if (!new_dsdt)
848 {
849 return setupAcpiNoMod();
850 }*/
851
852// Mozodojo: Load additional SSDTs
853struct acpi_2_ssdt *new_ssdt[32]; // 30 + 2 additional tables for pss & cst
854int ssdt_count=0;
855
856// SSDT Options
857bool drop_ssdt=false, generate_pstates=false, generate_cstates=false;
858
859getBoolForKey(kDropSSDT, &drop_ssdt, &bootInfo->chameleonConfig);
860getBoolForKey(kGeneratePStates, &generate_pstates, &bootInfo->chameleonConfig);
861getBoolForKey(kGenerateCStates, &generate_cstates, &bootInfo->chameleonConfig);
862
863DBG("Generating P-States config: %d\n", generate_pstates);
864DBG("Generating C-States config: %d\n", generate_cstates);
865
866{
867int i;
868
869for (i=0; i<30; i++)
870{
871char filename[512];
872
873sprintf(filename, i>0?"SSDT-%d.aml":"SSDT.aml", i);
874
875if ( (new_ssdt[ssdt_count] = loadACPITable(filename)) )
876{
877ssdt_count++;
878}
879else
880{
881break;
882}
883}
884}
885
886// Do the same procedure for both versions of ACPI
887for (version=0; version<2; version++) {
888struct acpi_2_rsdp *rsdp, *rsdp_mod;
889struct acpi_2_rsdt *rsdt, *rsdt_mod;
890int rsdplength;
891
892// Find original rsdp
893rsdp=(struct acpi_2_rsdp *)(version?getAddressOfAcpi20Table():getAddressOfAcpiTable());
894if (!rsdp)
895{
896DBG("No ACPI version %d found. Ignoring\n", version+1);
897if (version)
898addConfigurationTable(&gEfiAcpi20TableGuid, NULL, "ACPI_20");
899else
900addConfigurationTable(&gEfiAcpiTableGuid, NULL, "ACPI");
901continue;
902}
903rsdplength=version?rsdp->Length:20;
904
905DBG("RSDP version %d found @%x. Length=%d\n",version+1,rsdp,rsdplength);
906
907/* FIXME: no check that memory allocation succeeded
908 * Copy and patch RSDP,RSDT, XSDT and FADT
909 * For more info see ACPI Specification pages 110 and following
910 */
911
912rsdp_mod=(struct acpi_2_rsdp *) AllocateKernelMemory(rsdplength);
913memcpy(rsdp_mod, rsdp, rsdplength);
914
915rsdt=(struct acpi_2_rsdt *)(rsdp->RsdtAddress);
916
917DBG("RSDT @%x, Length %d\n",rsdt, rsdt->Length);
918
919if (rsdt && (uint32_t)rsdt !=0xffffffff && rsdt->Length<0x10000)
920{
921uint32_t *rsdt_entries;
922int rsdt_entries_num;
923int dropoffset=0, i;
924
925// mozo: using malloc cos I didn't found how to free already allocated kernel memory
926rsdt_mod=(struct acpi_2_rsdt *)malloc(rsdt->Length);
927memcpy (rsdt_mod, rsdt, rsdt->Length);
928rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
929rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
930rsdt_entries=(uint32_t *)(rsdt_mod+1);
931for (i=0;i<rsdt_entries_num;i++)
932{
933char *table=(char *)(rsdt_entries[i]);
934if (!table)
935continue;
936
937DBG("TABLE %c%c%c%c,",table[0],table[1],table[2],table[3]);
938
939rsdt_entries[i-dropoffset]=rsdt_entries[i];
940
941if (drop_ssdt && tableSign(table, "SSDT"))
942{
943dropoffset++;
944continue;
945}
946if (tableSign(table, "DSDT"))
947{
948DBG("DSDT found\n");
949
950if(new_dsdt)
951rsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
952
953continue;
954}
955if (tableSign(table, "FACP"))
956{
957struct acpi_2_fadt *fadt, *fadt_mod;
958fadt=(struct acpi_2_fadt *)rsdt_entries[i];
959
960DBG("FADT found @%x, Length %d\n",fadt, fadt->Length);
961
962if (!fadt || (uint32_t)fadt == 0xffffffff || fadt->Length>0x10000)
963{
964printf("FADT incorrect. Not modified\n");
965continue;
966}
967
968fadt_mod = patch_fadt(fadt, new_dsdt);
969rsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
970
971// Generate _CST SSDT
972if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
973{
974DBG("C-States generated\n");
975generate_cstates = false; // Generate SSDT only once!
976ssdt_count++;
977}
978
979// Generating _PSS SSDT
980if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
981{
982DBG("P-States generated\n");
983generate_pstates = false; // Generate SSDT only once!
984ssdt_count++;
985}
986
987continue;
988}
989}
990DBG("\n");
991
992// Allocate rsdt in Kernel memory area
993rsdt_mod->Length += 4*ssdt_count - 4*dropoffset;
994struct acpi_2_rsdt *rsdt_copy = (struct acpi_2_rsdt *)AllocateKernelMemory(rsdt_mod->Length);
995memcpy (rsdt_copy, rsdt_mod, rsdt_mod->Length);
996free(rsdt_mod); rsdt_mod = rsdt_copy;
997rsdp_mod->RsdtAddress=(uint32_t)rsdt_mod;
998rsdt_entries_num=(rsdt_mod->Length-sizeof(struct acpi_2_rsdt))/4;
999rsdt_entries=(uint32_t *)(rsdt_mod+1);
1000
1001// Mozodojo: Insert additional SSDTs into RSDT
1002if(ssdt_count>0)
1003{
1004int j;
1005
1006for (j=0; j<ssdt_count; j++)
1007rsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
1008
1009verbose("RSDT: Added %d SSDT table(s)\n", ssdt_count);
1010
1011}
1012
1013// Correct the checksum of RSDT
1014DBG("RSDT: Original checksum %d, ", rsdt_mod->Checksum);
1015
1016rsdt_mod->Checksum=0;
1017rsdt_mod->Checksum=256-checksum8(rsdt_mod,rsdt_mod->Length);
1018
1019DBG("New checksum %d at %x\n", rsdt_mod->Checksum,rsdt_mod);
1020}
1021else
1022{
1023rsdp_mod->RsdtAddress=0;
1024printf("RSDT not found or RSDT incorrect\n");
1025}
1026
1027if (version)
1028{
1029struct acpi_2_xsdt *xsdt, *xsdt_mod;
1030
1031// FIXME: handle 64-bit address correctly
1032
1033xsdt=(struct acpi_2_xsdt*) ((uint32_t)rsdp->XsdtAddress);
1034DBG("XSDT @%x;%x, Length=%d\n", (uint32_t)(rsdp->XsdtAddress>>32),(uint32_t)rsdp->XsdtAddress, xsdt->Length);
1035
1036if (xsdt && (uint64_t)rsdp->XsdtAddress<0xffffffff && xsdt->Length<0x10000)
1037{
1038uint64_t *xsdt_entries;
1039int xsdt_entries_num, i;
1040int dropoffset=0;
1041
1042// mozo: using malloc cos I didn't found how to free already allocated kernel memory
1043xsdt_mod=(struct acpi_2_xsdt*)malloc(xsdt->Length);
1044memcpy(xsdt_mod, xsdt, xsdt->Length);
1045
1046rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1047xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1048xsdt_entries=(uint64_t *)(xsdt_mod+1);
1049for (i=0;i<xsdt_entries_num;i++)
1050{
1051char *table=(char *)((uint32_t)(xsdt_entries[i]));
1052if (!table)
1053continue;
1054
1055xsdt_entries[i-dropoffset]=xsdt_entries[i];
1056
1057if (drop_ssdt && tableSign(table, "SSDT"))
1058{
1059dropoffset++;
1060continue;
1061}
1062if (tableSign(table, "DSDT"))
1063{
1064DBG("DSDT found\n");
1065
1066if (new_dsdt)
1067xsdt_entries[i-dropoffset]=(uint32_t)new_dsdt;
1068
1069DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1070
1071continue;
1072}
1073if (tableSign(table, "FACP"))
1074{
1075struct acpi_2_fadt *fadt, *fadt_mod;
1076fadt=(struct acpi_2_fadt *)(uint32_t)xsdt_entries[i];
1077
1078DBG("FADT found @%x,%x, Length %d\n",(uint32_t)(xsdt_entries[i]>>32),fadt,
1079fadt->Length);
1080
1081if (!fadt || (uint64_t)xsdt_entries[i] >= 0xffffffff || fadt->Length>0x10000)
1082{
1083verbose("FADT incorrect or after 4GB. Dropping XSDT\n");
1084goto drop_xsdt;
1085}
1086
1087fadt_mod = patch_fadt(fadt, new_dsdt);
1088xsdt_entries[i-dropoffset]=(uint32_t)fadt_mod;
1089
1090DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1091
1092// Generate _CST SSDT
1093if (generate_cstates && (new_ssdt[ssdt_count] = generate_cst_ssdt(fadt_mod)))
1094{
1095generate_cstates = false; // Generate SSDT only once!
1096ssdt_count++;
1097}
1098
1099// Generating _PSS SSDT
1100if (generate_pstates && (new_ssdt[ssdt_count] = generate_pss_ssdt((void*)fadt_mod->DSDT)))
1101{
1102generate_pstates = false; // Generate SSDT only once!
1103ssdt_count++;
1104}
1105
1106continue;
1107}
1108
1109DBG("TABLE %c%c%c%c@%x,",table[0],table[1],table[2],table[3],xsdt_entries[i]);
1110
1111}
1112
1113// Allocate xsdt in Kernel memory area
1114xsdt_mod->Length += 8*ssdt_count - 8*dropoffset;
1115struct acpi_2_xsdt *xsdt_copy = (struct acpi_2_xsdt *)AllocateKernelMemory(xsdt_mod->Length);
1116memcpy(xsdt_copy, xsdt_mod, xsdt_mod->Length);
1117free(xsdt_mod); xsdt_mod = xsdt_copy;
1118rsdp_mod->XsdtAddress=(uint32_t)xsdt_mod;
1119xsdt_entries_num=(xsdt_mod->Length-sizeof(struct acpi_2_xsdt))/8;
1120xsdt_entries=(uint64_t *)(xsdt_mod+1);
1121
1122// Mozodojo: Insert additional SSDTs into XSDT
1123if(ssdt_count>0)
1124{
1125int j;
1126
1127for (j=0; j<ssdt_count; j++)
1128xsdt_entries[i-dropoffset+j]=(uint32_t)new_ssdt[j];
1129
1130verbose("Added %d SSDT table(s) into XSDT\n", ssdt_count);
1131
1132}
1133
1134// Correct the checksum of XSDT
1135xsdt_mod->Checksum=0;
1136xsdt_mod->Checksum=256-checksum8(xsdt_mod,xsdt_mod->Length);
1137}
1138else
1139{
1140drop_xsdt:
1141
1142DBG("About to drop XSDT\n");
1143
1144/*FIXME: Now we just hope that if MacOS doesn't find XSDT it reverts to RSDT.
1145 * A Better strategy would be to generate
1146 */
1147
1148rsdp_mod->XsdtAddress=0xffffffffffffffffLL;
1149verbose("XSDT not found or XSDT incorrect\n");
1150}
1151}
1152
1153// Correct the checksum of RSDP
1154
1155DBG("RSDP: Original checksum %d, ", rsdp_mod->Checksum);
1156
1157rsdp_mod->Checksum=0;
1158rsdp_mod->Checksum=256-checksum8(rsdp_mod,20);
1159
1160DBG("New checksum %d\n", rsdp_mod->Checksum);
1161
1162if (version)
1163{
1164DBG("RSDP: Original extended checksum %d", rsdp_mod->ExtendedChecksum);
1165
1166rsdp_mod->ExtendedChecksum=0;
1167rsdp_mod->ExtendedChecksum=256-checksum8(rsdp_mod,rsdp_mod->Length);
1168
1169DBG("New extended checksum %d\n", rsdp_mod->ExtendedChecksum);
1170
1171}
1172
1173//verbose("Patched ACPI version %d DSDT\n", version+1);
1174if (version)
1175{
1176/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1177acpi20_p = (uint32_t)rsdp_mod;
1178addConfigurationTable(&gEfiAcpi20TableGuid, &acpi20_p, "ACPI_20");
1179}
1180else
1181{
1182/* XXX aserebln why uint32 cast if pointer is uint64 ? */
1183acpi10_p = (uint32_t)rsdp_mod;
1184addConfigurationTable(&gEfiAcpiTableGuid, &acpi10_p, "ACPI");
1185}
1186}
1187#if DEBUG_ACPI
1188printf("Press a key to continue... (DEBUG_ACPI)\n");
1189getchar();
1190#endif
1191return 1;
1192}
1193

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