1 | /*␊ |
2 | * Copyright (c) 1998-2009 Apple Computer, Inc. All rights reserved.␊ |
3 | *␊ |
4 | * @APPLE_LICENSE_HEADER_START@␊ |
5 | * ␊ |
6 | * The contents of this file constitute Original Code as defined in and␊ |
7 | * are subject to the Apple Public Source License Version 1.1 (the␊ |
8 | * "License"). You may not use this file except in compliance with the␊ |
9 | * License. Please obtain a copy of the License at␊ |
10 | * http://www.apple.com/publicsource and read it before using this file.␊ |
11 | * ␊ |
12 | * This Original Code and all software distributed under the License are␊ |
13 | * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER␊ |
14 | * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,␊ |
15 | * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,␊ |
16 | * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the␊ |
17 | * License for the specific language governing rights and limitations␊ |
18 | * under the License.␊ |
19 | * ␊ |
20 | * @APPLE_LICENSE_HEADER_END@␊ |
21 | */␊ |
22 | ␊ |
23 | #ifndef __LIBSAIO_SMBIOS_H␊ |
24 | #define __LIBSAIO_SMBIOS_H␊ |
25 | ␊ |
26 | //␊ |
27 | // Based on System Management BIOS Reference Specification v2.5␊ |
28 | //␊ |
29 | ␊ |
30 | typedef uint8_t SMBString;␊ |
31 | typedef uint8_t SMBByte;␊ |
32 | typedef uint16_t SMBWord;␊ |
33 | typedef uint32_t SMBDWord;␊ |
34 | typedef uint64_t SMBQWord;␊ |
35 | ␊ |
36 | ␊ |
37 | typedef struct DMIEntryPoint {␊ |
38 | SMBByte anchor[5];␊ |
39 | SMBByte checksum;␊ |
40 | SMBWord tableLength;␊ |
41 | SMBDWord tableAddress;␊ |
42 | SMBWord structureCount;␊ |
43 | SMBByte bcdRevision;␊ |
44 | } __attribute__((packed)) DMIEntryPoint;␊ |
45 | ␊ |
46 | typedef struct SMBEntryPoint {␊ |
47 | SMBByte anchor[4];␊ |
48 | SMBByte checksum;␊ |
49 | SMBByte entryPointLength;␊ |
50 | SMBByte majorVersion;␊ |
51 | SMBByte minorVersion;␊ |
52 | SMBWord maxStructureSize;␊ |
53 | SMBByte entryPointRevision;␊ |
54 | SMBByte formattedArea[5];␊ |
55 | DMIEntryPoint dmi;␊ |
56 | } __attribute__((packed)) SMBEntryPoint;␊ |
57 | ␊ |
58 | //␊ |
59 | // Header common to all SMBIOS structures␊ |
60 | //␊ |
61 | ␊ |
62 | typedef struct SMBStructHeader {␊ |
63 | SMBByte type;␊ |
64 | SMBByte length;␊ |
65 | SMBWord handle;␊ |
66 | } __attribute__((packed)) SMBStructHeader;␊ |
67 | ␊ |
68 | #define SMB_STRUCT_HEADER SMBStructHeader header;␊ |
69 | ␊ |
70 | typedef struct SMBAnchor␊ |
71 | {␊ |
72 | ␉const SMBStructHeader *␉header;␊ |
73 | ␉const uint8_t *␉␉␉next;␊ |
74 | ␉const uint8_t *␉␉␉end;␊ |
75 | } SMBAnchor;␊ |
76 | ␊ |
77 | #define SMB_ANCHOR_IS_VALID(x)␉\␊ |
78 | ␉((x) && ((x)->header) && ((x)->next) && ((x)->end))␊ |
79 | ␊ |
80 | #define SMB_ANCHOR_RESET(x)␉␉\␊ |
81 | ␉bzero(x, sizeof(typedef struct SMBAnchor));␊ |
82 | ␊ |
83 | //␊ |
84 | // SMBIOS structure types.␊ |
85 | //␊ |
86 | ␊ |
87 | enum {␊ |
88 | kSMBTypeBIOSInformation = 0,␊ |
89 | kSMBTypeSystemInformation = 1,␊ |
90 | kSMBTypeBaseBoard␉␉␉␉␉= 2,␊ |
91 | kSMBTypeSystemEnclosure = 3,␊ |
92 | kSMBTypeProcessorInformation = 4,␊ |
93 | kSMBTypeMemoryModule = 6,␊ |
94 | kSMBTypeCacheInformation = 7,␊ |
95 | kSMBTypeSystemSlot = 9,␊ |
96 | kSMBTypePhysicalMemoryArray = 16,␊ |
97 | kSMBTypeMemoryDevice = 17,␊ |
98 | kSMBType32BitMemoryErrorInfo = 18,␊ |
99 | kSMBType64BitMemoryErrorInfo = 33,␊ |
100 | ␊ |
101 | kSMBTypeEndOfTable = 127,␊ |
102 | ␊ |
103 | /* Apple Specific Structures */␊ |
104 | kSMBTypeFirmwareVolume = 128,␊ |
105 | kSMBTypeMemorySPD = 130,␊ |
106 | kSMBTypeOemProcessorType = 131,␊ |
107 | kSMBTypeOemProcessorBusSpeed = 132␊ |
108 | };␊ |
109 | ␊ |
110 | //␊ |
111 | // BIOS Information (Type 0)␊ |
112 | //␊ |
113 | typedef struct SMBBIOSInformation {␊ |
114 | SMB_STRUCT_HEADER // Type 0␊ |
115 | SMBString vendor; // BIOS vendor name␊ |
116 | SMBString version; // BIOS version␊ |
117 | SMBWord startSegment; // BIOS segment start␊ |
118 | SMBString releaseDate; // BIOS release date␊ |
119 | SMBByte romSize; // (n); 64K * (n+1) bytes␊ |
120 | SMBQWord characteristics; // supported BIOS functions␊ |
121 | } __attribute__((packed)) SMBBIOSInformation;␊ |
122 | ␊ |
123 | //␊ |
124 | // System Information (Type 1)␊ |
125 | //␊ |
126 | ␊ |
127 | typedef struct SMBSystemInformation {␊ |
128 | // 2.0+ spec (8 bytes)␊ |
129 | SMB_STRUCT_HEADER // Type 1␊ |
130 | SMBString manufacturer;␊ |
131 | SMBString productName;␊ |
132 | SMBString version;␊ |
133 | SMBString serialNumber;␊ |
134 | // 2.1+ spec (25 bytes)␊ |
135 | SMBByte uuid[16]; // can be all 0 or all 1's␊ |
136 | SMBByte wakeupReason; // reason for system wakeup␊ |
137 | // 2.4+ spec (27 bytes)␊ |
138 | SMBString skuNumber;␊ |
139 | SMBString family;␊ |
140 | } __attribute__((packed)) SMBSystemInformation;␊ |
141 | ␊ |
142 | //␊ |
143 | // Base Board (Type 2)␊ |
144 | //␊ |
145 | ␊ |
146 | typedef struct SMBBaseBoard {␊ |
147 | SMB_STRUCT_HEADER // Type 2␊ |
148 | SMBString␉manufacturer;␊ |
149 | SMBString␉product;␊ |
150 | SMBString␉version;␊ |
151 | SMBString␉serialNumber;␊ |
152 | SMBString␉assetTagNumber;␊ |
153 | SMBByte␉␉featureFlags;␊ |
154 | SMBString␉locationInChassis;␊ |
155 | SMBWord␉␉chassisHandle;␊ |
156 | SMBByte␉␉boardType;␊ |
157 | SMBByte␉␉numberOfContainedHandles;␊ |
158 | ␉// 0 - 255 contained handles go here but we do not include␊ |
159 | ␉// them in our structure. Be careful to use numberOfContainedHandles␊ |
160 | ␉// times sizeof(SMBWord) when computing the actual record size,␊ |
161 | ␉// if you need it.␊ |
162 | } __attribute__((packed)) SMBBaseBoard;␊ |
163 | ␊ |
164 | // Values for boardType in Type 2 records␊ |
165 | enum {␊ |
166 | kSMBBaseBoardUnknown␉␉␉␉= 0x01,␊ |
167 | kSMBBaseBoardOther␉␉␉␉␉= 0x02,␊ |
168 | kSMBBaseBoardServerBlade␉␉␉= 0x03,␊ |
169 | kSMBBaseBoardConnectivitySwitch␉␉= 0x04,␊ |
170 | kSMBBaseBoardSystemMgmtModule␉␉= 0x05,␊ |
171 | kSMBBaseBoardProcessorModule␉␉= 0x06,␊ |
172 | kSMBBaseBoardIOModule␉␉␉␉= 0x07,␊ |
173 | kSMBBaseBoardMemoryModule␉␉␉= 0x08,␊ |
174 | kSMBBaseBoardDaughter␉␉␉␉= 0x09,␊ |
175 | kSMBBaseBoardMotherboard␉␉␉= 0x0A,␊ |
176 | kSMBBaseBoardProcessorMemoryModule␉= 0x0B,␊ |
177 | kSMBBaseBoardProcessorIOModule␉␉= 0x0C,␊ |
178 | kSMBBaseBoardInterconnect␉␉␉= 0x0D,␊ |
179 | };␊ |
180 | ␊ |
181 | ␊ |
182 | //␊ |
183 | // System Enclosure (Type 3)␊ |
184 | //␊ |
185 | ␊ |
186 | typedef struct SMBSystemEnclosure {␊ |
187 | SMB_STRUCT_HEADER // Type 3␊ |
188 | SMBString manufacturer;␊ |
189 | SMBByte type;␊ |
190 | SMBString version;␊ |
191 | SMBString serialNumber;␊ |
192 | SMBString assetTagNumber;␊ |
193 | SMBByte bootupState;␊ |
194 | SMBByte powerSupplyState;␊ |
195 | SMBByte thermalState;␊ |
196 | SMBByte securityStatus;␊ |
197 | SMBDWord oemDefined;␊ |
198 | } __attribute__((packed)) SMBSystemEnclosure;␊ |
199 | ␊ |
200 | //␊ |
201 | // Processor Information (Type 4)␊ |
202 | //␊ |
203 | ␊ |
204 | typedef struct SMBProcessorInformation {␊ |
205 | // 2.0+ spec (26 bytes)␊ |
206 | SMB_STRUCT_HEADER // Type 4␊ |
207 | SMBString socketDesignation;␊ |
208 | SMBByte processorType; // CPU = 3␊ |
209 | SMBByte processorFamily; // processor family enum␊ |
210 | SMBString manufacturer;␊ |
211 | SMBQWord processorID; // based on CPUID␊ |
212 | SMBString processorVersion;␊ |
213 | SMBByte voltage; // bit7 cleared indicate legacy mode␊ |
214 | SMBWord externalClock; // external clock in MHz␊ |
215 | SMBWord maximumClock; // max internal clock in MHz␊ |
216 | SMBWord currentClock; // current internal clock in MHz␊ |
217 | SMBByte status;␊ |
218 | SMBByte processorUpgrade; // processor upgrade enum␊ |
219 | // 2.1+ spec (32 bytes)␊ |
220 | SMBWord L1CacheHandle;␊ |
221 | SMBWord L2CacheHandle;␊ |
222 | SMBWord L3CacheHandle;␊ |
223 | // 2.3+ spec (35 bytes)␊ |
224 | SMBString serialNumber;␊ |
225 | SMBString assetTag;␊ |
226 | SMBString partNumber;␊ |
227 | } __attribute__((packed)) SMBProcessorInformation;␊ |
228 | ␊ |
229 | #define kSMBProcessorInformationMinSize 26␊ |
230 | ␊ |
231 | //␊ |
232 | // Memory Module Information (Type 6)␊ |
233 | // Obsoleted since SMBIOS version 2.1␊ |
234 | //␊ |
235 | ␊ |
236 | typedef struct SMBMemoryModule {␊ |
237 | SMB_STRUCT_HEADER // Type 6␊ |
238 | SMBString socketDesignation;␊ |
239 | SMBByte bankConnections;␊ |
240 | SMBByte currentSpeed;␊ |
241 | SMBWord currentMemoryType;␊ |
242 | SMBByte installedSize;␊ |
243 | SMBByte enabledSize;␊ |
244 | SMBByte errorStatus;␊ |
245 | } __attribute__((packed)) SMBMemoryModule;␊ |
246 | ␊ |
247 | #define kSMBMemoryModuleSizeNotDeterminable 0x7D␊ |
248 | #define kSMBMemoryModuleSizeNotEnabled 0x7E␊ |
249 | #define kSMBMemoryModuleSizeNotInstalled 0x7F␊ |
250 | ␊ |
251 | //␊ |
252 | // Cache Information (Type 7)␊ |
253 | //␊ |
254 | ␊ |
255 | typedef struct SMBCacheInformation {␊ |
256 | SMB_STRUCT_HEADER // Type 7␊ |
257 | SMBString socketDesignation;␊ |
258 | SMBWord cacheConfiguration;␊ |
259 | SMBWord maximumCacheSize;␊ |
260 | SMBWord installedSize;␊ |
261 | SMBWord supportedSRAMType;␊ |
262 | SMBWord currentSRAMType;␊ |
263 | SMBByte cacheSpeed;␊ |
264 | SMBByte errorCorrectionType;␊ |
265 | SMBByte systemCacheType;␊ |
266 | SMBByte associativity;␊ |
267 | } __attribute__((packed)) SMBCacheInformation;␊ |
268 | ␊ |
269 | typedef struct SMBSystemSlot {␊ |
270 | // 2.0+ spec (12 bytes)␊ |
271 | SMB_STRUCT_HEADER // Type 9␊ |
272 | SMBString slotDesignation;␊ |
273 | SMBByte slotType;␊ |
274 | SMBByte slotDataBusWidth;␊ |
275 | SMBByte currentUsage;␊ |
276 | SMBByte slotLength;␊ |
277 | SMBWord slotID;␊ |
278 | SMBByte slotCharacteristics1;␊ |
279 | // 2.1+ spec (13 bytes)␊ |
280 | SMBByte slotCharacteristics2;␊ |
281 | } __attribute__((packed)) SMBSystemSlot;␊ |
282 | ␊ |
283 | //␊ |
284 | // Physical Memory Array (Type 16)␊ |
285 | //␊ |
286 | ␊ |
287 | typedef struct SMBPhysicalMemoryArray {␊ |
288 | // 2.1+ spec (15 bytes)␊ |
289 | SMB_STRUCT_HEADER // Type 16␊ |
290 | SMBByte physicalLocation; // physical location␊ |
291 | SMBByte arrayUse; // the use for the memory array␊ |
292 | SMBByte errorCorrection; // error correction/detection method␊ |
293 | SMBDWord maximumCapacity; // maximum memory capacity in kilobytes␊ |
294 | SMBWord errorHandle; // handle of a previously detected error␊ |
295 | SMBWord numMemoryDevices; // number of memory slots or sockets␊ |
296 | } __attribute__((packed)) SMBPhysicalMemoryArray;␊ |
297 | ␊ |
298 | // Memory Array - Use␊ |
299 | enum {␊ |
300 | kSMBMemoryArrayUseOther = 0x01,␊ |
301 | kSMBMemoryArrayUseUnknown = 0x02,␊ |
302 | kSMBMemoryArrayUseSystemMemory = 0x03,␊ |
303 | kSMBMemoryArrayUseVideoMemory = 0x04,␊ |
304 | kSMBMemoryArrayUseFlashMemory = 0x05,␊ |
305 | kSMBMemoryArrayUseNonVolatileMemory = 0x06,␊ |
306 | kSMBMemoryArrayUseCacheMemory = 0x07␊ |
307 | };␊ |
308 | ␊ |
309 | // Memory Array - Error Correction Types␊ |
310 | enum {␊ |
311 | kSMBMemoryArrayErrorCorrectionTypeOther = 0x01,␊ |
312 | kSMBMemoryArrayErrorCorrectionTypeUnknown = 0x02,␊ |
313 | kSMBMemoryArrayErrorCorrectionTypeNone = 0x03,␊ |
314 | kSMBMemoryArrayErrorCorrectionTypeParity = 0x04,␊ |
315 | kSMBMemoryArrayErrorCorrectionTypeSingleBitECC = 0x05,␊ |
316 | kSMBMemoryArrayErrorCorrectionTypeMultiBitECC = 0x06,␊ |
317 | kSMBMemoryArrayErrorCorrectionTypeCRC = 0x07␊ |
318 | };␊ |
319 | ␊ |
320 | //␊ |
321 | // Memory Device (Type 17)␊ |
322 | //␊ |
323 | ␊ |
324 | typedef struct SMBMemoryDevice {␊ |
325 | // 2.1+ spec (21 bytes)␊ |
326 | SMB_STRUCT_HEADER // Type 17␊ |
327 | SMBWord arrayHandle; // handle of the parent memory array␊ |
328 | SMBWord errorHandle; // handle of a previously detected error␊ |
329 | SMBWord totalWidth; // total width in bits; including ECC bits␊ |
330 | SMBWord dataWidth; // data width in bits␊ |
331 | SMBWord memorySize; // bit15 is scale, 0 = MB, 1 = KB␊ |
332 | SMBByte formFactor; // memory device form factor␊ |
333 | SMBByte deviceSet; // parent set of identical memory devices␊ |
334 | SMBString deviceLocator; // labeled socket; e.g. "SIMM 3"␊ |
335 | SMBString bankLocator; // labeled bank; e.g. "Bank 0" or "A"␊ |
336 | SMBByte memoryType; // type of memory␊ |
337 | SMBWord memoryTypeDetail; // additional detail on memory type␊ |
338 | // 2.3+ spec (27 bytes)␊ |
339 | SMBWord memorySpeed; // speed of device in MHz (0 for unknown)␊ |
340 | SMBString manufacturer;␊ |
341 | SMBString serialNumber;␊ |
342 | SMBString assetTag;␊ |
343 | SMBString partNumber;␊ |
344 | } __attribute__((packed)) SMBMemoryDevice;␊ |
345 | ␊ |
346 | //␊ |
347 | // Firmware Volume Description (Apple Specific - Type 128)␊ |
348 | //␊ |
349 | ␊ |
350 | enum {␊ |
351 | FW_REGION_RESERVED = 0,␊ |
352 | FW_REGION_RECOVERY = 1,␊ |
353 | FW_REGION_MAIN = 2,␊ |
354 | FW_REGION_NVRAM = 3,␊ |
355 | FW_REGION_CONFIG = 4,␊ |
356 | FW_REGION_DIAGVAULT = 5,␊ |
357 | ␊ |
358 | NUM_FLASHMAP_ENTRIES = 8␊ |
359 | };␊ |
360 | ␊ |
361 | typedef struct FW_REGION_INFO␊ |
362 | {␊ |
363 | SMBDWord StartAddress;␊ |
364 | SMBDWord EndAddress;␊ |
365 | } __attribute__((packed)) FW_REGION_INFO;␊ |
366 | ␊ |
367 | typedef struct SMBFirmwareVolume {␊ |
368 | SMB_STRUCT_HEADER // Type 128␊ |
369 | SMBByte RegionCount;␊ |
370 | SMBByte Reserved[3];␊ |
371 | SMBDWord FirmwareFeatures;␊ |
372 | SMBDWord FirmwareFeaturesMask;␊ |
373 | SMBByte RegionType[ NUM_FLASHMAP_ENTRIES ];␊ |
374 | FW_REGION_INFO FlashMap[ NUM_FLASHMAP_ENTRIES ];␊ |
375 | } __attribute__((packed)) SMBFirmwareVolume;␊ |
376 | ␊ |
377 | //␊ |
378 | // Memory SPD Data (Apple Specific - Type 130)␊ |
379 | //␊ |
380 | ␊ |
381 | typedef struct SMBMemorySPD {␊ |
382 | ␉SMB_STRUCT_HEADER // Type 130␊ |
383 | ␉SMBWord Type17Handle;␊ |
384 | ␉SMBWord Offset;␊ |
385 | ␉SMBWord Size;␊ |
386 | ␉SMBWord Data[];␊ |
387 | } __attribute__((packed)) SMBMemorySPD;␊ |
388 | ␊ |
389 | static const char *␊ |
390 | SMBMemoryDeviceTypes[] =␊ |
391 | {␊ |
392 | "RAM", /* 00h Undefined */␊ |
393 | "RAM", /* 01h Other */␊ |
394 | "RAM", /* 02h Unknown */␊ |
395 | "DRAM", /* 03h DRAM */␊ |
396 | "EDRAM", /* 04h EDRAM */␊ |
397 | "VRAM", /* 05h VRAM */␊ |
398 | "SRAM", /* 06h SRAM */␊ |
399 | "RAM", /* 07h RAM */␊ |
400 | "ROM", /* 08h ROM */␊ |
401 | "FLASH", /* 09h FLASH */␊ |
402 | "EEPROM", /* 0Ah EEPROM */␊ |
403 | "FEPROM", /* 0Bh FEPROM */␊ |
404 | "EPROM", /* 0Ch EPROM */␊ |
405 | "CDRAM", /* 0Dh CDRAM */␊ |
406 | "3DRAM", /* 0Eh 3DRAM */␊ |
407 | "SDRAM", /* 0Fh SDRAM */␊ |
408 | "SGRAM", /* 10h SGRAM */␊ |
409 | "RDRAM", /* 11h RDRAM */␊ |
410 | "DDR SDRAM", /* 12h DDR */␊ |
411 | "DDR2 SDRAM", /* 13h DDR2 */␊ |
412 | "DDR2 FB-DIMM", /* 14h DDR2 FB-DIMM */␊ |
413 | "RAM",␉␉␉/* 15h unused */␊ |
414 | "RAM",␉␉␉/* 16h unused */␊ |
415 | "RAM",␉␉␉/* 17h unused */␊ |
416 | "DDR3",␉␉␉/* 18h DDR3, chosen in [5776134] */␊ |
417 | };␊ |
418 | ␊ |
419 | static const int␊ |
420 | kSMBMemoryDeviceTypeCount = sizeof(SMBMemoryDeviceTypes) /␊ |
421 | sizeof(SMBMemoryDeviceTypes[0]);␊ |
422 | ␊ |
423 | //␊ |
424 | // OEM Processor Type (Apple Specific - Type 131)␊ |
425 | //␊ |
426 | ␊ |
427 | typedef struct SMBOemProcessorType {␊ |
428 | ␉SMB_STRUCT_HEADER␊ |
429 | ␉SMBWord ProcessorType;␊ |
430 | } __attribute__((packed)) SMBOemProcessorType;␊ |
431 | ␊ |
432 | //␊ |
433 | // OEM Processor Bus Speed (Apple Specific - Type 132)␊ |
434 | //␊ |
435 | typedef struct SMBOemProcessorBusSpeed {␊ |
436 | ␉SMB_STRUCT_HEADER␊ |
437 | ␉SMBWord ProcessorBusSpeed; // MT/s unit␊ |
438 | } __attribute__((packed)) SMBOemProcessorBusSpeed;␊ |
439 | ␊ |
440 | //----------------------------------------------------------------------------------------------------------␊ |
441 | ␊ |
442 | /* From Foundation/Efi/Guid/Smbios/SmBios.h */␊ |
443 | /* Modified to wrap Data4 array init with {} */␊ |
444 | #define EFI_SMBIOS_TABLE_GUID {0xeb9d2d31, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d}}␊ |
445 | ␊ |
446 | #define SMBIOS_ORIGINAL␉␉0␊ |
447 | #define SMBIOS_PATCHED␉␉1␊ |
448 | ␊ |
449 | extern void *getSmbios(int which);␊ |
450 | extern void readSMBIOSInfo(SMBEntryPoint *eps);␊ |
451 | extern void setupSMBIOSTable(void);␊ |
452 | ␊ |
453 | extern void decodeSMBIOSTable(SMBEntryPoint *eps);␊ |
454 | ␊ |
455 | ␊ |
456 | #endif /* !__LIBSAIO_SMBIOS_H */␊ |
457 | |