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Root/trunk/i386/libsaio/hda.c

1/*␊
2 *␉HDA injector / Audio Enabler␊
3 *␊
4 *␉Copyright (C) 2012␉Chameleon Team␊
5 *␉Edit by Fabio (ErmaC)␊
6 *␉HDA bus scans and codecs enumeration by Zenith432␊
7 *␊
8 *␉HDA injector is free software: you can redistribute it and/or modify␊
9 *␉it under the terms of the GNU General Public License as published by␊
10 *␉the Free Software Foundation, either version 3 of the License, or␊
11 *␉(at your option) any later version.␊
12 *␊
13 *␉HDA injector is distributed in the hope that it will be useful,␊
14 *␉but WITHOUT ANY WARRANTY; without even the implied warranty of␊
15 *␉MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the␊
16 *␉GNU General Public License for more details.␊
17 *␊
18 *␉Alternatively you can choose to comply with APSL␊
19 *␊
20 *␉Permission is hereby granted, free of charge, to any person obtaining a␊
21 *␉copy of this software and associated documentation files (the "Software"),␊
22 *␉to deal in the Software without restriction, including without limitation␊
23 *␉the rights to use, copy, modify, merge, publish, distribute, sublicense,␊
24 *␉and/or sell copies of the Software, and to permit persons to whom the␊
25 *␉Software is furnished to do so, subject to the following conditions:␊
26 *␊
27 *␉The above copyright notice and this permission notice shall be included in␊
28 *␉all copies or substantial portions of the Software.␊
29 *␊
30 ******************************************************************************␊
31 * http://www.leidinger.net/FreeBSD/dox/dev_sound/html/df/d54/hdac_8c_source.html␊
32 *␊
33 * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>␊
34 * Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org>␊
35 * Copyright (c) 2008-2012 Alexander Motin <mav@FreeBSD.org>␊
36 * All rights reserved.␊
37 *␊
38 * Redistribution and use in source and binary forms, with or without␊
39 * modification, are permitted provided that the following conditions␊
40 * are met:␊
41 * 1. Redistributions of source code must retain the above copyright␊
42 * notice, this list of conditions and the following disclaimer.␊
43 * 2. Redistributions in binary form must reproduce the above copyright␊
44 * notice, this list of conditions and the following disclaimer in the␊
45 * documentation and/or other materials provided with the distribution.␊
46 *␊
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND␊
48 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE␊
49 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE␊
50 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE␊
51 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL␊
52 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS␊
53 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)␊
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT␊
55 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY␊
56 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF␊
57 * SUCH DAMAGE.␊
58 *␊
59 * Intel High Definition Audio (Controller) driver for FreeBSD.␊
60 *␊
61 ******************************************************************************/␊
62␊
63#include "boot.h"␊
64#include "bootstruct.h"␊
65#include "pci.h"␊
66#include "pci_root.h"␊
67#include "platform.h"␊
68#include "device_inject.h"␊
69#include "convert.h"␊
70#include "hda.h"␊
71//#include "aml_generator.h"␊
72␊
73#ifndef DEBUG_HDA␊
74␉#define DEBUG_HDA 0␊
75#endif␊
76␊
77#if DEBUG_HDA␊
78␉#define DBG(x...) verbose(x)␊
79#else␊
80␉#define DBG(x...)␊
81#endif␊
82␊
83extern uint32_t devices_number;␊
84␊
85const char *hda_slot_name[]␉␉=␉{ "AAPL,slot-name", "Built In" };␊
86␊
87uint8_t default_HDEF_layout_id[]␉␉=␉{0x0C, 0x00, 0x00, 0x00};␊
88#define HDEF_LEN ( sizeof(default_HDEF_layout_id) / sizeof(uint8_t) )␊
89uint8_t default_HDAU_layout_id[]␉␉=␉{0x01, 0x00, 0x00, 0x00};␊
90#define HDAU_LEN ( sizeof(default_HDAU_layout_id) / sizeof(uint8_t) )␊
91static uint8_t connector_type_value[] =␉{0x00, 0x08, 0x00, 0x00};␊
92␊
93/* Structures */␊
94␊
95static hda_controller_devices know_hda_controller[] = {␊
96␉//8086 Intel Corporation␊
97␉{ HDA_INTEL_OAK,␉"Oaktrail"␉/*, 0, 0 */ },␊
98␉{ HDA_INTEL_BAY,␉"BayTrail"␉/*, 0, 0 */ },␊
99␉{ HDA_INTEL_HSW1,␉"Haswell"␉/*, 0, 0 */ },␊
100␉{ HDA_INTEL_HSW2,␉"Haswell"␉/*, 0, 0 */ },␊
101␉{ HDA_INTEL_HSW3,␉"Haswell"␉/*, 0, 0 */ },␊
102␉{ HDA_INTEL_CPT,␉"Cougar Point"␉/*, 0, 0 */ },␊
103␉{ HDA_INTEL_PATSBURG,␉"Patsburg"␉/*, 0, 0 */ },␊
104␉{ HDA_INTEL_PPT1,␉"Panther Point"␉/*, 0, 0 */ },␊
105␉{ HDA_INTEL_LPT1,␉"Lynx Point"␉/*, 0, 0 */ },␊
106␉{ HDA_INTEL_LPT2,␉"Lynx Point"␉/*, 0, 0 */ },␊
107␉{ HDA_INTEL_WCPT,␉"Wildcat Point"␉/*, 0, 0 */ },␊
108␉{ HDA_INTEL_WELLS1,␉"Wellsburg"␉/*, 0, 0 */ },␊
109␉{ HDA_INTEL_WELLS2,␉"Wellsburg"␉/*, 0, 0 */ },␊
110␉{ HDA_INTEL_LPTLP1,␉"Lynx Point-LP"␉/*, 0, 0 */ },␊
111␉{ HDA_INTEL_LPTLP2,␉"Lynx Point-LP"␉/*, 0, 0 */ },␊
112␉{ HDA_INTEL_82801F,␉"82801F"␉/*, 0, 0 */ },␊
113␉{ HDA_INTEL_63XXESB,␉"631x/632xESB"␉/*, 0, 0 */ },␊
114␉{ HDA_INTEL_82801G,␉"82801G"␉/*, 0, 0 */ },␊
115␉{ HDA_INTEL_82801H,␉"82801H"␉/*, 0, 0 */ },␊
116␉{ HDA_INTEL_82801I,␉"82801I"␉/*, 0, 0 */ },␊
117␉{ HDA_INTEL_82801JI,␉"82801JI"␉/*, 0, 0 */ },␊
118␉{ HDA_INTEL_82801JD,␉"82801JD"␉/*, 0, 0 */ },␊
119␉{ HDA_INTEL_PCH,␉"5 Series/3400 Series" /*, 0, 0 */ },␊
120␉{ HDA_INTEL_PCH2,␉"5 Series/3400 Series" /*, 0, 0 */ },␊
121␉{ HDA_INTEL_SCH,␉"SCH"␉␉/*, 0, 0 */ },␊
122␉//10de NVIDIA Corporation␊
123␉{ HDA_NVIDIA_MCP51,␉"MCP51" /*, 0, HDAC_QUIRK_MSI */ },␊
124␉{ HDA_NVIDIA_MCP55,␉"MCP55" /*, 0, HDAC_QUIRK_MSI */ },␊
125␉{ HDA_NVIDIA_MCP61_1,␉"MCP61" /*, 0, 0 */ },␊
126␉{ HDA_NVIDIA_MCP61_2,␉"MCP61" /*, 0, 0 */ },␊
127␉{ HDA_NVIDIA_MCP65_1,␉"MCP65" /*, 0, 0 */ },␊
128␉{ HDA_NVIDIA_MCP65_2,␉"MCP65" /*, 0, 0 */ },␊
129␉{ HDA_NVIDIA_MCP67_1,␉"MCP67" /*, 0, 0 */ },␊
130␉{ HDA_NVIDIA_MCP67_2,␉"MCP67" /*, 0, 0 */ },␊
131␉{ HDA_NVIDIA_MCP73_1,␉"MCP73" /*, 0, 0 */ },␊
132␉{ HDA_NVIDIA_MCP73_2,␉"MCP73" /*, 0, 0 */ },␊
133␉{ HDA_NVIDIA_MCP78_1,␉"MCP78" /*, 0, HDAC_QUIRK_64BIT */ },␊
134␉{ HDA_NVIDIA_MCP78_2,␉"MCP78" /*, 0, HDAC_QUIRK_64BIT */ },␊
135␉{ HDA_NVIDIA_MCP78_3,␉"MCP78" /*, 0, HDAC_QUIRK_64BIT */ },␊
136␉{ HDA_NVIDIA_MCP78_4,␉"MCP78" /*, 0, HDAC_QUIRK_64BIT */ },␊
137␉{ HDA_NVIDIA_MCP79_1,␉"MCP79" /*, 0, 0 */ },␊
138␉{ HDA_NVIDIA_MCP79_2,␉"MCP79" /*, 0, 0 */ },␊
139␉{ HDA_NVIDIA_MCP79_3,␉"MCP79" /*, 0, 0 */ },␊
140␉{ HDA_NVIDIA_MCP79_4,␉"MCP79" /*, 0, 0 */ },␊
141␉{ HDA_NVIDIA_MCP89_1,␉"MCP89" /*, 0, 0 */ },␊
142␉{ HDA_NVIDIA_MCP89_2,␉"MCP89" /*, 0, 0 */ },␊
143␉{ HDA_NVIDIA_MCP89_3,␉"MCP89" /*, 0, 0 */ },␊
144␉{ HDA_NVIDIA_MCP89_4,␉"MCP89" /*, 0, 0 */ },␊
145␉{ HDA_NVIDIA_0BE2,␉"(0x0be2)" /*, 0, HDAC_QUIRK_MSI */ },␊
146␉{ HDA_NVIDIA_0BE3,␉"(0x0be3)" /*, 0, HDAC_QUIRK_MSI */ },␊
147␉{ HDA_NVIDIA_0BE4,␉"(0x0be4)" /*, 0, HDAC_QUIRK_MSI */ },␊
148␉{ HDA_NVIDIA_GT100,␉"GT100" /*, 0, HDAC_QUIRK_MSI */ },␊
149␉{ HDA_NVIDIA_GT104,␉"GT104" /*, 0, HDAC_QUIRK_MSI */ },␊
150␉{ HDA_NVIDIA_GT106,␉"GT106" /*, 0, HDAC_QUIRK_MSI */ },␊
151␉{ HDA_NVIDIA_GT108,␉"GT108" /*, 0, HDAC_QUIRK_MSI */ },␊
152␉{ HDA_NVIDIA_GT116,␉"GT116" /*, 0, HDAC_QUIRK_MSI */ },␊
153␉{ HDA_NVIDIA_GF119,␉"GF119" /*, 0, 0 */ },␊
154␉{ HDA_NVIDIA_GF110_1,␉"GF110" /*, 0, HDAC_QUIRK_MSI */ },␊
155␉{ HDA_NVIDIA_GF110_2,␉"GF110" /*, 0, HDAC_QUIRK_MSI */ },␊
156␉{ HDA_NVIDIA_GK110,␉"GK110" /*, 0, ? */ },␊
157␉{ HDA_NVIDIA_GK106,␉"GK106" /*, 0, ? */ },␊
158␉{ HDA_NVIDIA_GK107,␉"GK107" /*, 0, ? */ },␊
159␉{ HDA_NVIDIA_GK104,␉"GK104" /*, 0, ? */ },␊
160␉//1002 Advanced Micro Devices [AMD] nee ATI Technologies Inc␊
161␉{ HDA_ATI_SB450,␉"SB4x0" /*, 0, 0 */ },␊
162␉{ HDA_ATI_SB600,␉"SB600" /*, 0, 0 */ },␊
163␉{ HDA_ATI_RS600,␉"RS600" /*, 0, 0 */ },␊
164␉{ HDA_ATI_RS690,␉"RS690" /*, 0, 0 */ },␊
165␉{ HDA_ATI_RS780,␉"RS780" /*, 0, 0 */ },␊
166␉{ HDA_ATI_RS880,␉"RS880" /*, 0, 0 */ },␊
167␉{ HDA_ATI_TRINITY,␉"Trinity" /*, 0, ? */ },␊
168␉{ HDA_ATI_R600,␉␉"R600" /*, 0, 0 */ },␊
169␉{ HDA_ATI_RV610,␉"RV610" /*, 0, 0 */ },␊
170␉{ HDA_ATI_RV620,␉"RV620" /*, 0, 0 */ },␊
171␉{ HDA_ATI_RV630,␉"RV630" /*, 0, 0 */ },␊
172␉{ HDA_ATI_RV635,␉"RV635" /*, 0, 0 */ },␊
173␉{ HDA_ATI_RV710,␉"RV710" /*, 0, 0 */ },␊
174␉{ HDA_ATI_RV730,␉"RV730" /*, 0, 0 */ },␊
175␉{ HDA_ATI_RV740,␉"RV740" /*, 0, 0 */ },␊
176␉{ HDA_ATI_RV770,␉"RV770" /*, 0, 0 */ },␊
177␉{ HDA_ATI_RV810,␉"RV810" /*, 0, 0 */ },␊
178␉{ HDA_ATI_RV830,␉"RV830" /*, 0, 0 */ },␊
179␉{ HDA_ATI_RV840,␉"RV840" /*, 0, 0 */ },␊
180␉{ HDA_ATI_RV870,␉"RV870" /*, 0, 0 */ },␊
181␉{ HDA_ATI_RV910,␉"RV910" /*, 0, 0 */ },␊
182␉{ HDA_ATI_RV930,␉"RV930" /*, 0, 0 */ },␊
183␉{ HDA_ATI_RV940,␉"RV940" /*, 0, 0 */ },␊
184␉{ HDA_ATI_RV970,␉"RV970" /*, 0, 0 */ },␊
185␉{ HDA_ATI_R1000,␉"R1000" /*, 0, 0 */ }, // HDMi␊
186␉{ HDA_ATI_VERDE,␉"Cape Verde" /*, 0, ? */ }, // HDMi␊
187␉//17f3 RDC Semiconductor, Inc.␊
188␉{ HDA_RDC_M3010,␉"M3010" /*, 0, 0 */ },␊
189␉//1106 VIA Technologies, Inc.␊
190␉{ HDA_VIA_VT82XX,␉"VT8251/8237A" /*, 0, 0 */ },␊
191␉//1039 Silicon Integrated Systems [SiS]␊
192␉{ HDA_SIS_966,␉␉"966" /*, 0, 0 */ },␊
193␉//10b9 ULi Electronics Inc.(Split off ALi Corporation in 2003)␊
194␉{ HDA_ULI_M5461,␉"M5461" /*, 0, 0 */ },␊
195␉/* Unknown */␊
196␉{ HDA_INTEL_ALL,␉"Unknown Intel device" /*, 0, 0 */ },␊
197␉{ HDA_NVIDIA_ALL,␉"Unknown NVIDIA device" /*, 0, 0 */ },␊
198␉{ HDA_ATI_ALL,␉␉"Unknown ATI device" /*, 0, 0 */ },␊
199␉{ HDA_VIA_ALL,␉␉"Unknown VIA device" /*, 0, 0 */ },␊
200␉{ HDA_SIS_ALL,␉␉"Unknown SiS device" /*, 0, 0 */ },␊
201␉{ HDA_ULI_ALL,␉␉"Unknown ULI device" /*, 0, 0 */ },␊
202};␊
203#define HDAC_DEVICES_LEN (sizeof(know_hda_controller) / sizeof(know_hda_controller[0]))␊
204␊
205/* CODECs */␊
206␊
207// ErmaC: TODO build function to probe the codecID␊
208/*␊
209static hdacc_codecs know_codecs[] = {␊
210␉{ HDA_CODEC_CS4206, 0, "Cirrus Logic CS4206" },␊
211␉{ HDA_CODEC_CS4207, 0, "Cirrus Logic CS4207" },␊
212␉{ HDA_CODEC_CS4210, 0, "Cirrus Logic CS4210" },␊
213␉{ HDA_CODEC_ALC221, 0, "Realtek ALC221" },␊
214␉{ HDA_CODEC_ALC260, 0, "Realtek ALC260" },␊
215␉{ HDA_CODEC_ALC262, 0, "Realtek ALC262" },␊
216␉{ HDA_CODEC_ALC267, 0, "Realtek ALC267" },␊
217␉{ HDA_CODEC_ALC268, 0, "Realtek ALC268" },␊
218␉{ HDA_CODEC_ALC269, 0, "Realtek ALC269" },␊
219␉{ HDA_CODEC_ALC270, 0, "Realtek ALC270" },␊
220␉{ HDA_CODEC_ALC272, 0, "Realtek ALC272" },␊
221␉{ HDA_CODEC_ALC273, 0, "Realtek ALC273" },␊
222␉{ HDA_CODEC_ALC275, 0, "Realtek ALC275" },␊
223␉{ HDA_CODEC_ALC276, 0, "Realtek ALC276" },␊
224␉{ HDA_CODEC_ALC660, 0, "Realtek ALC660-VD" },␊
225␉{ HDA_CODEC_ALC662, 0x0002, "Realtek ALC662 rev2" },␊
226␉{ HDA_CODEC_ALC662, 0, "Realtek ALC662" },␊
227␉{ HDA_CODEC_ALC663, 0, "Realtek ALC663" },␊
228␉{ HDA_CODEC_ALC665, 0, "Realtek ALC665" },␊
229␉{ HDA_CODEC_ALC670, 0, "Realtek ALC670" },␊
230␉{ HDA_CODEC_ALC680, 0, "Realtek ALC680" },␊
231␉{ HDA_CODEC_ALC861, 0x100340, "Realtek ALC660" },␊
232␉{ HDA_CODEC_ALC861, 0, "Realtek ALC861" },␊
233␉{ HDA_CODEC_ALC861VD, 0, "Realtek ALC861-VD" },␊
234␉{ HDA_CODEC_ALC880, 0, "Realtek ALC880" },␊
235␉{ HDA_CODEC_ALC882, 0, "Realtek ALC882" },␊
236␉{ HDA_CODEC_ALC883, 0, "Realtek ALC883" },␊
237␉{ HDA_CODEC_ALC885, 0x100101, "Realtek ALC889A" },␊
238␉{ HDA_CODEC_ALC885, 0x100103, "Realtek ALC889A" },␊
239␉{ HDA_CODEC_ALC885, 0, "Realtek ALC885" },␊
240␉{ HDA_CODEC_ALC887, 0, "Realtek ALC887" },␊
241␉{ HDA_CODEC_ALC888, 0x100101, "Realtek ALC1200" },␊
242␉{ HDA_CODEC_ALC888, 0, "Realtek ALC888" },␊
243␉{ HDA_CODEC_ALC889, 0, "Realtek ALC889" },␊
244␉{ HDA_CODEC_ALC892, 0, "Realtek ALC892" },␊
245␉{ HDA_CODEC_ALC898, 0, "Realtek ALC898" },␊
246␉{ HDA_CODEC_ALC899, 0,␉␉"Realtek ALC899" },␊
247␉{ HDA_CODEC_ALC900, 0, "Realtek ALC1150" },␊
248␊
249␉{ HDA_CODEC_AD1882, 0, "Analog Devices AD1882" },␊
250␉{ HDA_CODEC_AD1882A, 0, "Analog Devices AD1882A" },␊
251␉{ HDA_CODEC_AD1883, 0, "Analog Devices AD1883" },␊
252␉{ HDA_CODEC_AD1884, 0, "Analog Devices AD1884" },␊
253␉{ HDA_CODEC_AD1884A, 0, "Analog Devices AD1884A" },␊
254␉{ HDA_CODEC_AD1981HD, 0, "Analog Devices AD1981HD" },␊
255␉{ HDA_CODEC_AD1983, 0, "Analog Devices AD1983" },␊
256␉{ HDA_CODEC_AD1984, 0, "Analog Devices AD1984" },␊
257␉{ HDA_CODEC_AD1984A, 0, "Analog Devices AD1984A" },␊
258␉{ HDA_CODEC_AD1984B, 0, "Analog Devices AD1984B" },␊
259␉{ HDA_CODEC_AD1986A, 0, "Analog Devices AD1986A" },␊
260␉{ HDA_CODEC_AD1987, 0, "Analog Devices AD1987" },␊
261␉{ HDA_CODEC_AD1988, 0, "Analog Devices AD1988A" },␊
262␉{ HDA_CODEC_AD1988B, 0, "Analog Devices AD1988B" },␊
263␉{ HDA_CODEC_AD1989A, 0, "Analog Devices AD1989A" },␊
264␉{ HDA_CODEC_AD1989B, 0, "Analog Devices AD1989B" },␊
265␉{ HDA_CODEC_CA0110, 0, "Creative CA0110-IBG" },␊
266␉{ HDA_CODEC_CA0110_2, 0, "Creative CA0110-IBG" },␊
267␉{ HDA_CODEC_CA0132, 0, "Creative CA0132" },␊
268␉{ HDA_CODEC_SB0880, 0, "Creative SB0880 X-Fi" },␊
269␉{ HDA_CODEC_CMI9880, 0, "CMedia CMI9880" },␊
270␉{ HDA_CODEC_CMI98802, 0, "CMedia CMI9880" },␊
271␊
272␉{ HDA_CODEC_CXD9872RDK, 0, "Sigmatel CXD9872RD/K" },␊
273␉{ HDA_CODEC_CXD9872AKD, 0, "Sigmatel CXD9872AKD" },␊
274␉{ HDA_CODEC_STAC9200D, 0, "Sigmatel STAC9200D" },␊
275␉{ HDA_CODEC_STAC9204X, 0, "Sigmatel STAC9204X" },␊
276␉{ HDA_CODEC_STAC9204D, 0, "Sigmatel STAC9204D" },␊
277␉{ HDA_CODEC_STAC9205X, 0, "Sigmatel STAC9205X" },␊
278␉{ HDA_CODEC_STAC9205D, 0, "Sigmatel STAC9205D" },␊
279␉{ HDA_CODEC_STAC9220, 0, "Sigmatel STAC9220" },␊
280␉{ HDA_CODEC_STAC9220_A1, 0, "Sigmatel STAC9220_A1" },␊
281␉{ HDA_CODEC_STAC9220_A2, 0, "Sigmatel STAC9220_A2" },␊
282␉{ HDA_CODEC_STAC9221, 0, "Sigmatel STAC9221" },␊
283␉{ HDA_CODEC_STAC9221_A2, 0, "Sigmatel STAC9221_A2" },␊
284␉{ HDA_CODEC_STAC9221D, 0, "Sigmatel STAC9221D" },␊
285␉{ HDA_CODEC_STAC922XD, 0, "Sigmatel STAC9220D/9223D" },␊
286␉{ HDA_CODEC_STAC9227X, 0, "Sigmatel STAC9227X" },␊
287␉{ HDA_CODEC_STAC9227D, 0, "Sigmatel STAC9227D" },␊
288␉{ HDA_CODEC_STAC9228X, 0, "Sigmatel STAC9228X" },␊
289␉{ HDA_CODEC_STAC9228D, 0, "Sigmatel STAC9228D" },␊
290␉{ HDA_CODEC_STAC9229X, 0, "Sigmatel STAC9229X" },␊
291␉{ HDA_CODEC_STAC9229D, 0, "Sigmatel STAC9229D" },␊
292␉{ HDA_CODEC_STAC9230X, 0, "Sigmatel STAC9230X" },␊
293␉{ HDA_CODEC_STAC9230D, 0, "Sigmatel STAC9230D" },␊
294␉{ HDA_CODEC_STAC9250, 0, "Sigmatel STAC9250" },␊
295␉{ HDA_CODEC_STAC9251, 0, "Sigmatel STAC9251" },␊
296␉{ HDA_CODEC_STAC9255, 0, "Sigmatel STAC9255" },␊
297␉{ HDA_CODEC_STAC9255D, 0, "Sigmatel STAC9255D" },␊
298␉{ HDA_CODEC_STAC9254, 0, "Sigmatel STAC9254" },␊
299␉{ HDA_CODEC_STAC9254D, 0, "Sigmatel STAC9254D" },␊
300␉{ HDA_CODEC_STAC9271X, 0, "Sigmatel STAC9271X" },␊
301␉{ HDA_CODEC_STAC9271D, 0, "Sigmatel STAC9271D" },␊
302␉{ HDA_CODEC_STAC9272X, 0, "Sigmatel STAC9272X" },␊
303␉{ HDA_CODEC_STAC9272D, 0, "Sigmatel STAC9272D" },␊
304␉{ HDA_CODEC_STAC9273X, 0, "Sigmatel STAC9273X" },␊
305␉{ HDA_CODEC_STAC9273D, 0, "Sigmatel STAC9273D" },␊
306␉{ HDA_CODEC_STAC9274, 0, "Sigmatel STAC9274" },␊
307␉{ HDA_CODEC_STAC9274D, 0, "Sigmatel STAC9274D" },␊
308␉{ HDA_CODEC_STAC9274X5NH, 0, "Sigmatel STAC9274X5NH" },␊
309␉{ HDA_CODEC_STAC9274D5NH, 0, "Sigmatel STAC9274D5NH" },␊
310␉{ HDA_CODEC_STAC9872AK, 0, "Sigmatel STAC9872AK" },␊
311␊
312␉{ HDA_CODEC_IDT92HD005, 0, "IDT 92HD005" },␊
313␉{ HDA_CODEC_IDT92HD005D, 0, "IDT 92HD005D" },␊
314␉{ HDA_CODEC_IDT92HD206X, 0, "IDT 92HD206X" },␊
315␉{ HDA_CODEC_IDT92HD206D, 0, "IDT 92HD206D" },␊
316␉{ HDA_CODEC_IDT92HD66B1X5, 0, "IDT 92HD66B1X5" },␊
317␉{ HDA_CODEC_IDT92HD66B2X5, 0, "IDT 92HD66B2X5" },␊
318␉{ HDA_CODEC_IDT92HD66B3X5, 0, "IDT 92HD66B3X5" },␊
319␉{ HDA_CODEC_IDT92HD66C1X5, 0, "IDT 92HD66C1X5" },␊
320␉{ HDA_CODEC_IDT92HD66C2X5, 0, "IDT 92HD66C2X5" },␊
321␉{ HDA_CODEC_IDT92HD66C3X5, 0, "IDT 92HD66C3X5" },␊
322␉{ HDA_CODEC_IDT92HD66B1X3, 0, "IDT 92HD66B1X3" },␊
323␉{ HDA_CODEC_IDT92HD66B2X3, 0, "IDT 92HD66B2X3" },␊
324␉{ HDA_CODEC_IDT92HD66B3X3, 0, "IDT 92HD66B3X3" },␊
325␉{ HDA_CODEC_IDT92HD66C1X3, 0, "IDT 92HD66C1X3" },␊
326␉{ HDA_CODEC_IDT92HD66C2X3, 0, "IDT 92HD66C2X3" },␊
327␉{ HDA_CODEC_IDT92HD66C3_65, 0, "IDT 92HD66C3_65" },␊
328␉{ HDA_CODEC_IDT92HD700X, 0, "IDT 92HD700X" },␊
329␉{ HDA_CODEC_IDT92HD700D, 0, "IDT 92HD700D" },␊
330␉{ HDA_CODEC_IDT92HD71B5, 0, "IDT 92HD71B5" },␊
331␉{ HDA_CODEC_IDT92HD71B5_2, 0, "IDT 92HD71B5" },␊
332␉{ HDA_CODEC_IDT92HD71B6, 0, "IDT 92HD71B6" },␊
333␉{ HDA_CODEC_IDT92HD71B6_2, 0, "IDT 92HD71B6" },␊
334␉{ HDA_CODEC_IDT92HD71B7, 0, "IDT 92HD71B7" },␊
335␉{ HDA_CODEC_IDT92HD71B7_2, 0, "IDT 92HD71B7" },␊
336␉{ HDA_CODEC_IDT92HD71B8, 0, "IDT 92HD71B8" },␊
337␉{ HDA_CODEC_IDT92HD71B8_2, 0, "IDT 92HD71B8" },␊
338␉{ HDA_CODEC_IDT92HD73C1, 0, "IDT 92HD73C1" },␊
339␉{ HDA_CODEC_IDT92HD73D1, 0, "IDT 92HD73D1" },␊
340␉{ HDA_CODEC_IDT92HD73E1, 0, "IDT 92HD73E1" },␊
341␉{ HDA_CODEC_IDT92HD75B3, 0, "IDT 92HD75B3" },␊
342␉{ HDA_CODEC_IDT92HD75BX, 0, "IDT 92HD75BX" },␊
343␉{ HDA_CODEC_IDT92HD81B1C, 0, "IDT 92HD81B1C" },␊
344␉{ HDA_CODEC_IDT92HD81B1X, 0, "IDT 92HD81B1X" },␊
345␉{ HDA_CODEC_IDT92HD83C1C, 0, "IDT 92HD83C1C" },␊
346␉{ HDA_CODEC_IDT92HD83C1X, 0, "IDT 92HD83C1X" },␊
347␉{ HDA_CODEC_IDT92HD87B1_3, 0, "IDT 92HD87B1/3" },␊
348␉{ HDA_CODEC_IDT92HD87B2_4, 0, "IDT 92HD87B2/4" },␊
349␉{ HDA_CODEC_IDT92HD89C3, 0, "IDT 92HD89C3" },␊
350␉{ HDA_CODEC_IDT92HD89C2, 0, "IDT 92HD89C2" },␊
351␉{ HDA_CODEC_IDT92HD89C1, 0, "IDT 92HD89C1" },␊
352␉{ HDA_CODEC_IDT92HD89B3, 0, "IDT 92HD89B3" },␊
353␉{ HDA_CODEC_IDT92HD89B2, 0, "IDT 92HD89B2" },␊
354␉{ HDA_CODEC_IDT92HD89B1, 0, "IDT 92HD89B1" },␊
355␉{ HDA_CODEC_IDT92HD89E3, 0, "IDT 92HD89E3" },␊
356␉{ HDA_CODEC_IDT92HD89E2, 0, "IDT 92HD89E2" },␊
357␉{ HDA_CODEC_IDT92HD89E1, 0, "IDT 92HD89E1" },␊
358␉{ HDA_CODEC_IDT92HD89D3, 0, "IDT 92HD89D3" },␊
359␉{ HDA_CODEC_IDT92HD89D2, 0, "IDT 92HD89D2" },␊
360␉{ HDA_CODEC_IDT92HD89D1, 0, "IDT 92HD89D1" },␊
361␉{ HDA_CODEC_IDT92HD89F3, 0, "IDT 92HD89F3" },␊
362␉{ HDA_CODEC_IDT92HD89F2, 0, "IDT 92HD89F2" },␊
363␉{ HDA_CODEC_IDT92HD89F1, 0, "IDT 92HD89F1" },␊
364␉{ HDA_CODEC_IDT92HD90BXX, 0, "IDT 92HD90BXX" },␊
365␉{ HDA_CODEC_IDT92HD91BXX, 0, "IDT 92HD91BXX" },␊
366␉{ HDA_CODEC_IDT92HD93BXX, 0, "IDT 92HD93BXX" },␊
367␉{ HDA_CODEC_IDT92HD98BXX, 0, "IDT 92HD98BXX" },␊
368␉{ HDA_CODEC_IDT92HD99BXX, 0, "IDT 92HD99BXX" },␊
369␊
370␉{ HDA_CODEC_CX20549, 0, "Conexant CX20549 (Venice)" },␊
371␉{ HDA_CODEC_CX20551, 0, "Conexant CX20551 (Waikiki)" },␊
372␉{ HDA_CODEC_CX20561, 0, "Conexant CX20561 (Hermosa)" },␊
373␉{ HDA_CODEC_CX20582, 0, "Conexant CX20582 (Pebble)" },␊
374␉{ HDA_CODEC_CX20583, 0, "Conexant CX20583 (Pebble HSF)" },␊
375␉{ HDA_CODEC_CX20584, 0, "Conexant CX20584" },␊
376␉{ HDA_CODEC_CX20585, 0, "Conexant CX20585" },␊
377␉{ HDA_CODEC_CX20588, 0, "Conexant CX20588" },␊
378␉{ HDA_CODEC_CX20590, 0, "Conexant CX20590" },␊
379␉{ HDA_CODEC_CX20631, 0, "Conexant CX20631" },␊
380␉{ HDA_CODEC_CX20632, 0, "Conexant CX20632" },␊
381␉{ HDA_CODEC_CX20641, 0, "Conexant CX20641" },␊
382␉{ HDA_CODEC_CX20642, 0, "Conexant CX20642" },␊
383␉{ HDA_CODEC_CX20651, 0, "Conexant CX20651" },␊
384␉{ HDA_CODEC_CX20652, 0, "Conexant CX20652" },␊
385␉{ HDA_CODEC_CX20664, 0, "Conexant CX20664" },␊
386␉{ HDA_CODEC_CX20665, 0, "Conexant CX20665" },␊
387␊
388␉{ HDA_CODEC_VT1708_8, 0, "VIA VT1708_8" },␊
389␉{ HDA_CODEC_VT1708_9, 0, "VIA VT1708_9" },␊
390␉{ HDA_CODEC_VT1708_A, 0, "VIA VT1708_A" },␊
391␉{ HDA_CODEC_VT1708_B, 0, "VIA VT1708_B" },␊
392␉{ HDA_CODEC_VT1709_0, 0, "VIA VT1709_0" },␊
393␉{ HDA_CODEC_VT1709_1, 0, "VIA VT1709_1" },␊
394␉{ HDA_CODEC_VT1709_2, 0, "VIA VT1709_2" },␊
395␉{ HDA_CODEC_VT1709_3, 0, "VIA VT1709_3" },␊
396␉{ HDA_CODEC_VT1709_4, 0, "VIA VT1709_4" },␊
397␉{ HDA_CODEC_VT1709_5, 0, "VIA VT1709_5" },␊
398␉{ HDA_CODEC_VT1709_6, 0, "VIA VT1709_6" },␊
399␉{ HDA_CODEC_VT1709_7, 0, "VIA VT1709_7" },␊
400␉{ HDA_CODEC_VT1708B_0, 0, "VIA VT1708B_0" },␊
401␉{ HDA_CODEC_VT1708B_1, 0, "VIA VT1708B_1" },␊
402␉{ HDA_CODEC_VT1708B_2, 0, "VIA VT1708B_2" },␊
403␉{ HDA_CODEC_VT1708B_3, 0, "VIA VT1708B_3" },␊
404␉{ HDA_CODEC_VT1708B_4, 0, "VIA VT1708B_4" },␊
405␉{ HDA_CODEC_VT1708B_5, 0, "VIA VT1708B_5" },␊
406␉{ HDA_CODEC_VT1708B_6, 0, "VIA VT1708B_6" },␊
407␉{ HDA_CODEC_VT1708B_7, 0, "VIA VT1708B_7" },␊
408␉{ HDA_CODEC_VT1708S_0, 0, "VIA VT1708S_0" },␊
409␉{ HDA_CODEC_VT1708S_1, 0, "VIA VT1708S_1" },␊
410␉{ HDA_CODEC_VT1708S_2, 0, "VIA VT1708S_2" },␊
411␉{ HDA_CODEC_VT1708S_3, 0, "VIA VT1708S_3" },␊
412␉{ HDA_CODEC_VT1708S_4, 0, "VIA VT1708S_4" },␊
413␉{ HDA_CODEC_VT1708S_5, 0, "VIA VT1708S_5" },␊
414␉{ HDA_CODEC_VT1708S_6, 0, "VIA VT1708S_6" },␊
415␉{ HDA_CODEC_VT1708S_7, 0, "VIA VT1708S_7" },␊
416␉{ HDA_CODEC_VT1702_0, 0, "VIA VT1702_0" },␊
417␉{ HDA_CODEC_VT1702_1, 0, "VIA VT1702_1" },␊
418␉{ HDA_CODEC_VT1702_2, 0, "VIA VT1702_2" },␊
419␉{ HDA_CODEC_VT1702_3, 0, "VIA VT1702_3" },␊
420␉{ HDA_CODEC_VT1702_4, 0, "VIA VT1702_4" },␊
421␉{ HDA_CODEC_VT1702_5, 0, "VIA VT1702_5" },␊
422␉{ HDA_CODEC_VT1702_6, 0, "VIA VT1702_6" },␊
423␉{ HDA_CODEC_VT1702_7, 0, "VIA VT1702_7" },␊
424␉{ HDA_CODEC_VT1716S_0, 0, "VIA VT1716S_0" },␊
425␉{ HDA_CODEC_VT1716S_1, 0, "VIA VT1716S_1" },␊
426␉{ HDA_CODEC_VT1718S_0, 0, "VIA VT1718S_0" },␊
427␉{ HDA_CODEC_VT1718S_1, 0, "VIA VT1718S_1" },␊
428␉{ HDA_CODEC_VT1802_0, 0, "VIA VT1802_0" },␊
429␉{ HDA_CODEC_VT1802_1, 0, "VIA VT1802_1" },␊
430␉{ HDA_CODEC_VT1812, 0, "VIA VT1812" },␊
431␉{ HDA_CODEC_VT1818S, 0, "VIA VT1818S" },␊
432␉{ HDA_CODEC_VT1828S, 0, "VIA VT1828S" },␊
433␉{ HDA_CODEC_VT2002P_0, 0, "VIA VT2002P_0" },␊
434␉{ HDA_CODEC_VT2002P_1, 0, "VIA VT2002P_1" },␊
435␉{ HDA_CODEC_VT2020, 0, "VIA VT2020" },␊
436␊
437␉{ HDA_CODEC_ATIRS600_1, 0, "ATI RS600" },␊
438␉{ HDA_CODEC_ATIRS600_2, 0, "ATI RS600" },␊
439␉{ HDA_CODEC_ATIRS690, 0, "ATI RS690/780" },␊
440␉{ HDA_CODEC_ATIR6XX, 0, "ATI R6xx" },␊
441␊
442␉{ HDA_CODEC_NVIDIAMCP67, 0, "NVIDIA MCP67" },␊
443␉{ HDA_CODEC_NVIDIAMCP73, 0, "NVIDIA MCP73" },␊
444␉{ HDA_CODEC_NVIDIAMCP78, 0, "NVIDIA MCP78" },␊
445␉{ HDA_CODEC_NVIDIAMCP78_2, 0, "NVIDIA MCP78" },␊
446␉{ HDA_CODEC_NVIDIAMCP78_3, 0, "NVIDIA MCP78" },␊
447␉{ HDA_CODEC_NVIDIAMCP78_4, 0, "NVIDIA MCP78" },␊
448␉{ HDA_CODEC_NVIDIAMCP7A, 0, "NVIDIA MCP7A" },␊
449␉{ HDA_CODEC_NVIDIAGT220, 0, "NVIDIA GT220" },␊
450␉{ HDA_CODEC_NVIDIAGT21X, 0, "NVIDIA GT21x" },␊
451␉{ HDA_CODEC_NVIDIAMCP89, 0, "NVIDIA MCP89" },␊
452␉{ HDA_CODEC_NVIDIAGT240, 0, "NVIDIA GT240" },␊
453␉{ HDA_CODEC_NVIDIAGTS450, 0, "NVIDIA GTS450" },␊
454␉{ HDA_CODEC_NVIDIAGT440, 0, "NVIDIA GT440" },␊
455␉{ HDA_CODEC_NVIDIAGTX550, 0, "NVIDIA GTX550" },␊
456␉{ HDA_CODEC_NVIDIAGTX570, 0, "NVIDIA GTX570" },␊
457␊
458␉{ HDA_CODEC_INTELIP, 0, "Intel Ibex Peak" },␊
459␉{ HDA_CODEC_INTELBL, 0, "Intel Bearlake" },␊
460␉{ HDA_CODEC_INTELCA, 0, "Intel Cantiga" },␊
461␉{ HDA_CODEC_INTELEL, 0, "Intel Eaglelake" },␊
462␉{ HDA_CODEC_INTELIP2, 0, "Intel Ibex Peak" },␊
463␉{ HDA_CODEC_INTELCPT, 0, "Intel Cougar Point" },␊
464␉{ HDA_CODEC_INTELPPT, 0, "Intel Panther Point" },␊
465␉{ HDA_CODEC_INTELHSW, 0,␉"Intel Haswell" },␊
466␉{ HDA_CODEC_INTELCL, 0, "Intel Crestline" },␊
467␉{ HDA_CODEC_SII1390, 0, "Silicon Image SiI1390 HDMi" },␊
468␉{ HDA_CODEC_SII1392, 0, "Silicon Image SiI1392 HDMi" },␊
469␉// Unknown CODECs␊
470␉{ HDA_CODEC_ADXXXX, 0, "Analog Devices" },␊
471␉{ HDA_CODEC_AGEREXXXX, 0, "Lucent/Agere Systems" },␊
472␉{ HDA_CODEC_ALCXXXX, 0, "Realtek" },␊
473␉{ HDA_CODEC_ATIXXXX, 0, "ATI" },␊
474␉{ HDA_CODEC_CAXXXX, 0, "Creative" },␊
475␉{ HDA_CODEC_CMIXXXX, 0, "CMedia" },␊
476␉{ HDA_CODEC_CMIXXXX2, 0, "CMedia" },␊
477␉{ HDA_CODEC_CSXXXX, 0, "Cirrus Logic" },␊
478␉{ HDA_CODEC_CXXXXX, 0, "Conexant" },␊
479␉{ HDA_CODEC_CHXXXX, 0, "Chrontel" },␊
480␉{ HDA_CODEC_IDTXXXX, 0, "IDT" },␊
481␉{ HDA_CODEC_INTELXXXX, 0, "Intel" },␊
482␉{ HDA_CODEC_MOTOXXXX, 0, "Motorola" },␊
483␉{ HDA_CODEC_NVIDIAXXXX, 0, "NVIDIA" },␊
484␉{ HDA_CODEC_SIIXXXX, 0, "Silicon Image" },␊
485␉{ HDA_CODEC_STACXXXX, 0, "Sigmatel" },␊
486␉{ HDA_CODEC_VTXXXX, 0, "VIA" },␊
487};␊
488␊
489#define HDACC_CODECS_LEN (sizeof(know_codecs) / sizeof(know_codecs[0]))␊
490*/␊
491␊
492/*****************␊
493 * Device Methods␊
494 *****************/␊
495␊
496/* get HDA device name */␊
497static char *get_hda_controller_name(uint16_t controller_device_id, uint16_t controller_vendor_id)␊
498{␊
499␉static char desc[128];␊
500␊
501␉const char* name_format = "Unknown HD Audio device %s";␊
502␉uint32_t controller_model = ((controller_device_id << 16) | controller_vendor_id);␊
503␉int i;␊
504␊
505␉/* Get format for vendor ID */␊
506␉switch (controller_vendor_id)␊
507␉{␊
508␉␉case ATI_VENDORID:␊
509␉␉␉name_format = "ATI %s HDA Controller (HDMi)"; break;␊
510␊
511␉␉case INTEL_VENDORID:␊
512␉␉␉name_format = "Intel %s High Definition Audio Controller"; break;␊
513␊
514␉␉case NVIDIA_VENDORID:␊
515␉␉␉name_format = "nVidia %s HDA Controller (HDMi)"; break;␊
516␊
517␉␉case RDC_VENDORID:␊
518␉␉␉name_format = "RDC %s High Definition Audio Controller"; break;␊
519␊
520␉␉case SIS_VENDORID:␊
521␉␉␉name_format = "SiS %s HDA Controller"; break;␊
522␊
523␉␉case ULI_VENDORID:␊
524␉␉␉name_format = "ULI %s HDA Controller"; break;␊
525␊
526␉␉case VIA_VENDORID:␊
527␉␉␉name_format = "VIA %s HDA Controller"; break;␊
528␊
529␉␉default:␊
530␉␉␉break;␊
531␉}␊
532␊
533␉for (i = 0; i < HDAC_DEVICES_LEN; i++)␊
534␉{␊
535␉␉if (know_hda_controller[i].model == controller_model)␊
536␉␉{␊
537␉␉␉snprintf(desc, sizeof(desc), name_format, know_hda_controller[i].desc);␊
538␉␉␉return desc;␊
539␉␉}␊
540␉}␊
541␊
542␉/* Not in table */␊
543␉snprintf(desc, sizeof(desc),␊
544␉␉"Unknown HD Audio device, vendor %04x, model %04x",␊
545␉␉controller_vendor_id, controller_device_id);␊
546␉return desc;␊
547}␊
548␊
549static int devprop_add_hda_template(struct DevPropDevice *device)␊
550{␊
551␉if (!device)␊
552␉{␊
553␉␉return 0;␊
554␉}␊
555␉devices_number++;␊
556␊
557␉return 1;␊
558}␊
559␊
560bool setup_hda_devprop(pci_dt_t *hda_dev)␊
561{␊
562␉struct␉␉DevPropDevice␉*device = NULL;␊
563␉char␉␉*devicepath = NULL;␊
564␉char␉␉*controller_name = NULL;␊
565␉int␉␉len;␊
566␉uint8_t␉␉BuiltIn = 0x00;␊
567␉uint16_t␉controller_vendor_id = hda_dev->vendor_id;␊
568␉uint16_t␉controller_device_id = hda_dev->device_id;␊
569␉const char␉*value;␊
570␊
571␉verbose("\n------------------------\n");␊
572␉verbose("\tAUDIO DEVICE INFO\n");␊
573␉verbose("-------------------------\n");␊
574␊
575␉devicepath = get_pci_dev_path(hda_dev);␊
576␉controller_name = get_hda_controller_name(controller_device_id, controller_vendor_id);␊
577␊
578␉if (!string)␊
579␉{␊
580␉␉string = devprop_create_string();␊
581␉␉if (!string)␊
582␉␉{␊
583␉␉␉return 0;␊
584␉␉}␊
585␉}␊
586␊
587␉if (!devicepath)␊
588␉{␊
589␉␉return 0;␊
590␉}␊
591␊
592␉device = devprop_add_device(string, devicepath);␊
593␉if (!device)␊
594␉{␊
595␉␉return 0;␊
596␉}␊
597␉devprop_add_hda_template(device);␊
598␊
599␉switch ((controller_device_id << 16) | controller_vendor_id)␊
600␉{␊
601␊
602␉/***********************************************************************␊
603␉* The above case are intended as for HDEF device at address 0x001B0000␊
604␉***********************************************************************/␊
605␉␉case HDA_INTEL_OAK:␊
606␉␉case HDA_INTEL_BAY:␊
607␉␉case HDA_INTEL_HSW1:␊
608␉␉case HDA_INTEL_HSW2:␊
609␉␉case HDA_INTEL_HSW3:␊
610␉␉case HDA_INTEL_CPT:␊
611␉␉case HDA_INTEL_PATSBURG:␊
612␉␉case HDA_INTEL_PPT1:␊
613␉␉case HDA_INTEL_LPT1:␊
614␉␉case HDA_INTEL_LPT2:␊
615␉␉case HDA_INTEL_WCPT:␊
616␉␉case HDA_INTEL_WELLS1:␊
617␉␉case HDA_INTEL_WELLS2:␊
618␉␉case HDA_INTEL_LPTLP1:␊
619␉␉case HDA_INTEL_LPTLP2:␊
620␉␉case HDA_INTEL_82801F:␊
621␉␉case HDA_INTEL_63XXESB:␊
622␉␉case HDA_INTEL_82801G:␊
623␉␉case HDA_INTEL_82801H:␊
624␉␉case HDA_INTEL_82801I:␊
625␉␉case HDA_INTEL_82801JI:␊
626␉␉case HDA_INTEL_82801JD:␊
627␉␉case HDA_INTEL_PCH:␊
628␉␉case HDA_INTEL_PCH2:␊
629␉␉case HDA_INTEL_SCH:␊
630␊
631␉/* if the key value kHDEFLayoutID as a value set that value, if not will assign a default layout */␊
632␉if (getValueForKey(kHDEFLayoutID, &value, &len, &bootInfo->chameleonConfig) && len == HDEF_LEN * 2)␊
633␉{␊
634␉␉uint8_t new_HDEF_layout_id[HDEF_LEN];␊
635␉␉if (hex2bin(value, new_HDEF_layout_id, HDEF_LEN) == 0)␊
636␉␉{␊
637␉␉␉memcpy(default_HDEF_layout_id, new_HDEF_layout_id, HDEF_LEN);␊
638␉␉␉verbose("Using user supplied HDEF layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n", ␊
639␉␉␉␉default_HDEF_layout_id[0], default_HDEF_layout_id[1], default_HDEF_layout_id[2], default_HDEF_layout_id[3]);␊
640␉␉}␊
641␉}␊
642␉else␊
643␉{␊
644␉␉verbose("Using default HDEF layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",␊
645 default_HDEF_layout_id[0], default_HDEF_layout_id[1], default_HDEF_layout_id[2], default_HDEF_layout_id[3]);␊
646␉}␊
647␉devprop_add_value(device, "layout-id", default_HDEF_layout_id, HDEF_LEN);␊
648␉devprop_add_value(device, "AAPL,slot-name", (uint8_t *)"Built-in", 9); // 0x09␊
649␉devprop_add_value(device, "name", (uint8_t *)"audio", 6); // 0x06␊
650␉devprop_add_value(device, "device_type", (uint8_t *)"High Definition Audio", 22); // 0x16␊
651␉devprop_add_value(device, "built-in", &BuiltIn, 1);␊
652␉devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-1", 10); // 0x0a␊
653␉// "AFGLowPowerState" = <03000000>␊
654␉break;␊
655␊
656␉/****************************************************************************************************************␊
657␉* The above case are intended as for HDAU (NVIDIA) device onboard audio for GFX card with Audio controller HDMi␊
658␉****************************************************************************************************************/␊
659␉case HDA_NVIDIA_GK107:␊
660␉case HDA_NVIDIA_GF110_1:␊
661␉case HDA_NVIDIA_GF110_2:␊
662␉case HDA_NVIDIA_GK106:␊
663␉case HDA_NVIDIA_GK104:␊
664␉case HDA_NVIDIA_GF119:␊
665␉case HDA_NVIDIA_GT116:␊
666␉case HDA_NVIDIA_GT104:␊
667␉case HDA_NVIDIA_GT108:␊
668␉case HDA_NVIDIA_GT106:␊
669␉case HDA_NVIDIA_GT100:␊
670␉case HDA_NVIDIA_0BE4:␊
671␉case HDA_NVIDIA_0BE3:␊
672␉case HDA_NVIDIA_0BE2:␊
673␊
674␉/* if the key value kHDAULayoutID as a value set that value, if not will assign a default layout */␊
675␉if (getValueForKey(kHDAULayoutID, &value, &len, &bootInfo->chameleonConfig) && len == HDAU_LEN * 2)␊
676␉{␊
677␉␉uint8_t new_HDAU_layout_id[HDAU_LEN];␊
678␉␉if (hex2bin(value, new_HDAU_layout_id, HDAU_LEN) == 0)␊
679␉␉{␊
680␉␉␉memcpy(default_HDAU_layout_id, new_HDAU_layout_id, HDAU_LEN);␊
681␉␉␉verbose("Using user supplied HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",␊
682 default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);␊
683␉␉}␊
684␉}␊
685␉else␊
686␉{␊
687␉␉verbose("Using default HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",␊
688 default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);␊
689␉}␊
690␊
691␉devprop_add_value(device, "layout-id", default_HDAU_layout_id, HDAU_LEN); /*FIX ME*/␊
692␉devprop_add_value(device, "@0,connector-type", connector_type_value, 4);␊
693␉devprop_add_value(device, "@1,connector-type", connector_type_value, 4);␊
694␉devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-2", 10);␊
695␉devprop_add_value(device, "built-in", &BuiltIn, 1);␊
696␉break;␊
697␊
698␉/*************************************************************************************************************␊
699␉* The above case are intended as for HDAU (ATi) device onboard audio for GFX card with Audio controller HDMi␊
700␉*************************************************************************************************************/␊
701␉case HDA_ATI_SB450:␊
702␉case HDA_ATI_SB600:␊
703␉case HDA_ATI_RS600:␊
704␉case HDA_ATI_RS690:␊
705␉case HDA_ATI_RS780:␊
706␉case HDA_ATI_R600:␊
707␉case HDA_ATI_RV630:␊
708␉case HDA_ATI_RV610:␊
709␉case HDA_ATI_RV670:␊
710␉case HDA_ATI_RV635:␊
711␉case HDA_ATI_RV620:␊
712␉case HDA_ATI_RV770:␊
713␉case HDA_ATI_RV730:␊
714␉case HDA_ATI_RV710:␊
715␉case HDA_ATI_RV740:␊
716␉case HDA_ATI_RV870:␊
717␉case HDA_ATI_RV840:␊
718␉case HDA_ATI_RV830:␊
719␉case HDA_ATI_RV810:␊
720␉case HDA_ATI_RV970:␊
721␉case HDA_ATI_RV940:␊
722␉case HDA_ATI_RV930:␊
723␉case HDA_ATI_RV910:␊
724␉case HDA_ATI_R1000:␊
725␉case HDA_ATI_VERDE:␊
726␊
727 /* if the key value kHDAULayoutID as a value set that value, if not will assign a default layout */␊
728 if (getValueForKey(kHDAULayoutID, &value, &len, &bootInfo->chameleonConfig) && len == HDAU_LEN * 2)␊
729 {␊
730 uint8_t new_HDAU_layout_id[HDAU_LEN];␊
731 if (hex2bin(value, new_HDAU_layout_id, HDAU_LEN) == 0)␊
732 {␊
733 memcpy(default_HDAU_layout_id, new_HDAU_layout_id, HDAU_LEN);␊
734 verbose("Using user supplied HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",␊
735 default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);␊
736 }␊
737␉␉␉}␊
738␉␉␉else␊
739␉␉␉{␊
740␉␉␉␉verbose("Using default HDAU layout-id: 0x%02x, 0x%02x, 0x%02x, 0x%02x\n",␊
741 default_HDAU_layout_id[0], default_HDAU_layout_id[1], default_HDAU_layout_id[2], default_HDAU_layout_id[3]);␊
742 }␊
743␊
744 devprop_add_value(device, "layout-id", default_HDAU_layout_id, HDAU_LEN); /*FIX ME*/␊
745 devprop_add_value(device, "hda-gfx", (uint8_t *)"onboard-2", 10);␊
746 devprop_add_value(device, "built-in", &BuiltIn, 1);␊
747 break;␊
748␊
749 default:␊
750 break;␊
751␉}␊
752␊
753␉verbose("Class code: [%04x]\nModel name: %s [%04x:%04x] (rev %02x)\nSubsystem: [%04x:%04x]\n%s\ndevice number: %d\n",␊
754␉hda_dev->class_id, controller_name, hda_dev->vendor_id, hda_dev->device_id, hda_dev->revision_id,␊
755␉hda_dev->subsys_id.subsys.vendor_id, hda_dev->subsys_id.subsys.device_id, devicepath, devices_number);␊
756␊
757␉verbose("--------------------------------\n");␊
758␊
759␉stringdata = malloc(sizeof(uint8_t) * string->length);␊
760␉memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);␊
761␉stringlength = string->length;␊
762␊
763␉return true;␊
764}␊
765

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