1 | //␊ |
2 | // ati.h␊ |
3 | // Chameleon␊ |
4 | //␊ |
5 | // Created by Chris Morton on 1/30/13.␊ |
6 | //␊ |
7 | //␊ |
8 | ␊ |
9 | #ifndef Chameleon_ati_h␊ |
10 | #define Chameleon_ati_h␊ |
11 | ␊ |
12 | #include "boot.h"␊ |
13 | #include "bootstruct.h"␊ |
14 | #include "pci.h"␊ |
15 | #include "platform.h"␊ |
16 | #include "device_inject.h"␊ |
17 | #include "ati_reg.h"␊ |
18 | ␊ |
19 | /* DEFINES */␊ |
20 | ␊ |
21 | #define Reg32(reg)␉␉(*(volatile uint32_t *)(card->mmio + reg))␊ |
22 | #define RegRead32(reg)␉␉(Reg32(reg))␊ |
23 | #define RegWrite32(reg, value)␉(Reg32(reg) = value)␊ |
24 | ␊ |
25 | #define OFFSET_TO_GET_ATOMBIOS_STRINGS_START 0x6e␊ |
26 | #define DATVAL(x)␉␉␉{kPtr, sizeof(x), (uint8_t *)x}␊ |
27 | #define STRVAL(x)␉␉␉{kStr, sizeof(x)-1, (uint8_t *)x}␊ |
28 | #define BYTVAL(x)␉␉␉{kCst, 1, (uint8_t *)(unsigned)x}␊ |
29 | #define WRDVAL(x)␉␉␉{kCst, 2, (uint8_t *)(unsigned)x}␊ |
30 | #define DWRVAL(x)␉␉␉{kCst, 4, (uint8_t *)(unsigned)x}␊ |
31 | //#define QWRVAL(x)␉␉␉{kCst, 8, (uint8_t *)(unsigned)x}␊ |
32 | #define NULVAL␉␉␉␉{kNul, 0, (uint8_t *)NULL}␊ |
33 | ␊ |
34 | ␊ |
35 | /*Typedefs ENUMS*/␊ |
36 | typedef enum {␊ |
37 | ␉kNul,␊ |
38 | ␉kStr,␊ |
39 | ␉kPtr,␊ |
40 | ␉kCst␊ |
41 | } type_t;␊ |
42 | ␊ |
43 | typedef enum {␊ |
44 | ␉CHIP_FAMILY_UNKNOW,␊ |
45 | ␉/* Old */␊ |
46 | ␉CHIP_FAMILY_R420,␊ |
47 | ␉CHIP_FAMILY_R423,␊ |
48 | ␉CHIP_FAMILY_RV410,␊ |
49 | ␉CHIP_FAMILY_RV515,␊ |
50 | ␉CHIP_FAMILY_R520,␊ |
51 | ␉CHIP_FAMILY_RV530,␊ |
52 | ␉CHIP_FAMILY_RV560,␊ |
53 | ␉CHIP_FAMILY_RV570,␊ |
54 | ␉CHIP_FAMILY_R580,␊ |
55 | ␉/* IGP */␊ |
56 | ␉CHIP_FAMILY_RS600,␊ |
57 | ␉CHIP_FAMILY_RS690,␊ |
58 | ␉CHIP_FAMILY_RS740,␊ |
59 | ␉CHIP_FAMILY_RS780,␊ |
60 | ␉CHIP_FAMILY_RS880,␊ |
61 | ␉/* R600 */␊ |
62 | ␉CHIP_FAMILY_R600,␊ |
63 | ␉CHIP_FAMILY_RV610,␊ |
64 | ␉CHIP_FAMILY_RV620,␊ |
65 | ␉CHIP_FAMILY_RV630,␊ |
66 | ␉CHIP_FAMILY_RV635,␊ |
67 | ␉CHIP_FAMILY_RV670,␊ |
68 | ␉/* R700 */␊ |
69 | ␉CHIP_FAMILY_RV710,␊ |
70 | ␉CHIP_FAMILY_RV730,␊ |
71 | ␉CHIP_FAMILY_RV740,␊ |
72 | ␉CHIP_FAMILY_RV770,␊ |
73 | ␉CHIP_FAMILY_RV772,␊ |
74 | ␉CHIP_FAMILY_RV790,␊ |
75 | ␉/* Evergreen */␊ |
76 | ␉CHIP_FAMILY_CEDAR,␊ |
77 | ␉CHIP_FAMILY_CYPRESS,␊ |
78 | ␉CHIP_FAMILY_HEMLOCK,␊ |
79 | ␉CHIP_FAMILY_JUNIPER,␊ |
80 | ␉CHIP_FAMILY_REDWOOD,␊ |
81 | ␉/* Northern Islands */␊ |
82 | ␉CHIP_FAMILY_BARTS,␊ |
83 | ␉CHIP_FAMILY_CAICOS,␊ |
84 | ␉CHIP_FAMILY_CAYMAN,␊ |
85 | ␉CHIP_FAMILY_TURKS,␊ |
86 | ␉/* Southern Islands */␊ |
87 | ␉CHIP_FAMILY_PALM,␊ |
88 | ␉CHIP_FAMILY_SUMO,␊ |
89 | ␉CHIP_FAMILY_SUMO2,␊ |
90 | ␉CHIP_FAMILY_ARUBA,␊ |
91 | ␉CHIP_FAMILY_TAHITI,␊ |
92 | ␉CHIP_FAMILY_PITCAIRN,␊ |
93 | ␉CHIP_FAMILY_VERDE,␊ |
94 | ␉CHIP_FAMILY_OLAND,␊ |
95 | ␉CHIP_FAMILY_HAINAN,␊ |
96 | ␉CHIP_FAMILY_BONAIRE,␊ |
97 | ␉CHIP_FAMILY_KAVERI,␊ |
98 | ␉CHIP_FAMILY_KABINI,␊ |
99 | ␉CHIP_FAMILY_HAWAII,␊ |
100 | ␉/* ... */␊ |
101 | ␉CHIP_FAMILY_MULLINS,␊ |
102 | ␉CHIP_FAMILY_TOPAS,␊ |
103 | ␉CHIP_FAMILY_AMETHYST,␊ |
104 | ␉CHIP_FAMILY_TONGA,␊ |
105 | ␉CHIP_FAMILY_LAST␊ |
106 | } ati_chip_family_t;␊ |
107 | ␊ |
108 | //card to #ports␊ |
109 | typedef struct {␊ |
110 | ␉const char␉␉*name;␊ |
111 | ␉uint8_t␉␉␉ports;␊ |
112 | } card_config_t;␊ |
113 | ␊ |
114 | typedef enum {␊ |
115 | ␉kNull,␊ |
116 | ␉/* OLDController */␊ |
117 | ␉kWormy,␊ |
118 | ␉kAlopias,␊ |
119 | ␉kCaretta,␊ |
120 | ␉kKakapo,␊ |
121 | ␉kKipunji,␊ |
122 | ␉kPeregrine,␊ |
123 | ␉kRaven,␊ |
124 | ␉kSphyrna,␊ |
125 | ␉/* AMD2400Controller */␊ |
126 | ␉kIago,␊ |
127 | ␉/* AMD2600Controller */␊ |
128 | ␉kHypoprion,␊ |
129 | ␉kLamna,␊ |
130 | ␉/* AMD3800Controller */␊ |
131 | ␉kMegalodon,␊ |
132 | ␉kTriakis,␊ |
133 | ␉/* AMD4600Controller */␊ |
134 | ␉kFlicker,␊ |
135 | ␉kGliff,␊ |
136 | ␉kShrike,␊ |
137 | ␉/* AMD4800Controller */␊ |
138 | ␉kCardinal,␊ |
139 | ␉kMotmot,␊ |
140 | ␉kQuail,␊ |
141 | ␉/* AMD5000Controller */␊ |
142 | ␉kDouc,␊ |
143 | ␉kLangur,␊ |
144 | ␉kUakari,␊ |
145 | ␉kZonalis,␊ |
146 | ␉kAlouatta,␊ |
147 | ␉kHoolock,␊ |
148 | ␉kVervet,␊ |
149 | ␉kBaboon,␊ |
150 | ␉kEulemur,␊ |
151 | ␉kGalago,␊ |
152 | ␉kColobus,␊ |
153 | ␉kMangabey,␊ |
154 | ␉kNomascus,␊ |
155 | ␉kOrangutan,␊ |
156 | ␉/* AMD6000Controller */␊ |
157 | ␉kPithecia,␊ |
158 | ␉kBulrushes,␊ |
159 | ␉kCattail,␊ |
160 | ␉kHydrilla,␊ |
161 | ␉kDuckweed,␊ |
162 | ␉kFanwort,␊ |
163 | ␉kElodea,␊ |
164 | ␉kKudzu,␊ |
165 | ␉kGibba,␊ |
166 | ␉kLotus,␊ |
167 | ␉kIpomoea,␊ |
168 | ␉kMuskgrass,␊ |
169 | ␉kJuncus,␊ |
170 | ␉kOsmunda,␊ |
171 | ␉kPondweed,␊ |
172 | ␉kSpikerush,␊ |
173 | ␉kTypha,␊ |
174 | ␉/* AMD7000Controller */␊ |
175 | ␉kNamako,␊ |
176 | ␉kAji,␊ |
177 | ␉kBuri,␊ |
178 | ␉kChutoro,␊ |
179 | ␉kDashimaki,␊ |
180 | ␉kEbi,␊ |
181 | ␉kGari,␊ |
182 | ␉kFutomaki,␊ |
183 | ␉kHamachi,␊ |
184 | ␉kOPM,␊ |
185 | ␉kIkura,␊ |
186 | ␉kIkuraS,␊ |
187 | ␉kJunsai,␊ |
188 | ␉kKani,␊ |
189 | ␉kKaniS,␊ |
190 | ␉kDashimakiS,␊ |
191 | ␉kMaguro,␊ |
192 | ␉kMaguroS,␊ |
193 | ␉/* AMD8000Controller */␊ |
194 | ␉kBaladi,␊ |
195 | ␉/* AMD9000Controller */␊ |
196 | ␉kExmoor,␊ |
197 | ␉kBasset,␊ |
198 | ␉kGreyhound,␊ |
199 | ␉kCfgEnd␊ |
200 | } config_name_t;␊ |
201 | ␊ |
202 | //radeon card (includes the AtiConfig)␊ |
203 | typedef struct {␊ |
204 | ␉uint16_t␉␉device_id;␊ |
205 | ␉uint32_t␉␉subsys_id;␊ |
206 | ␉ati_chip_family_t␉chip_family;␊ |
207 | ␉const char␉␉*model_name;␊ |
208 | ␉config_name_t␉␉cfg_name;␊ |
209 | } radeon_card_info_t;␊ |
210 | ␊ |
211 | typedef struct {␊ |
212 | ␉struct DevPropDevice␉*device;␊ |
213 | ␉radeon_card_info_t␉*info;␊ |
214 | ␉pci_dt_t␉␉*pci_dev;␊ |
215 | ␉uint8_t␉␉␉*fb;␊ |
216 | ␉uint8_t␉␉␉*mmio;␊ |
217 | ␉uint8_t␉␉␉*io;␊ |
218 | ␉uint8_t␉␉␉*rom;␊ |
219 | ␉uint64_t␉␉rom_size;␊ |
220 | ␉uint64_t␉␉vram_size;␊ |
221 | ␉const char␉␉*cfg_name;␊ |
222 | ␉uint8_t␉␉␉ports;␊ |
223 | ␉uint32_t␉␉flags;␊ |
224 | ␉bool␉␉␉posted;␊ |
225 | } card_t;␊ |
226 | card_t *card;␊ |
227 | ␊ |
228 | ␊ |
229 | // Chip flags␊ |
230 | /* enum radeon_chip_flags {␊ |
231 | ␉RADEON_FAMILY_MASK = 0x0000ffffUL,␊ |
232 | ␉RADEON_FLAGS_MASK = 0xffff0000UL,␊ |
233 | ␉RADEON_IS_MOBILITY = 0x00010000UL,␊ |
234 | ␉RADEON_IS_IGP = 0x00020000UL,␊ |
235 | ␉RADEON_SINGLE_CRTC = 0x00040000UL,␊ |
236 | ␉RADEON_IS_AGP = 0x00080000UL,␊ |
237 | ␉RADEON_HAS_HIERZ = 0x00100000UL,␊ |
238 | ␉RADEON_IS_PCIE = 0x00200000UL,␊ |
239 | ␉RADEON_NEW_MEMMAP = 0x00400000UL,␊ |
240 | ␉RADEON_IS_PCI = 0x00800000UL,␊ |
241 | ␉RADEON_IS_IGPGART = 0x01000000UL,␊ |
242 | };*/␊ |
243 | ␊ |
244 | #define MKFLAG(n)␉(1 << n)␊ |
245 | #define FLAGTRUE␉MKFLAG(0)␊ |
246 | #define EVERGREEN␉MKFLAG(1)␊ |
247 | #define FLAGMOBILE␉MKFLAG(2)␊ |
248 | #define FLAGOLD␉␉MKFLAG(3)␊ |
249 | #define FLAGNOTFAKE␉MKFLAG(4)␊ |
250 | ␊ |
251 | /* Typedefs STRUCTS */␊ |
252 | typedef struct {␊ |
253 | ␉type_t␉␉␉type;␊ |
254 | ␉uint32_t␉␉size;␊ |
255 | ␉uint8_t␉␉␉*data;␊ |
256 | } value_t;␊ |
257 | ␊ |
258 | // dev_tree representation␊ |
259 | typedef struct {␊ |
260 | ␉uint32_t␉flags;␊ |
261 | ␉bool␉␉all_ports;␊ |
262 | ␉char␉␉*name;␊ |
263 | ␉bool␉␉(*get_value)(value_t *val);␊ |
264 | ␉value_t␉␉default_val;␊ |
265 | } AtiDevProp;␊ |
266 | ␊ |
267 | /* functions */␊ |
268 | bool get_bootdisplay_val(value_t *val);␊ |
269 | bool get_vrammemory_val(value_t *val);␊ |
270 | bool get_name_val(value_t *val);␊ |
271 | bool get_nameparent_val(value_t *val);␊ |
272 | bool get_model_val(value_t *val);␊ |
273 | bool get_conntype_val(value_t *val);␊ |
274 | bool get_vrammemsize_val(value_t *val);␊ |
275 | bool get_binimage_val(value_t *val);␊ |
276 | bool get_romrevision_val(value_t *val);␊ |
277 | bool get_deviceid_val(value_t *val);␊ |
278 | bool get_mclk_val(value_t *val);␊ |
279 | bool get_sclk_val(value_t *val);␊ |
280 | bool get_refclk_val(value_t *val);␊ |
281 | bool get_platforminfo_val(value_t *val);␊ |
282 | bool get_vramtotalsize_val(value_t *val);␊ |
283 | bool get_dual_link_val(value_t *val);␊ |
284 | bool get_hdmiaudio(value_t * val);␊ |
285 | ␊ |
286 | #endif␊ |
287 | |