1 | /*␊ |
2 | * platform.h␊ |
3 | * AsereBLN: reworked and extended␊ |
4 | *␊ |
5 | */␊ |
6 | ␊ |
7 | #ifndef __LIBSAIO_PLATFORM_H␊ |
8 | #define __LIBSAIO_PLATFORM_H␊ |
9 | ␊ |
10 | #include "libsaio.h"␊ |
11 | ␊ |
12 | extern bool platformCPUFeature(uint32_t);␊ |
13 | extern void scan_platform(void);␊ |
14 | extern void dumpPhysAddr(const char * title, void * a, int len);␊ |
15 | ␊ |
16 | /* CPUID index into cpuid_raw */␊ |
17 | #define CPUID_0␉␉␉␉0␊ |
18 | #define CPUID_1␉␉␉␉1␊ |
19 | #define CPUID_2␉␉␉␉2␊ |
20 | #define CPUID_3␉␉␉␉3␊ |
21 | #define CPUID_4␉␉␉␉4␊ |
22 | #define CPUID_80␉␉␉5␊ |
23 | #define CPUID_81␉␉␉6␊ |
24 | #define CPUID_MAX␉␉␉7␊ |
25 | ␊ |
26 | /* CPU Features */␊ |
27 | #define CPU_FEATURE_MMX␉␉␉0x00000001␉␉// MMX Instruction Set␊ |
28 | #define CPU_FEATURE_SSE␉␉␉0x00000002␉␉// SSE Instruction Set␊ |
29 | #define CPU_FEATURE_SSE2␉␉0x00000004␉␉// SSE2 Instruction Set␊ |
30 | #define CPU_FEATURE_SSE3␉␉0x00000008␉␉// SSE3 Instruction Set␊ |
31 | #define CPU_FEATURE_SSE41␉␉0x00000010␉␉// SSE41 Instruction Set␊ |
32 | #define CPU_FEATURE_SSE42␉␉0x00000020␉␉// SSE42 Instruction Set␊ |
33 | #define CPU_FEATURE_EM64T␉␉0x00000040␉␉// 64Bit Support␊ |
34 | #define CPU_FEATURE_HTT␉␉␉0x00000080␉␉// HyperThreading␊ |
35 | #define CPU_FEATURE_MOBILE␉␉0x00000100␉␉// Mobile CPU␊ |
36 | ␊ |
37 | /* SMBIOS Memory Types */ ␊ |
38 | #define SMB_MEM_TYPE_UNDEFINED␉␉0␊ |
39 | #define SMB_MEM_TYPE_OTHER␉␉1␊ |
40 | #define SMB_MEM_TYPE_UNKNOWN␉␉2␊ |
41 | #define SMB_MEM_TYPE_DRAM␉␉3␊ |
42 | #define SMB_MEM_TYPE_EDRAM␉␉4␊ |
43 | #define SMB_MEM_TYPE_VRAM␉␉5␊ |
44 | #define SMB_MEM_TYPE_SRAM␉␉6␊ |
45 | #define SMB_MEM_TYPE_RAM␉␉7␊ |
46 | #define SMB_MEM_TYPE_ROM␉␉8␊ |
47 | #define SMB_MEM_TYPE_FLASH␉␉9␊ |
48 | #define SMB_MEM_TYPE_EEPROM␉␉10␊ |
49 | #define SMB_MEM_TYPE_FEPROM␉␉11␊ |
50 | #define SMB_MEM_TYPE_EPROM␉␉12␊ |
51 | #define SMB_MEM_TYPE_CDRAM␉␉13␊ |
52 | #define SMB_MEM_TYPE_3DRAM␉␉14␊ |
53 | #define SMB_MEM_TYPE_SDRAM␉␉15␊ |
54 | #define SMB_MEM_TYPE_SGRAM␉␉16␊ |
55 | #define SMB_MEM_TYPE_RDRAM␉␉17␊ |
56 | #define SMB_MEM_TYPE_DDR␉␉18␊ |
57 | #define SMB_MEM_TYPE_DDR2␉␉19␊ |
58 | #define SMB_MEM_TYPE_FBDIMM␉␉20␊ |
59 | #define SMB_MEM_TYPE_DDR3␉␉24␉␉␉// Supported in 10.5.6+ AppleSMBIOS␊ |
60 | ␊ |
61 | /* Memory Configuration Types */ ␊ |
62 | #define SMB_MEM_CHANNEL_UNKNOWN␉␉0␊ |
63 | #define SMB_MEM_CHANNEL_SINGLE␉␉1␊ |
64 | #define SMB_MEM_CHANNEL_DUAL␉␉2␊ |
65 | #define SMB_MEM_CHANNEL_TRIPLE␉␉3␊ |
66 | ␊ |
67 | /* Maximum number of ram slots */␊ |
68 | #define MAX_RAM_SLOTS␉␉␉8␊ |
69 | #define RAM_SLOT_ENUMERATOR␉␉{0, 2, 4, 1, 3, 5, 6, 8, 10, 7, 9, 11}␊ |
70 | ␊ |
71 | /* Maximum number of SPD bytes */␊ |
72 | #define MAX_SPD_SIZE␉␉␉256␊ |
73 | ␊ |
74 | /* Size of SMBIOS UUID in bytes */␊ |
75 | #define UUID_LEN␉␉␉16␊ |
76 | ␊ |
77 | typedef struct _RamSlotInfo_t {␊ |
78 | uint32_t ModuleSize;␉␉␉␉␉␉// Size of Module in MB␊ |
79 | uint32_t Frequency; // in Mhz␊ |
80 | const char*␉␉Vendor;␊ |
81 | const char*␉␉PartNo;␊ |
82 | const char*␉␉SerialNo;␊ |
83 | char*␉␉spd;␉␉␉␉␉␉␉// SPD Dump␊ |
84 | bool␉␉InUse;␊ |
85 | uint8_t␉␉Type;␊ |
86 | uint8_t BankConnections; // table type 6, see (3.3.7)␊ |
87 | uint8_t BankConnCnt;␊ |
88 | ␊ |
89 | } RamSlotInfo_t;␊ |
90 | ␊ |
91 | typedef struct _PlatformInfo_t {␊ |
92 | ␉struct CPU {␊ |
93 | ␉␉uint32_t␉␉Features;␉␉// CPU Features like MMX, SSE2, VT, MobileCPU␊ |
94 | ␉␉uint32_t␉␉Vendor;␉␉␉// Vendor␊ |
95 | ␉␉uint32_t␉␉Model;␉␉␉// Model␊ |
96 | ␉␉uint32_t␉␉ExtModel;␉␉// Extended Model␊ |
97 | ␉␉uint32_t␉␉Family;␉␉␉// Family␊ |
98 | ␉␉uint32_t␉␉ExtFamily;␉␉// Extended Family␊ |
99 | ␉␉uint32_t␉␉NoCores;␉␉// No Cores per Package␊ |
100 | ␉␉uint32_t␉␉NoThreads;␉␉// Threads per Package␊ |
101 | ␉␉uint8_t␉␉␉MaxCoef;␉␉// Max Multiplier␊ |
102 | ␉␉uint8_t␉␉␉MaxDiv;␊ |
103 | ␉␉uint8_t␉␉␉CurrCoef;␉␉// Current Multiplier␊ |
104 | ␉␉uint8_t␉␉␉CurrDiv;␊ |
105 | ␉␉uint64_t␉␉TSCFrequency;␉␉// TSC Frequency Hz␊ |
106 | ␉␉uint64_t␉␉FSBFrequency;␉␉// FSB Frequency Hz␊ |
107 | ␉␉uint64_t␉␉CPUFrequency;␉␉// CPU Frequency Hz␊ |
108 | ␉␉uint32_t␉␉BrandString[16];␉// 48 Byte Branding String␊ |
109 | ␉␉uint32_t␉␉CPUID[CPUID_MAX][4];␉// CPUID 0..4, 80..81 Raw Values␊ |
110 | //␉␉uint32_t␉␉fsb_cloud;␊ |
111 | //␉␉uint32_t␉␉lo, hi;␊ |
112 | ␉} CPU;␊ |
113 | ␊ |
114 | ␉struct RAM {␊ |
115 | ␉␉RamSlotInfo_t␉␉DIMM[MAX_RAM_SLOTS];␉// Information about each slot␊ |
116 | ␉} RAM;␊ |
117 | ␊ |
118 | ␉struct DMI {␊ |
119 | ␉␉int␉␉␉MaxMemorySlots;␉␉// number of memory slots polulated by SMBIOS␊ |
120 | ␉␉int␉␉␉CntMemorySlots;␉␉// number of memory slots counted␊ |
121 | ␉␉int␉␉␉MemoryModules;␉␉// number of memory modules installed␊ |
122 | ␉␉int␉␉␉DIMM[MAX_RAM_SLOTS];␉// Information and SPD mapping for each slot␊ |
123 | ␉} DMI;␊ |
124 | ␉uint8_t␉␉␉␉Type;␉␉␉// System Type: 1=Desktop, 2=Portable... according ACPI2.0 (FACP: PM_Profile)␊ |
125 | } PlatformInfo_t;␊ |
126 | ␊ |
127 | extern PlatformInfo_t Platform;␊ |
128 | ␊ |
129 | #endif /* !__LIBSAIO_PLATFORM_H */␊ |
130 | |