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Source at commit 356 created 13 years 11 months ago. By meklort, Fixed date, changed one or two things | |
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1 | /*␊ |
2 | * NVidia injector␊ |
3 | *␊ |
4 | * Copyright (C) 2009 Jasmin Fazlic, iNDi␊ |
5 | *␊ |
6 | * NVidia injector is free software: you can redistribute it and/or modify␊ |
7 | * it under the terms of the GNU General Public License as published by␊ |
8 | * the Free Software Foundation, either version 3 of the License, or␊ |
9 | * (at your option) any later version.␊ |
10 | *␊ |
11 | * NVidia driver and injector is distributed in the hope that it will be useful,␊ |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of␊ |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the␊ |
14 | * GNU General Public License for more details.␊ |
15 | *␊ |
16 | * You should have received a copy of the GNU General Public License␊ |
17 | * along with NVidia injector. If not, see <http://www.gnu.org/licenses/>.␊ |
18 | */␊ |
19 | /*␊ |
20 | * Alternatively you can choose to comply with APSL␊ |
21 | */␊ |
22 | ␊ |
23 | /*␊ |
24 | * DCB-Table parsing is based on software (nouveau driver) originally distributed under following license:␊ |
25 | *␊ |
26 | *␊ |
27 | * Copyright 2005-2006 Erik Waling␊ |
28 | * Copyright 2006 Stephane Marchesin␊ |
29 | * Copyright 2007-2009 Stuart Bennett␊ |
30 | *␊ |
31 | * Permission is hereby granted, free of charge, to any person obtaining a␊ |
32 | * copy of this software and associated documentation files (the "Software"),␊ |
33 | * to deal in the Software without restriction, including without limitation␊ |
34 | * the rights to use, copy, modify, merge, publish, distribute, sublicense,␊ |
35 | * and/or sell copies of the Software, and to permit persons to whom the␊ |
36 | * Software is furnished to do so, subject to the following conditions:␊ |
37 | *␊ |
38 | * The above copyright notice and this permission notice shall be included in␊ |
39 | * all copies or substantial portions of the Software.␊ |
40 | *␊ |
41 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR␊ |
42 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,␊ |
43 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL␊ |
44 | * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,␊ |
45 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF␊ |
46 | * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE␊ |
47 | * SOFTWARE.␊ |
48 | */␊ |
49 | ␊ |
50 | #ifndef __LIBSAIO_NVIDIA_H␊ |
51 | #define __LIBSAIO_NVIDIA_H␊ |
52 | ␊ |
53 | bool setup_nvidia_devprop(pci_dt_t *nvda_dev);␊ |
54 | ␊ |
55 | struct nv_chipsets_t {␊ |
56 | ␉unsigned device;␊ |
57 | ␉char *name;␊ |
58 | };␊ |
59 | ␊ |
60 | #define DCB_MAX_NUM_ENTRIES 16␊ |
61 | #define DCB_MAX_NUM_I2C_ENTRIES 16␊ |
62 | ␊ |
63 | #define DCB_LOC_ON_CHIP 0␊ |
64 | ␊ |
65 | struct bios {␊ |
66 | ␉uint16_t␉signature;␉␉/* 0x55AA */␊ |
67 | ␉uint8_t␉␉size;␉␉␉/* Size in multiples of 512 */␊ |
68 | };␊ |
69 | ␊ |
70 | #define NV_PROM_OFFSET␉␉0x300000␊ |
71 | #define NV_PROM_SIZE␉␉0x0000ffff␊ |
72 | #define NV_PRAMIN_OFFSET␉0x00700000␊ |
73 | #define NV_PRAMIN_SIZE␉␉0x00100000␊ |
74 | ␊ |
75 | #define NV_PBUS_PCI_NV_20␉0x00001850␊ |
76 | #define NV_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED␉(0 << 0)␊ |
77 | #define NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED␉(1 << 0)␊ |
78 | ␊ |
79 | #define REG8(reg) ((volatile uint8_t *)regs)[(reg)]␊ |
80 | #define REG16(reg) ((volatile uint16_t *)regs)[(reg) >> 1]␊ |
81 | #define REG32(reg) ((volatile uint32_t *)regs)[(reg) >> 2]␊ |
82 | ␊ |
83 | #define NV_ARCH_03 0x03␊ |
84 | #define NV_ARCH_04 0x04␊ |
85 | #define NV_ARCH_10 0x10␊ |
86 | #define NV_ARCH_20 0x20␊ |
87 | #define NV_ARCH_30 0x30␊ |
88 | #define NV_ARCH_40 0x40␊ |
89 | #define NV_ARCH_50 0x50␊ |
90 | ␊ |
91 | #define CHIPSET_NV03 0x0010␊ |
92 | #define CHIPSET_NV04 0x0020␊ |
93 | #define CHIPSET_NV10 0x0100␊ |
94 | #define CHIPSET_NV11 0x0110␊ |
95 | #define CHIPSET_NV15 0x0150␊ |
96 | #define CHIPSET_NV17 0x0170␊ |
97 | #define CHIPSET_NV18 0x0180␊ |
98 | #define CHIPSET_NFORCE 0x01A0␊ |
99 | #define CHIPSET_NFORCE2 0x01F0␊ |
100 | #define CHIPSET_NV20 0x0200␊ |
101 | #define CHIPSET_NV25 0x0250␊ |
102 | #define CHIPSET_NV28 0x0280␊ |
103 | #define CHIPSET_NV30 0x0300␊ |
104 | #define CHIPSET_NV31 0x0310␊ |
105 | #define CHIPSET_NV34 0x0320␊ |
106 | #define CHIPSET_NV35 0x0330␊ |
107 | #define CHIPSET_NV36 0x0340␊ |
108 | #define CHIPSET_NV40 0x0040␊ |
109 | #define CHIPSET_NV41 0x00C0␊ |
110 | #define CHIPSET_NV43 0x0140␊ |
111 | #define CHIPSET_NV44 0x0160␊ |
112 | #define CHIPSET_NV44A 0x0220␊ |
113 | #define CHIPSET_NV45 0x0210␊ |
114 | #define CHIPSET_NV50 0x0190␊ |
115 | #define CHIPSET_NV84 0x0400␊ |
116 | #define CHIPSET_MISC_BRIDGED 0x00F0␊ |
117 | #define CHIPSET_G70 0x0090␊ |
118 | #define CHIPSET_G71 0x0290␊ |
119 | #define CHIPSET_G72 0x01D0␊ |
120 | #define CHIPSET_G73 0x0390␊ |
121 | ␊ |
122 | // integrated GeForces (6100, 6150)␊ |
123 | #define CHIPSET_C51 0x0240␊ |
124 | ␊ |
125 | // variant of C51, seems based on a G70 design␊ |
126 | #define CHIPSET_C512 0x03D0␊ |
127 | #define CHIPSET_G73_BRIDGED 0x02E0␊ |
128 | ␊ |
129 | #endif /* !__LIBSAIO_NVIDIA_H */␊ |
130 |