1 | /*␊ |
2 | * Copyright 2008 Islam Ahmed Zaid. All rights reserved. <azismed@gmail.com>␊ |
3 | * AsereBLN: 2009: cleanup and bugfix␊ |
4 | */␊ |
5 | ␊ |
6 | #ifndef __LIBSAIO_CPU_H␊ |
7 | #define __LIBSAIO_CPU_H␊ |
8 | ␊ |
9 | #include "libsaio.h"␊ |
10 | ␊ |
11 | extern void scan_cpu(PlatformInfo_t *);␊ |
12 | ␊ |
13 | #define bit(n)␉␉␉(1UL << (n))␊ |
14 | #define bitmask(h,l)␉␉((bit(h)|(bit(h)-1)) & ~(bit(l)-1))␊ |
15 | #define bitfield(x,h,l)␉␉(((x) & bitmask(h,l)) >> l)␊ |
16 | ␊ |
17 | #define CPU_STRING_UNKNOWN␉␉"Unknown CPU Typ"␊ |
18 | ␊ |
19 | #define␉MSR_IA32_PERF_STATUS␉0x198␊ |
20 | #define MSR_IA32_PERF_CONTROL␉0x199␊ |
21 | #define MSR_IA32_EXT_CONFIG␉␉0x00EE␊ |
22 | #define MSR_FLEX_RATIO␉␉␉0x194␊ |
23 | #define MSR_TURBO_RATIO_LIMIT␉0x1AD␊ |
24 | #define␉MSR_PLATFORM_INFO␉␉0xCE␊ |
25 | #define MSR_CORE_THREAD_COUNT␉0x35␉␉␉// Undocumented␊ |
26 | ␊ |
27 | #define K8_FIDVID_STATUS␉␉0xC0010042␊ |
28 | #define K10_COFVID_STATUS␉␉0xC0010071␊ |
29 | ␊ |
30 | #define DEFAULT_FSB␉␉100000 /* for now, hardcoding 100MHz for old CPUs */␊ |
31 | ␊ |
32 | // DFE: This constant comes from older xnu:␊ |
33 | #define CLKNUM␉␉␉1193182␉␉/* formerly 1193167 */␊ |
34 | ␊ |
35 | // DFE: These two constants come from Linux except CLOCK_TICK_RATE replaced with CLKNUM␊ |
36 | #define CALIBRATE_TIME_MSEC␉30␉␉/* 30 msecs */␊ |
37 | #define CALIBRATE_LATCH␉␉((CLKNUM * CALIBRATE_TIME_MSEC + 1000/2)/1000)␊ |
38 | ␊ |
39 | static inline uint64_t rdtsc64(void)␊ |
40 | {␊ |
41 | ␉uint64_t ret;␊ |
42 | ␉__asm__ volatile("rdtsc" : "=A" (ret));␊ |
43 | ␉return ret;␊ |
44 | }␊ |
45 | ␊ |
46 | static inline uint64_t rdmsr64(uint32_t msr)␊ |
47 | {␊ |
48 | uint64_t ret;␊ |
49 | __asm__ volatile("rdmsr" : "=A" (ret) : "c" (msr));␊ |
50 | return ret;␊ |
51 | }␊ |
52 | ␊ |
53 | static inline void wrmsr64(uint32_t msr, uint64_t val)␊ |
54 | {␊ |
55 | ␉__asm__ volatile("wrmsr" : : "c" (msr), "A" (val));␊ |
56 | }␊ |
57 | ␊ |
58 | static inline void intel_waitforsts(void) {␊ |
59 | ␉uint32_t inline_timeout = 100000;␊ |
60 | ␉while (rdmsr64(MSR_IA32_PERF_STATUS) & (1 << 21)) { if (!inline_timeout--) break; }␊ |
61 | }␊ |
62 | ␊ |
63 | static inline void do_cpuid(uint32_t selector, uint32_t *data)␊ |
64 | {␊ |
65 | ␉asm volatile ("cpuid"␊ |
66 | ␉␉␉␉ : "=a" (data[0]),␊ |
67 | ␉␉␉␉ "=b" (data[1]),␊ |
68 | ␉␉␉␉ "=c" (data[2]),␊ |
69 | ␉␉␉␉ "=d" (data[3])␊ |
70 | ␉␉␉␉ : "a" (selector));␊ |
71 | }␊ |
72 | ␊ |
73 | static inline void do_cpuid2(uint32_t selector, uint32_t selector2, uint32_t *data)␊ |
74 | {␊ |
75 | ␉asm volatile ("cpuid"␊ |
76 | ␉␉␉␉ : "=a" (data[0]),␊ |
77 | ␉␉␉␉ "=b" (data[1]),␊ |
78 | ␉␉␉␉ "=c" (data[2]),␊ |
79 | ␉␉␉␉ "=d" (data[3])␊ |
80 | ␉␉␉␉ : "a" (selector), "c" (selector2));␊ |
81 | }␊ |
82 | ␊ |
83 | // DFE: enable_PIT2 and disable_PIT2 come from older xnu␊ |
84 | ␊ |
85 | /*␊ |
86 | * Enable or disable timer 2.␊ |
87 | * Port 0x61 controls timer 2:␊ |
88 | * bit 0 gates the clock,␊ |
89 | * bit 1 gates output to speaker.␊ |
90 | */␊ |
91 | static inline void enable_PIT2(void)␊ |
92 | {␊ |
93 | /* Enable gate, disable speaker */␊ |
94 | __asm__ volatile(␊ |
95 | ␉␉␉␉␉ " inb $0x61,%%al \n\t"␊ |
96 | ␉␉␉␉␉ " and $0xFC,%%al \n\t" /* & ~0x03 */␊ |
97 | ␉␉␉␉␉ " or $1,%%al \n\t"␊ |
98 | ␉␉␉␉␉ " outb %%al,$0x61 \n\t"␊ |
99 | ␉␉␉␉␉ : : : "%al" );␊ |
100 | }␊ |
101 | ␊ |
102 | static inline void disable_PIT2(void)␊ |
103 | {␊ |
104 | /* Disable gate and output to speaker */␊ |
105 | __asm__ volatile(␊ |
106 | ␉␉␉␉␉ " inb $0x61,%%al \n\t"␊ |
107 | ␉␉␉␉␉ " and $0xFC,%%al \n\t"␉/* & ~0x03 */␊ |
108 | ␉␉␉␉␉ " outb %%al,$0x61 \n\t"␊ |
109 | ␉␉␉␉␉ : : : "%al" );␊ |
110 | }␊ |
111 | ␊ |
112 | // DFE: set_PIT2_mode0, poll_PIT2_gate, and measure_tsc_frequency are␊ |
113 | // roughly based on Linux code␊ |
114 | ␊ |
115 | /* Set the 8254 channel 2 to mode 0 with the specified value.␊ |
116 | In mode 0, the counter will initially set its gate low when the␊ |
117 | timer expires. For this to be useful, you ought to set it high␊ |
118 | before calling this function. The enable_PIT2 function does this.␊ |
119 | */␊ |
120 | static inline void set_PIT2_mode0(uint16_t value)␊ |
121 | {␊ |
122 | __asm__ volatile(␊ |
123 | ␉␉␉␉␉ " movb $0xB0,%%al \n\t"␊ |
124 | ␉␉␉␉␉ " outb␉%%al,$0x43␉\n\t"␊ |
125 | ␉␉␉␉␉ " movb␉%%dl,%%al␉\n\t"␊ |
126 | ␉␉␉␉␉ " outb␉%%al,$0x42␉\n\t"␊ |
127 | ␉␉␉␉␉ " movb␉%%dh,%%al␉\n\t"␊ |
128 | ␉␉␉␉␉ " outb␉%%al,$0x42"␊ |
129 | ␉␉␉␉␉ : : "d"(value) /*: no clobber */ );␊ |
130 | }␊ |
131 | ␊ |
132 | /* Returns the number of times the loop ran before the PIT2 signaled */␊ |
133 | static inline unsigned long poll_PIT2_gate(void)␊ |
134 | {␊ |
135 | unsigned long count = 0;␊ |
136 | unsigned char nmi_sc_val;␊ |
137 | do {␊ |
138 | ++count;␊ |
139 | __asm__ volatile(␊ |
140 | ␉␉␉␉␉␉ "inb␉$0x61,%0"␊ |
141 | ␉␉␉␉␉␉ : "=q"(nmi_sc_val) /*:*/ /* no input */ /*:*/ /* no clobber */);␊ |
142 | } while( (nmi_sc_val & 0x20) == 0);␊ |
143 | return count;␊ |
144 | }␊ |
145 | ␊ |
146 | #endif /* !__LIBSAIO_CPU_H */␊ |
147 | |