| 1 | /*␊ |
| 2 | * ATI Graphics Card Enabler, part of the Chameleon Boot Loader Project␊ |
| 3 | *␊ |
| 4 | * Copyright 2010 by Islam M. Ahmed Zaid. All rights reserved.␊ |
| 5 | *␊ |
| 6 | */␊ |
| 7 | ␊ |
| 8 | ␊ |
| 9 | #include "libsaio.h"␊ |
| 10 | #include "boot.h"␊ |
| 11 | #include "bootstruct.h"␊ |
| 12 | #include "pci.h"␊ |
| 13 | #include "platform.h"␊ |
| 14 | #include "device_inject.h"␊ |
| 15 | ␊ |
| 16 | #include "ati_reg.h"␊ |
| 17 | ␊ |
| 18 | #define␉OFFSET_TO_GET_ATOMBIOS_STRINGS_START␉␉0x6e␊ |
| 19 | ␊ |
| 20 | #define Reg32(reg)␉␉␉␉␉(*(volatile uint32_t *)(card->mmio + reg))␊ |
| 21 | #define RegRead32(reg)␉␉␉␉(Reg32(reg))␊ |
| 22 | #define RegWrite32(reg, value)␉␉(Reg32(reg) = value)␊ |
| 23 | ␊ |
| 24 | typedef enum {␊ |
| 25 | ␉kNul,␊ |
| 26 | ␉kStr,␊ |
| 27 | ␉kPtr,␊ |
| 28 | ␉kCst␊ |
| 29 | } type_t;␊ |
| 30 | ␊ |
| 31 | typedef enum {␊ |
| 32 | ␉CHIP_FAMILY_UNKNOW,␊ |
| 33 | ␉CHIP_FAMILY_RS600,␊ |
| 34 | ␉CHIP_FAMILY_RS690,␊ |
| 35 | ␉CHIP_FAMILY_RS740,␊ |
| 36 | ␉CHIP_FAMILY_R600,␉/* r600 */␊ |
| 37 | ␉CHIP_FAMILY_RV610,␊ |
| 38 | ␉CHIP_FAMILY_RV630,␊ |
| 39 | ␉CHIP_FAMILY_RV670,␊ |
| 40 | ␉CHIP_FAMILY_RV620,␊ |
| 41 | ␉CHIP_FAMILY_RV635,␊ |
| 42 | ␉CHIP_FAMILY_RS780,␊ |
| 43 | ␉CHIP_FAMILY_RS880,␊ |
| 44 | ␉CHIP_FAMILY_RV770, /* r700 */␊ |
| 45 | ␉CHIP_FAMILY_RV730,␊ |
| 46 | ␉CHIP_FAMILY_RV710,␊ |
| 47 | ␉CHIP_FAMILY_RV740,␊ |
| 48 | ␉CHIP_FAMILY_CEDAR, /* evergreen */␊ |
| 49 | ␉CHIP_FAMILY_REDWOOD,␊ |
| 50 | ␉CHIP_FAMILY_JUNIPER,␊ |
| 51 | ␉CHIP_FAMILY_CYPRESS,␊ |
| 52 | ␉CHIP_FAMILY_HEMLOCK,␊ |
| 53 | ␉CHIP_FAMILY_LAST␊ |
| 54 | } chip_family_t;␊ |
| 55 | ␊ |
| 56 | static const char *chip_family_name[] = {␊ |
| 57 | ␉"UNKNOW",␊ |
| 58 | ␉"RS600",␊ |
| 59 | ␉"RS690",␊ |
| 60 | ␉"RS740",␊ |
| 61 | ␉/* r600 */␊ |
| 62 | ␉"R600",␊ |
| 63 | ␉"RV610",␊ |
| 64 | ␉"RV630",␊ |
| 65 | ␉"RV670",␊ |
| 66 | ␉"RV620",␊ |
| 67 | ␉"RV635",␊ |
| 68 | ␉"RS780",␊ |
| 69 | ␉"RS880",␊ |
| 70 | ␉/* r700 */␊ |
| 71 | ␉"RV770",␊ |
| 72 | ␉"RV730",␊ |
| 73 | ␉"RV710",␊ |
| 74 | ␉"RV740",␊ |
| 75 | ␉/* evergreen */␊ |
| 76 | ␉"Cedar",␉// RV810␊ |
| 77 | ␉"Redwood",␉// RV830␊ |
| 78 | ␉"Juniper",␉// RV840␊ |
| 79 | ␉"Cypress",␉// RV870␊ |
| 80 | ␉"Hemlock",␉␊ |
| 81 | };␊ |
| 82 | ␊ |
| 83 | typedef struct {␊ |
| 84 | ␉const char␉␉*name;␊ |
| 85 | ␉uint8_t␉␉␉ports;␊ |
| 86 | } card_config_t;␊ |
| 87 | ␊ |
| 88 | static card_config_t card_configs[] = {␊ |
| 89 | ␉{NULL,␉␉␉0},␊ |
| 90 | ␉{"Alopias",␉␉2},␊ |
| 91 | ␉{"Alouatta",␉4},␊ |
| 92 | ␉{"Baboon",␉␉3},␊ |
| 93 | ␉{"Cardinal",␉2},␊ |
| 94 | ␉{"Caretta",␉␉1},␊ |
| 95 | ␉{"Colobus",␉␉2},␊ |
| 96 | ␉{"Douc",␉␉2},␊ |
| 97 | ␉{"Eulemur",␉␉3},␊ |
| 98 | ␉{"Flicker",␉␉3},␊ |
| 99 | ␉{"Galago",␉␉2},␊ |
| 100 | ␉{"Gliff",␉␉3},␊ |
| 101 | ␉{"Hoolock",␉␉3},␊ |
| 102 | ␉{"Hypoprion",␉2},␊ |
| 103 | ␉{"Iago",␉␉2},␊ |
| 104 | ␉{"Kakapo",␉␉3},␊ |
| 105 | ␉{"Kipunji",␉␉4},␊ |
| 106 | ␉{"Lamna",␉␉2},␊ |
| 107 | ␉{"Langur",␉␉3},␊ |
| 108 | ␉{"Megalodon",␉3},␊ |
| 109 | ␉{"Motmot",␉␉2},␊ |
| 110 | ␉{"Nomascus",␉5},␊ |
| 111 | ␉{"Orangutan",␉2},␊ |
| 112 | ␉{"Peregrine",␉2},␊ |
| 113 | ␉{"Quail",␉␉3},␊ |
| 114 | ␉{"Raven",␉␉3},␊ |
| 115 | ␉{"Shrike",␉␉3},␊ |
| 116 | ␉{"Sphyrna",␉␉1},␊ |
| 117 | ␉{"Triakis",␉␉2},␊ |
| 118 | ␉{"Uakari",␉␉4},␊ |
| 119 | ␉{"Vervet",␉␉4},␊ |
| 120 | ␉{"Zonalis",␉␉6}␊ |
| 121 | };␊ |
| 122 | ␊ |
| 123 | typedef enum {␊ |
| 124 | ␉kNull,␊ |
| 125 | ␉kAlopias,␊ |
| 126 | ␉kAlouatta,␊ |
| 127 | ␉kBaboon,␊ |
| 128 | ␉kCardinal,␊ |
| 129 | ␉kCaretta,␊ |
| 130 | ␉kColobus,␊ |
| 131 | ␉kDouc,␊ |
| 132 | ␉kEulemur,␊ |
| 133 | ␉kFlicker,␊ |
| 134 | ␉kGalago,␊ |
| 135 | ␉kGliff,␊ |
| 136 | ␉kHoolock,␊ |
| 137 | ␉kHypoprion,␊ |
| 138 | ␉kIago,␊ |
| 139 | ␉kKakapo,␊ |
| 140 | ␉kKipunji,␊ |
| 141 | ␉kLamna,␊ |
| 142 | ␉kLangur,␊ |
| 143 | ␉kMegalodon,␊ |
| 144 | ␉kMotmot,␊ |
| 145 | ␉kNomascus,␊ |
| 146 | ␉kOrangutan,␊ |
| 147 | ␉kPeregrine,␊ |
| 148 | ␉kQuail,␊ |
| 149 | ␉kRaven,␊ |
| 150 | ␉kShrike,␊ |
| 151 | ␉kSphyrna,␊ |
| 152 | ␉kTriakis,␊ |
| 153 | ␉kUakari,␊ |
| 154 | ␉kVervet,␊ |
| 155 | ␉kZonalis,␊ |
| 156 | ␉kCfgEnd␊ |
| 157 | } config_name_t;␊ |
| 158 | ␊ |
| 159 | typedef struct {␊ |
| 160 | ␉uint16_t␉␉device_id;␊ |
| 161 | ␉uint32_t␉␉subsys_id;␊ |
| 162 | ␉chip_family_t␉chip_family;␊ |
| 163 | ␉const char␉␉*model_name;␊ |
| 164 | ␉config_name_t␉cfg_name;␊ |
| 165 | } radeon_card_info_t;␊ |
| 166 | ␊ |
| 167 | static radeon_card_info_t radeon_cards[] = {␊ |
| 168 | ␉/* Earlier cards are not supported */␊ |
| 169 | ␉{ 0x9400,␉0x30001002,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 PRO",␉␉␉kNull␉␉},␊ |
| 170 | ␉{ 0x9400,␉0x25521002,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 XT",␉␉␉kNull␉␉},␊ |
| 171 | ␊ |
| 172 | ␉{ 0x9440,␉0x24401682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
| 173 | ␉{ 0x9440,␉0x24411682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
| 174 | ␉{ 0x9440,␉0x24441682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
| 175 | ␉{ 0x9440,␉0x24451682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870",␉␉␉␉kMotmot␉␉},␊ |
| 176 | ␊ |
| 177 | ␉{ 0x9441,␉0x24401682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870 X2",␉␉␉kMotmot␉␉},␊ |
| 178 | ␊ |
| 179 | ␉{ 0x9442,␉0x24701682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
| 180 | ␉{ 0x9442,␉0x24711682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
| 181 | ␉{ 0x9442,␉0x080110B0,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
| 182 | ␉{ 0x9442,␉0xE104174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850",␉␉␉␉kMotmot␉␉},␊ |
| 183 | ␊ |
| 184 | ␉{ 0x944A,␉0x30001682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
| 185 | ␉{ 0x944A,␉0x30001043,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
| 186 | ␉{ 0x944A,␉0x30001458,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
| 187 | ␉{ 0x944A,␉0x30001462,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
| 188 | ␉{ 0x944A,␉0x30001545,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
| 189 | ␉{ 0x944A,␉0x30001787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
| 190 | ␉{ 0x944A,␉0x3000174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
| 191 | ␉{ 0x944A,␉0x300017AF,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
| 192 | ␊ |
| 193 | ␉{ 0x944C,␉0x24801682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4830",␉␉␉␉kMotmot␉␉},␊ |
| 194 | ␉{ 0x944C,␉0x24811682,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4830",␉␉␉␉kMotmot␉␉},␊ |
| 195 | ␊ |
| 196 | ␉{ 0x944E,␉0x3260174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4810 Series",␉␉kMotmot␉␉},␊ |
| 197 | ␉{ 0x944E,␉0x3261174B,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4810 series",␉␉kMotmot␉␉},␊ |
| 198 | ␉{ 0x944E,␉0x30001787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4730 Series",␉␉kMotmot␉␉},␊ |
| 199 | ␉{ 0x944E,␉0x30101787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4810 Series",␉␉kMotmot␉␉},␊ |
| 200 | ␉{ 0x944E,␉0x31001787,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4820",␉␉␉␉kMotmot␉␉},␊ |
| 201 | ␊ |
| 202 | ␉{ 0x9490,␉0x30501787,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4710",␉␉␉␉kNull␉␉},␊ |
| 203 | ␉{ 0x9490,␉0x4710174B,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4710",␉␉␉␉kNull␉␉},␊ |
| 204 | ␉{ 0x9490,␉0x300017AF,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4710",␉␉␉␉kNull␉␉},␊ |
| 205 | ␊ |
| 206 | ␉{ 0x9498,␉0x30501787,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4700",␉␉␉␉kNull␉␉},␊ |
| 207 | ␉{ 0x9498,␉0x31001787,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4720",␉␉␉␉kNull␉␉},␊ |
| 208 | ␉{ 0x9498,␉0x24511682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4650",␉␉␉␉kNull␉␉},␊ |
| 209 | ␉{ 0x9498,␉0x24521682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4650",␉␉␉␉kNull␉␉},␊ |
| 210 | ␉{ 0x9498,␉0x24541682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4650",␉␉␉␉kNull␉␉},␊ |
| 211 | ␉{ 0x9498,␉0x29331682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4670",␉␉␉␉kNull␉␉},␊ |
| 212 | ␉{ 0x9498,␉0x29341682,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4670",␉␉␉␉kNull␉␉},␊ |
| 213 | ␉{ 0x9498,␉0x21CF1458,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4600 Series",␉␉kNull␉␉},␊ |
| 214 | ␊ |
| 215 | ␉{ 0x94B3,␉0x29001682,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
| 216 | ␉{ 0x94B3,␉0x1170174B,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
| 217 | ␉{ 0x94B3,␉0x10020D00,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
| 218 | ␊ |
| 219 | ␉{ 0x94C1,␉0x10021002,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Pro",␉␉␉kNull␉␉},␊ |
| 220 | ␉{ 0x94C1,␉0x0D021002,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
| 221 | ␉{ 0x94C1,␉0x0D021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Pro",␉␉␉kNull␉␉},␊ |
| 222 | ␉{ 0x94C1,␉0x0D021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
| 223 | ␉{ 0x94C1,␉0x21741458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
| 224 | ␉{ 0x94C1,␉0x10401462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
| 225 | ␉{ 0x94C1,␉0x10331462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
| 226 | ␉{ 0x94C1,␉0x10331462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
| 227 | ␉{ 0x94C1,␉0x11101462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 XT",␉␉␉kNull␉␉},␊ |
| 228 | ␊ |
| 229 | ␉{ 0x94C3,␉0x37161642,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
| 230 | ␉{ 0x94C3,␉0x30001642,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 3410",␉␉␉␉kNull␉␉},␊ |
| 231 | ␉{ 0x94C3,␉0x03421002,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
| 232 | ␉{ 0x94C3,␉0x30001025,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
| 233 | ␉{ 0x94C3,␉0x04021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
| 234 | ␉{ 0x94C3,␉0x03021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
| 235 | ␉{ 0x94C3,␉0x04021028,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
| 236 | ␉{ 0x94C3,␉0x216A1458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
| 237 | ␉{ 0x94C3,␉0x21721458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
| 238 | ␉{ 0x94C3,␉0x30001458,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 3410",␉␉␉␉kNull␉␉},␊ |
| 239 | ␉{ 0x94C3,␉0x11041462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
| 240 | ␉{ 0x94C3,␉0x10411462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
| 241 | ␉{ 0x94C3,␉0x11051462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
| 242 | ␉{ 0x94C3,␉0x10321462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
| 243 | ␉{ 0x94C3,␉0x30001462,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 3410",␉␉␉␉kNull␉␉},␊ |
| 244 | ␉{ 0x94C3,␉0x3000148C,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
| 245 | ␉{ 0x94C3,␉0x2247148C,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 LE",␉␉␉kNull␉␉},␊ |
| 246 | ␉{ 0x94C3,␉0x3000174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
| 247 | ␉{ 0x94C3,␉0xE400174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
| 248 | ␉{ 0x94C3,␉0xE370174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
| 249 | ␉{ 0x94C3,␉0xE400174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
| 250 | ␉{ 0x94C3,␉0xE370174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
| 251 | ␉{ 0x94C3,␉0xE400174B,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 PRO",␉␉␉kNull␉␉},␊ |
| 252 | ␉{ 0x94C3,␉0x203817AF,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400",␉␉␉␉kNull␉␉},␊ |
| 253 | ␉{ 0x94C3,␉0x30001787,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350 Series",␉␉kNull␉␉},␊ |
| 254 | ␉{ 0x94C3,␉0x22471787,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 LE",␉␉␉kNull␉␉},␊ |
| 255 | ␉{ 0x94C3,␉0x01011A93,␉CHIP_FAMILY_RV610,␉␉"Qimonda Radeon HD 2400 PRO",␉␉kNull␉␉},␊ |
| 256 | ␊ |
| 257 | ␊ |
| 258 | ␉{ 0x9501,␉0x30001002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
| 259 | ␉{ 0x9501,␉0x25421002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3870",␉␉␉␉kNull␉␉},␊ |
| 260 | ␉{ 0x9501,␉0x4750174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
| 261 | ␉{ 0x9501,␉0x3000174B,␉CHIP_FAMILY_RV670,␉␉"Sapphire Radeon HD 3690",␉␉␉kNull␉␉},␊ |
| 262 | ␉{ 0x9501,␉0x30001787,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
| 263 | ␊ |
| 264 | ␉{ 0x9505,␉0x30001002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
| 265 | ␉{ 0x9505,␉0x25421002,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3850",␉␉␉␉kNull␉␉},␊ |
| 266 | ␉{ 0x9505,␉0x30011043,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
| 267 | ␉{ 0x9505,␉0x3000148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3850",␉␉␉␉kNull␉␉},␊ |
| 268 | ␉{ 0x9505,␉0x3002148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
| 269 | ␉{ 0x9505,␉0x3001148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
| 270 | ␉{ 0x9505,␉0x3003148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
| 271 | ␉{ 0x9505,␉0x3004148C,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
| 272 | ␉{ 0x9505,␉0x4730174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4730",␉␉␉␉kNull␉␉},␊ |
| 273 | ␉{ 0x9505,␉0x3010174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
| 274 | ␉{ 0x9505,␉0x3001174B,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
| 275 | ␉{ 0x9505,␉0x3000174B,␉CHIP_FAMILY_RV670,␉␉"Sapphire Radeon HD 3690",␉␉␉kNull␉␉},␊ |
| 276 | ␉{ 0x9505,␉0x30001787,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3690",␉␉␉␉kNull␉␉},␊ |
| 277 | ␉{ 0x9505,␉0x301017AF,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 4750",␉␉␉␉kNull␉␉},␊ |
| 278 | ␊ |
| 279 | ␉{ 0x9540,␉0x4590174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4590",␉␉␉␉kNull␉␉},␊ |
| 280 | ␉{ 0x9540,␉0x30501787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4590",␉␉␉␉kNull␉␉},␊ |
| 281 | ␊ |
| 282 | ␉{ 0x954F,␉0x29201682,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4550",␉␉␉␉kNull␉␉},␊ |
| 283 | ␉{ 0x954F,␉0x29211682,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4550",␉␉␉␉kNull␉␉},␊ |
| 284 | ␉{ 0x954F,␉0x30901682,␉CHIP_FAMILY_RV710,␉␉"XFX Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
| 285 | ␉{ 0x954F,␉0x4450174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4450",␉␉␉␉kNull␉␉},␊ |
| 286 | ␉{ 0x954F,␉0x3000174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4520",␉␉␉␉kNull␉␉},␊ |
| 287 | ␉{ 0x954F,␉0x30501787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4450",␉␉␉␉kNull␉␉},␊ |
| 288 | ␉{ 0x954F,␉0x31001787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4520",␉␉␉␉kNull␉␉},␊ |
| 289 | ␉{ 0x954F,␉0x4570174B,␉CHIP_FAMILY_RV710,␉␉"Sapphire Radeon HD4570",␉␉␉kNull␉␉},␊ |
| 290 | ␉{ 0x954F,␉0x301017AF,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4450",␉␉␉␉kNull␉␉},␊ |
| 291 | ␊ |
| 292 | ␉{ 0x9552,␉0x3000148C,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
| 293 | ␉{ 0x9552,␉0x3000174B,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
| 294 | ␉{ 0x9552,␉0x30001787,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
| 295 | ␉{ 0x9552,␉0x300017AF,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
| 296 | ␊ |
| 297 | ␉{ 0x9581,␉0x95811002,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
| 298 | ␉{ 0x9581,␉0x3000148C,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
| 299 | ␊ |
| 300 | ␉{ 0x9583,␉0x3000148C,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
| 301 | ␉{ 0x9588,␉0x01021A93,␉CHIP_FAMILY_RV630,␉␉"Qimonda Radeon HD 2600 XT",␉␉kNull␉␉},␊ |
| 302 | ␊ |
| 303 | ␉{ 0x9589,␉0x30001462,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3610",␉␉␉␉kNull␉␉},␊ |
| 304 | ␉{ 0x9589,␉0x30001642,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3610",␉␉␉␉kNull␉␉},␊ |
| 305 | ␉{ 0x9589,␉0x0E41174B,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
| 306 | ␉{ 0x9589,␉0x30001787,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
| 307 | ␉{ 0x9589,␉0x01001A93,␉CHIP_FAMILY_RV630,␉␉"Qimonda Radeon HD 2600 PRO",␉␉kNull␉␉},␊ |
| 308 | ␊ |
| 309 | ␉{ 0x9591,␉0x2303148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 3600 Series",␉␉kNull␉␉},␊ |
| 310 | ␊ |
| 311 | ␉{ 0x9598,␉0xB3831002,␉CHIP_FAMILY_RV635,␉␉"ATI All-in-Wonder HD",␉␉␉␉kNull␉␉},␊ |
| 312 | ␉{ 0x9598,␉0x30011043,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
| 313 | ␉{ 0x9598,␉0x30001043,␉CHIP_FAMILY_RV635,␉␉"HD3730",␉␉␉␉␉␉␉kNull␉␉},␊ |
| 314 | ␉{ 0x9598,␉0x3000148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 3730",␉␉␉␉kNull␉␉},␊ |
| 315 | ␉{ 0x9598,␉0x3031148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
| 316 | ␉{ 0x9598,␉0x3001148C,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4580",␉␉␉␉kNull␉␉},␊ |
| 317 | ␉{ 0x9598,␉0x30011545,␉CHIP_FAMILY_RV635,␉␉"VisionTek Radeon HD 2600 Pro",␉␉kNull␉␉},␊ |
| 318 | ␉{ 0x9598,␉0x30001545,␉CHIP_FAMILY_RV635,␉␉"VisionTek Radeon HD 2600 XT",␉␉kNull␉␉},␊ |
| 319 | ␉{ 0x9598,␉0x4570174B,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
| 320 | ␉{ 0x9598,␉0x4580174B,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4580",␉␉␉␉kNull␉␉},␊ |
| 321 | ␉{ 0x9598,␉0x4610174B,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4610",␉␉␉␉kNull␉␉},␊ |
| 322 | ␉{ 0x9598,␉0x3000174B,␉CHIP_FAMILY_RV635,␉␉"Sapphire Radeon HD 3730",␉␉␉kNull␉␉},␊ |
| 323 | ␉{ 0x9598,␉0x3001174B,␉CHIP_FAMILY_RV635,␉␉"Sapphire Radeon HD 3750",␉␉␉kNull␉␉},␊ |
| 324 | ␉{ 0x9598,␉0x301017AF,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4570",␉␉␉␉kNull␉␉},␊ |
| 325 | ␉{ 0x9598,␉0x301117AF,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4580",␉␉␉␉kNull␉␉},␊ |
| 326 | ␉{ 0x9598,␉0x300117AF,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD3750",␉␉␉␉kNull␉␉},␊ |
| 327 | ␉{ 0x9598,␉0x30501787,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 4610",␉␉␉␉kNull␉␉},␊ |
| 328 | ␊ |
| 329 | ␉{ 0x95C0,␉0x3000148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3550",␉␉␉␉kNull␉␉},␊ |
| 330 | ␉{ 0x95C0,␉0xE3901745,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3550",␉␉␉␉kNull␉␉},␊ |
| 331 | ␉{ 0x95C0,␉0x3002174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3570",␉␉␉␉kNull␉␉},␊ |
| 332 | ␉{ 0x95C0,␉0x3020174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
| 333 | ␉{ 0x95C0,␉0x3000174B,␉CHIP_FAMILY_RV620,␉␉"Sapphire Radeon HD 3550",␉␉␉kNull␉␉},␊ |
| 334 | ␊ |
| 335 | ␉{ 0x95C5,␉0x3000148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3450",␉␉␉␉kNull␉␉},␊ |
| 336 | ␉{ 0x95C5,␉0x3001148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3550",␉␉␉␉kNull␉␉},␊ |
| 337 | ␉{ 0x95C5,␉0x3002148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4230",␉␉␉␉kNull␉␉},␊ |
| 338 | ␉{ 0x95C5,␉0x3033148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4230",␉␉␉␉kNull␉␉},␊ |
| 339 | ␉{ 0x95C5,␉0x3003148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
| 340 | ␉{ 0x95C5,␉0x3032148C,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
| 341 | ␉{ 0x95C5,␉0x3010174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
| 342 | ␉{ 0x95C5,␉0x4250174B,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
| 343 | ␉{ 0x95C5,␉0x30501787,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
| 344 | ␉{ 0x95C5,␉0x301017AF,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 4230",␉␉␉␉kNull␉␉},␊ |
| 345 | ␉{ 0x95C5,␉0x01051A93,␉CHIP_FAMILY_RV620,␉␉"Qimonda Radeon HD 3450",␉␉␉kNull␉␉},␊ |
| 346 | ␉{ 0x95C5,␉0x01041A93,␉CHIP_FAMILY_RV620,␉␉"Qimonda Radeon HD 3450",␉␉␉kNull␉␉},␊ |
| 347 | ␊ |
| 348 | ␉/* Evergreen */␊ |
| 349 | ␉{ 0x6898,␉0x032E1043,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kUakari␉␉},␊ |
| 350 | ␉{ 0x6898,␉0xE140174B,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kUakari␉␉},␊ |
| 351 | ␉{ 0x6898,␉0x29611682,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kUakari␉␉},␊ |
| 352 | ␉{ 0x6898,␉0x0B001002,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kZonalis␉},␊ |
| 353 | ␉{ 0x6898,␉0x00D0106B,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5870",␉␉␉␉kLangur␉␉},␊ |
| 354 | ␊ |
| 355 | ␉{ 0x6899,␉0x21E41458,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
| 356 | ␉{ 0x6899,␉0x200A1787,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
| 357 | ␉{ 0x6899,␉0x22901787,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
| 358 | ␉{ 0x6899,␉0xE140174B,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5850",␉␉␉␉kUakari␉␉},␊ |
| 359 | ␊ |
| 360 | ␉{ 0x689C,␉0x03521043,␉CHIP_FAMILY_HEMLOCK,␉"ASUS ARES",␉␉␉␉␉␉kUakari␉␉},␊ |
| 361 | ␉{ 0x689C,␉0x039E1043,␉CHIP_FAMILY_HEMLOCK,␉"ASUS EAH5870 Series",␉␉␉␉kUakari␉␉},␊ |
| 362 | ␉{ 0x689C,␉0x30201682,␉CHIP_FAMILY_HEMLOCK,␉"ATI Radeon HD 5970",␉␉␉␉kUakari␉␉},␊ |
| 363 | ␊ |
| 364 | ␉{ 0x68B8,␉0xE147174B,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
| 365 | ␉{ 0x68B8,␉0x21D71458,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
| 366 | ␉{ 0x68B8,␉0x1482174B,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
| 367 | ␉{ 0x68B8,␉0x29901682,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
| 368 | ␉{ 0x68B8,␉0x29911682,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
| 369 | ␉{ 0x68B8,␉0x200B1787,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
| 370 | ␉{ 0x68B8,␉0x22881787,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kVervet␉␉},␊ |
| 371 | ␉{ 0x68B8,␉0x00CF106B,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5770",␉␉␉␉kHoolock␉},␊ |
| 372 | ␊ |
| 373 | ␉{ 0x68D8,␉0x301117AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5690",␉␉␉␉kNull␉␉},␊ |
| 374 | ␉{ 0x68D8,␉0x301017AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5730",␉␉␉␉kNull␉␉},␊ |
| 375 | ␉{ 0x68D8,␉0x30001787,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5730",␉␉␉␉kNull␉␉},␊ |
| 376 | ␉{ 0x68D8,␉0x5690174B,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5690",␉␉␉␉kNull␉␉},␊ |
| 377 | ␉{ 0x68D8,␉0x5730174B,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5730",␉␉␉␉kNull␉␉},␊ |
| 378 | ␉{ 0x68D8,␉0x21D91458,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5670",␉␉␉␉kBaboon␉␉},␊ |
| 379 | ␉{ 0x68D8,␉0x03561043,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5670",␉␉␉␉kBaboon␉␉},␊ |
| 380 | ␉{ 0x68D8,␉0xE151174B,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5670",␉␉␉␉kBaboon␉␉},␊ |
| 381 | ␉{ 0x68D9,␉0x301017AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
| 382 | ␉{ 0x68DA,␉0x301017AF,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
| 383 | ␉{ 0x68DA,␉0x30001787,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
| 384 | ␉{ 0x68DA,␉0x5630174B,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5630",␉␉␉␉kNull␉␉},␊ |
| 385 | ␊ |
| 386 | ␉{ 0x68F9,␉0x301317AF,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
| 387 | ␉{ 0x68F9,␉0x301117AF,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
| 388 | ␉{ 0x68F9,␉0x301217AF,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5490",␉␉␉␉kNull␉␉},␊ |
| 389 | ␉{ 0x68F9,␉0x30001787,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
| 390 | ␉{ 0x68F9,␉0x30021787,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5490",␉␉␉␉kNull␉␉},␊ |
| 391 | ␉{ 0x68F9,␉0x30011787,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5530",␉␉␉␉kNull␉␉},␊ |
| 392 | ␉{ 0x68F9,␉0x5470174B,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5470",␉␉␉␉kNull␉␉},␊ |
| 393 | ␉{ 0x68F9,␉0x5490174B,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5490",␉␉␉␉kNull␉␉},␊ |
| 394 | ␉{ 0x68F9,␉0x5530174B,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5530",␉␉␉␉kNull␉␉},␊ |
| 395 | ␊ |
| 396 | ␉/* standard/default models */␊ |
| 397 | ␉{ 0x9400,␉0x00000000,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 XT",␉␉␉kNull␉␉},␊ |
| 398 | ␉{ 0x9405,␉0x00000000,␉CHIP_FAMILY_R600,␉␉"ATI Radeon HD 2900 GT",␉␉␉kNull␉␉},␊ |
| 399 | ␉{ 0x9440,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
| 400 | ␉{ 0x9441,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4870 X2",␉␉␉kMotmot␉␉},␊ |
| 401 | ␉{ 0x9442,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
| 402 | ␉{ 0x9443,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4850 X2",␉␉␉kMotmot␉␉},␊ |
| 403 | ␉{ 0x944C,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
| 404 | ␉{ 0x944E,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4700 Series",␉␉kMotmot␉␉},␊ |
| 405 | ␉{ 0x944E,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4700 Series",␉␉kMotmot␉␉},␊ |
| 406 | ␉{ 0x9450,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"AMD FireStream 9270",␉␉␉␉kMotmot␉␉},␊ |
| 407 | ␉{ 0x9452,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"AMD FireStream 9250",␉␉␉␉kMotmot␉␉},␊ |
| 408 | ␉{ 0x9460,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
| 409 | ␉{ 0x9462,␉0x00000000,␉CHIP_FAMILY_RV770,␉␉"ATI Radeon HD 4800 Series",␉␉kMotmot␉␉},␊ |
| 410 | ␉{ 0x9490,␉0x00000000,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4600 Series",␉␉kFlicker␉},␊ |
| 411 | ␉{ 0x9498,␉0x00000000,␉CHIP_FAMILY_RV730,␉␉"ATI Radeon HD 4600 Series",␉␉kFlicker␉},␊ |
| 412 | ␉{ 0x94B3,␉0x00000000,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
| 413 | ␉{ 0x94B4,␉0x00000000,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4700 Series",␉␉kFlicker␉},␊ |
| 414 | ␉{ 0x94B5,␉0x00000000,␉CHIP_FAMILY_RV740,␉␉"ATI Radeon HD 4770",␉␉␉␉kFlicker␉},␊ |
| 415 | ␉{ 0x94C1,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Series",␉␉kIago␉␉},␊ |
| 416 | ␉{ 0x94C3,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Series",␉␉kIago␉␉},␊ |
| 417 | ␉{ 0x94C7,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2350",␉␉␉␉kIago␉␉},␊ |
| 418 | ␉{ 0x94CC,␉0x00000000,␉CHIP_FAMILY_RV610,␉␉"ATI Radeon HD 2400 Series",␉␉kIago␉␉},␊ |
| 419 | ␊ |
| 420 | ␉{ 0x9501,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3800 Series",␉␉kMegalodon␉},␊ |
| 421 | ␉{ 0x9505,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3800 Series",␉␉kMegalodon␉},␊ |
| 422 | ␉{ 0x9507,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3830",␉␉␉␉kMegalodon␉},␊ |
| 423 | ␉{ 0x950F,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3870 X2",␉␉␉kMegalodon␉},␊ |
| 424 | ␉{ 0x9513,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"ATI Radeon HD 3850 X2",␉␉␉kMegalodon␉},␊ |
| 425 | ␉{ 0x9519,␉0x00000000,␉CHIP_FAMILY_RV670,␉␉"AMD FireStream 9170",␉␉␉␉kMegalodon␉},␊ |
| 426 | ␉{ 0x9540,␉0x00000000,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4550",␉␉␉␉kNull␉␉},␊ |
| 427 | ␉{ 0x954F,␉0x00000000,␉CHIP_FAMILY_RV710,␉␉"ATI Radeon HD 4300/4500 Series",␉kNull␉␉},␊ |
| 428 | ␉{ 0x9588,␉0x00000000,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 2600 XT",␉␉␉kLamna␉␉},␊ |
| 429 | ␉{ 0x9589,␉0x00000000,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 2600 PRO",␉␉␉kLamna␉␉},␊ |
| 430 | ␉{ 0x958A,␉0x00000000,␉CHIP_FAMILY_RV630,␉␉"ATI Radeon HD 2600 X2 Series",␉␉kLamna␉␉},␊ |
| 431 | ␉{ 0x9598,␉0x00000000,␉CHIP_FAMILY_RV635,␉␉"ATI Radeon HD 3600 Series",␉␉kMegalodon␉},␊ |
| 432 | ␉{ 0x95C0,␉0x00000000,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3400 Series",␉␉kIago␉␉},␊ |
| 433 | ␉{ 0x95C5,␉0x00000000,␉CHIP_FAMILY_RV620,␉␉"ATI Radeon HD 3400 Series",␉␉kIago␉␉},␊ |
| 434 | ␊ |
| 435 | ␉{ 0x9610,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"ATI Radeon HD 3200 Graphics",␉␉kNull␉␉},␊ |
| 436 | ␉{ 0x9611,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"ATI Radeon 3100 Graphics",␉␉␉kNull␉␉},␊ |
| 437 | ␉{ 0x9614,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"ATI Radeon HD 3300 Graphics",␉␉kNull␉␉},␊ |
| 438 | ␉{ 0x9616,␉0x00000000,␉CHIP_FAMILY_RS780,␉␉"AMD 760G",␉␉␉␉␉␉␉kNull␉␉},␊ |
| 439 | ␊ |
| 440 | ␉{ 0x9710,␉0x00000000,␉CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4200",␉␉␉␉kNull␉␉},␊ |
| 441 | ␉{ 0x9715,␉0x00000000,␉CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4250",␉␉␉␉kNull␉␉},␊ |
| 442 | ␉{ 0x9714,␉0x00000000,␉CHIP_FAMILY_RS880,␉␉"ATI Radeon HD 4290",␉␉␉␉kNull␉␉},␊ |
| 443 | ␊ |
| 444 | ␊ |
| 445 | ␉{ 0x688D,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"AMD FireStream 9350",␉␉␉␉kUakari␉␉},␊ |
| 446 | ␊ |
| 447 | ␉{ 0x6898,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5800 Series",␉␉kUakari␉␉},␊ |
| 448 | ␉{ 0x6899,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5800 Series",␉␉kUakari␉␉},␊ |
| 449 | ␉{ 0x689E,␉0x00000000,␉CHIP_FAMILY_CYPRESS,␉"ATI Radeon HD 5800 Series",␉␉kUakari␉␉},␊ |
| 450 | ␉{ 0x689C,␉0x00000000,␉CHIP_FAMILY_HEMLOCK,␉"ATI Radeon HD 5900 Series",␉␉kUakari␉␉},␊ |
| 451 | ␊ |
| 452 | ␉{ 0x68B9,␉0x00000000,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5600 Series",␉␉kVervet␉␉},␊ |
| 453 | ␉{ 0x68B8,␉0x00000000,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5700 Series",␉␉kVervet␉␉},␊ |
| 454 | ␉{ 0x68BE,␉0x00000000,␉CHIP_FAMILY_JUNIPER,␉"ATI Radeon HD 5700 Series",␉␉kVervet␉␉},␊ |
| 455 | ␊ |
| 456 | ␉{ 0x68D8,␉0x00000000,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5600 Series",␉␉kBaboon␉␉},␊ |
| 457 | ␉{ 0x68D9,␉0x00000000,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5500 Series",␉␉kBaboon␉␉},␊ |
| 458 | ␉{ 0x68DA,␉0x00000000,␉CHIP_FAMILY_REDWOOD,␉"ATI Radeon HD 5500 Series",␉␉kBaboon␉␉},␊ |
| 459 | ␊ |
| 460 | ␉{ 0x68F9,␉0x00000000,␉CHIP_FAMILY_CEDAR,␉␉"ATI Radeon HD 5400 Series",␉␉kNull␉␉},␊ |
| 461 | ␊ |
| 462 | ␉{ 0x0000,␉0x00000000,␉CHIP_FAMILY_UNKNOW,␉␉NULL,␉␉␉␉␉␉␉␉kNull␉␉}␊ |
| 463 | };␊ |
| 464 | ␊ |
| 465 | ␊ |
| 466 | typedef struct {␊ |
| 467 | ␉struct DevPropDevice␉*device;␊ |
| 468 | ␉radeon_card_info_t␉␉*info;␊ |
| 469 | ␉pci_dt_t ␉␉␉␉*pci_dev;␊ |
| 470 | ␉uint8_t␉␉␉␉␉*fb;␊ |
| 471 | ␉uint8_t␉␉␉␉␉*mmio;␊ |
| 472 | ␉uint8_t␉␉␉␉␉*io;␊ |
| 473 | ␉uint8_t␉␉␉␉␉*rom;␊ |
| 474 | ␉uint32_t␉␉␉␉rom_size;␊ |
| 475 | ␉uint32_t␉␉␉␉vram_size;␊ |
| 476 | ␉uint8_t␉␉␉␉␉ports;␊ |
| 477 | ␉uint32_t␉␉␉␉flags;␊ |
| 478 | ␉bool␉␉␉␉␉posted;␊ |
| 479 | } card_t;␊ |
| 480 | card_t *card;␊ |
| 481 | ␊ |
| 482 | /* Flags */␊ |
| 483 | #define MKFLAG(n)␉␉(1 << n)␊ |
| 484 | #define FLAGTRUE␉␉MKFLAG(0)␊ |
| 485 | #define EVERGREEN␉␉MKFLAG(1)␊ |
| 486 | ␊ |
| 487 | static uint8_t atN = 0;␊ |
| 488 | ␊ |
| 489 | typedef struct {␊ |
| 490 | ␉type_t␉␉type;␊ |
| 491 | ␉uint32_t␉size;␊ |
| 492 | ␉uint8_t␉␉*data;␊ |
| 493 | } value_t;␊ |
| 494 | ␊ |
| 495 | static value_t aty_name;␊ |
| 496 | static value_t aty_nameparent;␊ |
| 497 | //static value_t aty_model;␊ |
| 498 | ␊ |
| 499 | #define DATVAL(x)␉␉{kPtr, sizeof(x), (uint8_t *)x}␊ |
| 500 | #define STRVAL(x)␉␉{kStr, sizeof(x), (uint8_t *)x}␊ |
| 501 | #define BYTVAL(x)␉␉{kCst, 1, (uint8_t *)x}␊ |
| 502 | #define WRDVAL(x)␉␉{kCst, 2, (uint8_t *)x}␊ |
| 503 | #define DWRVAL(x)␉␉{kCst, 4, (uint8_t *)x}␊ |
| 504 | #define QWRVAL(x)␉␉{kCst, 8, (uint8_t *)x}␊ |
| 505 | #define NULVAL␉␉␉{kNul, 0, (uint8_t *)NULL}␊ |
| 506 | ␊ |
| 507 | bool get_bootdisplay_val(value_t *val);␊ |
| 508 | bool get_vrammemory_val(value_t *val);␊ |
| 509 | bool get_name_val(value_t *val);␊ |
| 510 | bool get_nameparent_val(value_t *val);␊ |
| 511 | bool get_model_val(value_t *val);␊ |
| 512 | bool get_conntype_val(value_t *val);␊ |
| 513 | bool get_vrammemsize_val(value_t *val);␊ |
| 514 | bool get_binimage_val(value_t *val);␊ |
| 515 | bool get_romrevision_val(value_t *val);␊ |
| 516 | bool get_deviceid_val(value_t *val);␊ |
| 517 | bool get_mclk_val(value_t *val);␊ |
| 518 | bool get_sclk_val(value_t *val);␊ |
| 519 | bool get_refclk_val(value_t *val);␊ |
| 520 | bool get_platforminfo_val(value_t *val);␊ |
| 521 | bool get_vramtotalsize_val(value_t *val);␊ |
| 522 | ␊ |
| 523 | typedef struct {␊ |
| 524 | ␉uint32_t␉flags;␊ |
| 525 | ␉bool␉␉all_ports;␊ |
| 526 | ␉char␉␉*name;␊ |
| 527 | ␉bool␉␉(*get_value)(value_t *val);␊ |
| 528 | ␉value_t␉␉default_val;␊ |
| 529 | } dev_prop_t;␊ |
| 530 | ␊ |
| 531 | dev_prop_t ati_devprop_list[] = {␊ |
| 532 | ␉{FLAGTRUE,␉false,␉"@0,AAPL,boot-display",␉␉get_bootdisplay_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
| 533 | //␉{FLAGTRUE,␉false,␉"@0,ATY,EFIDisplay",␉␉NULL,␉␉␉␉␉STRVAL("TMDSA")␉␉␉␉␉},␊ |
| 534 | ␊ |
| 535 | //␉{FLAGTRUE,␉true,␉"@0,AAPL,vram-memory",␉␉get_vrammemory_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
| 536 | //␉{FLAGTRUE,␉true,␉"@0,compatible",␉␉␉get_name_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
| 537 | //␉{FLAGTRUE,␉true,␉"@0,connector-type",␉␉get_conntype_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
| 538 | //␉{FLAGTRUE,␉true,␉"@0,device_type",␉␉␉NULL,␉␉␉␉␉STRVAL("display")␉␉␉␉},␊ |
| 539 | //␉{FLAGTRUE,␉false,␉"@0,display-connect-flags",␉NULL,␉␉␉␉␉DWRVAL((uint32_t)0)␉␉␉␉},␊ |
| 540 | //␉{FLAGTRUE,␉true,␉"@0,display-type",␉␉␉NULL,␉␉␉␉␉STRVAL("NONE")␉␉␉␉␉},␊ |
| 541 | ␉{FLAGTRUE,␉true,␉"@0,name",␉␉␉␉␉get_name_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
| 542 | //␉{FLAGTRUE,␉true,␉"@0,VRAM,memsize",␉␉␉get_vrammemsize_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
| 543 | ␊ |
| 544 | //␉{FLAGTRUE,␉false,␉"AAPL,aux-power-connected",␉NULL,␉␉␉␉␉DWRVAL((uint32_t)1)␉␉␉␉},␊ |
| 545 | //␉{FLAGTRUE,␉false,␉"AAPL,backlight-control",␉NULL,␉␉␉␉␉DWRVAL((uint32_t)0)␉␉␉␉},␊ |
| 546 | ␉{FLAGTRUE,␉false,␉"ATY,bin_image",␉␉␉get_binimage_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
| 547 | ␉{FLAGTRUE,␉false,␉"ATY,Copyright",␉␉␉NULL,␉STRVAL("Copyright AMD Inc. All Rights Reserved. 2005-2010")␉},␊ |
| 548 | ␉{FLAGTRUE,␉false,␉"ATY,Card#",␉␉␉␉get_romrevision_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
| 549 | ␉{FLAGTRUE,␉false,␉"ATY,VendorID",␉␉␉␉NULL,␉␉␉␉␉WRDVAL((uint16_t)0x1002)␉␉},␊ |
| 550 | ␉{FLAGTRUE,␉false,␉"ATY,DeviceID",␉␉␉␉get_deviceid_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
| 551 | ␊ |
| 552 | //␉{FLAGTRUE,␉false,␉"ATY,MCLK",␉␉␉␉␉get_mclk_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
| 553 | //␉{FLAGTRUE,␉false,␉"ATY,SCLK",␉␉␉␉␉get_sclk_val,␉␉␉NULVAL␉␉␉␉␉␉␉},␊ |
| 554 | //␉{FLAGTRUE,␉false,␉"ATY,RefCLK",␉␉␉␉get_refclk_val,␉␉␉DWRVAL((uint32_t)0x0a8c)␉␉},␊ |
| 555 | ␊ |
| 556 | //␉{FLAGTRUE,␉false,␉"ATY,PlatformInfo",␉␉␉get_platforminfo_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
| 557 | ␊ |
| 558 | ␉{FLAGTRUE,␉false,␉"name",␉␉␉␉␉␉get_nameparent_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
| 559 | ␉{FLAGTRUE,␉false,␉"device_type",␉␉␉␉get_nameparent_val,␉␉NULVAL␉␉␉␉␉␉␉},␊ |
| 560 | ␉{FLAGTRUE,␉false,␉"model",␉␉␉␉␉get_model_val,␉␉␉STRVAL("ATI Radeon")␉␉␉},␊ |
| 561 | //␉{FLAGTRUE,␉false,␉"VRAM,totalsize",␉␉␉get_vramtotalsize_val,␉NULVAL␉␉␉␉␉␉␉},␊ |
| 562 | ␊ |
| 563 | ␉{FLAGTRUE,␉false,␉NULL,␉␉␉␉␉␉NULL,␉␉␉␉␉NULVAL␉␉␉␉␉␉␉}␊ |
| 564 | };␊ |
| 565 | ␊ |
| 566 | bool get_bootdisplay_val(value_t *val)␊ |
| 567 | {␊ |
| 568 | ␉static uint32_t v = 0;␊ |
| 569 | ␊ |
| 570 | ␉if (v)␊ |
| 571 | ␉␉return false;␊ |
| 572 | ␊ |
| 573 | ␉if (!card->posted)␊ |
| 574 | ␉␉return false;␊ |
| 575 | ␊ |
| 576 | ␉v = 1;␊ |
| 577 | ␉val->type = kCst;␊ |
| 578 | ␉val->size = 4;␊ |
| 579 | ␉val->data = (uint8_t *)&v;␊ |
| 580 | ␊ |
| 581 | ␉return true;␊ |
| 582 | }␊ |
| 583 | ␊ |
| 584 | bool get_vrammemory_val(value_t *val)␊ |
| 585 | {␊ |
| 586 | ␉return false;␊ |
| 587 | }␊ |
| 588 | ␊ |
| 589 | bool get_name_val(value_t *val)␊ |
| 590 | {␊ |
| 591 | ␉val->type = aty_name.type;␊ |
| 592 | ␉val->size = aty_name.size;␊ |
| 593 | ␉val->data = aty_name.data;␊ |
| 594 | ␊ |
| 595 | ␉return true;␊ |
| 596 | }␊ |
| 597 | ␊ |
| 598 | bool get_nameparent_val(value_t *val)␊ |
| 599 | {␊ |
| 600 | ␉val->type = aty_nameparent.type;␊ |
| 601 | ␉val->size = aty_nameparent.size;␊ |
| 602 | ␉val->data = aty_nameparent.data;␊ |
| 603 | ␊ |
| 604 | ␉return true;␊ |
| 605 | }␊ |
| 606 | ␊ |
| 607 | bool get_model_val(value_t *val)␊ |
| 608 | {␊ |
| 609 | ␉if (!card->info->model_name)␊ |
| 610 | ␉␉return false;␊ |
| 611 | ␊ |
| 612 | ␉val->type = kStr;␊ |
| 613 | ␉val->size = strlen(card->info->model_name) + 1;␊ |
| 614 | ␉val->data = (uint8_t *)card->info->model_name;␊ |
| 615 | ␊ |
| 616 | ␉return true;␊ |
| 617 | }␊ |
| 618 | ␊ |
| 619 | bool get_conntype_val(value_t *val)␊ |
| 620 | {␊ |
| 621 | /*␊ |
| 622 | Connector types:␊ |
| 623 | 0x4 : DisplayPort␊ |
| 624 | 0x400: DL DVI-I␊ |
| 625 | 0x800: HDMI␊ |
| 626 | */␊ |
| 627 | ␉return false;␊ |
| 628 | }␊ |
| 629 | ␊ |
| 630 | bool get_vrammemsize_val(value_t *val)␊ |
| 631 | {␊ |
| 632 | ␉static int idx = -1;␊ |
| 633 | ␉static uint64_t memsize;␊ |
| 634 | ␊ |
| 635 | ␉idx++;␊ |
| 636 | ␉memsize = ((uint64_t)card->vram_size << 32);␊ |
| 637 | ␉if (idx == 0)␊ |
| 638 | ␉␉memsize = memsize | (uint64_t)card->vram_size;␊ |
| 639 | ␊ |
| 640 | ␉val->type = kCst;␊ |
| 641 | ␉val->size = 8;␊ |
| 642 | ␉val->data = (uint8_t *)&memsize;␊ |
| 643 | ␊ |
| 644 | ␉return true;␊ |
| 645 | }␊ |
| 646 | ␊ |
| 647 | bool get_binimage_val(value_t *val)␊ |
| 648 | {␊ |
| 649 | ␉if (!card->rom)␊ |
| 650 | ␉␉return false;␊ |
| 651 | ␊ |
| 652 | ␉val->type = kPtr;␊ |
| 653 | ␉val->size = card->rom_size;␊ |
| 654 | ␉val->data = card->rom;␊ |
| 655 | ␊ |
| 656 | ␉return true;␊ |
| 657 | }␊ |
| 658 | ␊ |
| 659 | bool get_romrevision_val(value_t *val)␊ |
| 660 | {␊ |
| 661 | ␉uint8_t *rev;␊ |
| 662 | ␉if (!card->rom)␊ |
| 663 | ␉␉return false;␊ |
| 664 | ␊ |
| 665 | ␉rev = card->rom + *(uint8_t *)(card->rom + OFFSET_TO_GET_ATOMBIOS_STRINGS_START);␊ |
| 666 | ␊ |
| 667 | ␉val->type = kPtr;␊ |
| 668 | ␉val->size = strlen((char *)rev);␊ |
| 669 | ␉val->data = malloc(val->size);␊ |
| 670 | ␊ |
| 671 | ␉if (!val->data)␊ |
| 672 | ␉␉return false;␊ |
| 673 | ␉␊ |
| 674 | ␉memcpy(val->data, rev, val->size);␊ |
| 675 | ␊ |
| 676 | ␉return true;␊ |
| 677 | }␊ |
| 678 | ␊ |
| 679 | bool get_deviceid_val(value_t *val)␊ |
| 680 | {␊ |
| 681 | ␉val->type = kCst;␊ |
| 682 | ␉val->size = 2;␊ |
| 683 | ␉val->data = (uint8_t *)&card->pci_dev->device_id;␊ |
| 684 | ␊ |
| 685 | ␉return true;␊ |
| 686 | }␊ |
| 687 | ␊ |
| 688 | bool get_mclk_val(value_t *val)␊ |
| 689 | {␊ |
| 690 | ␉return false;␊ |
| 691 | }␊ |
| 692 | ␊ |
| 693 | bool get_sclk_val(value_t *val)␊ |
| 694 | {␊ |
| 695 | ␉return false;␊ |
| 696 | }␊ |
| 697 | ␊ |
| 698 | bool get_refclk_val(value_t *val)␊ |
| 699 | {␊ |
| 700 | ␉return false;␊ |
| 701 | }␊ |
| 702 | ␊ |
| 703 | bool get_platforminfo_val(value_t *val)␊ |
| 704 | {␊ |
| 705 | ␉val->data = malloc(0x80);␊ |
| 706 | ␉if (!val->data)␊ |
| 707 | ␉␉return false;␊ |
| 708 | ␊ |
| 709 | ␉bzero(val->data, 0x80);␊ |
| 710 | ␊ |
| 711 | ␉val->type␉␉= kPtr;␊ |
| 712 | ␉val->size␉␉= 0x80;␊ |
| 713 | ␉val->data[0]␉= 1;␊ |
| 714 | ␊ |
| 715 | ␉return true;␊ |
| 716 | }␊ |
| 717 | ␊ |
| 718 | bool get_vramtotalsize_val(value_t *val)␊ |
| 719 | {␊ |
| 720 | ␉val->type = kCst;␊ |
| 721 | ␉val->size = 4;␊ |
| 722 | ␉val->data = (uint8_t *)&card->vram_size;␊ |
| 723 | ␊ |
| 724 | ␉return true;␊ |
| 725 | }␊ |
| 726 | ␊ |
| 727 | void free_val(value_t *val)␊ |
| 728 | {␊ |
| 729 | ␉if (val->type == kPtr)␊ |
| 730 | ␉␉free(val->data);␊ |
| 731 | ␉bzero(val, sizeof(value_t));␊ |
| 732 | }␊ |
| 733 | ␊ |
| 734 | void devprop_add_list(dev_prop_t devprop_list[])␊ |
| 735 | {␊ |
| 736 | ␉value_t *val = malloc(sizeof(value_t));␊ |
| 737 | ␉int i, pnum;␊ |
| 738 | ␉for (i = 0; devprop_list[i].name != NULL; i++)␊ |
| 739 | ␉␉if ((devprop_list[i].flags == FLAGTRUE) || (devprop_list[i].flags | card->flags))␊ |
| 740 | ␉␉␉if (devprop_list[i].get_value && devprop_list[i].get_value(val))␊ |
| 741 | ␉␉␉{␊ |
| 742 | ␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);␊ |
| 743 | ␉␉␉␉free_val(val);␊ |
| 744 | ␉␉␉␉if (devprop_list[i].all_ports)␊ |
| 745 | ␉␉␉␉{␊ |
| 746 | ␉␉␉␉␉for (pnum = 1; pnum < card->ports; pnum++)␊ |
| 747 | ␉␉␉␉␉{␊ |
| 748 | ␉␉␉␉␉␉if (devprop_list[i].get_value(val))␊ |
| 749 | ␉␉␉␉␉␉{␊ |
| 750 | ␉␉␉␉␉␉␉devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii␊ |
| 751 | ␉␉␉␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, val->data, val->size);␊ |
| 752 | ␉␉␉␉␉␉␉free_val(val);␊ |
| 753 | ␉␉␉␉␉␉}␊ |
| 754 | ␉␉␉␉␉}␊ |
| 755 | ␉␉␉␉␉devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card␊ |
| 756 | ␉␉␉␉}␊ |
| 757 | ␉␉␉}␊ |
| 758 | ␉␉␉else␊ |
| 759 | ␉␉␉{␊ |
| 760 | ␉␉␉␉if (devprop_list[i].default_val.type != kNul)␊ |
| 761 | ␉␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, ␊ |
| 762 | ␉␉␉␉␉␉devprop_list[i].default_val.type == kCst ? ␊ |
| 763 | ␉␉␉␉␉␉(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data, ␊ |
| 764 | ␉␉␉␉␉␉devprop_list[i].default_val.size);␊ |
| 765 | ␊ |
| 766 | ␉␉␉␉if (devprop_list[i].all_ports)␊ |
| 767 | ␉␉␉␉{␊ |
| 768 | ␉␉␉␉␉for (pnum = 1; pnum < card->ports; pnum++)␊ |
| 769 | ␉␉␉␉␉{␊ |
| 770 | ␉␉␉␉␉␉if (devprop_list[i].default_val.type != kNul)␊ |
| 771 | ␉␉␉␉␉␉{␊ |
| 772 | ␉␉␉␉␉␉␉devprop_list[i].name[1] = 0x30 + pnum; // convert to ascii␊ |
| 773 | ␉␉␉␉␉␉␉devprop_add_value(card->device, devprop_list[i].name, ␊ |
| 774 | ␉␉␉␉␉␉␉␉devprop_list[i].default_val.type == kCst ? ␊ |
| 775 | ␉␉␉␉␉␉␉␉(uint8_t *)&(devprop_list[i].default_val.data) : devprop_list[i].default_val.data, ␊ |
| 776 | ␉␉␉␉␉␉␉␉devprop_list[i].default_val.size);␊ |
| 777 | ␉␉␉␉␉␉}␊ |
| 778 | ␉␉␉␉␉}␊ |
| 779 | ␉␉␉␉␉devprop_list[i].name[1] = 0x30; // write back our "@0," for a next possible card␊ |
| 780 | ␉␉␉␉}␊ |
| 781 | ␉␉␉}␊ |
| 782 | ␊ |
| 783 | ␉free(val);␊ |
| 784 | }␊ |
| 785 | ␊ |
| 786 | ␊ |
| 787 | bool validate_rom(option_rom_header_t *rom_header, pci_dt_t *pci_dev)␊ |
| 788 | {␊ |
| 789 | ␉option_rom_pci_header_t *rom_pci_header;␊ |
| 790 | ␉␊ |
| 791 | ␉if (rom_header->signature != 0xaa55)␊ |
| 792 | ␉␉return false;␊ |
| 793 | ␊ |
| 794 | ␉rom_pci_header = (option_rom_pci_header_t *)((uint8_t *)rom_header + rom_header->pci_header_offset);␊ |
| 795 | ␊ |
| 796 | ␉if (rom_pci_header->signature != 0x52494350)␊ |
| 797 | ␉␉return false;␊ |
| 798 | ␊ |
| 799 | ␉if (rom_pci_header->vendor_id != pci_dev->vendor_id || rom_pci_header->device_id != pci_dev->device_id)␊ |
| 800 | ␉␉return false;␊ |
| 801 | ␊ |
| 802 | ␉return true;␊ |
| 803 | }␊ |
| 804 | ␊ |
| 805 | bool load_vbios_file(const char *key, uint16_t vendor_id, uint16_t device_id, uint32_t subsys_id)␊ |
| 806 | {␊ |
| 807 | ␉int␉fd;␊ |
| 808 | ␉char file_name[24];␊ |
| 809 | ␉bool do_load = false;␊ |
| 810 | ␊ |
| 811 | ␉getBoolForKey(key, &do_load, &bootInfo->bootConfig);␊ |
| 812 | ␉if (!do_load)␊ |
| 813 | ␉␉return false;␊ |
| 814 | ␊ |
| 815 | ␉sprintf(file_name, "/Extra/%04x_%04x_%08x.rom", vendor_id, device_id, subsys_id);␊ |
| 816 | ␉if ((fd = open_bvdev("bt(0,0)", file_name, 0)) < 0)␊ |
| 817 | ␉␉return false;␊ |
| 818 | ␊ |
| 819 | ␉card->rom_size = file_size(fd);␊ |
| 820 | ␉card->rom = malloc(card->rom_size);␊ |
| 821 | ␉if (!card->rom)␊ |
| 822 | ␉␉return false;␊ |
| 823 | ␊ |
| 824 | ␉read(fd, (char *)card->rom, card->rom_size);␊ |
| 825 | ␉␊ |
| 826 | ␉if (!validate_rom((option_rom_header_t *)card->rom, card->pci_dev))␊ |
| 827 | ␉{␊ |
| 828 | ␉␉card->rom_size = 0;␊ |
| 829 | ␉␉card->rom = 0;␊ |
| 830 | ␉␉return false;␊ |
| 831 | ␉}␊ |
| 832 | ␊ |
| 833 | ␉card->rom_size = ((option_rom_header_t *)card->rom)->rom_size * 512;␊ |
| 834 | ␊ |
| 835 | ␉close(fd);␊ |
| 836 | ␊ |
| 837 | ␉return true;␊ |
| 838 | }␊ |
| 839 | ␊ |
| 840 | void get_vram_size(void)␊ |
| 841 | {␊ |
| 842 | ␉chip_family_t chip_family = card->info->chip_family;␊ |
| 843 | ␊ |
| 844 | ␉card->vram_size = 0;␊ |
| 845 | ␊ |
| 846 | ␉if (chip_family >= CHIP_FAMILY_CEDAR)␊ |
| 847 | ␉␉/* size in MB on evergreen */␊ |
| 848 | ␉␉/* XXX watch for overflow!!! */␊ |
| 849 | ␉␉card->vram_size = RegRead32(R600_CONFIG_MEMSIZE) * 1024 * 1024;␊ |
| 850 | ␉else␊ |
| 851 | ␉␉if (chip_family >= CHIP_FAMILY_R600)␊ |
| 852 | ␉␉␉card->vram_size = RegRead32(R600_CONFIG_MEMSIZE);␊ |
| 853 | }␊ |
| 854 | ␊ |
| 855 | bool read_vbios(bool from_pci)␊ |
| 856 | {␊ |
| 857 | ␉option_rom_header_t *rom_addr;␊ |
| 858 | ␊ |
| 859 | ␉if (from_pci)␊ |
| 860 | ␉{␊ |
| 861 | ␉␉rom_addr = (option_rom_header_t *)(pci_config_read32(card->pci_dev->dev.addr, PCI_ROM_ADDRESS) & ~0x7ff);␊ |
| 862 | ␉␉verbose(" @0x%x", rom_addr);␊ |
| 863 | ␉}␊ |
| 864 | ␉else␊ |
| 865 | ␉␉rom_addr = (option_rom_header_t *)0xc0000;␊ |
| 866 | ␊ |
| 867 | ␉if (!validate_rom(rom_addr, card->pci_dev))␊ |
| 868 | ␉␉return false;␊ |
| 869 | ␊ |
| 870 | ␉card->rom_size = rom_addr->rom_size * 512;␊ |
| 871 | ␉if (!card->rom_size)␊ |
| 872 | ␉␉return false;␊ |
| 873 | ␊ |
| 874 | ␉card->rom = malloc(card->rom_size);␊ |
| 875 | ␉if (!card->rom)␊ |
| 876 | ␉␉return false;␊ |
| 877 | ␊ |
| 878 | ␉memcpy(card->rom, (void *)rom_addr, card->rom_size);␊ |
| 879 | ␊ |
| 880 | ␉return true;␊ |
| 881 | }␊ |
| 882 | ␊ |
| 883 | bool read_disabled_vbios(void)␊ |
| 884 | {␊ |
| 885 | ␉bool ret = false;␊ |
| 886 | ␉chip_family_t chip_family = card->info->chip_family;␊ |
| 887 | ␊ |
| 888 | ␉if (chip_family >= CHIP_FAMILY_RV770)␊ |
| 889 | ␉{␊ |
| 890 | ␉␉uint32_t viph_control␉␉= RegRead32(RADEON_VIPH_CONTROL);␊ |
| 891 | ␉␉uint32_t bus_cntl␉␉␉= RegRead32(RADEON_BUS_CNTL);␊ |
| 892 | ␉␉uint32_t d1vga_control␉␉= RegRead32(AVIVO_D1VGA_CONTROL);␊ |
| 893 | ␉␉uint32_t d2vga_control␉␉= RegRead32(AVIVO_D2VGA_CONTROL);␊ |
| 894 | ␉␉uint32_t vga_render_control␉= RegRead32(AVIVO_VGA_RENDER_CONTROL);␊ |
| 895 | ␉␉uint32_t rom_cntl␉␉␉= RegRead32(R600_ROM_CNTL);␊ |
| 896 | ␉␉uint32_t cg_spll_func_cntl␉= 0;␊ |
| 897 | ␉␉uint32_t cg_spll_status;␊ |
| 898 | ␊ |
| 899 | ␉␉/* disable VIP */␊ |
| 900 | ␉␉RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));␊ |
| 901 | ␊ |
| 902 | ␉␉/* enable the rom */␊ |
| 903 | ␉␉RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));␊ |
| 904 | ␊ |
| 905 | ␉␉/* Disable VGA mode */␊ |
| 906 | ␉␉RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
| 907 | ␉␉RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
| 908 | ␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));␊ |
| 909 | ␊ |
| 910 | ␉␉if (chip_family == CHIP_FAMILY_RV730)␊ |
| 911 | ␉␉{␊ |
| 912 | ␉␉␉cg_spll_func_cntl = RegRead32(R600_CG_SPLL_FUNC_CNTL);␊ |
| 913 | ␊ |
| 914 | ␉␉␉/* enable bypass mode */␊ |
| 915 | ␉␉␉RegWrite32(R600_CG_SPLL_FUNC_CNTL, (cg_spll_func_cntl | R600_SPLL_BYPASS_EN));␊ |
| 916 | ␊ |
| 917 | ␉␉␉/* wait for SPLL_CHG_STATUS to change to 1 */␊ |
| 918 | ␉␉␉cg_spll_status = 0;␊ |
| 919 | ␉␉␉while (!(cg_spll_status & R600_SPLL_CHG_STATUS))␊ |
| 920 | ␉␉␉␉cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);␊ |
| 921 | ␊ |
| 922 | ␉␉␉RegWrite32(R600_ROM_CNTL, (rom_cntl & ~R600_SCK_OVERWRITE));␊ |
| 923 | ␉␉}␊ |
| 924 | ␉␉else␊ |
| 925 | ␉␉␉RegWrite32(R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));␊ |
| 926 | ␊ |
| 927 | ␉␉ret = read_vbios(true);␊ |
| 928 | ␊ |
| 929 | ␉␉/* restore regs */␊ |
| 930 | ␉␉if (chip_family == CHIP_FAMILY_RV730)␊ |
| 931 | ␉␉{␊ |
| 932 | ␉␉␉RegWrite32(R600_CG_SPLL_FUNC_CNTL, cg_spll_func_cntl);␊ |
| 933 | ␊ |
| 934 | ␉␉␉/* wait for SPLL_CHG_STATUS to change to 1 */␊ |
| 935 | ␉␉␉cg_spll_status = 0;␊ |
| 936 | ␉␉␉while (!(cg_spll_status & R600_SPLL_CHG_STATUS))␊ |
| 937 | ␉␉␉cg_spll_status = RegRead32(R600_CG_SPLL_STATUS);␊ |
| 938 | ␉␉}␊ |
| 939 | ␉␉RegWrite32(RADEON_VIPH_CONTROL, viph_control);␊ |
| 940 | ␉␉RegWrite32(RADEON_BUS_CNTL, bus_cntl);␊ |
| 941 | ␉␉RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);␊ |
| 942 | ␉␉RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);␊ |
| 943 | ␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);␊ |
| 944 | ␉␉RegWrite32(R600_ROM_CNTL, rom_cntl);␊ |
| 945 | ␉}␊ |
| 946 | ␉else␊ |
| 947 | ␉␉if (chip_family >= CHIP_FAMILY_R600)␊ |
| 948 | ␉␉{␊ |
| 949 | ␉␉␉uint32_t viph_control␉␉␉␉= RegRead32(RADEON_VIPH_CONTROL);␊ |
| 950 | ␉␉␉uint32_t bus_cntl␉␉␉␉␉= RegRead32(RADEON_BUS_CNTL);␊ |
| 951 | ␉␉␉uint32_t d1vga_control␉␉␉␉= RegRead32(AVIVO_D1VGA_CONTROL);␊ |
| 952 | ␉␉␉uint32_t d2vga_control ␉␉␉␉= RegRead32(AVIVO_D2VGA_CONTROL);␊ |
| 953 | ␉␉␉uint32_t vga_render_control␉␉␉= RegRead32(AVIVO_VGA_RENDER_CONTROL);␊ |
| 954 | ␉␉␉uint32_t rom_cntl␉␉␉␉␉= RegRead32(R600_ROM_CNTL);␊ |
| 955 | ␉␉␉uint32_t general_pwrmgt␉␉␉␉= RegRead32(R600_GENERAL_PWRMGT);␊ |
| 956 | ␉␉␉uint32_t low_vid_lower_gpio_cntl␉= RegRead32(R600_LOW_VID_LOWER_GPIO_CNTL);␊ |
| 957 | ␉␉␉uint32_t medium_vid_lower_gpio_cntl␉= RegRead32(R600_MEDIUM_VID_LOWER_GPIO_CNTL);␊ |
| 958 | ␉␉␉uint32_t high_vid_lower_gpio_cntl␉= RegRead32(R600_HIGH_VID_LOWER_GPIO_CNTL);␊ |
| 959 | ␉␉␉uint32_t ctxsw_vid_lower_gpio_cntl␉= RegRead32(R600_CTXSW_VID_LOWER_GPIO_CNTL);␊ |
| 960 | ␉␉␉uint32_t lower_gpio_enable␉␉␉= RegRead32(R600_LOWER_GPIO_ENABLE);␊ |
| 961 | ␊ |
| 962 | ␉␉␉/* disable VIP */␊ |
| 963 | ␉␉␉RegWrite32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));␊ |
| 964 | ␊ |
| 965 | ␉␉␉/* enable the rom */␊ |
| 966 | ␉␉␉RegWrite32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));␊ |
| 967 | ␊ |
| 968 | ␉␉␉/* Disable VGA mode */␊ |
| 969 | ␉␉␉RegWrite32(AVIVO_D1VGA_CONTROL, (d1vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
| 970 | ␉␉␉RegWrite32(AVIVO_D2VGA_CONTROL, (d2vga_control & ~(AVIVO_DVGA_CONTROL_MODE_ENABLE | AVIVO_DVGA_CONTROL_TIMING_SELECT)));␊ |
| 971 | ␉␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK));␊ |
| 972 | ␉␉␉RegWrite32(R600_ROM_CNTL, ((rom_cntl & ~R600_SCK_PRESCALE_CRYSTAL_CLK_MASK) | (1 << R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT) | R600_SCK_OVERWRITE));␊ |
| 973 | ␉␉␉RegWrite32(R600_GENERAL_PWRMGT, (general_pwrmgt & ~R600_OPEN_DRAIN_PADS));␊ |
| 974 | ␉␉␉RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, (low_vid_lower_gpio_cntl & ~0x400));␊ |
| 975 | ␉␉␉RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, (medium_vid_lower_gpio_cntl & ~0x400));␊ |
| 976 | ␉␉␉RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, (high_vid_lower_gpio_cntl & ~0x400));␊ |
| 977 | ␉␉␉RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, (ctxsw_vid_lower_gpio_cntl & ~0x400));␊ |
| 978 | ␉␉␉RegWrite32(R600_LOWER_GPIO_ENABLE, (lower_gpio_enable | 0x400));␊ |
| 979 | ␊ |
| 980 | ␉␉␉ret = read_vbios(true);␊ |
| 981 | ␊ |
| 982 | ␉␉␉/* restore regs */␊ |
| 983 | ␉␉␉RegWrite32(RADEON_VIPH_CONTROL, viph_control);␊ |
| 984 | ␉␉␉RegWrite32(RADEON_BUS_CNTL, bus_cntl);␊ |
| 985 | ␉␉␉RegWrite32(AVIVO_D1VGA_CONTROL, d1vga_control);␊ |
| 986 | ␉␉␉RegWrite32(AVIVO_D2VGA_CONTROL, d2vga_control);␊ |
| 987 | ␉␉␉RegWrite32(AVIVO_VGA_RENDER_CONTROL, vga_render_control);␊ |
| 988 | ␉␉␉RegWrite32(R600_ROM_CNTL, rom_cntl);␊ |
| 989 | ␉␉␉RegWrite32(R600_GENERAL_PWRMGT, general_pwrmgt);␊ |
| 990 | ␉␉␉RegWrite32(R600_LOW_VID_LOWER_GPIO_CNTL, low_vid_lower_gpio_cntl);␊ |
| 991 | ␉␉␉RegWrite32(R600_MEDIUM_VID_LOWER_GPIO_CNTL, medium_vid_lower_gpio_cntl);␊ |
| 992 | ␉␉␉RegWrite32(R600_HIGH_VID_LOWER_GPIO_CNTL, high_vid_lower_gpio_cntl);␊ |
| 993 | ␉␉␉RegWrite32(R600_CTXSW_VID_LOWER_GPIO_CNTL, ctxsw_vid_lower_gpio_cntl);␊ |
| 994 | ␉␉␉RegWrite32(R600_LOWER_GPIO_ENABLE, lower_gpio_enable);␊ |
| 995 | ␊ |
| 996 | ␉␉}␊ |
| 997 | ␊ |
| 998 | ␉return ret;␊ |
| 999 | }␊ |
| 1000 | ␊ |
| 1001 | bool radeon_card_posted(void)␊ |
| 1002 | {␊ |
| 1003 | ␉uint32_t reg;␊ |
| 1004 | ␊ |
| 1005 | ␉/* first check CRTCs */␊ |
| 1006 | ␉reg = RegRead32(RADEON_CRTC_GEN_CNTL) | RegRead32(RADEON_CRTC2_GEN_CNTL);␊ |
| 1007 | ␉if (reg & RADEON_CRTC_EN)␊ |
| 1008 | ␉␉return true;␊ |
| 1009 | ␊ |
| 1010 | ␉/* then check MEM_SIZE, in case something turned the crtcs off */␊ |
| 1011 | ␉reg = RegRead32(R600_CONFIG_MEMSIZE);␊ |
| 1012 | ␉if (reg)␊ |
| 1013 | ␉␉return true;␊ |
| 1014 | ␊ |
| 1015 | ␉return false;␊ |
| 1016 | }␊ |
| 1017 | #if 0␊ |
| 1018 | bool devprop_add_pci_config_space(void)␊ |
| 1019 | {␊ |
| 1020 | ␉int offset;␊ |
| 1021 | ␊ |
| 1022 | ␉uint8_t *config_space = malloc(0x100);␊ |
| 1023 | ␉if (!config_space)␊ |
| 1024 | ␉␉return false;␊ |
| 1025 | ␊ |
| 1026 | ␉for (offset = 0; offset < 0x100; offset += 4)␊ |
| 1027 | ␉␉config_space[offset / 4] = pci_config_read32(card->pci_dev->dev.addr, offset);␊ |
| 1028 | ␊ |
| 1029 | ␉devprop_add_value(card->device, "ATY,PCIConfigSpace", config_space, 0x100);␊ |
| 1030 | ␉free(config_space);␊ |
| 1031 | ␉return true;␊ |
| 1032 | }␊ |
| 1033 | #endif␊ |
| 1034 | ␊ |
| 1035 | static bool init_card(pci_dt_t *pci_dev)␊ |
| 1036 | {␊ |
| 1037 | ␉const char *fb_name;␊ |
| 1038 | ␉char name[24];␊ |
| 1039 | ␉char name_parent[24];␊ |
| 1040 | ␉int i;␊ |
| 1041 | ␉bool add_vbios = true;␊ |
| 1042 | ␊ |
| 1043 | ␉card = malloc(sizeof(card_t));␊ |
| 1044 | ␉if (!card)␊ |
| 1045 | ␉␉return false;␊ |
| 1046 | ␉bzero(card, sizeof(card_t));␊ |
| 1047 | ␊ |
| 1048 | ␉card->pci_dev = pci_dev;␊ |
| 1049 | ␊ |
| 1050 | ␉for (i = 0; radeon_cards[i].device_id ; i++)␊ |
| 1051 | ␉␉if (radeon_cards[i].device_id == pci_dev->device_id)␊ |
| 1052 | ␉␉{␊ |
| 1053 | ␉␉␉card->info = &radeon_cards[i];␊ |
| 1054 | ␉␉␉if ((radeon_cards[i].subsys_id == 0x00000000) || ␊ |
| 1055 | ␉␉␉␉(radeon_cards[i].subsys_id == pci_dev->subsys_id.subsys_id))␊ |
| 1056 | ␉␉␉␉break;␊ |
| 1057 | ␉␉}␊ |
| 1058 | ␊ |
| 1059 | ␉if (!card->info->device_id || !card->info->cfg_name)␊ |
| 1060 | ␉{␊ |
| 1061 | ␉␉printf("Unsupported card!\n");␊ |
| 1062 | ␉␉return false;␊ |
| 1063 | ␉}␊ |
| 1064 | ␊ |
| 1065 | ␊ |
| 1066 | ␉card->fb␉␉= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_0) & ~0x0f);␊ |
| 1067 | ␉card->mmio␉␉= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_2) & ~0x0f);␊ |
| 1068 | ␉card->io␉␉= (uint8_t *)(pci_config_read32(pci_dev->dev.addr, PCI_BASE_ADDRESS_4) & ~0x03);␊ |
| 1069 | ␊ |
| 1070 | ␉verbose("Framebuffer @0x%08X MMIO @0x%08X I/O Port @0x%08X ROM Addr @0x%08X\n", ␊ |
| 1071 | ␉␉card->fb, card->mmio, card->io, pci_config_read32(pci_dev->dev.addr, PCI_ROM_ADDRESS));␊ |
| 1072 | ␊ |
| 1073 | ␉card->posted␉= radeon_card_posted();␊ |
| 1074 | ␉verbose("ATI card %s, ", card->posted ? "POSTed" : "non-POSTed");␊ |
| 1075 | ␉␊ |
| 1076 | ␉get_vram_size();␊ |
| 1077 | ␊ |
| 1078 | ␉getBoolForKey(kATYbinimage, &add_vbios, &bootInfo->bootConfig);␊ |
| 1079 | ␊ |
| 1080 | ␉if (add_vbios)␊ |
| 1081 | ␉␉if (!load_vbios_file(kUseAtiROM, pci_dev->vendor_id, pci_dev->device_id, pci_dev->subsys_id.subsys_id))␊ |
| 1082 | ␉␉{␊ |
| 1083 | ␉␉␉verbose("reading VBIOS from %s", card->posted ? "legacy space" : "PCI ROM");␊ |
| 1084 | ␉␉␉if (card->posted)␊ |
| 1085 | ␉␉␉␉read_vbios(false);␊ |
| 1086 | ␉␉␉else␊ |
| 1087 | ␉␉␉␉read_disabled_vbios();␊ |
| 1088 | ␉␉␉verbose("\n");␊ |
| 1089 | ␉␉}␊ |
| 1090 | ␊ |
| 1091 | ␉card->ports = 2; // default␊ |
| 1092 | ␊ |
| 1093 | ␉if (card->info->chip_family >= CHIP_FAMILY_CEDAR)␊ |
| 1094 | ␉{␊ |
| 1095 | ␉␉card->flags |= EVERGREEN;␊ |
| 1096 | ␉␉card->ports = 3;␊ |
| 1097 | ␉}␊ |
| 1098 | ␊ |
| 1099 | ␉atN = 0;␊ |
| 1100 | ␊ |
| 1101 | ␉fb_name = getStringForKey(kAtiConfig, &bootInfo->bootConfig);␊ |
| 1102 | ␉if (!fb_name)␊ |
| 1103 | ␉{␊ |
| 1104 | ␉␉fb_name = card_configs[card->info->cfg_name].name;␊ |
| 1105 | ␉␉card->ports = card_configs[card->info->cfg_name].ports;␊ |
| 1106 | ␉}␊ |
| 1107 | ␉else␊ |
| 1108 | ␉{␊ |
| 1109 | ␉␉for (i = 0; i < kCfgEnd; i++)␊ |
| 1110 | ␉␉␉if (strcmp(fb_name, card_configs[i].name) == 0)␊ |
| 1111 | ␉␉␉␉card->ports = card_configs[i].ports;␊ |
| 1112 | ␉}␊ |
| 1113 | ␊ |
| 1114 | ␉sprintf(name, "ATY,%s", fb_name);␊ |
| 1115 | ␉aty_name.type = kStr;␊ |
| 1116 | ␉aty_name.size = strlen(name) + 1;␊ |
| 1117 | ␉aty_name.data = (uint8_t *)name;␊ |
| 1118 | ␊ |
| 1119 | ␉sprintf(name_parent, "ATY,%sParent", fb_name);␊ |
| 1120 | ␉aty_nameparent.type = kStr;␊ |
| 1121 | ␉aty_nameparent.size = strlen(name_parent) + 1;␊ |
| 1122 | ␉aty_nameparent.data = (uint8_t *)name_parent;␊ |
| 1123 | ␊ |
| 1124 | ␉return true;␊ |
| 1125 | }␊ |
| 1126 | ␊ |
| 1127 | bool setup_ati_devprop(pci_dt_t *ati_dev)␊ |
| 1128 | {␊ |
| 1129 | ␉char *devicepath;␊ |
| 1130 | ␊ |
| 1131 | ␉if (!init_card(ati_dev))␊ |
| 1132 | ␉␉return false;␊ |
| 1133 | ␊ |
| 1134 | ␉/* ------------------------------------------------- */␊ |
| 1135 | ␉/* Find a better way to do this (in device_inject.c) */␊ |
| 1136 | ␉if (!string)␊ |
| 1137 | ␉␉string = devprop_create_string();␊ |
| 1138 | ␊ |
| 1139 | ␉devicepath = get_pci_dev_path(ati_dev);␊ |
| 1140 | ␉card->device = devprop_add_device(string, devicepath);␊ |
| 1141 | ␉if (!card->device)␊ |
| 1142 | ␉␉return false;␊ |
| 1143 | ␉/* ------------------------------------------------- */␊ |
| 1144 | ␊ |
| 1145 | #if 0␊ |
| 1146 | ␉uint64_t fb␉␉= (uint32_t)card->fb;␊ |
| 1147 | ␉uint64_t mmio␉= (uint32_t)card->mmio;␊ |
| 1148 | ␉uint64_t io␉␉= (uint32_t)card->io;␊ |
| 1149 | ␉devprop_add_value(card->device, "ATY,FrameBufferOffset", &fb, 8);␊ |
| 1150 | ␉devprop_add_value(card->device, "ATY,RegisterSpaceOffset", &mmio, 8);␊ |
| 1151 | ␉devprop_add_value(card->device, "ATY,IOSpaceOffset", &io, 8);␊ |
| 1152 | #endif␊ |
| 1153 | ␊ |
| 1154 | ␉devprop_add_list(ati_devprop_list);␊ |
| 1155 | ␊ |
| 1156 | ␉/* ------------------------------------------------- */␊ |
| 1157 | ␉/* Find a better way to do this (in device_inject.c) */␊ |
| 1158 | ␉stringdata = malloc(string->length);␊ |
| 1159 | ␉memcpy(stringdata, (uint8_t*)devprop_generate_string(string), string->length);␊ |
| 1160 | ␉stringlength = string->length;␊ |
| 1161 | ␉/* ------------------------------------------------- */␊ |
| 1162 | ␊ |
| 1163 | ␉verbose("ATI %s %s %dMB (%s) [%04x:%04x] (subsys [%04x:%04x]):: %s\n", ␊ |
| 1164 | ␉␉␉chip_family_name[card->info->chip_family], card->info->model_name, ␊ |
| 1165 | ␉␉␉(uint32_t)(card->vram_size / (1024 * 1024)), card_configs[card->info->cfg_name].name, ␊ |
| 1166 | ␉␉␉ati_dev->vendor_id, ati_dev->device_id,␊ |
| 1167 | ␉␉␉ati_dev->subsys_id.subsys.vendor_id, ati_dev->subsys_id.subsys.device_id, ␊ |
| 1168 | ␉␉␉devicepath);␊ |
| 1169 | ␊ |
| 1170 | ␉free(card);␊ |
| 1171 | ␊ |
| 1172 | ␉return true;␊ |
| 1173 | }␊ |
| 1174 | ␊ |
| 1175 | |